CA1147062A - Digital gain control apparatus - Google Patents
Digital gain control apparatusInfo
- Publication number
- CA1147062A CA1147062A CA000356718A CA356718A CA1147062A CA 1147062 A CA1147062 A CA 1147062A CA 000356718 A CA000356718 A CA 000356718A CA 356718 A CA356718 A CA 356718A CA 1147062 A CA1147062 A CA 1147062A
- Authority
- CA
- Canada
- Prior art keywords
- terminal
- circuit
- treble
- control
- time constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G5/00—Tone control or bandwidth control in amplifiers
- H03G5/02—Manually-operated control
- H03G5/04—Manually-operated control in untuned amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/02—Remote control of amplification, tone, or bandwidth
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
- H03G3/001—Digital control of analog signals
Abstract
ABSTRACT OF THE DISCLOSURE
A digital gain control apparatus includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal, a shift register supplied with the plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator, a latch circuit connected to the output of the shift register and supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
a decoder connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals, and a function selector circuit and a volume adjusting circuit for the selected functions, each being controlled by the plurality of control signals, the shift register, latch circuit and volume adjusting circuit being formed in one chip-integrated circuit. For one example, a bass and treble tone cont-rol circuit is provided, which is controlled by the output of the decoder.
A digital gain control apparatus includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal, a shift register supplied with the plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator, a latch circuit connected to the output of the shift register and supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
a decoder connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals, and a function selector circuit and a volume adjusting circuit for the selected functions, each being controlled by the plurality of control signals, the shift register, latch circuit and volume adjusting circuit being formed in one chip-integrated circuit. For one example, a bass and treble tone cont-rol circuit is provided, which is controlled by the output of the decoder.
Description
~7~62 BACKGROUND OF THE INVENTION
Field of the Invention The present invention relates generally to a digital gain control apparatus and is directed more particularly to a digital gain control apparatus suitable to be made as one chip-integrated circuit.
_escription of the Prior Art In the art, an audio pre-amplifier is formed of a function selector of a phone-tuner-AUX, a volume control circuit, a stereo-monaural mode changin~-over circuit, a stereo balancer, a bass/treble tone control circuit and so on. In this case, since a number of changing-over circuits and resistors are required, it is difficult to make the audio pre-amplifier as an IC (integrated circuit).
Recently, instead of a mechanical switch serving as a change-over circuit, a semiconductor element such as an MOS FET has been practically used for switching a signal with a wide dynamic range without causing any distortion and also a micro-processor has been used widely for complicated signal processings.
However, an audio pre-amplifier to be used in combination with a digital control IC such as a micro processor has not been made as one chip IC.
OBJECTS AND SU~L~ARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a digital gain control apparatus free from the defect inherent to the prior art.
Another object of the invention is to provide a digital gain control apparatus made as one chip IC which is suitable to be used in combination with a micro processor.
~7~62 In accordance with an example of the present invention, a digital gain control apparatus is provided which includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal~
a shift register supplied with a plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator~
a latch circuit connected to the output of the shift register and supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
a decoder connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals;
a function selector;
a volume adjusting circuit for the selected one of unctions;
the function selector and volume adjusting circuit being connected to output of the decoder and controlled by the plurality of control signals; and the shift register, latch circuit, decoder, function selector and volume adjusting circuit being formed in one ~5 chip-integrated circuit.
The other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings.
~71~Z
BRIEF DESCRIPTION OF THE DRAWING
Fig. 1 is a front view of an audio pre-amplifier in which an example of the invention is used;
Figs. 2 and 4 are respectively schematic block diagrams showing an example of the invention;
Fig. 3 is a circuit diagram showing, partially in block, an example of the invention;
Fig. 5 is a connection diagram showing an example of the function selector according to the invention, Figs. 6 to 10, inclusive, are connection diagrams respectively showing an example of the tone control circuit according to the invention;
Fig. ll is a connection diagram showing an example of the volume control circuit according to the invention;
Fig. 12 is a block diagram showing a digital control system of the invention;
Figs. 13 and 14 are tables respectively showing the contents of respective words of digital coded signals used in the invention, and Fig. 15 is a comparative table showing the relation between respective switches of the volume control circuit used in the invention and attenuation amount.
DESCRIPTION OF THE PREFERRED EMBODIME~T
The present invention will be hereinafter described with reference to the attached drawings.
7~i2 Turning -to Fig. 1 the operation panel of an audio signal control apparatus will be described firstly. In Fig. 1, reference letters POs designate each operating elements or those of a touch switch in this example, PLs each display lamps of a dot-shape (for example, light emission diodes), and DS a numeral display device (using for example, light emission diodes), respectively.
On the column of "FUNCTION" there are provided four audio signal selecting operating elements PO and four display lamps PL in correspondence with the respective operating elements PO to display that the elements Po are opera-ted.
Letters "PHONO", "TUNER", "TV" and "AUX" marked under the respective operating elements Po show record player, radio tuner, television tuner and auxiliary terminals, respectively.
On -the column of "MONITOR" there are provided three monitor signal selecting operating elements PO and three display lamps PL in correspondence therewith. Letters "T-l", "T-2" and "SOURCE" under the operating elements PO show first and second tape recorders and an instrument or auxiliary terminal selected by operating the elements PO on the column of "FUNCTION".
An operating element Po with a display lamp PL
and the mark "MUTING" designates such a muting operating element that when it is operated the volume or level of the signal under being monitored is instanteously reduced by, for example, 20 dB.
On the column of "RECORD" provided are three record signal selecting operating elements PO and three display lamps PL in correspondence therewith~ Operating elements PO
with marks of "Tl ~ 2", "T2 ~ 1" and "SOURCE"show respectively that the reproduced signal from the first tape recorder is fed to the second tape recorder, vice versa, and the audio signal from the instrument or auxiliary terminal selected by operating the operating elements PO on the column "FUNCTION" is fed as the record signal to the first or second tape recorder.
7~6;2 On the column of "MODE" provided are two mode changing opera-ting elements Po for the change between stereo and monaural of the monitor and two display lamps PL in correspondence therewith. Letters "STEREO" and "MONO"
respectively show stereo and monaural modes.
On the column of "VOLUME", the following elements are provided. The numeral display device DS displays the sound volume of the monitor signal as an attenuation value, in which the attenuation value is displayed as O, 1, 2 ... 78, 79 dB at the step of 1 dB and also as ~ dB. In fact, ~ dB is displayed as, for example, "E". PL-BL or the mark "BALANCE" designates a balance display device made of eleven display lamps PL arranged laterally. In this case, when the center display lamp PL is lit, the volumes of the monitor signals at the left and right channels are balanced, and some of the left and right display lamps PL are lit in accordance with unbalanced amount in the monitor signals of the left and right channels. Operating elements PO with the marks "UP", "DOWN", "L" and "R" are respectively such ones which show the volume-up, volume-down, left and right level adjustments for t:he left and right balance adjustment.
On the column of "TONE" provided are four operating elements PO for sound volume adjusting. On the column o~ "TREBLE" provided is a treble display device PL-TR consisting of eleven display lamps PL which displays a treble amount in a step manner as -10, -8, -6, -4, -2, DEFEAT, 2, 4, 6, 8 and 10. At the side of the treble display device PL-TR, provided are operating elements PO with the marks "UP" and "DOWN" for up-and-down-adjustment of treble amount. On the column of "BASS" provided is a bass display device PL-BS consisting of eleven display lamps PL which displays in a step manner bass amounts as -10, -8, -6, -4, -2, DEFEAT, 2, 4, 6, 8, and 10.
At the side of the bass display device PL-BS provided are '`Y,.~';;''-~7CD6;~
operating elements PO with the marks "UP" and "DOWN" for thebass-up and -down adjustments. On the column of "FILTER"
provided are two operating elements PO for adjusting the filter characteristics and two display lamps PL in correspondence therewith. The marks "HIGH" and "LOW" under the elements PO
on the column "FILTER" show high and low adjustments of the filter characteristics.
On the column of "MEMORY", provided three operating elements PO for selecting memory portions, single operating element PO for memory-write and four display lamps PL in correspondence therewith. Marks "M-l", "M-2" and "M-3"
designate three memory portions, and that "WRITE" a write-in, respectively.
With the above audio signal control apparatus, when the operating element PO with the mark "WRITE" and either one oF those PO with the marks "M-l", "M-2" and "M-3" are operated, the control state is written in either of three memories of a memory 16 (refer to Fig. 2) and stored therein.
Further, when either of the elements PO with the marks "M-l", "M-2" and "M-3" is operated, the control state of the audio signal corresponding to the operated element and stored in the memory is read out and the respective members of the audio signal control apparatus are set at the corresponding state.
Turning to Fig. 2, an example of the audio signal control apparatus according to the present invention will be generally described. In Fig. 2, 19 generally designates a digital audio signal control circuit which is made as one chip IC except its externally connected parts and which is form~d of plural channel, or in the illustrated example left and right channel audio signal control circuits 14L, 14R
and a digital control signal generator 20 producing a digital control signal for controlling the circuits 14L, 14R to which connected are an audio signal input terminal group 15 described later. The digital control signal 5~
~L47~36~
generator 20 receives a serial binary code signal, a clock signal and a strobe signal from a micro processor (micro computer~
10 and produces a control signal to ON-and OFF-control a number of switches (electronic switches such as FETs with SlPOS gates) in the control circuits 14L and 14R.
In Fig. 2, 11 designates a control signal input circuit formed of switch (touch switch) group which are operated when the various operating elements PO depicted in Fig. 1 are operated. The signal (control signal) from the control signal input circuit 11 is fed to the micro processor 10. A receiver 12 receives the control signal for the audio signal from a transmitter 13 as a remote control signal with a carrier of, for example, ultrared waves. The receiver 12 and transmitter 13 form a separate control signal input circuit 11'. A
display device 18 is provided which includes the display lamps PL, display device DS, display devices PL-BL, PL-TR, PL-BS and so on and performs the display operation by the display control signal from the micro processor 10 through a decoder and drive circuit 17.
Turning to Fig. 3, a practical example of the digital audio signal control circuit 19 will be explained. This control circuit 19 consists of an IC (one chip semiconductor integrated circuit) 19' and an externally connected circuit such as an equalizer amplififer and a tone control amplifier. The IC 19' has pins lP to 42P, and pins lP to 9P and 34P to 42P are connected to respective terminals of the audio signal input terminal group 15. Now, the respective terminals of the terminal group 15 will be described. Terminals PHONO-L and PHONO-R are respectively supplied with the signals of the left and right channels reproduced by the record player and connected to the pins 42P and lP through an equalizer circuits 29 which are well known and whose description will be omitted. Terminals TUNER-L
~9L7il;~62 g and TUNER-R are respectively supplied with the audio signals of the left and right channels from the radio tuner, and connected to the pins 41P and 2P. Terminals TV-L and TV-R are respectively supplied with the audio signals of the left and right channels from the television tuner, and connected to the pins 40P and 3P.
Terminals AUX-L and AUX-R are respectively auxiliary terminals for the left and right channels and respectively connected to the pins 39P and 4P. Terminals TAPE l-L and TAPE l-R are respectively supplied with the reproduced signals of the left and right channels from the first tape recorder, and connected to the pins 38P and SP. Terminals RECOUT l-L and RECOUT l-R
are respectively supplied with the recording signals of the left and right channels to be fed to the first tape recorder, and connected to the pins 37P and 6P. Terminals TAPE 2-L and TAPR 2-R
are respectively supplied with the reproduced signals of the left and right channels from the second tape recorder, and connected to the pins 36P and 7P. Terminals RECOUT 2-L and RECOUT 2-R are respectively supplied with the recording signals of the left and right channels to be fed to the second tape recorder and connected to the pins 35E' and 8P. Terminals GROUND-L and GROUND-R are respectively ground terminals for the left and right channels and connected to the pins 34P and 9P .
The pins 28P and 33P of the IC chip 19' are respectively connected with the circuit elements of an external circuit such as a tone adjusting circuit 35 for the left channel, and the pins 10P to 15P of the IC chip 19' are respectively connected with the circuit elements of a tone adjusting circuit 35 for the right channel. The tone adjusting circuits 35 for the left and right channels are same in construction and will be described later in detail with respect to Fig. 6.
7~2 I'he pins 25P, 26P and 27P of the IC chip 19' are respectively connected with the circuit elements of an external circuit such as a variable filter circuit 38 for the left channel, and the pins 16P, 17P and 18P are respectively connected with the circuit elements of an external circuit such a variable filter circuit 38 for the right channel. soth the variable filter circuits 38 for the left and right channels are same in construction and will be described later in detail with reference to Fig. 11.
The digital control signal generator 20 will be described in detail with reference to Fig. 12 but described generally herein. In Fig. 3, 21 designates a shift register which is supplied with a clock signal and a data signal from the micro processor 10 through the pins 24P and 23P of the IC chip 19'. The output from the shift register 21 is fed to a latch circuit 22. When a strobe signal from the micro processor 10 is supplied through the pin 22P of the IC chip 19' to the latch circuit 22, it latches the contents of the shift register 21.
The output from the latch circuit 22 is fed to a decoder 23 to be decoded. The decoded output therefrom is fed to a drive circuit 24 whose output is used to ON- and OFF-control the respective switches (electronic switches) of the circuit consisting of the resister circuits and switch circuits formed in the IC chip 19' of the left and right channel audio signal control circuits 14~ and 14R. The pin 21P of the IC chip 19' is connected with a ground terminal of the micro processor 10, and the pins 20P and l9P of the IC chip 19' are respectively conn:ected to positive and negative DC voltage sources +B and -B, respectively. In Fig. 3, 54L and 54R are respectively output terminals for the left and right channel audio signals.
~7~6,2 Turning to Fig. 4, the left channel audio signal control circuit 14L will be generally described. Since the right channel audio signal control circuit 14R is substantially same as that of the control circuit 14L, its detailed description will be omitted.
In Fig. 4, 30 designates a function selector circuit which selects one of the audio signals from the terminals PHONO-L, TUNER-L, TV-L and AUX-L and supplies the selected audio signal to a monitor signal selector circuit 31. The monitor signal selector circuit 31 selects one of the respective audio signals from the function selector 30 and terminals TAPE l-L
and TAPE 2-L as a monitor signal and supplies the same to a mode change-over circuit 33. A record signal selector circuit 32 is provided which selects one of the audio signals from the function selector 30 and the terminals T~PE l-L and TAPE
Field of the Invention The present invention relates generally to a digital gain control apparatus and is directed more particularly to a digital gain control apparatus suitable to be made as one chip-integrated circuit.
_escription of the Prior Art In the art, an audio pre-amplifier is formed of a function selector of a phone-tuner-AUX, a volume control circuit, a stereo-monaural mode changin~-over circuit, a stereo balancer, a bass/treble tone control circuit and so on. In this case, since a number of changing-over circuits and resistors are required, it is difficult to make the audio pre-amplifier as an IC (integrated circuit).
Recently, instead of a mechanical switch serving as a change-over circuit, a semiconductor element such as an MOS FET has been practically used for switching a signal with a wide dynamic range without causing any distortion and also a micro-processor has been used widely for complicated signal processings.
However, an audio pre-amplifier to be used in combination with a digital control IC such as a micro processor has not been made as one chip IC.
OBJECTS AND SU~L~ARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a digital gain control apparatus free from the defect inherent to the prior art.
Another object of the invention is to provide a digital gain control apparatus made as one chip IC which is suitable to be used in combination with a micro processor.
~7~62 In accordance with an example of the present invention, a digital gain control apparatus is provided which includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal~
a shift register supplied with a plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator~
a latch circuit connected to the output of the shift register and supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
a decoder connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals;
a function selector;
a volume adjusting circuit for the selected one of unctions;
the function selector and volume adjusting circuit being connected to output of the decoder and controlled by the plurality of control signals; and the shift register, latch circuit, decoder, function selector and volume adjusting circuit being formed in one ~5 chip-integrated circuit.
The other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings.
~71~Z
BRIEF DESCRIPTION OF THE DRAWING
Fig. 1 is a front view of an audio pre-amplifier in which an example of the invention is used;
Figs. 2 and 4 are respectively schematic block diagrams showing an example of the invention;
Fig. 3 is a circuit diagram showing, partially in block, an example of the invention;
Fig. 5 is a connection diagram showing an example of the function selector according to the invention, Figs. 6 to 10, inclusive, are connection diagrams respectively showing an example of the tone control circuit according to the invention;
Fig. ll is a connection diagram showing an example of the volume control circuit according to the invention;
Fig. 12 is a block diagram showing a digital control system of the invention;
Figs. 13 and 14 are tables respectively showing the contents of respective words of digital coded signals used in the invention, and Fig. 15 is a comparative table showing the relation between respective switches of the volume control circuit used in the invention and attenuation amount.
DESCRIPTION OF THE PREFERRED EMBODIME~T
The present invention will be hereinafter described with reference to the attached drawings.
7~i2 Turning -to Fig. 1 the operation panel of an audio signal control apparatus will be described firstly. In Fig. 1, reference letters POs designate each operating elements or those of a touch switch in this example, PLs each display lamps of a dot-shape (for example, light emission diodes), and DS a numeral display device (using for example, light emission diodes), respectively.
On the column of "FUNCTION" there are provided four audio signal selecting operating elements PO and four display lamps PL in correspondence with the respective operating elements PO to display that the elements Po are opera-ted.
Letters "PHONO", "TUNER", "TV" and "AUX" marked under the respective operating elements Po show record player, radio tuner, television tuner and auxiliary terminals, respectively.
On -the column of "MONITOR" there are provided three monitor signal selecting operating elements PO and three display lamps PL in correspondence therewith. Letters "T-l", "T-2" and "SOURCE" under the operating elements PO show first and second tape recorders and an instrument or auxiliary terminal selected by operating the elements PO on the column of "FUNCTION".
An operating element Po with a display lamp PL
and the mark "MUTING" designates such a muting operating element that when it is operated the volume or level of the signal under being monitored is instanteously reduced by, for example, 20 dB.
On the column of "RECORD" provided are three record signal selecting operating elements PO and three display lamps PL in correspondence therewith~ Operating elements PO
with marks of "Tl ~ 2", "T2 ~ 1" and "SOURCE"show respectively that the reproduced signal from the first tape recorder is fed to the second tape recorder, vice versa, and the audio signal from the instrument or auxiliary terminal selected by operating the operating elements PO on the column "FUNCTION" is fed as the record signal to the first or second tape recorder.
7~6;2 On the column of "MODE" provided are two mode changing opera-ting elements Po for the change between stereo and monaural of the monitor and two display lamps PL in correspondence therewith. Letters "STEREO" and "MONO"
respectively show stereo and monaural modes.
On the column of "VOLUME", the following elements are provided. The numeral display device DS displays the sound volume of the monitor signal as an attenuation value, in which the attenuation value is displayed as O, 1, 2 ... 78, 79 dB at the step of 1 dB and also as ~ dB. In fact, ~ dB is displayed as, for example, "E". PL-BL or the mark "BALANCE" designates a balance display device made of eleven display lamps PL arranged laterally. In this case, when the center display lamp PL is lit, the volumes of the monitor signals at the left and right channels are balanced, and some of the left and right display lamps PL are lit in accordance with unbalanced amount in the monitor signals of the left and right channels. Operating elements PO with the marks "UP", "DOWN", "L" and "R" are respectively such ones which show the volume-up, volume-down, left and right level adjustments for t:he left and right balance adjustment.
On the column of "TONE" provided are four operating elements PO for sound volume adjusting. On the column o~ "TREBLE" provided is a treble display device PL-TR consisting of eleven display lamps PL which displays a treble amount in a step manner as -10, -8, -6, -4, -2, DEFEAT, 2, 4, 6, 8 and 10. At the side of the treble display device PL-TR, provided are operating elements PO with the marks "UP" and "DOWN" for up-and-down-adjustment of treble amount. On the column of "BASS" provided is a bass display device PL-BS consisting of eleven display lamps PL which displays in a step manner bass amounts as -10, -8, -6, -4, -2, DEFEAT, 2, 4, 6, 8, and 10.
At the side of the bass display device PL-BS provided are '`Y,.~';;''-~7CD6;~
operating elements PO with the marks "UP" and "DOWN" for thebass-up and -down adjustments. On the column of "FILTER"
provided are two operating elements PO for adjusting the filter characteristics and two display lamps PL in correspondence therewith. The marks "HIGH" and "LOW" under the elements PO
on the column "FILTER" show high and low adjustments of the filter characteristics.
On the column of "MEMORY", provided three operating elements PO for selecting memory portions, single operating element PO for memory-write and four display lamps PL in correspondence therewith. Marks "M-l", "M-2" and "M-3"
designate three memory portions, and that "WRITE" a write-in, respectively.
With the above audio signal control apparatus, when the operating element PO with the mark "WRITE" and either one oF those PO with the marks "M-l", "M-2" and "M-3" are operated, the control state is written in either of three memories of a memory 16 (refer to Fig. 2) and stored therein.
Further, when either of the elements PO with the marks "M-l", "M-2" and "M-3" is operated, the control state of the audio signal corresponding to the operated element and stored in the memory is read out and the respective members of the audio signal control apparatus are set at the corresponding state.
Turning to Fig. 2, an example of the audio signal control apparatus according to the present invention will be generally described. In Fig. 2, 19 generally designates a digital audio signal control circuit which is made as one chip IC except its externally connected parts and which is form~d of plural channel, or in the illustrated example left and right channel audio signal control circuits 14L, 14R
and a digital control signal generator 20 producing a digital control signal for controlling the circuits 14L, 14R to which connected are an audio signal input terminal group 15 described later. The digital control signal 5~
~L47~36~
generator 20 receives a serial binary code signal, a clock signal and a strobe signal from a micro processor (micro computer~
10 and produces a control signal to ON-and OFF-control a number of switches (electronic switches such as FETs with SlPOS gates) in the control circuits 14L and 14R.
In Fig. 2, 11 designates a control signal input circuit formed of switch (touch switch) group which are operated when the various operating elements PO depicted in Fig. 1 are operated. The signal (control signal) from the control signal input circuit 11 is fed to the micro processor 10. A receiver 12 receives the control signal for the audio signal from a transmitter 13 as a remote control signal with a carrier of, for example, ultrared waves. The receiver 12 and transmitter 13 form a separate control signal input circuit 11'. A
display device 18 is provided which includes the display lamps PL, display device DS, display devices PL-BL, PL-TR, PL-BS and so on and performs the display operation by the display control signal from the micro processor 10 through a decoder and drive circuit 17.
Turning to Fig. 3, a practical example of the digital audio signal control circuit 19 will be explained. This control circuit 19 consists of an IC (one chip semiconductor integrated circuit) 19' and an externally connected circuit such as an equalizer amplififer and a tone control amplifier. The IC 19' has pins lP to 42P, and pins lP to 9P and 34P to 42P are connected to respective terminals of the audio signal input terminal group 15. Now, the respective terminals of the terminal group 15 will be described. Terminals PHONO-L and PHONO-R are respectively supplied with the signals of the left and right channels reproduced by the record player and connected to the pins 42P and lP through an equalizer circuits 29 which are well known and whose description will be omitted. Terminals TUNER-L
~9L7il;~62 g and TUNER-R are respectively supplied with the audio signals of the left and right channels from the radio tuner, and connected to the pins 41P and 2P. Terminals TV-L and TV-R are respectively supplied with the audio signals of the left and right channels from the television tuner, and connected to the pins 40P and 3P.
Terminals AUX-L and AUX-R are respectively auxiliary terminals for the left and right channels and respectively connected to the pins 39P and 4P. Terminals TAPE l-L and TAPE l-R are respectively supplied with the reproduced signals of the left and right channels from the first tape recorder, and connected to the pins 38P and SP. Terminals RECOUT l-L and RECOUT l-R
are respectively supplied with the recording signals of the left and right channels to be fed to the first tape recorder, and connected to the pins 37P and 6P. Terminals TAPE 2-L and TAPR 2-R
are respectively supplied with the reproduced signals of the left and right channels from the second tape recorder, and connected to the pins 36P and 7P. Terminals RECOUT 2-L and RECOUT 2-R are respectively supplied with the recording signals of the left and right channels to be fed to the second tape recorder and connected to the pins 35E' and 8P. Terminals GROUND-L and GROUND-R are respectively ground terminals for the left and right channels and connected to the pins 34P and 9P .
The pins 28P and 33P of the IC chip 19' are respectively connected with the circuit elements of an external circuit such as a tone adjusting circuit 35 for the left channel, and the pins 10P to 15P of the IC chip 19' are respectively connected with the circuit elements of a tone adjusting circuit 35 for the right channel. The tone adjusting circuits 35 for the left and right channels are same in construction and will be described later in detail with respect to Fig. 6.
7~2 I'he pins 25P, 26P and 27P of the IC chip 19' are respectively connected with the circuit elements of an external circuit such as a variable filter circuit 38 for the left channel, and the pins 16P, 17P and 18P are respectively connected with the circuit elements of an external circuit such a variable filter circuit 38 for the right channel. soth the variable filter circuits 38 for the left and right channels are same in construction and will be described later in detail with reference to Fig. 11.
The digital control signal generator 20 will be described in detail with reference to Fig. 12 but described generally herein. In Fig. 3, 21 designates a shift register which is supplied with a clock signal and a data signal from the micro processor 10 through the pins 24P and 23P of the IC chip 19'. The output from the shift register 21 is fed to a latch circuit 22. When a strobe signal from the micro processor 10 is supplied through the pin 22P of the IC chip 19' to the latch circuit 22, it latches the contents of the shift register 21.
The output from the latch circuit 22 is fed to a decoder 23 to be decoded. The decoded output therefrom is fed to a drive circuit 24 whose output is used to ON- and OFF-control the respective switches (electronic switches) of the circuit consisting of the resister circuits and switch circuits formed in the IC chip 19' of the left and right channel audio signal control circuits 14~ and 14R. The pin 21P of the IC chip 19' is connected with a ground terminal of the micro processor 10, and the pins 20P and l9P of the IC chip 19' are respectively conn:ected to positive and negative DC voltage sources +B and -B, respectively. In Fig. 3, 54L and 54R are respectively output terminals for the left and right channel audio signals.
~7~6,2 Turning to Fig. 4, the left channel audio signal control circuit 14L will be generally described. Since the right channel audio signal control circuit 14R is substantially same as that of the control circuit 14L, its detailed description will be omitted.
In Fig. 4, 30 designates a function selector circuit which selects one of the audio signals from the terminals PHONO-L, TUNER-L, TV-L and AUX-L and supplies the selected audio signal to a monitor signal selector circuit 31. The monitor signal selector circuit 31 selects one of the respective audio signals from the function selector 30 and terminals TAPE l-L
and TAPE 2-L as a monitor signal and supplies the same to a mode change-over circuit 33. A record signal selector circuit 32 is provided which selects one of the audio signals from the function selector 30 and the terminals T~PE l-L and TAPE
2-L and selectively supplies the same to the terminals RECOUT
2-L and RECOUT l-L. Upon the stereo mode, the monitor signal delivered from the monitor signal selector 31 passes as it is through the mode change-over circuit 33, but upon the monaural mode the monitor signals for the left and right channels are added to the former monitor signal in the mode change-over circuit 33.
A sound volume adjusting circuit (variable attenuating circuit) 37 is formed of a Eirst sound volume adjusting or control circuit 34 of 10 dB steps and a second sound volume adjusting or control circuit 36 of 1 dB step.
Between the volume adjusting circuits 34 and 36 provided is the tone adjusting circuit 35 which also serves as a buffer amplifier. The output audio signal from the mode change-over circuit 33 is fed to the first volume control circuit 34. The tone adjus-ting circuit 35 is formed of a change-over circuit 39, 7q;}Çi;2 which consists of a resistor and a switch and is made in the IC
chip 19', and an external circuit. The output audio signal from the second volume control circuit 36 is fed to a variable filter or filter change-over circuit 38 which is formed of a change-over circuit 40 including a resistor and a switch and an external circuit. The output terminal of the variable filter circuit 38 is connected to the output terminal 54L. The left channel audio signal appearing at the output terminal 54L is fed to a power amplifier (not shown) and its output is then fed to a left speaker (not shown). The respective circuits 30, 31, 32, 33, 34, 36, 39 and 40 are each formed of the circuit including the resistors and switches, made in the IC chip 19', and the respec-tive switches thereof are ON- and OFF-controlled by the control signals from the drive circuit 24 shown in Fig. 3.
Turning to Fig. 5, practical examples of the function selector 30, monitor signal selector 31, record signal selector 32 and mode change-over circuit 33 will be described in detail.
The function selector 30 will be firstly described. The terminals PHONO-L, TUNER-L, TV-L and AUX-L are respectively grounded through resistors R101, R102, R103 and R104, each having the resistance value of 100 K Q, and connected together through switches S101, S102~ S103 and S104 for function change-over to a terminal 30T. When one of these switches is selectively made ON, a selected audio signal is delivered to the output terminal 30T.
Next, the monitor signal selector 31 will be described~ The terminals TAPE l-L and TAPE 2-L are respectively grounded through resistors R106 and R107 each having the resis-tance value of 100 ~ Q, and the terminals 30T, TAPE l-L and TAPE
2-L are connected through switches S105, S106 and S107 together to a terminal 31T. Thus, when one of these switches is selec-tively made ON, the selected monitor signal is delivered to the terminal 31T.
7~
Next, the record signal selector 32 will be described. The terminal RECOUT l-L is connected through a resistor R108 of 4.7 K~ and a switch S108 to the terminal TAPE
2~L and through a switch 109 to the terminal 30T. The terminal RECOUT 2-L is connected through a resistor R110 of 4 7K Q and a switch S110 to the terminal TAPE l-L and through a switch Slll to the terminal 30T. When one of these switches is selectively made ON, one of the audio signals selected by the function selector 30 is fed to either of the terminals RECOU~ l-L or RECOUT 2-L as the record signal, and the reproduced signal from the terminal TAPE l-L or TAPE 2-L is fed to the terminal RECOUT
2-L or RFCOUT l-L as the record signal, respectively.
Now, the mode change-over circuit 30 will be described. The terminal 31T is connected through a parallel connection of a resistor R112 of 4.7 K Q and a switch S112 to a terminal 50L. In the mode change-over circuit 33 for the right channel, a parallel connection of a resisitor R212 of 4.7 KQ and a switch S212 is connected to a terminal 50R.
Between the terminals 50L and 50R provided is a switch S113.
Upon the stereo mode, the switches S112 and S212 are made ON
while the switch S113 is made OFF. Meantime, upon the monaural mode, the S112 and S212 are made OFF but the switch S113 is made ON, so that the sum signal of the left and right channel audio signals is delivered to the respective terminals 50L and 50R.
Turning to Fig. 6, a practical example of the tune adjusting circuit 35 will be described. In Fig. 6, the change-over circuit 39 is made of resistors and switches and formed integral with the IC chip 19'. In this case, the external circuit is formed of an operational amplifier 41, a capacitor 42 (of large capacity), a bass capacitor 43 and a treble capacitor 44. A bass control circuit 35BS for controlling the ., ~
~76~6Z
level increase and decrease of low frequency components is provided which consists of the amplifier 41, bass capacitor 43, a potent-iometer VRl and switches S306 to S309 and a treble control circuit 35TR for adjusting the level increase and decrease of high frequency components is also provided which consists of the amplifier 41, treble capacitor 44, a potentiometer VR2 and switches S310 to S315, respectively.
An output terminal 51L of the first volume control circuit 34 (shown in Fig. 4) is connected through the pin 33P
to a non-inverted input terminal of the amplifier 41 which is thus supplied with the input audio signal. The output terminal of the amplifier 41 is connected through the capacitor 42 to a connection point 35T which is grounded through the pin 29P and a series circuit of the resistors R301 (2.7K Q) - R302 (3.6K Q) - R303 (1.2K Q) - R304 (lK Q) - R305 (3.9K Q ) - R306 (8.2K Q), which form the potentionmeter VRl, and is connected to the connection point between the resistors R301 and R302 -through a switch S301. The connection point 35T is further connected through the bass capacitor 43, pin 30P and switches S302, S303 and S304 to one connection point between resistors P~302 and R303; R303 and R304; and R304 and R305, respectively. The connection point between the resistors R305 and R306 is grounded through a switch S305 and pin 32P. sy making the switches S301 to S305 ON and OFF selectively, the bass control (or the level adjustment of the low frequency components for the increase or decrease from the reference level) is carried out.
A connection point 35S is grounded through a series circuit of resistors R316 (1.3KQ)-R317(1.lKQ)-R3181910 Q)-R319(620Q )-R320(510Q )-R321(2KQ ), which form the treble potentiometer VR2, the pin 28P and the treble capacitor 44 and a 7~62 connection point 35M is connected through switches S316, S317, S318, S319 and S320 to the respective connection points between the resis-tors R316 and R317; R317 and R318; R318 and R319; R319 and R320; and R320 and R321. Thus, by making these switches ON
and OFF selectively, the treble control (the level adjustment of the high frequency component for the increase or decrease from the reference level) is carried out.
The switches S306 to S309 and those S310 to S315 are respectively such switch groups for changing over the positive, negative and defeat of the bass control circuit 35ss and the treble control circuit 35TR. The respective switch pairs S306 and S307, S308 and S309; S310 and S311; S312 and S313; and S314 and S315 are so changed over in ganged relation that when one of switches of each pair is ON the other of each pair is OFF as shown in Fig. 6. The connection point 35T is connected through the capacitor 43, pin 30P and series connection of the swi-tches S306 and S310 and also through the series connection of the switches S307 and S311 to the connection point 35S. The connection point 35T is further connected through the capacitor 43, pin 30P and switch S308 to the con:nection point between the switches S307 and S311 and also throug:h the switch S309 to the connection point between the switches S306 and S310. A termina 52L, at which an output audio signal is prouided, is connected through the switch S312 to the connection point 35M and also through the switch S313 to the connection point between the switches S306 and S310.
In the example of Fig. 6, a voltage divider is provided by resistors R307 and R308 (which voltage divider may be omitted) and the connection point between the resistors R307 and R308 is connected to the inverted input terminal of the ~47~6~
amplifier 41. In this voltage di~ider, one end o~ the resistor R307 is grounded through the pin 32P and one end of the other resistor R308 is connec-ted through the switch S314 to the connection point between the switches S307 and S311 and also through the switch S315 to the connection point 35M.
Now, the tone adjusting by the ON and OFF operation of the switches S301 to S315 will be described with reference to the following Tables 1 to 4 in which the adjusting states of the bass and treble in response to ON "1" and OFF "0" of the switches S301 to S315 are respectively shown.
Table 1 - Bass .
S306S307 S308 S309 .
~ 1 0 1 0 _ 0 1 0 1 .
Table 2 Treble _ .
_ 1 0 1 0 1 0 + O 1 0 1 0 1 Table 3 Bass O O O O O O
+2 1 1 0 0 0 +4 1 1 0 0 +6 1 0 1 0 +8 1 0 0 +10 O O 0 1 1 . -.:
7~6~
Table 4 _ Treble ._ .
O O O O O O
+2 1 0 0 0 0 +4 0 1 0 0 0 +6 0 0 1 0 0 +8 0 0 0 1 0 +10 O O O O 1 _ Tables 1 and 2 respectively show the changed over states o~ positive (increase), negative ~decrease) and zero (flat or defeat) of the respective switches for the reference levels of the bass and treble, and Tables 3 and 4 show the control states by +2 dB steps of the hass and treble, respectively.
The equivalent circuits of the tone adjusting circuits 35 shown in Fig. 6 by the combination adjustment of the positive and negative of the bass and treble are respectively shown in Figs. 7 to 10. In these equi~alent circuits, the bass control circuit 35BS is such a circuit that the bass capacitor 43 is connected in parallel between one end (hot end) of the potentiometer VRl and its movable terminal, while the treble control circuit 35TR is such a circuit that the potentiometer VR2 is connected in series to the treble capacitor 44 at the ground side the former. However, the relation among the connections of the control circuits 35~S, 35TR, operational amplifier 41 and terminal 52L, at which the output audio signal is obtained, is changed dependent upon the respective equivalent circuits.
The equivalent circuit of Fig. 7 corresponds to such a case that the base is positive for the reference level ., .
.~ '`,.
~ ~7~6Z
(defeat level) and the treble is also positive for the reference l.evel (defeat level) and that the bass control circuit 35BS is connected in parallel to the output side of the amplifier 41, the movable contact of the potentiometer VRl of -the bass control 5 circuit 35BS is connected to one end (hot end) of the potentio-meter VR2 of treble control circuit 35TR, and the output voltage appearing at the movable contact of the potentiometer VR2 of treble control circuit 35TR iS divided and then negatively fed back to the amplifier 41.
The equivalent circuit of Fig. 8 corresponds to such a case that the bass is negative for the reference level and the treble is positive for the reference level and that the bass and treble control circuits 35BS and 35TR are both connected in parallel to the output side of the amplifier 41, the movable 15 contact of the potentiometer VRl is connected to the terminal 52L and the output voltage obtained at the movable contact of the potentiometer VR2 is divided and then negatively fed to the amplifier 41.
The equivalent circuit of Fig. 9 corresponds to 20 such a case that the bass and treble ar.e both negative for the reference level and that the bass control circuit 35 BS is connected in parallel to the output side of the amplifier 41, the output voltage obtained at one end (hot end) of the potentio-meter VRl is negatively fed back to the amplifier 41, the 25 movable contact of the potentiometer VRl is connected to one end (hot end) of the potentiometer VR2 of the treble control circuit 35TR, and the movable contact of the potentiometer VR2 is connected to the terminal 52L.
The equivalent circuit of Fig. 10 corresponds to 30 such a case that the bass is positive for the reference level but the treble is negative for the reference level Z
and that the bass and treble control circuits 35BS and 35TR
are both connected in parallel to the output side of the amplifier 41, the output voltage obtained at the movable contact of the potentiometer VRl is divided, then negatively fed back to the amplifier 41 and the movable contact of the poten-tiometer VR2 is connected to the terminal 52L.
Turning to Fig. 11, the volume control (variable attenuator) circuit 37, consisting of the first and second volume control circuits 34 and 36, and filter change-over circu~t 38 will be practically described.
Firstly, the volume control circuit 37 will be described. As described previously, this volume control circuit 37 is formed of the first variable attenuator or volume control circuit 34 of lOdB steps and the second variable attenuator or volume control circuit 36 of 1 ds step which are connec-ted in cascade through the tone adjusting circuit 35 of the active type as a buffer circuit.
Now, the first volume adjusting or control circuit 34 will be firstly described. The terminal 50L, to which the input audio signal is applied, is connected to the ground through a series circuit of res:istors R501(68KQ )-R502(22KQ )-R503(6~8KQ )-R504(2.2KQ )-R505(6.8Kl2 )-R506(2.2KQ )-R507(6.8KQ )-R508(3.2KQ ). The connection point between the resistors R504 and R505 is grounded through a resistor R531 of l.lK Q, and the connection point between the resistors R506 and R507 is also ground through a resistor R532 of l.lK Q. The respective connection points between the terminal 50L and the resistor R501; between the resistors R501 and R502, R502 and R503~ R503 and R504~ R504 and R505; R505 and R506; R50~ and R507~ and R507 and R508 are respectively connected through switches S501, S502, S503, S504, S505, S506, S507 and S508 together to the terminal 51L. In this case, the connective construction among 7~6~
the resistors R505 to R508, R531 and R532 is so selected that the resistance difference between resistors of high resistance is made small to be suitable for being made as an IC~ With the first volume control circuit 34, when the switches S501 to S508 are made ON sequentially one after another, the attentuation amount is varied at the step of lOdB or 0, 10, 20, ... 70dB.
Next, the second volume adjusting or control circuit 36 will be described. The terminal 52L, to which the input audio signal is applied, is grounded through a series connection of resistors R509(2.2K Q)-R510(2.0K Q)-R511(1.8K Q)-R512(1.5K Q,)-R513(1.3K Q)-R514(1.2K Q)-R515(1.OK Q)-R516(1.OK Q)-R517(0.9lK Q)-R518(6.8K Q). The connection points between the terminal 52L and resistor R509; between resistors R509 and R510; R510 and R511;
and R511 and R512; R512 and R513; R513 and R514; R514 and R515;
R515 and R516, R516 and R517; R517 and R518i and R518 and the ground are respectively connected through switches S509, S510, S511, S512, S513, S514, S515, S516, S517, S518 and S519 to a terminal 53L. With the second volume control circuit 36, when the switches S509 to S519 are made ON sequentially one after another, the attenuation amount is varied at the step of 1 dB
or 0, 1, 2, ... 9 dB and to ~ dB as shown in the tables oE
Fig. 15.
According to the above volume control circuit 37, the attenuation amount is varied as 0, 1, 2, ... 78, 79dB and to ~ dB, and further since the tone adjusting circuit 35 of the active type is provided between the first and second volume control circuits 34 and 36 as the buffer circuit of the high input impedance and low output impedance characteristics, no error is generated in the attenuation amount irrespective of the operating positions of the switches S501 to S508 and those of the switches S509 to S519.
~ 9~7C~62 Next, the variable filter or filter change-over circuit 38 will be none described. The terminal 53L, to which the input audio signal is applied, is grounded through a series connection of switches S520, S521 and a capacitor 45.
A resistor R520 (lOK Q) is connected in parallel to the switch S520, and the connection point between the switches S520 and S521 is connected through a parallel connection of a capacitor 46 and a switch S522 to the terminal 54L.
With the abo~e filter change-over circuit 38, when the switch S520 is OFF but the switch S521 is ON, a high-cut filter is formed, while when the switch S520 is ON but the switch S521 is OFF, the high-cut filter is released. Further, when the switch S520 is ON but the switch S522 is OFF, a low-cut filter is formed, while when the switch S522 is O~, theloi~cut filter is released.
Turning to Fig. 12, the digital control signal generator 20 of the digital audio signal control circuit 19 will be now described. In the example of Fig. 12, the shift register 21 of 16 bits receives the clock signal and the data signal (serial binary coded signal) from the micro processor 10 shown in Fig. 2 and produces a parallel binary coded signal of 16 bits.
Now, the data signal will be described wi-th reference to Figs 13 and 14. The data signal is composed of two kinds of wor~ signals each being of 1 word 16 bits. The construction of the first word signal is shown in Fig. 13.
First to fourth bit signals of the first word signal form a digital signal CT-LV2 for controlling the attenuation amount of the second volume control circuit 36 for the left channel, fifth to seventh bit signals of the first word signal form a digital signal CT-LV1 for controlling the attenuation amount of the first volume control circuit 34 for the left channel; the ~7~36Z
eighth bi-t signal of the first word signal forms a digital signal CR-LFT for controlling the ON and OFF of the low-cut filter in the filter change-over circuits 38 for the left and right channels;
ninth to twelfth bit signals of the first word signal form a digital signal CT-RV2 for controlling the attenuation amount of the second volume control circuit 36 for the right channel;
thirteenth to fifteenth bit signals of the first word signal form a digital signal CT-RVl for controlling the attenuation amount of the first volume control circuit 34 for the right channel; and the sixteenth bit signal of the first word signal forms a word discrimination signal IDl for two kinds of word signals which is "0" in case of the first word signal, by way of example.
Next, the construction of the second word signal will be described with reference to Fig. 14. First to fourth bit signals of the second word signal form a digital signal CT-TR for controlling the treble control circuits 35TR
for the left and right channels and a digital signal CT-MD for controlling the mode change-over circuits 33 for the left and right channelsi fifth to eighth bit siqnals of the second word signal form a digital signal CT-BS for controlling the bass control circuits 35BS of the left and right channels; ninth and tenth bit signals of the second word signal form a digital signal CT-MN for controlling the monitor signal selector circuits 31 of the left and right channels; eleventh and twelfth bit signals of the second word signals form a digital signal CT-RC
for controlling the record signal selector circuits 32 of the left and right channels; thirteenth and fourteenth bit signals of the second word signal form a digital signal CT-AS for controlling the function selector circuits 30 of the left and right channels; the fifteenth bit signal of the second word signal forms a digital signal CT-~T for controlling the ON and OFF of the high-cut ~7~3~Z
filter in the filter change-over circuits 38 of the left and right channels; and the sixteenth bit signal of the second word signal forms a word discrimination signal ID2 which is "1" for the second word signal, by way of example.
Turning back to Fig. 12, the latch circuit 22 is formed of latch circuits 22A, 22Bl, 22B2 and 22C~ A first strobe signal change-over circuit 60 is provided which receives the strobe signal from the micro processor 10 of Fig. 2 and selectively supplies the strobe signal to the latch circuit 22A
or second strobe signal change-over circuit 61 in response to the condition of the sixteenth bit signal or word identification signals IDl and ID2 from the shift register 21.
The latch circuit 22A is also supplied with in parallel the first to fifteenth bit signals from the shift 15 register 21 and latches these bit signals when the sixteenth bit signal from the shift register 21 is "0" or word identifi-ca.tion signal IDl. The output signals from the latch circuit 22A are fed to the decoder 23 or decoders 23Al, 23A2, 23A3 and 23A4, respectively, to be decoded. The decoder 23Al is supplied 20 with or receives the parallel binary coded control signal C~-LV2 of 4 bits, then produces eleven control signals in decimal number and supplies the same to the drive circuit 24. The decoder 23A2 receives the parallel binary coded control signal CT-LVl of 3 bitsr produces eight control signals and supplies the same to 25 the drive circuit 24. The decoder 23A3 receives the parallel binary coded control signal CT-RV2 of 4 bits, produces eleven control signals and supplies the same to the drive circuit 24, and the decoder 23A4 receives the parallel binary coded control signal CT-RVl of 3 bits, produces eight control signals and 30 supplies the same to the drive circuit 24. The digital control 7~2 signal CT-LFT is supplied directly from the latch circuit 22A to the drive circuit 24.
The latch circuit 22B2 is supplied with the fifth to fifteenth parallel binary coded signals from the shift register 21 and latches the same when the sixteenth bit signal from the shift register 21 is "1" or the second word identifi-cation ID2 is delivered from the shift register 21. The output signals from the latch circuit 22B2 are respectively fed to decoders 23B2, 23B3, 23B4 and 23B5 to be decoded. The decoder 23B2 receives the control digital signal of 4 bits, produces seven control signals and applies the same to the drive circuit 24; the decoder 23B3 receives the control digital signal CT-MN
of 2 bits, produces three control signals and applies the same to the drive circuit 24; the decoder 23B4 receives the control digital signal CT-RC of 2 bits, produces three control signals and applies the same to the drive circuit 24, and the decoder 23B5 receives the digital control signal CT-AS of 2 bits, produces four control signals and appl:ies the same to the drive circuit 24, respectively. The control digital signal CT-HFT
consisting of in-phase and opposite phase components of the fifteenth bit signal is supplied directly from the latch circuit 22B2 to the drive circuit 24.
The second strobe signal change-over circuit 61 receives the strobe signal from the first strobe signal change-over circuit 60 when the sixteenth bit signal is "1"
or word identification signal ID2 is delivered. A discriminator or detector circuit 62 is provided which receives the first to third coded signals from the shift register 21 and discriminates first and second ranges, where the first range is 3 to 13 in to 15, which is provided by converting the binary number of , .
~76~62 g figures into a decimal number, and the second range is the reminder of the first range. The discriminated output from the detector circuit 62 is fed to the second strobe signal change-over circuit 61.
The latch circuit 22sl is supplied with the first to fourth parallel bit signals from the shift register 21, receives the strobe signal from the second strobe signal change-over eireuit 61 when the diseriminated output from the diseriminator eireuit 62 is in the first range, and latehes the first to fourth bit signals. The latehed output from the lateh eircuit 22Bl is applied to a decoder 23Bl. This decoder 23Bl receives the control digital signal CT-TR of 4 bits, produces seven control signals and applies the same to the drive circuit 24.
The lateh cireuit 22C is supplied with the fourth bit signal from the shift register 21, reeeives the strobe signal from the seeond strobe signal ehange-over eireuit 61 when the diseriminated output from the diseriminator eireuit 62 is in the seeond range and latehes the fourth bit signal.
The latched fourth bit signal or eontrol digitial signal CT-MD
is direetly applied to the drive eireuit 24.
Thus, the drive eircuit 24 is supplied with totally 66 control signals and applies its output signals to switeh eireuits S-K of the left and right ehannel audio signal eontrol eireuits 14L and 14R to eontrol totally 109 switehes.
A resistor eireuit R-K ineluding 86 resistors is eonneeted to the switch eircuit S-K.
The present invention deseribed above is suitable to be made as an IC and provides a digital gain eontrol apparatus whose gain ean be easily eontrolled by applying thereto a digital signal.
26 - .
The apparatus of the invention can be applied not only to an audio signal but also to a video signal and so on with the same effect.
It will be apparent that many modifications and variations could be effected by one skilled in the art without departing from the spirits or scope of the novel concepts of the present invention, so that the spirits or scope of the invention should be determined by the appended claims only.
2-L and RECOUT l-L. Upon the stereo mode, the monitor signal delivered from the monitor signal selector 31 passes as it is through the mode change-over circuit 33, but upon the monaural mode the monitor signals for the left and right channels are added to the former monitor signal in the mode change-over circuit 33.
A sound volume adjusting circuit (variable attenuating circuit) 37 is formed of a Eirst sound volume adjusting or control circuit 34 of 10 dB steps and a second sound volume adjusting or control circuit 36 of 1 dB step.
Between the volume adjusting circuits 34 and 36 provided is the tone adjusting circuit 35 which also serves as a buffer amplifier. The output audio signal from the mode change-over circuit 33 is fed to the first volume control circuit 34. The tone adjus-ting circuit 35 is formed of a change-over circuit 39, 7q;}Çi;2 which consists of a resistor and a switch and is made in the IC
chip 19', and an external circuit. The output audio signal from the second volume control circuit 36 is fed to a variable filter or filter change-over circuit 38 which is formed of a change-over circuit 40 including a resistor and a switch and an external circuit. The output terminal of the variable filter circuit 38 is connected to the output terminal 54L. The left channel audio signal appearing at the output terminal 54L is fed to a power amplifier (not shown) and its output is then fed to a left speaker (not shown). The respective circuits 30, 31, 32, 33, 34, 36, 39 and 40 are each formed of the circuit including the resistors and switches, made in the IC chip 19', and the respec-tive switches thereof are ON- and OFF-controlled by the control signals from the drive circuit 24 shown in Fig. 3.
Turning to Fig. 5, practical examples of the function selector 30, monitor signal selector 31, record signal selector 32 and mode change-over circuit 33 will be described in detail.
The function selector 30 will be firstly described. The terminals PHONO-L, TUNER-L, TV-L and AUX-L are respectively grounded through resistors R101, R102, R103 and R104, each having the resistance value of 100 K Q, and connected together through switches S101, S102~ S103 and S104 for function change-over to a terminal 30T. When one of these switches is selectively made ON, a selected audio signal is delivered to the output terminal 30T.
Next, the monitor signal selector 31 will be described~ The terminals TAPE l-L and TAPE 2-L are respectively grounded through resistors R106 and R107 each having the resis-tance value of 100 ~ Q, and the terminals 30T, TAPE l-L and TAPE
2-L are connected through switches S105, S106 and S107 together to a terminal 31T. Thus, when one of these switches is selec-tively made ON, the selected monitor signal is delivered to the terminal 31T.
7~
Next, the record signal selector 32 will be described. The terminal RECOUT l-L is connected through a resistor R108 of 4.7 K~ and a switch S108 to the terminal TAPE
2~L and through a switch 109 to the terminal 30T. The terminal RECOUT 2-L is connected through a resistor R110 of 4 7K Q and a switch S110 to the terminal TAPE l-L and through a switch Slll to the terminal 30T. When one of these switches is selectively made ON, one of the audio signals selected by the function selector 30 is fed to either of the terminals RECOU~ l-L or RECOUT 2-L as the record signal, and the reproduced signal from the terminal TAPE l-L or TAPE 2-L is fed to the terminal RECOUT
2-L or RFCOUT l-L as the record signal, respectively.
Now, the mode change-over circuit 30 will be described. The terminal 31T is connected through a parallel connection of a resistor R112 of 4.7 K Q and a switch S112 to a terminal 50L. In the mode change-over circuit 33 for the right channel, a parallel connection of a resisitor R212 of 4.7 KQ and a switch S212 is connected to a terminal 50R.
Between the terminals 50L and 50R provided is a switch S113.
Upon the stereo mode, the switches S112 and S212 are made ON
while the switch S113 is made OFF. Meantime, upon the monaural mode, the S112 and S212 are made OFF but the switch S113 is made ON, so that the sum signal of the left and right channel audio signals is delivered to the respective terminals 50L and 50R.
Turning to Fig. 6, a practical example of the tune adjusting circuit 35 will be described. In Fig. 6, the change-over circuit 39 is made of resistors and switches and formed integral with the IC chip 19'. In this case, the external circuit is formed of an operational amplifier 41, a capacitor 42 (of large capacity), a bass capacitor 43 and a treble capacitor 44. A bass control circuit 35BS for controlling the ., ~
~76~6Z
level increase and decrease of low frequency components is provided which consists of the amplifier 41, bass capacitor 43, a potent-iometer VRl and switches S306 to S309 and a treble control circuit 35TR for adjusting the level increase and decrease of high frequency components is also provided which consists of the amplifier 41, treble capacitor 44, a potentiometer VR2 and switches S310 to S315, respectively.
An output terminal 51L of the first volume control circuit 34 (shown in Fig. 4) is connected through the pin 33P
to a non-inverted input terminal of the amplifier 41 which is thus supplied with the input audio signal. The output terminal of the amplifier 41 is connected through the capacitor 42 to a connection point 35T which is grounded through the pin 29P and a series circuit of the resistors R301 (2.7K Q) - R302 (3.6K Q) - R303 (1.2K Q) - R304 (lK Q) - R305 (3.9K Q ) - R306 (8.2K Q), which form the potentionmeter VRl, and is connected to the connection point between the resistors R301 and R302 -through a switch S301. The connection point 35T is further connected through the bass capacitor 43, pin 30P and switches S302, S303 and S304 to one connection point between resistors P~302 and R303; R303 and R304; and R304 and R305, respectively. The connection point between the resistors R305 and R306 is grounded through a switch S305 and pin 32P. sy making the switches S301 to S305 ON and OFF selectively, the bass control (or the level adjustment of the low frequency components for the increase or decrease from the reference level) is carried out.
A connection point 35S is grounded through a series circuit of resistors R316 (1.3KQ)-R317(1.lKQ)-R3181910 Q)-R319(620Q )-R320(510Q )-R321(2KQ ), which form the treble potentiometer VR2, the pin 28P and the treble capacitor 44 and a 7~62 connection point 35M is connected through switches S316, S317, S318, S319 and S320 to the respective connection points between the resis-tors R316 and R317; R317 and R318; R318 and R319; R319 and R320; and R320 and R321. Thus, by making these switches ON
and OFF selectively, the treble control (the level adjustment of the high frequency component for the increase or decrease from the reference level) is carried out.
The switches S306 to S309 and those S310 to S315 are respectively such switch groups for changing over the positive, negative and defeat of the bass control circuit 35ss and the treble control circuit 35TR. The respective switch pairs S306 and S307, S308 and S309; S310 and S311; S312 and S313; and S314 and S315 are so changed over in ganged relation that when one of switches of each pair is ON the other of each pair is OFF as shown in Fig. 6. The connection point 35T is connected through the capacitor 43, pin 30P and series connection of the swi-tches S306 and S310 and also through the series connection of the switches S307 and S311 to the connection point 35S. The connection point 35T is further connected through the capacitor 43, pin 30P and switch S308 to the con:nection point between the switches S307 and S311 and also throug:h the switch S309 to the connection point between the switches S306 and S310. A termina 52L, at which an output audio signal is prouided, is connected through the switch S312 to the connection point 35M and also through the switch S313 to the connection point between the switches S306 and S310.
In the example of Fig. 6, a voltage divider is provided by resistors R307 and R308 (which voltage divider may be omitted) and the connection point between the resistors R307 and R308 is connected to the inverted input terminal of the ~47~6~
amplifier 41. In this voltage di~ider, one end o~ the resistor R307 is grounded through the pin 32P and one end of the other resistor R308 is connec-ted through the switch S314 to the connection point between the switches S307 and S311 and also through the switch S315 to the connection point 35M.
Now, the tone adjusting by the ON and OFF operation of the switches S301 to S315 will be described with reference to the following Tables 1 to 4 in which the adjusting states of the bass and treble in response to ON "1" and OFF "0" of the switches S301 to S315 are respectively shown.
Table 1 - Bass .
S306S307 S308 S309 .
~ 1 0 1 0 _ 0 1 0 1 .
Table 2 Treble _ .
_ 1 0 1 0 1 0 + O 1 0 1 0 1 Table 3 Bass O O O O O O
+2 1 1 0 0 0 +4 1 1 0 0 +6 1 0 1 0 +8 1 0 0 +10 O O 0 1 1 . -.:
7~6~
Table 4 _ Treble ._ .
O O O O O O
+2 1 0 0 0 0 +4 0 1 0 0 0 +6 0 0 1 0 0 +8 0 0 0 1 0 +10 O O O O 1 _ Tables 1 and 2 respectively show the changed over states o~ positive (increase), negative ~decrease) and zero (flat or defeat) of the respective switches for the reference levels of the bass and treble, and Tables 3 and 4 show the control states by +2 dB steps of the hass and treble, respectively.
The equivalent circuits of the tone adjusting circuits 35 shown in Fig. 6 by the combination adjustment of the positive and negative of the bass and treble are respectively shown in Figs. 7 to 10. In these equi~alent circuits, the bass control circuit 35BS is such a circuit that the bass capacitor 43 is connected in parallel between one end (hot end) of the potentiometer VRl and its movable terminal, while the treble control circuit 35TR is such a circuit that the potentiometer VR2 is connected in series to the treble capacitor 44 at the ground side the former. However, the relation among the connections of the control circuits 35~S, 35TR, operational amplifier 41 and terminal 52L, at which the output audio signal is obtained, is changed dependent upon the respective equivalent circuits.
The equivalent circuit of Fig. 7 corresponds to such a case that the base is positive for the reference level ., .
.~ '`,.
~ ~7~6Z
(defeat level) and the treble is also positive for the reference l.evel (defeat level) and that the bass control circuit 35BS is connected in parallel to the output side of the amplifier 41, the movable contact of the potentiometer VRl of -the bass control 5 circuit 35BS is connected to one end (hot end) of the potentio-meter VR2 of treble control circuit 35TR, and the output voltage appearing at the movable contact of the potentiometer VR2 of treble control circuit 35TR iS divided and then negatively fed back to the amplifier 41.
The equivalent circuit of Fig. 8 corresponds to such a case that the bass is negative for the reference level and the treble is positive for the reference level and that the bass and treble control circuits 35BS and 35TR are both connected in parallel to the output side of the amplifier 41, the movable 15 contact of the potentiometer VRl is connected to the terminal 52L and the output voltage obtained at the movable contact of the potentiometer VR2 is divided and then negatively fed to the amplifier 41.
The equivalent circuit of Fig. 9 corresponds to 20 such a case that the bass and treble ar.e both negative for the reference level and that the bass control circuit 35 BS is connected in parallel to the output side of the amplifier 41, the output voltage obtained at one end (hot end) of the potentio-meter VRl is negatively fed back to the amplifier 41, the 25 movable contact of the potentiometer VRl is connected to one end (hot end) of the potentiometer VR2 of the treble control circuit 35TR, and the movable contact of the potentiometer VR2 is connected to the terminal 52L.
The equivalent circuit of Fig. 10 corresponds to 30 such a case that the bass is positive for the reference level but the treble is negative for the reference level Z
and that the bass and treble control circuits 35BS and 35TR
are both connected in parallel to the output side of the amplifier 41, the output voltage obtained at the movable contact of the potentiometer VRl is divided, then negatively fed back to the amplifier 41 and the movable contact of the poten-tiometer VR2 is connected to the terminal 52L.
Turning to Fig. 11, the volume control (variable attenuator) circuit 37, consisting of the first and second volume control circuits 34 and 36, and filter change-over circu~t 38 will be practically described.
Firstly, the volume control circuit 37 will be described. As described previously, this volume control circuit 37 is formed of the first variable attenuator or volume control circuit 34 of lOdB steps and the second variable attenuator or volume control circuit 36 of 1 ds step which are connec-ted in cascade through the tone adjusting circuit 35 of the active type as a buffer circuit.
Now, the first volume adjusting or control circuit 34 will be firstly described. The terminal 50L, to which the input audio signal is applied, is connected to the ground through a series circuit of res:istors R501(68KQ )-R502(22KQ )-R503(6~8KQ )-R504(2.2KQ )-R505(6.8Kl2 )-R506(2.2KQ )-R507(6.8KQ )-R508(3.2KQ ). The connection point between the resistors R504 and R505 is grounded through a resistor R531 of l.lK Q, and the connection point between the resistors R506 and R507 is also ground through a resistor R532 of l.lK Q. The respective connection points between the terminal 50L and the resistor R501; between the resistors R501 and R502, R502 and R503~ R503 and R504~ R504 and R505; R505 and R506; R50~ and R507~ and R507 and R508 are respectively connected through switches S501, S502, S503, S504, S505, S506, S507 and S508 together to the terminal 51L. In this case, the connective construction among 7~6~
the resistors R505 to R508, R531 and R532 is so selected that the resistance difference between resistors of high resistance is made small to be suitable for being made as an IC~ With the first volume control circuit 34, when the switches S501 to S508 are made ON sequentially one after another, the attentuation amount is varied at the step of lOdB or 0, 10, 20, ... 70dB.
Next, the second volume adjusting or control circuit 36 will be described. The terminal 52L, to which the input audio signal is applied, is grounded through a series connection of resistors R509(2.2K Q)-R510(2.0K Q)-R511(1.8K Q)-R512(1.5K Q,)-R513(1.3K Q)-R514(1.2K Q)-R515(1.OK Q)-R516(1.OK Q)-R517(0.9lK Q)-R518(6.8K Q). The connection points between the terminal 52L and resistor R509; between resistors R509 and R510; R510 and R511;
and R511 and R512; R512 and R513; R513 and R514; R514 and R515;
R515 and R516, R516 and R517; R517 and R518i and R518 and the ground are respectively connected through switches S509, S510, S511, S512, S513, S514, S515, S516, S517, S518 and S519 to a terminal 53L. With the second volume control circuit 36, when the switches S509 to S519 are made ON sequentially one after another, the attenuation amount is varied at the step of 1 dB
or 0, 1, 2, ... 9 dB and to ~ dB as shown in the tables oE
Fig. 15.
According to the above volume control circuit 37, the attenuation amount is varied as 0, 1, 2, ... 78, 79dB and to ~ dB, and further since the tone adjusting circuit 35 of the active type is provided between the first and second volume control circuits 34 and 36 as the buffer circuit of the high input impedance and low output impedance characteristics, no error is generated in the attenuation amount irrespective of the operating positions of the switches S501 to S508 and those of the switches S509 to S519.
~ 9~7C~62 Next, the variable filter or filter change-over circuit 38 will be none described. The terminal 53L, to which the input audio signal is applied, is grounded through a series connection of switches S520, S521 and a capacitor 45.
A resistor R520 (lOK Q) is connected in parallel to the switch S520, and the connection point between the switches S520 and S521 is connected through a parallel connection of a capacitor 46 and a switch S522 to the terminal 54L.
With the abo~e filter change-over circuit 38, when the switch S520 is OFF but the switch S521 is ON, a high-cut filter is formed, while when the switch S520 is ON but the switch S521 is OFF, the high-cut filter is released. Further, when the switch S520 is ON but the switch S522 is OFF, a low-cut filter is formed, while when the switch S522 is O~, theloi~cut filter is released.
Turning to Fig. 12, the digital control signal generator 20 of the digital audio signal control circuit 19 will be now described. In the example of Fig. 12, the shift register 21 of 16 bits receives the clock signal and the data signal (serial binary coded signal) from the micro processor 10 shown in Fig. 2 and produces a parallel binary coded signal of 16 bits.
Now, the data signal will be described wi-th reference to Figs 13 and 14. The data signal is composed of two kinds of wor~ signals each being of 1 word 16 bits. The construction of the first word signal is shown in Fig. 13.
First to fourth bit signals of the first word signal form a digital signal CT-LV2 for controlling the attenuation amount of the second volume control circuit 36 for the left channel, fifth to seventh bit signals of the first word signal form a digital signal CT-LV1 for controlling the attenuation amount of the first volume control circuit 34 for the left channel; the ~7~36Z
eighth bi-t signal of the first word signal forms a digital signal CR-LFT for controlling the ON and OFF of the low-cut filter in the filter change-over circuits 38 for the left and right channels;
ninth to twelfth bit signals of the first word signal form a digital signal CT-RV2 for controlling the attenuation amount of the second volume control circuit 36 for the right channel;
thirteenth to fifteenth bit signals of the first word signal form a digital signal CT-RVl for controlling the attenuation amount of the first volume control circuit 34 for the right channel; and the sixteenth bit signal of the first word signal forms a word discrimination signal IDl for two kinds of word signals which is "0" in case of the first word signal, by way of example.
Next, the construction of the second word signal will be described with reference to Fig. 14. First to fourth bit signals of the second word signal form a digital signal CT-TR for controlling the treble control circuits 35TR
for the left and right channels and a digital signal CT-MD for controlling the mode change-over circuits 33 for the left and right channelsi fifth to eighth bit siqnals of the second word signal form a digital signal CT-BS for controlling the bass control circuits 35BS of the left and right channels; ninth and tenth bit signals of the second word signal form a digital signal CT-MN for controlling the monitor signal selector circuits 31 of the left and right channels; eleventh and twelfth bit signals of the second word signals form a digital signal CT-RC
for controlling the record signal selector circuits 32 of the left and right channels; thirteenth and fourteenth bit signals of the second word signal form a digital signal CT-AS for controlling the function selector circuits 30 of the left and right channels; the fifteenth bit signal of the second word signal forms a digital signal CT-~T for controlling the ON and OFF of the high-cut ~7~3~Z
filter in the filter change-over circuits 38 of the left and right channels; and the sixteenth bit signal of the second word signal forms a word discrimination signal ID2 which is "1" for the second word signal, by way of example.
Turning back to Fig. 12, the latch circuit 22 is formed of latch circuits 22A, 22Bl, 22B2 and 22C~ A first strobe signal change-over circuit 60 is provided which receives the strobe signal from the micro processor 10 of Fig. 2 and selectively supplies the strobe signal to the latch circuit 22A
or second strobe signal change-over circuit 61 in response to the condition of the sixteenth bit signal or word identification signals IDl and ID2 from the shift register 21.
The latch circuit 22A is also supplied with in parallel the first to fifteenth bit signals from the shift 15 register 21 and latches these bit signals when the sixteenth bit signal from the shift register 21 is "0" or word identifi-ca.tion signal IDl. The output signals from the latch circuit 22A are fed to the decoder 23 or decoders 23Al, 23A2, 23A3 and 23A4, respectively, to be decoded. The decoder 23Al is supplied 20 with or receives the parallel binary coded control signal C~-LV2 of 4 bits, then produces eleven control signals in decimal number and supplies the same to the drive circuit 24. The decoder 23A2 receives the parallel binary coded control signal CT-LVl of 3 bitsr produces eight control signals and supplies the same to 25 the drive circuit 24. The decoder 23A3 receives the parallel binary coded control signal CT-RV2 of 4 bits, produces eleven control signals and supplies the same to the drive circuit 24, and the decoder 23A4 receives the parallel binary coded control signal CT-RVl of 3 bits, produces eight control signals and 30 supplies the same to the drive circuit 24. The digital control 7~2 signal CT-LFT is supplied directly from the latch circuit 22A to the drive circuit 24.
The latch circuit 22B2 is supplied with the fifth to fifteenth parallel binary coded signals from the shift register 21 and latches the same when the sixteenth bit signal from the shift register 21 is "1" or the second word identifi-cation ID2 is delivered from the shift register 21. The output signals from the latch circuit 22B2 are respectively fed to decoders 23B2, 23B3, 23B4 and 23B5 to be decoded. The decoder 23B2 receives the control digital signal of 4 bits, produces seven control signals and applies the same to the drive circuit 24; the decoder 23B3 receives the control digital signal CT-MN
of 2 bits, produces three control signals and applies the same to the drive circuit 24; the decoder 23B4 receives the control digital signal CT-RC of 2 bits, produces three control signals and applies the same to the drive circuit 24, and the decoder 23B5 receives the digital control signal CT-AS of 2 bits, produces four control signals and appl:ies the same to the drive circuit 24, respectively. The control digital signal CT-HFT
consisting of in-phase and opposite phase components of the fifteenth bit signal is supplied directly from the latch circuit 22B2 to the drive circuit 24.
The second strobe signal change-over circuit 61 receives the strobe signal from the first strobe signal change-over circuit 60 when the sixteenth bit signal is "1"
or word identification signal ID2 is delivered. A discriminator or detector circuit 62 is provided which receives the first to third coded signals from the shift register 21 and discriminates first and second ranges, where the first range is 3 to 13 in to 15, which is provided by converting the binary number of , .
~76~62 g figures into a decimal number, and the second range is the reminder of the first range. The discriminated output from the detector circuit 62 is fed to the second strobe signal change-over circuit 61.
The latch circuit 22sl is supplied with the first to fourth parallel bit signals from the shift register 21, receives the strobe signal from the second strobe signal change-over eireuit 61 when the diseriminated output from the diseriminator eireuit 62 is in the first range, and latehes the first to fourth bit signals. The latehed output from the lateh eircuit 22Bl is applied to a decoder 23Bl. This decoder 23Bl receives the control digital signal CT-TR of 4 bits, produces seven control signals and applies the same to the drive circuit 24.
The lateh cireuit 22C is supplied with the fourth bit signal from the shift register 21, reeeives the strobe signal from the seeond strobe signal ehange-over eireuit 61 when the diseriminated output from the diseriminator eireuit 62 is in the seeond range and latehes the fourth bit signal.
The latched fourth bit signal or eontrol digitial signal CT-MD
is direetly applied to the drive eireuit 24.
Thus, the drive eircuit 24 is supplied with totally 66 control signals and applies its output signals to switeh eireuits S-K of the left and right ehannel audio signal eontrol eireuits 14L and 14R to eontrol totally 109 switehes.
A resistor eireuit R-K ineluding 86 resistors is eonneeted to the switch eircuit S-K.
The present invention deseribed above is suitable to be made as an IC and provides a digital gain eontrol apparatus whose gain ean be easily eontrolled by applying thereto a digital signal.
26 - .
The apparatus of the invention can be applied not only to an audio signal but also to a video signal and so on with the same effect.
It will be apparent that many modifications and variations could be effected by one skilled in the art without departing from the spirits or scope of the novel concepts of the present invention, so that the spirits or scope of the invention should be determined by the appended claims only.
Claims (12)
1. A digital gain control apparatus comprising:
(a) digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal;
(b) a shift register supplied with said plurality of serial-binary coded signals and said clock pulse signal from said digital control signal generator;
(c) latch circuit means connected to the output of said shift register and supplied with the strobe signal from said digital control signal generator to convert said plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
(d) decoder means connected to the output of said latch circuit means to produce a plurality of control signals from said plurality of parallel-binary coded signals;
and (e) function selector means and volume adjusting means for the selected one of functions, each being connected to the output of said decoder means and controlled by said plurality of control signals; said shift register, latch circuit means, decoder means, function selector means and volume adjusting means being formed in one chip-integrated circuit.
(a) digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal;
(b) a shift register supplied with said plurality of serial-binary coded signals and said clock pulse signal from said digital control signal generator;
(c) latch circuit means connected to the output of said shift register and supplied with the strobe signal from said digital control signal generator to convert said plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
(d) decoder means connected to the output of said latch circuit means to produce a plurality of control signals from said plurality of parallel-binary coded signals;
and (e) function selector means and volume adjusting means for the selected one of functions, each being connected to the output of said decoder means and controlled by said plurality of control signals; said shift register, latch circuit means, decoder means, function selector means and volume adjusting means being formed in one chip-integrated circuit.
2. A digital gain control apparatus according to claim 1, in which said volume adjusting means comprises:
(a) a first resistive attenuator consisting of a first set of serially connected resistors having intermediate taps and connected between the output of said function selector means and a reference point, and a first set of ON/OFF switches one ends of which are connected to the intermediate taps of said first set of resistors, respectively and the other ends of which are connected to each other;
(b) a buffer amplifier having an input terminal connected to the connection point of the other ends of said first set of ON/OFF switches and an output terminal;
(c) a. second resistive attenuator consisting of a second set of serially connected resistors having intermediate taps connected between the output of said buffer amplifier and said reference point, and a second set of ON/OFF switches one ends of which are connected to the intermediate taps of said second set of resistors, respectively, and the other ends of which are connected to each other and to an output terminal of said volume adjusting means.
(a) a first resistive attenuator consisting of a first set of serially connected resistors having intermediate taps and connected between the output of said function selector means and a reference point, and a first set of ON/OFF switches one ends of which are connected to the intermediate taps of said first set of resistors, respectively and the other ends of which are connected to each other;
(b) a buffer amplifier having an input terminal connected to the connection point of the other ends of said first set of ON/OFF switches and an output terminal;
(c) a. second resistive attenuator consisting of a second set of serially connected resistors having intermediate taps connected between the output of said buffer amplifier and said reference point, and a second set of ON/OFF switches one ends of which are connected to the intermediate taps of said second set of resistors, respectively, and the other ends of which are connected to each other and to an output terminal of said volume adjusting means.
3. A digital gain control apparatus according to claim 2, in which the resistance values of said first set of resistors is determined such that said first resistive attenuator is controlled by 10 dB steps in response to the ON/OFF operation of said first set of ON/OFF switches.
4. A digital gain control apparatus according to claim 2, in which the resistance value of said second set of resistors is determined such that said second resistive attenuator is controlled by 1 dB step in response to the ON/OFF operation of said second set of ON/OFF switches.
5. A digital gain control apparatus according to claim 2, in which said buffer amplifier includes a bass and treble tone control circuit.
6. A digital gain control apparatus comprising:.
(a) a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal;
(b) a shift register supplied with said plurality of serial-binary coded signals and said clock pulse signal from said digital control signal generator;
(c) latch circuit means connected to the output of said shift register and supplied with the strobe signal from said digital control signal generator to convert said plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
(d) decoder means connected to the output of said latch circuit means to produce a plurality of control signal from said plurality of parallel-binary coded signals;
and (e) function selector means;
(f) volume adjusting means for the selected one of functions; and (g) bass and treble tone control means, function selector means, volume adjusting means and bass and treble tone control means being connected to the output of said decoder means and controlled by said plurality of control signals; and said shift register means, latch circuit means, decoder means, function selector means, volume adjusting means and one part of said bass and treble tone control means being formed in one chip-integrated circuit.
(a) a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal;
(b) a shift register supplied with said plurality of serial-binary coded signals and said clock pulse signal from said digital control signal generator;
(c) latch circuit means connected to the output of said shift register and supplied with the strobe signal from said digital control signal generator to convert said plurality of serial-binary coded signals into a plurality of parallel-binary coded signals;
(d) decoder means connected to the output of said latch circuit means to produce a plurality of control signal from said plurality of parallel-binary coded signals;
and (e) function selector means;
(f) volume adjusting means for the selected one of functions; and (g) bass and treble tone control means, function selector means, volume adjusting means and bass and treble tone control means being connected to the output of said decoder means and controlled by said plurality of control signals; and said shift register means, latch circuit means, decoder means, function selector means, volume adjusting means and one part of said bass and treble tone control means being formed in one chip-integrated circuit.
7. A digital gain control apparatus according to claim 6, in which said bass and treble tone control means comprises:
(a) an amplifier having an input, output and negative feedback terminals, said input terminal being supplied with the output signal from said function selector means;
(b) a feedback circuit including a resistor having first and second terminals; said first terminal being connected to the negative feedback terminal;
(c) a bass control time constant circuit having a first terminal connected to the output terminal of said amplifier, a second terminal connected to a reference point, a third terminal, a first set of serially connected resistors with intermediate taps connected between the first and second terminals thereof, and a first set of ON/OFF switches one ends of which are connected to said intermediate taps and the other ends of which are connected to said third terminal and to said first terminal through a first capacitor;
(d) a treble control time constant circuit having a first terminal, a second terminal connected to said reference point through a second capacitor, a third terminal, a second set of serially connected resistors with intermediate taps connected between said first and second terminals thereof, and a second set of ON/
OFF switches one ends of which are connected to said intermediate taps and the other ends of which are connected to said third terminal thereof, said first and second sets of ON/OFF switches being controlled by the output of the plurality of control signals from said decoder means; and (e) switching means for selectively connecting said bass control time constant circuit and treble control time constant circuit to the output terminal of said amplifier and the second terminal of said feedback resistor in response to the plurality of control signals from said decoder means.
(a) an amplifier having an input, output and negative feedback terminals, said input terminal being supplied with the output signal from said function selector means;
(b) a feedback circuit including a resistor having first and second terminals; said first terminal being connected to the negative feedback terminal;
(c) a bass control time constant circuit having a first terminal connected to the output terminal of said amplifier, a second terminal connected to a reference point, a third terminal, a first set of serially connected resistors with intermediate taps connected between the first and second terminals thereof, and a first set of ON/OFF switches one ends of which are connected to said intermediate taps and the other ends of which are connected to said third terminal and to said first terminal through a first capacitor;
(d) a treble control time constant circuit having a first terminal, a second terminal connected to said reference point through a second capacitor, a third terminal, a second set of serially connected resistors with intermediate taps connected between said first and second terminals thereof, and a second set of ON/
OFF switches one ends of which are connected to said intermediate taps and the other ends of which are connected to said third terminal thereof, said first and second sets of ON/OFF switches being controlled by the output of the plurality of control signals from said decoder means; and (e) switching means for selectively connecting said bass control time constant circuit and treble control time constant circuit to the output terminal of said amplifier and the second terminal of said feedback resistor in response to the plurality of control signals from said decoder means.
8. A digital gain control apparatus according to claim 7, in which said last mentioned switching means controls said bass control time constant circuit, treble control time constant circuit and feedback circuit during bass-increase and treble-increase condition such that the third terminal of said bass control time constant circuit is connected to the first terminal of said treble control time constant circuit, the third terminal of said treble control time constant circuit is connected to the second terminal of said feedback resistor, and the first terminal of said bass control time constant circuit is connected to a signal output terminal adapted to be derived with a tone controlled output signal.
9. A digital gain control apparatus according to claim 7, in which said last mentioned switching means control said bass control time constant circuit, treble control time constant circuit and feedback circuit during bass-decrease and treble increase conditions such that the first and third terminals of said bass control time constant circuit are connected to the first terminal of said treble control time constant circuit and said signal output terminal, repectively, and the third terminal of said treble control time constant circuit is connected to said second terminal of said feedback resistor.
10. A digital gain control apparatus according to claim 7, in which said last mentioned switching means controls said bass control time constant circuit, treble control time constant circuit and feedback circuit during bass-decrease and treble-decrease conditions such that the first and third terminals of said bass control time constant circuit are connected to the second terminal of said feedback resistor and the first terminal of said treble control time constant circuit, respectively, and the third terminal of said treble control time constant circuit is connected to said signal output terminal.
11. A digital gain control apparatus according to claim 7, in which said last mentioned switching means controls said bass control time constant circuit, treble control time constant circuit and feedback circuit during bass-increase and treble-decrease conditions such that the first and third terminals of said bass control time constant circuit are connected to the first terminal of said treble control time constant circuit and the second terminal of said feedback resistor, and the third terminal of said treble time constant circuit is connected to said signal output terminal.
12. A digital gain control apparatus according to Claim 1 or 6, in which said digital control signal generator comprises a micro processor and a memory connected thereto.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP93497/79 | 1979-07-23 | ||
| JP9349779A JPS5617506A (en) | 1979-07-23 | 1979-07-23 | Digital type gain control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1147062A true CA1147062A (en) | 1983-05-24 |
Family
ID=14083976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000356718A Expired CA1147062A (en) | 1979-07-23 | 1980-07-22 | Digital gain control apparatus |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US4363001A (en) |
| JP (1) | JPS5617506A (en) |
| AU (1) | AU533994B2 (en) |
| CA (1) | CA1147062A (en) |
| DE (1) | DE3027917A1 (en) |
| FR (1) | FR2462819A1 (en) |
| GB (1) | GB2054994B (en) |
| NL (1) | NL191161C (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4451795A (en) * | 1980-08-10 | 1984-05-29 | U.S. Philips Corporation | Circuit arrangement with controllable transfer characteristic at higher frequencies |
| US4484295A (en) * | 1981-05-26 | 1984-11-20 | General Electric Company | Control circuit and method for varying the output of a waveform generator to gradually or rapidly vary a control signal from an initial value to a desired value |
| JPS5824210A (en) * | 1981-08-05 | 1983-02-14 | Arupain Kk | Equalizer device |
| US4439739A (en) * | 1981-08-17 | 1984-03-27 | U.S. Philips Corporation | Circuit arrangement with electronically controllable transfer characteristic |
| JPS5870610A (en) * | 1981-10-22 | 1983-04-27 | Fujitsu Ten Ltd | Sound volume controller |
| JPS5890811A (en) * | 1981-10-27 | 1983-05-30 | Fujitsu Ten Ltd | Sound volume balance controller |
| DE3210574C2 (en) * | 1982-03-23 | 1990-04-19 | Fa. Egon Engl, 8261 Kay | Electronic amplifier for musical instruments |
| NL8201376A (en) * | 1982-04-01 | 1983-11-01 | Philips Nv | CIRCUIT FOR AMPLIFYING AND / OR ATTENUATING A SIGNAL. |
| US4470020A (en) * | 1982-05-06 | 1984-09-04 | Mohr Daniel R | Virtual ground preamplifier for magnetic phono cartridge |
| JPS58218002A (en) * | 1982-06-14 | 1983-12-19 | Canon Inc | Magnetic video recorder and reproducer |
| US4495640A (en) * | 1982-06-28 | 1985-01-22 | Frey Douglas R | Adjustable distortion guitar amplifier |
| DE3225205A1 (en) * | 1982-07-06 | 1984-01-19 | Deutsche Thomson-Brandt Gmbh, 7730 Villingen-Schwenningen | METHOD FOR ADJUSTING CONTROL SIZES IN BROADCASTING AND TELEVISION DEVICES |
| JPS5917623U (en) * | 1982-07-23 | 1984-02-02 | パイオニア株式会社 | Volume control circuit for stereo equipment |
| US4495652A (en) * | 1983-02-28 | 1985-01-22 | General Electric Company | Control arrangement for radio apparatus |
| EP0119791B1 (en) * | 1983-03-08 | 1986-11-26 | Victor Company Of Japan, Limited | Circuit arrangement for correcting frequency response in accordance with frequency response of a sound field |
| FR2552283B1 (en) * | 1983-09-21 | 1988-07-08 | Radiotechnique | CONTROL DEVICE FOR A PREAMPLIFIER, SAVING THE LEVELS OF FUNCTIONS GIVEN FOR SPECIFIC USES OF AN AUDIO DEVICE |
| JPS60114040A (en) * | 1983-11-25 | 1985-06-20 | Pioneer Electronic Corp | Digital audio system |
| US4560838A (en) * | 1984-01-20 | 1985-12-24 | Water Jet Corporation | Apparatus for integrating a plurality of audio systems |
| JPS6386907A (en) * | 1986-09-30 | 1988-04-18 | Yamaha Corp | Input level adjusting circuit |
| US5734725A (en) * | 1987-03-23 | 1998-03-31 | Pritchard; Eric K. | Tube emulator amplifier system |
| DE3805457A1 (en) * | 1988-02-22 | 1989-08-31 | Thomson Brandt Gmbh | BROADCAST RECEIVER FOR A VEHICLE |
| US4978932A (en) * | 1988-07-07 | 1990-12-18 | Communications Satellite Corporation | Microwave digitally controlled solid-state attenuator having parallel switched paths |
| US4987599A (en) * | 1989-03-29 | 1991-01-22 | Motorola, Inc. | Communication control console center with improved volume control |
| JPH03205677A (en) * | 1990-01-05 | 1991-09-09 | Pioneer Electron Corp | Control method for acoustic video device |
| DE4015019A1 (en) * | 1990-05-10 | 1991-11-14 | Philips Patentverwaltung | Audio circuit with electronically controlled transmission - has feedback amplifier followed by voltage divider with controlled tap-off switching |
| US6005949A (en) * | 1990-07-17 | 1999-12-21 | Matsushita Electric Industrial Co., Ltd. | Surround sound effect control device |
| JPH0749692B2 (en) * | 1990-09-26 | 1995-05-31 | 建設省建築研究所長 | Steel structure building with structural members that use different kinds of metal materials in part |
| US5309297A (en) * | 1991-10-16 | 1994-05-03 | Rohm Co., Ltd. | Digital cassette tape reproducing device including novel drive circuit |
| US5485525A (en) * | 1993-09-13 | 1996-01-16 | Sony Corporation | VTR configuration of a modular audio follow video mixer |
| US5566237A (en) * | 1994-02-03 | 1996-10-15 | Dobbs-Stanford Corporation | Time zone equalizer |
| KR970001980B1 (en) * | 1994-02-08 | 1997-02-20 | 엘지반도체 주식회사 | Apparatus and method of volume reservation for audio device |
| US5745583A (en) * | 1994-04-04 | 1998-04-28 | Honda Giken Kogyo Kabushiki Kaisha | Audio playback system |
| JPH0865068A (en) * | 1994-08-18 | 1996-03-08 | Rohm Co Ltd | Low voltage driven audio signal amplifier |
| JP3426727B2 (en) * | 1994-09-13 | 2003-07-14 | 株式会社東芝 | Dual mode wireless communication device |
| US5541998A (en) * | 1994-10-20 | 1996-07-30 | Lar Electronics Corp. | Health club audio system |
| EP0762636A1 (en) * | 1995-09-04 | 1997-03-12 | STUDER Professional Audio AG | System and method of handling audio signals |
| IT1286478B1 (en) * | 1996-12-02 | 1998-07-08 | Sgs Thomson Microelectronics | METHOD OF ADJUSTING THE VOLUME AND SOUND SENSATION IN AN AUDIO DEVICE |
| DE19731691C1 (en) * | 1997-07-23 | 1998-10-08 | Siemens Ag | Switched power amplifier for NMR imager |
| US6088461A (en) * | 1997-09-26 | 2000-07-11 | Crystal Semiconductor Corporation | Dynamic volume control system |
| US7457424B2 (en) * | 2002-09-20 | 2008-11-25 | Honda Giken Kogyo Kabushiki Kaishi | Electronic volume device and remote controller thereof |
| CN101350604B (en) * | 2007-07-19 | 2012-07-04 | 鸿富锦精密工业（深圳）有限公司 | Apparatus and method for automatically switching volume control mode |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5340257A (en) * | 1976-09-25 | 1978-04-12 | Nippon Gakki Seizo Kk | Tone control circuit |
| JPS5380943A (en) * | 1976-12-26 | 1978-07-17 | Ricoh Co Ltd | Controllable attenuator |
| SE413573B (en) * | 1977-10-07 | 1980-06-02 | Transcale Ab | ELECTRONIC DEVICE |
| DE2746552C2 (en) * | 1977-10-17 | 1989-04-27 | Loewe Opta Gmbh, 8640 Kronach | Computerized communications equipment |
-
1979
- 1979-07-23 JP JP9349779A patent/JPS5617506A/en active Pending
-
1980
- 1980-07-21 AU AU60665/80A patent/AU533994B2/en not_active Ceased
- 1980-07-22 CA CA000356718A patent/CA1147062A/en not_active Expired
- 1980-07-23 US US06/171,454 patent/US4363001A/en not_active Expired - Lifetime
- 1980-07-23 DE DE19803027917 patent/DE3027917A1/en not_active Ceased
- 1980-07-23 FR FR8016269A patent/FR2462819A1/en active Granted
- 1980-07-23 GB GB8024152A patent/GB2054994B/en not_active Expired
- 1980-07-23 NL NL8004242A patent/NL191161C/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| FR2462819B1 (en) | 1984-06-29 |
| AU533994B2 (en) | 1983-12-22 |
| AU6066580A (en) | 1981-01-29 |
| NL191161B (en) | 1994-09-16 |
| GB2054994B (en) | 1983-11-02 |
| US4363001A (en) | 1982-12-07 |
| GB2054994A (en) | 1981-02-18 |
| FR2462819A1 (en) | 1981-02-13 |
| DE3027917A1 (en) | 1981-02-12 |
| NL191161C (en) | 1995-02-16 |
| JPS5617506A (en) | 1981-02-19 |
| NL8004242A (en) | 1981-01-27 |
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| Date | Code | Title | Description |
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| MKEX | Expiry |