CA1156603A - Low energy ion beam oxidation process - Google Patents
Low energy ion beam oxidation processInfo
- Publication number
- CA1156603A CA1156603A CA000388982A CA388982A CA1156603A CA 1156603 A CA1156603 A CA 1156603A CA 000388982 A CA000388982 A CA 000388982A CA 388982 A CA388982 A CA 388982A CA 1156603 A CA1156603 A CA 1156603A
- Authority
- CA
- Canada
- Prior art keywords
- ion
- ion beam
- recited
- oxide
- oxidation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31683—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02301—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S505/00—Superconductor technology: apparatus, material, process
- Y10S505/80—Material per se process of making same
- Y10S505/815—Process of making per se
- Y10S505/816—Sputtering, including coating, forming, or etching
- Y10S505/817—Sputtering, including coating, forming, or etching forming josephson element
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49014—Superconductor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Physical Vapour Deposition (AREA)
- ing And Chemical Polishing (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
- Electron Sources, Ion Sources (AREA)
Abstract
LOW ENERGY ION BEAM OXIDATION PROCESS
Abstract of the Disclosure A surface reaction process for controlled oxide growth is disclosed using a directed, low energy ion beam for compound or oxide formation. The technique is evaluated by fabricating Ni-oxide-Ni and Cr-oxide-Ni tunneling junctions, using directed oxygen ion beams with energies ranging from about 30 to 180 eV. In one embodiment, high ion current densities are achieved at these low energies by replacing the conventional dual grid extraction system of the ion source with a single fine mesh grid.
Junction resistance decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simultaneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature of ion beam techniques allows greater control over the growth process.
Abstract of the Disclosure A surface reaction process for controlled oxide growth is disclosed using a directed, low energy ion beam for compound or oxide formation. The technique is evaluated by fabricating Ni-oxide-Ni and Cr-oxide-Ni tunneling junctions, using directed oxygen ion beams with energies ranging from about 30 to 180 eV. In one embodiment, high ion current densities are achieved at these low energies by replacing the conventional dual grid extraction system of the ion source with a single fine mesh grid.
Junction resistance decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simultaneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature of ion beam techniques allows greater control over the growth process.
Description
YO~80-051 `-` 1. ~.5~
LOW ENERGY ION BEAM OXIDATION PROCESS
Background of the Inven'ion , The present invention relates to surface reaction processes for fabrication of semiconductor and Josephson devices, and more particularly to processes for providing controlled thickness growth of oxides or other reactive compounds.
Description of the Prior Art Recent demands in the app`lications of metal-oxide-metal devices (MOM's) require very small areas and thin structures. In room temperature applications, MOM's have been employed as infrared detectors and mixers up to the near infrared. In cryogenic appli-cations, MOkl's are being used as Josephson junction switches in computer circuits and as detectors and mixers in the submillimeter range. These devices require a uniform oxide thickness in the range 5 - 25 A, which is difficult to achieve reproducibly using thermal or plasma oxidationO
~n r.f. oxidation process developed by J. H. Greiner is described in United States Patent No. 3,849,276.
The Greiner process combines simultaneous oxidation with sputter etching in an r.f. plasma to produce a steady-state oxide thickness. In the r.f. oxidation process disclosed by Greiner, low energy oxygen ions strike the metal with a broad range of energies since the ions are extracted ~rom a plasma. Ions with kinetic energy less than the sputter threshold ' ener~y oxidize the metal, while ions with higher kinetic energy sputter etch the metal and oxide. If the initial oxidation rate is higher than the sputter-ing rate, a certain oxide thickness will be established after a characteristic time, determined by the rate of decrease in the oxidation rate with oxide thickness, and by thc sputtering rate. Continuation of the process for a time, which is longer than needed for having oxidation rate and sputtering rate equal, will ~ssure a pinhole free oxide with a reproducible final thickness.
Several known drawbacks limit the usefulness of the r.f. oxidation technique. ~1) Processing parameters are interde2endent. Changing the pressure, for example, changes both the ion acceleration voltage and current density. (2) Energetic electron bombardment heats up the sample and hastens o~idation.
(3) The plasma is at an elevated potential relative to the chamber walls, resulting in a constant sputtering of the walls. (4) Sputtered atoms scatter from the gas back onto the sample, co~taminating the oxide. At a pressure of 10 mTorr, typically used in r.f. oxidation, the mean free path for backsputtered neutrals is only a fe~ mm, and it has been found, for example, that the current density of super-conducting tunnel junctions is greatly affected by the presence of backsputtered material.
~road beam multiaperture ion sources, known in the art as "Kaufman sources", are widely used for etching applications, and energetic ion beams have been used to carry out reactive processes in a variety of configurations, such as disclosed by J. A. Taylor, G. M. Lancaster, A. Ignatiev, and ~. W. Rabalais in the Journal of Chem. Physics, Vol. 68, No. 4, page 17i6 (1978). Recently, A. W. Kleinsasser and R. A. Buhrman, in the 9th International Conference on Electron and Ion Beam Science and Technology, St. Louis, Mo. (1980), reported the fabrication of Josephson junctions by ~09~0-051 ` 1~5~G~3 ion beam oxidation of Nb, using an Ar/O2 ion be~m with energy of 600 eV. In this latter work, however, oxidation occurred rapidly and was not the resul~ of combined oxide growth and sputter etching.
It is an object of the present invention to fabricate ~osephson junctions and semiconductor devices by a combined controlled oxide growth and sputter etching.
It is another object to provide a surface reaction process wherein a balance between oxide growth and sputter etching is achieved.
It is another object to pro~ide an ion beam surface reaction technique for oxidation, deposition, or etching with substantially independent control over ion beam energy and current density.
Summary of the Invention . . ~
These, and other objects, are achieved by the present invention which provides a surface reaction process for controlled oxide growth using ion beam oxidation techniques. The process of ion beam oxida-tion comprises using a large area, high current density oxygen ion beam with low energy, about 30 to 180 eV, which is directed at a substrate in a low gas pressure chamber for compound or oxide formation.
In one embodiment, ions are generated in a low ~oltage, ~5 thermionically supported plasma inside a discharge chamber at a pressure of about 1 m~orr. Ions are extracted into a beam of high ion current density by an extraction region consisting of a single, f ine mesh grid. The beam is directed toward the sample situated in a low pressure region of about 0.1 mTorr, and a neutralizer means supplies electrons to com-'i~98~-051 115~3 pensate the positive charge of the ion beam.
etal-oxide-metal junctions made by the technique according to the present invention show a junction resistance which decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simul-taneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature o~ ion beam techniques allows greater control over the growth process.
The general advantages of the ion beam techniques for oxidation, deposition or etching include:
(1) Independent control over ion beam energy and current density; (2) Samples are isolated from the ion generation plasma; (3) Chamber walls are not subjected to energetic ion bombardment, since the beam is directed; (4) Since the mean free path of ions and sputtered atoms is greater than the chamber dimensions, back sputtering is minimized; and (5) Ions have a narrow energy spread (10-20 eV), enabling easier analysis.
Brief Description of the Drawings In -the accompanying figures:
FIG~ l is a schematic diagram of an ion beam oxidation system for carrying out the process according to the present invention;
FIG. 2 shows a portion of a metal-oxide-metal junction formed on a substrate by the ion beam o~idation process of the present invention;
FIG. 3 shows a pictorial area view of a metal-o~ide-metal junction with the top nickel electrode, the SiO2 masking layer and the oxidation area being depicted;
FIG. 4 is a graph of the current-voltage character-istics of nickel-oxide-nickel junctions fabricated by the ion beam oxidation process of the present invention;
FIG. 5 is a graph showing the dependence of junction resistance on oxygen ion beam energy; and FIG. 6 is a graph showing the relationship between junction resistance and ion beam oxidation time.
Description of the Preferred Embodiments FIG. 1 is a schematic diagram of an ion beam oxidation system in accordance with the present invention.
Generally, the system includes a single grid ion source for sputter cleaning and oxidation, a dual grid ion source 20 for overcoating of junctions, a movable ion energy analyzer 52, and a sample 10 on a water cooled holder 9. Specifically, single grid ion source together with wafers 10 and holder 9 are contained within a vacuum chamber 13. Specifically, the ion source includes a thermionic cathode 1 located within the chamber 13 and a plurality of anodes 2 disposed around the ion source adjacent the walls and made of non-ma~netic material such as stainless steel. The anodes 2 are located between pole pieces 4 on both sides of the anodes 2. The pole pieces 4 are made of a magnetically permeable material such as soft iron. A magnetic field is Yo980-051 ` -- 115~3 indicated by broken lines 3. Ox~gen gas is provided into the ion source through a gas inlet 8. The gas is ionized by electrons from the ca~hode 1 which are accelerated to the anodes 2. ~lagnetic field lines 3 produced between the pole pieces 4 enhance the ionization efficiency. A multi-aperture accelerator grid 5 is shown at the lower end of the ion source.
A plasma 7 is formed by the ions and electrons in the ion source chamber and provides a source of ions for the ion beam. These ions are extracted from the plasma 7 to the apertures in the accelerator grid 5 and form a beam shown by the ion trajectory lines 14 in FIG. 1.
Electrons are added to the beam 14 from a neutralizer 6 to prevent the charging up of insulating wafers 10.
The wafers 10 to be oxidized are bombarded with the low energy ion beam 14. Such wafers 10 are mounted on holder 9 and have masking material 11 on such wafers for delineating the desired patterns. Reactive species in the beam 14 combine with atoms in the wafer 10 to form solid compound products. Excess-gas is removed by a pumping port 12 from the vacuum chamber 13.
The sample 10 to be oxidized is mounted with gallium backing on a water cooled copper block or wafer holder 9. Samples were prepared by sputter coatinq Si wafers with 1000 A of either Ni or Cr followed by a layer of 1000 A of SiO2. The SiO2 was chemically etched to define junction areas ranging from 5 ~m2 to 40 ~m , in which the oxide was grown. A 7 cm diameter ion source equipped with a Ni mesh single grid 5 of 100 lines/inch faces the sample 10 at a distance of 15 cm. The ion source performs both precleaning and oxidation of the sample 10. A movable shutter 15 protects the sample 10, a~d the retarding grid eneryy YO'~80-051 JL 15~03 analyzer 52 can be moved into the beam path to measure the ion beam energy distribution and current density.
The separate ion source 20 directc a 2.0 cm diameter beam at a m~vable Ni target 16 to overcoat the oxi-dized sample with a Ni counterelectrode. A close-up view of the metal-oxide-junction formed by the system and process described above is provided in FIGS. 2 and 3, to be described below.
Typical electrical parameters of the single grid ion source are as follows: Vc for heating the cathode 1 supplies typically 13 amps; Vd (discharge vo]tage) needed to sustain the plasma, 40 volts for Ar and 70 volts for 2; Va (anode voltage) approxi-mately equal to the desired ion energy (30 - 180 eV);
V or grid voltage equal to minus 10 V; Vn (neutralizer heater) typically supplying 6.5 amps.
The gas pressure in the sample chamber is 0.3 mTorr.
The dual grid ion source 20 was operated to produce an 800 eV, 12 mA Ar ion beam for a deposition rate of nickel of about 2 A/sec.
After pumping the sample chamber to about 5 x 10 7 Torr, the Ni target is presputtered for 10 minutes with 800 eV Ar+ ions. The sample is then spu~ter etched for 5 minutes using Ar+ ions at 150 eV and 0.72 mA/cm , to remove several hundred A of Ni.
Argon is next replaced with oxygen and the beam adjusted to desired conditions using the analyzer.
The sample is then oxidized with the low energy oxygen ion beam of about 30 eV to 180 eV. The Ni target is resputtered with Ar+ for 5 minutes, with the sample protected, to remove any oxide formed on the target during oxidation, followed by overcoating of the sample with 500 - 1000 A of Ni. Plultiple samples may be oxidized and overcoated independently in one pumping cycle of the system. Alternate thin YO~ 051 ` ~5~60~
film deposition source means, such as an evaporation source may be provided in place of ion source 20, for depositing additional thin film layers for electrical devices. Samples are then removed from the vacuum system. FIGS. 2 and 3 show cross-section and pictorial aerial views, respectively, of a portion of a metal-oxide-metal junction consisting of a silicon substrate 30, a nickel bottom electrode 32 and junction regions 34 delineated by SiO2 masking layer 38. Ion beam oxidation is used to grow a thin oxide layer 36 in the junction region 34. A
nickel top electrode 40 is deposited on the oxide layer 36 to complete the metal-oxide-metaI junction.
The junction area is located in the recess 42.
Nickel and chromium metal films were oxidiæed by oxygen ion beams with energy ranging from 30 eV to 180 eV and current density of 0.72 mA/cm2 for times ranging from 10 sec to 30 min. For each junction, the dynamic resistance was measured at zero bias as an indicator of oxide thickness. To indicate the range of values obtainable, current-voltage curves are shown in FIG. 4 for nickel-oxide-nickel junctions fabricated by ion beam oxidation. For low oxygen ion energy (30 - 40 eV), junction resistances of 10 kQ or higher are obtained after several minutes oxidation (the curve of lowest slope in FIG. 4). By increasing oxygen ion energy, the junction resistance decreases to as low as 25 Q for enexgies above 100 eV, the curve of the highest slope in FIG. 4. Junctions are stable under biasing, with breakdown voltages of 1.5-
LOW ENERGY ION BEAM OXIDATION PROCESS
Background of the Inven'ion , The present invention relates to surface reaction processes for fabrication of semiconductor and Josephson devices, and more particularly to processes for providing controlled thickness growth of oxides or other reactive compounds.
Description of the Prior Art Recent demands in the app`lications of metal-oxide-metal devices (MOM's) require very small areas and thin structures. In room temperature applications, MOM's have been employed as infrared detectors and mixers up to the near infrared. In cryogenic appli-cations, MOkl's are being used as Josephson junction switches in computer circuits and as detectors and mixers in the submillimeter range. These devices require a uniform oxide thickness in the range 5 - 25 A, which is difficult to achieve reproducibly using thermal or plasma oxidationO
~n r.f. oxidation process developed by J. H. Greiner is described in United States Patent No. 3,849,276.
The Greiner process combines simultaneous oxidation with sputter etching in an r.f. plasma to produce a steady-state oxide thickness. In the r.f. oxidation process disclosed by Greiner, low energy oxygen ions strike the metal with a broad range of energies since the ions are extracted ~rom a plasma. Ions with kinetic energy less than the sputter threshold ' ener~y oxidize the metal, while ions with higher kinetic energy sputter etch the metal and oxide. If the initial oxidation rate is higher than the sputter-ing rate, a certain oxide thickness will be established after a characteristic time, determined by the rate of decrease in the oxidation rate with oxide thickness, and by thc sputtering rate. Continuation of the process for a time, which is longer than needed for having oxidation rate and sputtering rate equal, will ~ssure a pinhole free oxide with a reproducible final thickness.
Several known drawbacks limit the usefulness of the r.f. oxidation technique. ~1) Processing parameters are interde2endent. Changing the pressure, for example, changes both the ion acceleration voltage and current density. (2) Energetic electron bombardment heats up the sample and hastens o~idation.
(3) The plasma is at an elevated potential relative to the chamber walls, resulting in a constant sputtering of the walls. (4) Sputtered atoms scatter from the gas back onto the sample, co~taminating the oxide. At a pressure of 10 mTorr, typically used in r.f. oxidation, the mean free path for backsputtered neutrals is only a fe~ mm, and it has been found, for example, that the current density of super-conducting tunnel junctions is greatly affected by the presence of backsputtered material.
~road beam multiaperture ion sources, known in the art as "Kaufman sources", are widely used for etching applications, and energetic ion beams have been used to carry out reactive processes in a variety of configurations, such as disclosed by J. A. Taylor, G. M. Lancaster, A. Ignatiev, and ~. W. Rabalais in the Journal of Chem. Physics, Vol. 68, No. 4, page 17i6 (1978). Recently, A. W. Kleinsasser and R. A. Buhrman, in the 9th International Conference on Electron and Ion Beam Science and Technology, St. Louis, Mo. (1980), reported the fabrication of Josephson junctions by ~09~0-051 ` 1~5~G~3 ion beam oxidation of Nb, using an Ar/O2 ion be~m with energy of 600 eV. In this latter work, however, oxidation occurred rapidly and was not the resul~ of combined oxide growth and sputter etching.
It is an object of the present invention to fabricate ~osephson junctions and semiconductor devices by a combined controlled oxide growth and sputter etching.
It is another object to provide a surface reaction process wherein a balance between oxide growth and sputter etching is achieved.
It is another object to pro~ide an ion beam surface reaction technique for oxidation, deposition, or etching with substantially independent control over ion beam energy and current density.
Summary of the Invention . . ~
These, and other objects, are achieved by the present invention which provides a surface reaction process for controlled oxide growth using ion beam oxidation techniques. The process of ion beam oxida-tion comprises using a large area, high current density oxygen ion beam with low energy, about 30 to 180 eV, which is directed at a substrate in a low gas pressure chamber for compound or oxide formation.
In one embodiment, ions are generated in a low ~oltage, ~5 thermionically supported plasma inside a discharge chamber at a pressure of about 1 m~orr. Ions are extracted into a beam of high ion current density by an extraction region consisting of a single, f ine mesh grid. The beam is directed toward the sample situated in a low pressure region of about 0.1 mTorr, and a neutralizer means supplies electrons to com-'i~98~-051 115~3 pensate the positive charge of the ion beam.
etal-oxide-metal junctions made by the technique according to the present invention show a junction resistance which decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simul-taneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature o~ ion beam techniques allows greater control over the growth process.
The general advantages of the ion beam techniques for oxidation, deposition or etching include:
(1) Independent control over ion beam energy and current density; (2) Samples are isolated from the ion generation plasma; (3) Chamber walls are not subjected to energetic ion bombardment, since the beam is directed; (4) Since the mean free path of ions and sputtered atoms is greater than the chamber dimensions, back sputtering is minimized; and (5) Ions have a narrow energy spread (10-20 eV), enabling easier analysis.
Brief Description of the Drawings In -the accompanying figures:
FIG~ l is a schematic diagram of an ion beam oxidation system for carrying out the process according to the present invention;
FIG. 2 shows a portion of a metal-oxide-metal junction formed on a substrate by the ion beam o~idation process of the present invention;
FIG. 3 shows a pictorial area view of a metal-o~ide-metal junction with the top nickel electrode, the SiO2 masking layer and the oxidation area being depicted;
FIG. 4 is a graph of the current-voltage character-istics of nickel-oxide-nickel junctions fabricated by the ion beam oxidation process of the present invention;
FIG. 5 is a graph showing the dependence of junction resistance on oxygen ion beam energy; and FIG. 6 is a graph showing the relationship between junction resistance and ion beam oxidation time.
Description of the Preferred Embodiments FIG. 1 is a schematic diagram of an ion beam oxidation system in accordance with the present invention.
Generally, the system includes a single grid ion source for sputter cleaning and oxidation, a dual grid ion source 20 for overcoating of junctions, a movable ion energy analyzer 52, and a sample 10 on a water cooled holder 9. Specifically, single grid ion source together with wafers 10 and holder 9 are contained within a vacuum chamber 13. Specifically, the ion source includes a thermionic cathode 1 located within the chamber 13 and a plurality of anodes 2 disposed around the ion source adjacent the walls and made of non-ma~netic material such as stainless steel. The anodes 2 are located between pole pieces 4 on both sides of the anodes 2. The pole pieces 4 are made of a magnetically permeable material such as soft iron. A magnetic field is Yo980-051 ` -- 115~3 indicated by broken lines 3. Ox~gen gas is provided into the ion source through a gas inlet 8. The gas is ionized by electrons from the ca~hode 1 which are accelerated to the anodes 2. ~lagnetic field lines 3 produced between the pole pieces 4 enhance the ionization efficiency. A multi-aperture accelerator grid 5 is shown at the lower end of the ion source.
A plasma 7 is formed by the ions and electrons in the ion source chamber and provides a source of ions for the ion beam. These ions are extracted from the plasma 7 to the apertures in the accelerator grid 5 and form a beam shown by the ion trajectory lines 14 in FIG. 1.
Electrons are added to the beam 14 from a neutralizer 6 to prevent the charging up of insulating wafers 10.
The wafers 10 to be oxidized are bombarded with the low energy ion beam 14. Such wafers 10 are mounted on holder 9 and have masking material 11 on such wafers for delineating the desired patterns. Reactive species in the beam 14 combine with atoms in the wafer 10 to form solid compound products. Excess-gas is removed by a pumping port 12 from the vacuum chamber 13.
The sample 10 to be oxidized is mounted with gallium backing on a water cooled copper block or wafer holder 9. Samples were prepared by sputter coatinq Si wafers with 1000 A of either Ni or Cr followed by a layer of 1000 A of SiO2. The SiO2 was chemically etched to define junction areas ranging from 5 ~m2 to 40 ~m , in which the oxide was grown. A 7 cm diameter ion source equipped with a Ni mesh single grid 5 of 100 lines/inch faces the sample 10 at a distance of 15 cm. The ion source performs both precleaning and oxidation of the sample 10. A movable shutter 15 protects the sample 10, a~d the retarding grid eneryy YO'~80-051 JL 15~03 analyzer 52 can be moved into the beam path to measure the ion beam energy distribution and current density.
The separate ion source 20 directc a 2.0 cm diameter beam at a m~vable Ni target 16 to overcoat the oxi-dized sample with a Ni counterelectrode. A close-up view of the metal-oxide-junction formed by the system and process described above is provided in FIGS. 2 and 3, to be described below.
Typical electrical parameters of the single grid ion source are as follows: Vc for heating the cathode 1 supplies typically 13 amps; Vd (discharge vo]tage) needed to sustain the plasma, 40 volts for Ar and 70 volts for 2; Va (anode voltage) approxi-mately equal to the desired ion energy (30 - 180 eV);
V or grid voltage equal to minus 10 V; Vn (neutralizer heater) typically supplying 6.5 amps.
The gas pressure in the sample chamber is 0.3 mTorr.
The dual grid ion source 20 was operated to produce an 800 eV, 12 mA Ar ion beam for a deposition rate of nickel of about 2 A/sec.
After pumping the sample chamber to about 5 x 10 7 Torr, the Ni target is presputtered for 10 minutes with 800 eV Ar+ ions. The sample is then spu~ter etched for 5 minutes using Ar+ ions at 150 eV and 0.72 mA/cm , to remove several hundred A of Ni.
Argon is next replaced with oxygen and the beam adjusted to desired conditions using the analyzer.
The sample is then oxidized with the low energy oxygen ion beam of about 30 eV to 180 eV. The Ni target is resputtered with Ar+ for 5 minutes, with the sample protected, to remove any oxide formed on the target during oxidation, followed by overcoating of the sample with 500 - 1000 A of Ni. Plultiple samples may be oxidized and overcoated independently in one pumping cycle of the system. Alternate thin YO~ 051 ` ~5~60~
film deposition source means, such as an evaporation source may be provided in place of ion source 20, for depositing additional thin film layers for electrical devices. Samples are then removed from the vacuum system. FIGS. 2 and 3 show cross-section and pictorial aerial views, respectively, of a portion of a metal-oxide-metal junction consisting of a silicon substrate 30, a nickel bottom electrode 32 and junction regions 34 delineated by SiO2 masking layer 38. Ion beam oxidation is used to grow a thin oxide layer 36 in the junction region 34. A
nickel top electrode 40 is deposited on the oxide layer 36 to complete the metal-oxide-metaI junction.
The junction area is located in the recess 42.
Nickel and chromium metal films were oxidiæed by oxygen ion beams with energy ranging from 30 eV to 180 eV and current density of 0.72 mA/cm2 for times ranging from 10 sec to 30 min. For each junction, the dynamic resistance was measured at zero bias as an indicator of oxide thickness. To indicate the range of values obtainable, current-voltage curves are shown in FIG. 4 for nickel-oxide-nickel junctions fabricated by ion beam oxidation. For low oxygen ion energy (30 - 40 eV), junction resistances of 10 kQ or higher are obtained after several minutes oxidation (the curve of lowest slope in FIG. 4). By increasing oxygen ion energy, the junction resistance decreases to as low as 25 Q for enexgies above 100 eV, the curve of the highest slope in FIG. 4. Junctions are stable under biasing, with breakdown voltages of 1.5-
2.5V at room temperature. Here the wire resistance ~-is 20 oh~s. Increasing ion bearn energies to above 150 eV results in shorted junctions.
'~09~ 051 ~^~ a~ o3 The dependence of junction resistance (10 ~m2 area) on oxygen ion beam energy is shown in FIG. 5 for both nickel and chromium junctions oxidized for 10 minutes at oxysen ion current density of 0.72 m~/cm2. The junction resistance is a measure of oxide thickness. The spread or ion energy in the beam, typically 20 eV, is indicated by the width of each line shown for each point. As indicated in FIG. 4, junction resistance of nickel and chromium ~IOi~'s decreases with increasing oxygen ion beam energy, presumably due to increased sputter etching resulting in a thinner oxide layer. Chromium .~IO`I's have somewhat higher resistances due to the greater reactivity of chromium.
Time dependence of junction resistance was also examined for ion beam oxidized Ni junctions as shown in FIG. 6. At an oxygen ion energy of ~5 eV, the nickel junction resistance indicated by curve 46 increases monotonically with oxidation time, indicating an oxide growth component with negligible sputter etching. For an oxygen ion energy of 80 eV, however, the junction resistance indicated by curve 48 saturates after several minutes, indicating the formation of a steady state oxide thickness.
Some parameters governing the oxide growth can be deduced from FIG. 6. It is assumed that the junction tunneling resistance at low bias voltage is given by R(x) = (A/x)exp(B~1/2x), where R is the dynamic resistance at zero bias, x is thickness, ~ is the barrier height, and A and B are constan-ts. For a barrier height of 1 eV, an oxide thickness of 10 A
leads to a resistance of 1.5 kQ. We now assume that the oxide growth rate is given by an exponentially decreasing function of thickness in combination with 1 ~ 5~6~3 a constant sputter etching rate d~/dt = K exp (-x/XO) - E where K is the initial oxidation rate in the absence of sputtering, XO is a constant determined by the rate of oxysen dirfusion through the o~ide, and E is the sputter etchinq rate.
This analysis is described by Greiner in the afore-mentioned U.S. Patent 3,~49,276. In the presence of sputtering, the final oxide thickness is XOQn(K/E), which is approached with a time constant Xo/E. From the data for an ion energy o~ 80 eV, shown in FIG. 6, we estimate a time constant of about 1 min. Assuming a sputtering rate of about 2 A/min for nickel oxide under 80 eV 2 bombardment at 0.72 mA/cm , we get XO = 2 A. We now express the junction resistance as a function of time:
QnR = C + B~l/ XOQn t where C = Qn A-Qn x + B~1/2Xo Qn(K/Xo). C can be regarded as a constant due to the weak dependence of Qnx on t. The linear dependence of QnR on Qnt is qualitatively seen in the 45 eV curve of FIG. 6.
From the final resistance of 1.5kQ, one gets K ~ 5 A/sec. This value of initial oxidation rate is reasonable since the arrival rate of oxygen ions at 0.72 mA/cm corresponds to approximately one monolayer of oxygen per second. If each ion were incorporated in the oxide, the growth rate would be several A/sec. Substituting XO' E, and K in x(t) for the general case of sputter-oxidation leads to x(t) ~ 2 Qn 150 [ 1 - exp(-t) ]. Using the equation for R(x), the resistance is plotted as a solid curve 50 in FIG. 6 with a fairly good agreement with the measured resistances. The results indicate that a combined oxidation and sputtering process is responsible for the observed time dependence of junctio~. resistances.
'i~9~0-051 11 ~5~6~
To further characterize the oxidation processes, Auger surface analysis spectroscopy was per~ormed on ion beam o~idized Ni and Cr sa~ples after air transfer. In all sam?les, 40-60~ carbon contamination was detected, probably due to the air transfer and the exposure to diffusion pump vapor. It is knol~n that in r.f. oxidized samples, lar~e amounts of contaminant material, such as moly~denum, back-sputtered from the sample holder, are observed in addition to the metal and oxygen in the oxide. By contrast, ~lo was not detected in ion beam oxidized films, indicating the advantage of operating at low pressure.
'~hus, there has been demonstrated a new process of metal oxidation which incorporates the advantages of low energy ion beams. The process is easily controlled and reproducible, and the resulting oxide junctions are of high quality and free of the contaminants usually found in the r.f. oxidation process.
.
It is to be understood that while a description of a low energy ion beam oxidation process has been provided together with the electrical characteristics of the oxide junctions formed thereby, the invention includes other types of compound formation, such as nitrides, hydrides and sulfides.
While the invention has been particularly shown and described with reference to the preferred embodiment thereof, it will be un~erstood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.
'~09~ 051 ~^~ a~ o3 The dependence of junction resistance (10 ~m2 area) on oxygen ion beam energy is shown in FIG. 5 for both nickel and chromium junctions oxidized for 10 minutes at oxysen ion current density of 0.72 m~/cm2. The junction resistance is a measure of oxide thickness. The spread or ion energy in the beam, typically 20 eV, is indicated by the width of each line shown for each point. As indicated in FIG. 4, junction resistance of nickel and chromium ~IOi~'s decreases with increasing oxygen ion beam energy, presumably due to increased sputter etching resulting in a thinner oxide layer. Chromium .~IO`I's have somewhat higher resistances due to the greater reactivity of chromium.
Time dependence of junction resistance was also examined for ion beam oxidized Ni junctions as shown in FIG. 6. At an oxygen ion energy of ~5 eV, the nickel junction resistance indicated by curve 46 increases monotonically with oxidation time, indicating an oxide growth component with negligible sputter etching. For an oxygen ion energy of 80 eV, however, the junction resistance indicated by curve 48 saturates after several minutes, indicating the formation of a steady state oxide thickness.
Some parameters governing the oxide growth can be deduced from FIG. 6. It is assumed that the junction tunneling resistance at low bias voltage is given by R(x) = (A/x)exp(B~1/2x), where R is the dynamic resistance at zero bias, x is thickness, ~ is the barrier height, and A and B are constan-ts. For a barrier height of 1 eV, an oxide thickness of 10 A
leads to a resistance of 1.5 kQ. We now assume that the oxide growth rate is given by an exponentially decreasing function of thickness in combination with 1 ~ 5~6~3 a constant sputter etching rate d~/dt = K exp (-x/XO) - E where K is the initial oxidation rate in the absence of sputtering, XO is a constant determined by the rate of oxysen dirfusion through the o~ide, and E is the sputter etchinq rate.
This analysis is described by Greiner in the afore-mentioned U.S. Patent 3,~49,276. In the presence of sputtering, the final oxide thickness is XOQn(K/E), which is approached with a time constant Xo/E. From the data for an ion energy o~ 80 eV, shown in FIG. 6, we estimate a time constant of about 1 min. Assuming a sputtering rate of about 2 A/min for nickel oxide under 80 eV 2 bombardment at 0.72 mA/cm , we get XO = 2 A. We now express the junction resistance as a function of time:
QnR = C + B~l/ XOQn t where C = Qn A-Qn x + B~1/2Xo Qn(K/Xo). C can be regarded as a constant due to the weak dependence of Qnx on t. The linear dependence of QnR on Qnt is qualitatively seen in the 45 eV curve of FIG. 6.
From the final resistance of 1.5kQ, one gets K ~ 5 A/sec. This value of initial oxidation rate is reasonable since the arrival rate of oxygen ions at 0.72 mA/cm corresponds to approximately one monolayer of oxygen per second. If each ion were incorporated in the oxide, the growth rate would be several A/sec. Substituting XO' E, and K in x(t) for the general case of sputter-oxidation leads to x(t) ~ 2 Qn 150 [ 1 - exp(-t) ]. Using the equation for R(x), the resistance is plotted as a solid curve 50 in FIG. 6 with a fairly good agreement with the measured resistances. The results indicate that a combined oxidation and sputtering process is responsible for the observed time dependence of junctio~. resistances.
'i~9~0-051 11 ~5~6~
To further characterize the oxidation processes, Auger surface analysis spectroscopy was per~ormed on ion beam o~idized Ni and Cr sa~ples after air transfer. In all sam?les, 40-60~ carbon contamination was detected, probably due to the air transfer and the exposure to diffusion pump vapor. It is knol~n that in r.f. oxidized samples, lar~e amounts of contaminant material, such as moly~denum, back-sputtered from the sample holder, are observed in addition to the metal and oxygen in the oxide. By contrast, ~lo was not detected in ion beam oxidized films, indicating the advantage of operating at low pressure.
'~hus, there has been demonstrated a new process of metal oxidation which incorporates the advantages of low energy ion beams. The process is easily controlled and reproducible, and the resulting oxide junctions are of high quality and free of the contaminants usually found in the r.f. oxidation process.
.
It is to be understood that while a description of a low energy ion beam oxidation process has been provided together with the electrical characteristics of the oxide junctions formed thereby, the invention includes other types of compound formation, such as nitrides, hydrides and sulfides.
While the invention has been particularly shown and described with reference to the preferred embodiment thereof, it will be un~erstood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.
Claims (9)
1. A surface reaction process for compound forma-tion on the surface of a sample material, comprising:
forming an ion plasma with an ion source having magnetic field producing means located around a plasma discharge chamber of said ion source, feeding a gas into said ion plasma which will form a solid compound product when reacted with said surface of said sample material, extracting said ions out of said ion plasma to form an ion beam, and applying a voltage potential to said ion source which will accelerate ions of said gas to a low energy in a directed beam which is such that simultaneous etching and compound formation occur, said voltage potential being used to determine the resulting compound thick-ness, whereby controlled thickness growth of the com-pound is achieved by said directed ion beam of low energy.
forming an ion plasma with an ion source having magnetic field producing means located around a plasma discharge chamber of said ion source, feeding a gas into said ion plasma which will form a solid compound product when reacted with said surface of said sample material, extracting said ions out of said ion plasma to form an ion beam, and applying a voltage potential to said ion source which will accelerate ions of said gas to a low energy in a directed beam which is such that simultaneous etching and compound formation occur, said voltage potential being used to determine the resulting compound thick-ness, whereby controlled thickness growth of the com-pound is achieved by said directed ion beam of low energy.
2. A process as recited in Claim 1, wherein said voltage potential is in the range of about 30-180 electron volts to thereby provide a low energy directed ion beam in the same order of energy.
3. A process as recited in Claim l, wherein said ion source is an electron bombardment ion source having an anode and a cathode, and said voltage potential is applied to said ion source at said anode.
4. A process as recited in Claim 3, wherein said voltage potential applied to said anode is in the range of about 30-180 electron volts.
5. A process as recited in Claim l, wherein said step of extracting said ions out of said ion plasma to form an ion beam is carried out by a single extraction grid having multiple apertures.
6. A process as recited in Claim 3, wherein said single extraction grid is maintained at a potential of minus 10 volts with respect to ground.
7. A process as recited in Claim l, wherein said gas comprises oxygen for formation of oxide compounds.
8. A process as recited in Claim l, wherein the gas pressure in the chamber of the sample material is 0.1 milliTorr or less.
9. A process as recited in Claim l, wherein the sample temperature is maintained at or near room temperature.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/214,929 US4351712A (en) | 1980-12-10 | 1980-12-10 | Low energy ion beam oxidation process |
| US214,929 | 1980-12-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1156603A true CA1156603A (en) | 1983-11-08 |
Family
ID=22800956
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000388982A Expired CA1156603A (en) | 1980-12-10 | 1981-10-29 | Low energy ion beam oxidation process |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4351712A (en) |
| EP (1) | EP0053912A1 (en) |
| JP (1) | JPS5797688A (en) |
| CA (1) | CA1156603A (en) |
Families Citing this family (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4541890A (en) * | 1982-06-01 | 1985-09-17 | International Business Machines Corporation | Hall ion generator for working surfaces with a low energy high intensity ion beam |
| US4536414A (en) * | 1983-01-17 | 1985-08-20 | Sperry Corporation | Superconductive tunnel junction device with enhanced characteristics and method of manufacture |
| US4690744A (en) * | 1983-07-20 | 1987-09-01 | Konishiroku Photo Industry Co., Ltd. | Method of ion beam generation and an apparatus based on such method |
| JPS6078135U (en) * | 1983-11-02 | 1985-05-31 | 株式会社日立国際電気 | Ion beam etching device |
| US4490229A (en) * | 1984-07-09 | 1984-12-25 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Deposition of diamondlike carbon films |
| JPH0740468B2 (en) * | 1984-12-11 | 1995-05-01 | 株式会社日立製作所 | High frequency plasma generator |
| DE3511141A1 (en) * | 1985-03-27 | 1986-10-23 | Siemens AG, 1000 Berlin und 8000 München | ION BEAM MATERIAL MACHINING SYSTEM WITH NEUTRALIZATION DEVICE |
| US4888202A (en) * | 1986-07-31 | 1989-12-19 | Nippon Telegraph And Telephone Corporation | Method of manufacturing thin compound oxide film and apparatus for manufacturing thin oxide film |
| JPS63274620A (en) * | 1987-04-30 | 1988-11-11 | Sumitomo Electric Ind Ltd | Preparation of superconductive material |
| US4776925A (en) * | 1987-04-30 | 1988-10-11 | The Trustees Of Columbia University In The City Of New York | Method of forming dielectric thin films on silicon by low energy ion beam bombardment |
| CN1035087C (en) * | 1987-05-18 | 1997-06-04 | 住友电气工业株式会社 | Method of manufacturing superconductor and superconductive circuit |
| JPH0817253B2 (en) * | 1987-09-16 | 1996-02-21 | 株式会社半導体エネルギー研究所 | Method for forming oxide superconducting film |
| JPH0817254B2 (en) * | 1987-09-16 | 1996-02-21 | 株式会社半導体エネルギー研究所 | Method for forming oxide superconducting material |
| JP2660246B2 (en) * | 1987-09-16 | 1997-10-08 | 株式会社 半導体エネルギー研究所 | Superconducting device |
| JPH0195575A (en) * | 1987-10-07 | 1989-04-13 | Semiconductor Energy Lab Co Ltd | Formation of oxide superconducting material |
| US4902647A (en) * | 1988-10-21 | 1990-02-20 | The United States Of American As Represented By The Administrator Of The National Aeronautics And Space Administration | Surface modification using low energy ground state ion beams |
| US4985657A (en) * | 1989-04-11 | 1991-01-15 | Lk Technologies, Inc. | High flux ion gun apparatus and method for enhancing ion flux therefrom |
| US5415753A (en) * | 1993-07-22 | 1995-05-16 | Materials Research Corporation | Stationary aperture plate for reactive sputter deposition |
| JP3370806B2 (en) | 1994-11-25 | 2003-01-27 | 株式会社半導体エネルギー研究所 | Method for manufacturing MIS type semiconductor device |
| US6238533B1 (en) * | 1995-08-07 | 2001-05-29 | Applied Materials, Inc. | Integrated PVD system for aluminum hole filling using ionized metal adhesion layer |
| US5962923A (en) * | 1995-08-07 | 1999-10-05 | Applied Materials, Inc. | Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches |
| US5851367A (en) * | 1996-10-11 | 1998-12-22 | Sharp Microelectronics Technology, Inc. | Differential copper deposition on integrated circuit surfaces and method for same |
| US5885665A (en) * | 1997-05-09 | 1999-03-23 | The United States Of America As Represented By The United States Department Of Energy | VO2 precipitates for self-protected optical surfaces |
| JP3222404B2 (en) * | 1997-06-20 | 2001-10-29 | 科学技術振興事業団 | Method and apparatus for forming insulating film on semiconductor substrate surface |
| US20050272254A1 (en) * | 1997-11-26 | 2005-12-08 | Applied Materials, Inc. | Method of depositing low resistivity barrier layers for copper interconnects |
| US7253109B2 (en) * | 1997-11-26 | 2007-08-07 | Applied Materials, Inc. | Method of depositing a tantalum nitride/tantalum diffusion barrier layer system |
| WO1999027579A1 (en) * | 1997-11-26 | 1999-06-03 | Applied Materials, Inc. | Damage-free sculptured coating deposition |
| US6271529B1 (en) | 1997-12-01 | 2001-08-07 | Ebara Corporation | Ion implantation with charge neutralization |
| US6355580B1 (en) | 1998-09-03 | 2002-03-12 | Micron Technology, Inc. | Ion-assisted oxidation methods and the resulting structures |
| US6281538B1 (en) | 2000-03-22 | 2001-08-28 | Motorola, Inc. | Multi-layer tunneling device with a graded stoichiometry insulating layer |
| US6652763B1 (en) * | 2000-04-03 | 2003-11-25 | Hrl Laboratories, Llc | Method and apparatus for large-scale diamond polishing |
| US6545906B1 (en) | 2001-10-16 | 2003-04-08 | Motorola, Inc. | Method of writing to scalable magnetoresistance random access memory element |
| US7095646B2 (en) | 2002-07-17 | 2006-08-22 | Freescale Semiconductor, Inc. | Multi-state magnetoresistance random access cell with improved memory storage density |
| US6895985B2 (en) * | 2003-03-17 | 2005-05-24 | Computerized Smart Faucet Ltd. | Smart device and system for improved domestic use and saving of water |
| US6956763B2 (en) | 2003-06-27 | 2005-10-18 | Freescale Semiconductor, Inc. | MRAM element and methods for writing the MRAM element |
| US7718983B2 (en) * | 2003-08-20 | 2010-05-18 | Veeco Instruments, Inc. | Sputtered contamination shielding for an ion source |
| US6967366B2 (en) | 2003-08-25 | 2005-11-22 | Freescale Semiconductor, Inc. | Magnetoresistive random access memory with reduced switching field variation |
| US7695590B2 (en) | 2004-03-26 | 2010-04-13 | Applied Materials, Inc. | Chemical vapor deposition plasma reactor having plural ion shower grids |
| US7767561B2 (en) | 2004-07-20 | 2010-08-03 | Applied Materials, Inc. | Plasma immersion ion implantation reactor having an ion shower grid |
| US8058156B2 (en) * | 2004-07-20 | 2011-11-15 | Applied Materials, Inc. | Plasma immersion ion implantation reactor having multiple ion shower grids |
| US7129098B2 (en) | 2004-11-24 | 2006-10-31 | Freescale Semiconductor, Inc. | Reduced power magnetoresistive random access memory elements |
| US7615385B2 (en) | 2006-09-20 | 2009-11-10 | Hypres, Inc | Double-masking technique for increasing fabrication yield in superconducting electronics |
| FR3011389B1 (en) * | 2013-10-01 | 2015-10-30 | Thales Sa | METHOD FOR MANUFACTURING JOSEPHSON JUNCTION AND ASSOCIATED JOSEPSON JUNCTION |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3849276A (en) * | 1971-03-19 | 1974-11-19 | Ibm | Process for forming reactive layers whose thickness is independent of time |
| JPS5588382A (en) * | 1978-12-27 | 1980-07-04 | Fujitsu Ltd | Preparation of tunnel junction type josephson element |
| US4259145A (en) * | 1979-06-29 | 1981-03-31 | International Business Machines Corporation | Ion source for reactive ion etching |
-
1980
- 1980-12-10 US US06/214,929 patent/US4351712A/en not_active Expired - Lifetime
-
1981
- 1981-09-14 JP JP56144085A patent/JPS5797688A/en active Granted
- 1981-10-29 CA CA000388982A patent/CA1156603A/en not_active Expired
- 1981-12-03 EP EP81305696A patent/EP0053912A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6354215B2 (en) | 1988-10-27 |
| US4351712A (en) | 1982-09-28 |
| JPS5797688A (en) | 1982-06-17 |
| EP0053912A1 (en) | 1982-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA1156603A (en) | Low energy ion beam oxidation process | |
| US4259145A (en) | Ion source for reactive ion etching | |
| Oechsner et al. | Mass spectroscopy of sputtered neutrals and its application for surface analysis | |
| US4574179A (en) | Ion beam machining device | |
| Maul et al. | Secondary ion emission from silicon and silicon oxide | |
| Leyland et al. | Enhanced plasma nitriding at low pressures: a comparative study of dc and rf techniques | |
| US3361659A (en) | Process of depositing thin films by cathode sputtering using a controlled grid | |
| EP0207646A1 (en) | Dual ion beam deposition of dense films | |
| US4132614A (en) | Etching by sputtering from an intermetallic target to form negative metallic ions which produce etching of a juxtaposed substrate | |
| US4483725A (en) | Reactive vapor deposition of multiconstituent material | |
| Yamashita | Sputter type HF ion source for ion beam deposition apparatus | |
| Ishikawa | Negative ion beam technology for materials science | |
| US4414069A (en) | Negative ion beam selective etching process | |
| Harper et al. | Ion beam oxidation | |
| CA1252581A (en) | Electron beam-excited ion beam source | |
| Sobell et al. | Hollow cathode plasma electron source for low temperature deposition of cobalt films by electron-enhanced atomic layer deposition | |
| US5171718A (en) | Method for forming a fine pattern by using a patterned resist layer | |
| US4038216A (en) | Material and method of making secondary-electron emitters | |
| Evtukh et al. | Formation of conducting nanochannels in diamond-like carbon films | |
| Tompa et al. | Cesium coverage on molybdenum due to cesium ion bombardment | |
| Kwong et al. | Charge transfer between O 2+ ion and helium at electronvolt energy | |
| US6039847A (en) | Method of forming a highly pure thin film and apparatus therefor | |
| Bouchier et al. | Low Temperature Deposition of Silicon Nitride by Reactive Ion‐Beam Sputtering | |
| Ichiki et al. | Characterization of neutral beam source using dc cold cathode discharge and its application processes | |
| Puchert et al. | Gas–plasma interactions in a filtered cathodic arc |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |