CA1177140A - Sensing and control system - Google Patents

Sensing and control system

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Publication number
CA1177140A
CA1177140A CA000386724A CA386724A CA1177140A CA 1177140 A CA1177140 A CA 1177140A CA 000386724 A CA000386724 A CA 000386724A CA 386724 A CA386724 A CA 386724A CA 1177140 A CA1177140 A CA 1177140A
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CA
Canada
Prior art keywords
signal
parallel
address signals
address
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000386724A
Other languages
French (fr)
Inventor
Paul A. Desjardins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Firecom Inc
Original Assignee
Firecom Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Firecom Inc filed Critical Firecom Inc
Application granted granted Critical
Publication of CA1177140A publication Critical patent/CA1177140A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B26/00Alarm systems in which substations are interrogated in succession by a central station
    • G08B26/001Alarm systems in which substations are interrogated in succession by a central station with individual interrogation of substations connected in parallel
    • G08B26/002Alarm systems in which substations are interrogated in succession by a central station with individual interrogation of substations connected in parallel only replying the state of the sensor

Abstract

ABSTRACT
A remote and control system wherein a plurality of remote sensing units are connected to a central control and monitoring console by only four interconnecting wires. A clock signal is converted to a plurality of parallel address signals at the local monitoring console and also at the remote sensing units located up the building. A sync signal is employed to synchronize all of the serial to parallel converters in the system, and each remote unit is provided with a specific code and is identified by selectively routing one or more signals through an invertor located at each unit so that the signals trigger a logic device in the particular time slot assigned to each remote unit. The input circuitry of each remote sensing unit compares two fixed microvolt reference signals derived from the least significant bil of the address signals with the return signal from the sensing device to sense for opens, grounds, normal conditions, and alarms. The system is adapted to operate with conventional computing means and programmable read only memories, as well as a mutiplexer unit, for providing control signals to operate controlling devices upon the occurrence of predetermined signals from the sensing device.

Description

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BACY~G'ROUND OF THE INVENTION

The present invention relates generally to remote sensing and control systems and, specifically, to a detection and alarm system employing a plurality of remote sensing units which are ~irec~ly connected to a central monitoring and control center.

There is presently a growing requirement for providing large buildings with systems which can detect emergency condi-tions. For example, in large apartment or office buildings, smoke detectors and the like may be located throughout the buildlng with each detector then being connected to a central monitoring consoLe, which is'to be manned at aLL times. While the very first systems of this kind required each individual sensing unit to be directly connected by de~icated wires to the central control and monitor-ing console, various methods of reducing the number of wires needed to interconnect the units with the central console are now known.

It is important to reduce the number of interconnecting wires noc only to reduce material costs, but also to reduce the amount of labor and time invo'lved in installing the fire detection system into the bui'lding.

One approach toward reducing the large number of wires needed to connect to a multip'licity of sensors is disclosed in U.S. patent 3,921,16~, assigned to the assignee hereof. In that patent a system is shown which can permit a plurality of remote units to be connected in parallel to the monitoring and control center by a plura'Lity of signal carrying wires, a monitoring wire, and a control wire. The number of remote units monltored and controlled may be as many as 2n, where n is the number of signal carrying wires comprising the above-mentioned plurality.
Whlle this system afforded a major reduction in the number of X - ~

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, 7'~:~40 ~ 2 - , interconnection wires necessary in Iarge insta'Llations employing many remote sensing units, lt may be seen that a relatively large number of signal carrying wires wou`Ld still be required if, say, five hundred sensors are invoLved.

Another approach to reducing the number of wires required to connect a plurality of fire detection transponders to a centra~L
station is set forth in U.S. Patent ~,067,008, wherein DC pu'Lses are used to interrogate the p'LuraLity o-~ sensors, each sensor and its associated transponder emp'loys a counter whLch counts the interrogation pulses and will respond only after the particuLar interrogation pulses corresponding to the count assigned to that transponder have been received.

Another approach to decreasing the number of interconnection wires involves transmitting a specific word over a data bus to the sensing unit, in order to determine the status of each of the sensing units. ALthough this approach appears promising, a relatively large data bus is required by the system. A'Lterna-tiveLy, time division muLtiplex (TDM) systems can be used ~or in~errogating, in the manner generaLLy known to the communica-tions industry, a number of transponders connected to a central monitoring station.

While all of these systems are effective in reducing the num'ber of interconnections required, they attendantLy invoLve complex electronic units to code and decode the digital words and/or to provide time divlsion muLtiplexing.

Another disadvantage in prior sy~tems has been the inability of the system to cope with a grounded monitoring line. A grounded monitoring line can result from an integrated circuit faiLure, a shorted output transistor in the transponder, or a short to the buiLding ground. A grounded monitoring line causes all devices to go into alarm and to call the Fire Department. This is an , . . . .
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~7'7 undesirable false alarm condition.

SUMMAl~Y OF THE INVENTIO~
~ . . . _ The present invention provides a system wherein a pluraLity of remote sensing units, up to five hundred twe-Lve, are connectecl to a centraL contro~ and monitoring conso-Le by only four interconnecting wires. Specifically, the remote units are connec-ted in parallel to the monitoring and control center by a data receiving wire, a control signaL wire, a clock wire, and a sync wire. Use of only four wires is made possib-Le in the present invention by providing a system wherein a cLock signal is converted to a plurality of signals of progressive'ly doubLed wave lengths or, conversely, the frequency is successively haLved. A'Ll of these coded ~ddress signals are sent to a display unit;
however, only the serial clock signal is sent up the buiLding.
Other convertors are Located up the building for converting the serial cLock signals inco the identica'L set of coded address signals which were generated by the first convertor. A synch signal is employed to synchronize all of the converts in the inventive system. Each rernote unit is provided with a specific code and is identified by selectively routing one or more signals through invertors Located at each unit, so that the signals trigger the device in the particular time slot assigned to each remo~te unit. ~ccording to the open, closed, or grounded status of the particular remote sensing unit, a logic device sends a signa'L
through the data receiving or monitoring wire for each unit in its specific time slot. The central control and monitoring console then sequentially monitors each remote unit in its individuaL time slot and indicates the status of all remote units to the operator. Each rernote unit, in addition to its sensing function can include a relay which can be activated by a control signal from the control and monitoring console during the time sLot for that unit. To achieve this computing means may be programmed to activate the relays of one or more of the remote .

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units at the approprirate time s'Lot.

The apparatus according to the present invention generates seria] cLock pulses which are converted in a serial to paralle'L
convertor to a para'LLel address. This address is forwarded to a monitoring dispLay, a contro'L section, and a comparator section in the centraL console. The address is logica-L'Iy compared and when aLl of the addresses have been produced a sync pulse is produced, which is used to reset all serial to paral'Le'l conver-tors. The SyTIc pulse is issued to the clispLay and to the remote sensing circuitry, thereby causing all address lines to return to a zero state.

A strobe signal is produced which cLoclcs the data to the display control and comparator sections. The cLock and sync signals are sent up the buiLding ~o each remote location, where they are reshaped and fed to a seriaL to para'L'LeL convertor. The addresses produced by the convertor are fed to the individuaL
~ransponders.

~ The input circuitry of each remote sensing device compares two fixed microvolt reference signaLs derived from the least significant bit (LSB) of the address from the serial to paraLLel convertor, with the return signa'L from the sensing device and its end/of line component. The comparator unit senses for opens (trouble), grounds (trouble), normal, and a'Larms. A Loss or reduction of return current indicates trouble or ground, and an increase in return current indicates an alarm. The outputs of the comparator unit are fed to a corresponding exclusive OR gate. The comparacor unit operates such that if the signal is the same as that sent out to ~he remote device, then there is no change in the output of the exckusive OR, a normal is indlcated, and a normal signal is sent. If the return signaL is steady high, then the outputs of the comparator wi'Ll cause a trouble signaL to be sent to the controL center in the time frame corresponding to X

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that device. If ~he return signaL has an increase in current, the comparator units feed this Leve'L shift to the excLusive OR gate.
The resuLt is an aLarm signal being sent back to the central consoLe.

ProgrammabLe read onLy melllories (PROM) may also be used advantageous'Ly to sencl control signals on the control line to energize reLays at the remote colLection panels. It is aLso advantageous to use an eight-bit multipLexer provided with a number of manuaLly actuatable switches, which permit selection of at Least one of the remote actuating units. When the multlpLexer sees the selected address, a controL signal is placed on the control Line, so that only the reLay whose time slot corresponds to the multiplexer output will be energixed.

Additionally, a computing rneans such as a minicornputer can be used so that alL controL signaLs are derived from the computer's control logic. It is these contro'L signals that are used, for example, to operate relays to shut down fans and to recalL elevators. The kind of aLarm, e.g., Manual Station, ~'Levatorj Smoke, etc. will be disp'Layed by the P~OM package, as welL as the on floor where the alarm originated and on the floor directly above. The Local Yire Department can aLso be notified by a signal produced by the computer. The system can be easiLy programmed so that, if the computer fails, an audible and visible signal is produced. It is also possible to use the computer's own diagnostics to cause it to display or print out the kind of failure it is experiencing.

Therefore, it is an object of the present invention to provide a remote sensing and control system wherein the number of electrical interconnections between the sensing system and the indication system is minimized.

It is another object of the present invention to provide a .
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remote sensing and control systern whereln the sensing units are connected in para'LLe'l, and are in comm~mication with a central control and monitoring paneL by mear1s of only four Lines.

It is a further object of the present invention to provide a remote sensing and controL system wherein the sensing units are seLf checking and the status thereof may be constant'Ly monitored.

The manner in which these and other objects are accomplished by the present invention wilL become clear from the fo]lowing detailed description.

BKIEF DESCl~IPTION OF THE DRAWINGS
_ Fig. l is a bLock diagram showing the generaL
operation of the present invention;

Yig. ~ is a b'Lock diagram showing the present invention in more detai'L;

Figs. 3A, and 3B comprise a schematic circuit diagram of the present inventionj ~ig. 4 is a schematic circuit diagram oE the sensing unit identification system utilized in the present invention;

Fig. 5 is a schematic showing the comparators unit of Fig. 3B in more detail;

Fîg. 6 is a graph of the waveforms showing the clocks generated time intervals in the present invention; and ' ~ .
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~ , : -Fig. 7 is a graph of che waveforms indicating the outputs from a remote unit in its various states.
f~¢IF DESCRIPTION OF THE I'NVENTION

Fig. L is a b]ock cliagram showing the main functlonaL units of the present invention. In order for the present invention to permit communications between a plurality of remote sensing devices and a central contro'L console, the present invention Leaches the use of serial co paraL'Lel convertors producing address signaLs, which have a progressively doubLed wave length or, 'looked at another way, a progressiveLy halved freguency. In the dia~ram of Fig. 1, the basic clock signal is generated in the central console unit, shown general'Ly at 10. The controL console unit 'L0 also incLudes a serial to parallel convertor 12. The portion of the invention corresponding to the centraL consoLe unit 10 produces a clock signa'L or seriaL address signaL on line 14 and a sync signaL on line L6, which are both fed to a corresponding seriaL to para'Lle'L convertor 'L8. There is a serial to paraLleL convertor located at each group oE remote sensing units, represented generally by a remote coLlection paneL 20. The functions of the cLock signaL L4 and sync signaL L6 wiLl be expLained in more detaiL herein~e'Low. Adclitionally, when one or more remote actuating devices are ernployed, controL signals for controLLing the operation of such devices are sent from the central console on line 22. The data from the remote sensing units appears on line 24 which is termecd a monitoring Line. The ~arrowheads on the various interconnecting Lines ln Fig. L
indicate the origin and termination of the four main signals of the present invention.

Fig. 2 shows the bLock diagram of Fig. L in more cletail.
SpecificaLLy, all addresses and timing are derived from a clock unit 40, which in this embodirnent has a frequency oE 7.2 KHz.

. .
' 7'7 This c'Lock 40 can be a quart~ crystal controLled osci.lLator. The output signa:L from the c:Lock 40 is fed on Line 42 to a divide by eight counter 44. 'rhe divi.de by eight counter 44 produces a signa'L on line 46 which is ~00 Hertz. This signaL from the divide by eight counter 44 is fed on l.i.ne 46 to a seriaL to parall.eL
conver~or 48, which produces ten paraLlel output si.gnaLs on mult:ilines 50. These outputs corresponcl to the ten address lines, ~enoted as A through J'. ~y means of these ten lines, up to '1.024 difEerent addresses are possible in a binary system. These l.ines 5~ are connected both to a comparator section 52 and to a dlsp'Lay section 54. The specific waveforms of certain of the ten 'Lines 50, A through J, will be shown hereinbelow.

The cotnparator section 52 operates as a ten input AND gate and serves to determine when all ten of the different address signals have been produced by the serial to paral'Lel convertor 4~. The comparator section 52 produces an output signal. on l.ine 56 which resets the seria] to parallel convertor 4~. Upon receiv:ing the reset signal on :Line 56 the serial to para'Llel convertor begins to reissue anew the set of ten identiEying signal.s on mu:Ltilines 50.

As pointed out above, each remote unit is assigned a particular address, represented by the instantaneous values of the ten different signals in ten preselected time slots, and it also has a corresponding indicator lamp (not shown) in the disp:Lay unit 54. When each remote uni.t is addressed in turn depending upon the state of the signa'L on line 5S, the display unl~ 54 wiLL ind.icate a normaL, troub.Le, or aLarm conditi.on.
.
The signal on line 56, which acts as the reset signal, is : also employed as the sync signa:L on Line l6 of Figo l. Thus, 'Line :56 is one of the four Lines which are fed up the buiLding to the groups of remotely located sensing units. Similar'Ly, the output signa:l on line 46 from the divide by eight counter 44 comprises J~

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~- . ~ : ' ' ` , , r g the cLock signal, which appeared on Line '14 ;n ~ig. l. This clock signal on line 62 is also one of the four Lines which are fed up the building.

A strobe signal having a frequency of 1.8 K~lz is placed off from the divide by eight counter 44 prior to the point interna`l to the counter where the 900 ~-lz output signa'l is producecl. This strobe signaL on Line 58 is fed to the display unit 54 to synchroni~e the display and also to PROM, computer, and mu'Lti-plexer units, shown genera'L~Ly ac 60. The speci-Eic interconnec-tions wiLl be shown in more detaiL hereinbelow. Also, as may be seen, the output of the seria'L to paraLlel convertor 48 on line 50, which comprises address Lines A through J, is also fed to the computer and PROM units 60. These units 60 produce the control signals on line 62, which was 'Line 22 in Fig. l. As will be explained hereinbe'Low, the control signal on Line 62 may be used to pull up a rernote'Ly Located actuating device and is thus directly connected to the remnote unit, 'Located general'Ly in the vicinity of the remote connection panel 20. On the other hand, the clock signal on line 46 and the sync signa'L on line 56 are Eed to another serial to para'lleL convertor, which takes the serial signals and converts them to the ten address lines, corresponding to the A through J signa'Ls. These ten lines 68 are fed to speciaLized remote inut circuitry, shown generalLy at 70.
The input signals from each of the various remote sensor unit located generalLy in the same area are also fed through this generalized remote input circuitry 70. The remote input circuitry ; ~O uLtimately produces the monitoring signaL on line 55 which is ~ed back to the disp:Lay unit 5~ and the PROM and computer unit 60. This monitorin~ signal on line 55 is essentially a data line which is Eed back to the display 54 and the P~OM and computer unit 60 and serves to gate on the specific display device that corresponds to the remote sensor unit which has sensed either a trouble or alarm condition.
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~ 'eferring now co Fig.s 3A and 3B, the inventive eireuit, ans shown in Lhe generalized bLoek ~iagrams of Figs. '1 and 2, is expanded even further- Onee again, the cloek unit 40 produees a 7.2 KH~ slgnal on Iine 42, whieh is fed to the divide by eight counter ~4. The prineipa'L output of the divide by eight eounter 44 appears on Line 45 and is a 900 I-~z signal. This signaL is fed co a buffer unit lOO, which adjusts the ~Level of the divide by eight counter 44 signaL. The output of the buffer -L02 on 'Line lO~
is fed to a pu'lse reshaper L06, which compensates Eor any clipping or rounding of the signaL waveform, which that may have oecurred. There~or, a buffered and reshaped signal on line LO~ is fed to the seriaL to paraLIel convertor 48. It is the output of the seriaL to parallel eonvertor 4~ that comprises the ten lines, A through J, whieh were fed to the clisp'Lay unit 54 of Fig. 2.

The serial paraLleL convertor 48 operates sueh that when the output signal from one stage has experienced two downward'Ly going leading edges, the oucput signaL of the succeeding stage wiLL
ehange states. Thus, each sueeeeding stage wiL'L produee one pulse or change of scate for each two puLses or ehanges of state in the preceding stage. This operation takes p~Lace in each successive stage of the convertor, whieh as the apparent effect of producing a plurality of paraLLel signals having progressive'ly halved Erequencies. This is not, however, strict'Ly the case, since the frequencies of the successive ^Lines are only reLative to the preceding line and not to time, i.e., there are no haLf eycLes involved.

The dispLay unit conlprises a binary to sixteen convertor lLO, which converts the ten binary signals on 1ines 50 to sixteen individual signals appearing on the lines shown collective'ly as L12. Each of these sixteen Lines 1'12 is fed to a corresponding flip-f~op, one of which is shown typicaLly at 114. Each flip-ELop L14 aLso receives the data signaL appearing on line 55, which is che monltoring line from the remote sensing units. The output ; ~ . . . ..

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from each flip-fLop LL4 is connected to a corresponding i]Lumina-tion means LL6, which is aLso com~ected to a source of voltage, as represen~ed by power 'Line Ll8. Thus, upon the coincidence of a trouble or alarm signal on the monitor Line 55 and the appropri-ate address from the binary to sixteen convertor , the corres-ponding fLip-flop ll4 wiLI cause the corresponding 'lamp 'L16 to be illuminated at th0 dispLay pane'l of the control consoLe.

The address signals on multi'Line 50 from the serial to paraLlel convertor 48 are aLso fed to the comparator means 52, which is a logLcaL AND device for detennining when al'l of the ten address lines are high, a condition ~hich wi'Ll occur when the Last of the output signals from the serial to paralleL convertor 48 has been doubLed in wave Length or halved in frequency. This function of the comparator means 52 may be more fully appreciated when the waveforms shown ln Fig. 6 are examined in detail hereinbeLow. When aLl of the signaLs have been detected, i.e., when the serial to paraLLeL convertor 48 has run through the entire list of the ten different signa'Ls, A through J, the comparator means 52 produces an output signal or a high level on line :120 which is connected to a logical O~ gate L22. This OR
gate 122 has as its second input a signal on line 124 from a computing means 126. When the comparator means 120 detects all of the ten possible ou.put signals, A through J, from the serial to parallel convertor 48 and Line L20 goes high, the output on line 127 of the OK gate 122 also goes high and acts as a reset signal, which is fed back to the serial to paral'lel convertor 48. First, however, the signal on line 127 is Eed to a buffer unit L28 where it is adjusted in voltage leveL and fed out on line 129 to a pulse reshaper 130. The puLse reshaper 130 output signal on line 132 is a shaped pulse signal, which in turn resets the serial to parallel convertor 48 to cause it to begin once again converting the cloc'k signals on line 108 into the A through J series of signa:ls.

The divide by eight counter 44 aLso produces the strobe D~

:
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:, . , ~7i7~0 signal on line 58 at a frequency somewhat higher than the 900 Hz on line 45. This strobe signal is fed to the binary to sixteen convertor 110, the programmabLe read only memory (PROM) 133, the computing means 126, and an eight-bit multiplexer 135. This strobe signal serves to synchronize the operations of all of these several units with the several address signals used in the present invention. In regard to the computer means 126, it has been found that a 16-bit minicomputer, as manufactured by Computer Automation Company, Inc., modeL LSI 4/IO, can be advantageously used in the present embodiment The use of a computer base in this embodiment permits the addition of displays, printers, and other peripherals without expensive modifications. Connected in the standard manner, i.e., to the appropriate input/output ports of the computing means l26 are a cathode ray tube dispLay 136 and a conventional hard copy printer 137. The address lines 50 and the data line 55 are fed to the multiple~er 135 which includes a plurality of command switches which may be manually set to select any one of the remotely located actuating units. Upon the 8-bit multiplexer 135 seeing an alarm signal on line 55 coincident with the address of the remote unit selected by the switches, a control signal is produced on line 138, which is fed to a control buffer unit 139.
The output of this control buffer unit 139 is the control line 62 which is fed up the buiLding.

Similarly, the computing means 126 is connected to receive the addresses on line 50 and the monitoring data on line 55. The computing means 126 can be programmed in advance to produce a control signal on line 140, upon the coincidence of an alarm signal on line 55 and the preselected remote unit address on multilines 50. This control signal on line 140 is fed to the control buffer 139, prior to sending it up the building.

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'7 The programmable read only memory L33 also receives the ten addresses on multiline 50 and the remote unit data on monitor line 55 and, provided that the PR0~l 153 contains the correct microcode, the appropriate controL signal will be produced on line 142. The control signal on line 142 is also fed to the control buffer prior to sending it up the building. The purpose of these control signals will be explained in more detail hereinbelow.

The computing means 126 also produces a synchronization signal on line 144 ~hich is fed to a sync buffer 146, where the signal is level adjusted prior to its being fed up the building on the sync line 56. The comparator means 52, which receives the ten address signals on line 50, is the principal element which is charged with the production of the sync signal for synchronizing the serial to parallel convertor units located at each of the remote sensing locations.

Referring now to Fig. 3B, which is a continuation of the circuit of Fig. 3A, and following the same numbering system employed in Figs. 2 and 3A, the control signaL emanating from the control buffer 139 appears on line 62, the clock signal emanating from the buffer 100 appears on line 46, the sync signal emanating from the sync buffer 146 appears on line 56, and the monitoring infGrmation being fed back to the display unit is on line 55. The clock signal 46 and the sync signal 56 are both fed to a pulse reshaper 180 where they are squared up. the sync signal 56 is then fed to the parallel to serial convertor 66 on line 182, and the clock signal 46 is similarly fed to the serial to parallel convertor 66 on line 184. This serial to parallel convertor 66 receives the clock signals in the identical manner as the serial to parallel convertor 48 received clock signals on line 108, after such signals had been buffered in buffer 102 and shaped in pulse shaper 106. As may be seen, these serial to paralleL
convertors also receive reshaped pulses from the pulse reshaper X

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180 that had previously been buffered by buffer unit 100. All serial to parallel convertor units are synchronized by the sync signal appearing on line 56, which is the same signal used to synchronize the main serial to parallel convertor 48 located at the central control and monitoring console.

There is no limit to the number of serial to parallel convertors 66 which can be located up the building, since the inventive system can handle an unlimited number of transponders.
Additionally, because this embodiment of the present invention is designed using CMOS devices, there are no fan out constraints.
This system is designed for 2048 points, which break down into four cables of 512 devices. The Underwriters Labroatory requires that only 32 transponders be connected to one serial to parallel convertor. Therefore, in this embodiment, this involves four cards, each having eight points on it. Thus, there are 32 transponders at each serial to parallel convertor 66 and, if 2048 points (transponders~ are desired for monitoring purposes, then 64 serial to parallel convertors will be required up the building and one serial to parallel convertor at the central control and monitoring console.

The serial to parallel convertor 66 produces the least significant bit (LSB) of the address on the A line 185. The other nine lines of the address, B through J, are produced on the nine lines shown collectively at 186. The A line 185 is connected to eight separate comparators units, the first being 188 and the last being 1980. It being understood that the remaining six comparators units are not shown for reasons of simplicity but would be connected just as comparators units 188 and 190.

Also connected to the comparators units 188 is the remote sensing unit 192 and a suitable voltage source on line 193. The remote sensing unit 192 may be functionally represented by a resistor 196 and switch contacts 198, connected in parallel with . .

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7'7 an additional resistor 200 caLled an "end of line" resistor.

The remote sensing unit 192 is connected by lines 202, 204 through a plug-in connector, represented schematically at 206, to the comparator unit 188. The outputs of the comparators unit l88 are fed on lines 207, 208 to an exlcusive OR gate 2lO. The plug member 206 is provided so that different types of sensing units may be easily connected and disconnected from the more permanent portion of the inventive system. The output of exclusive OR gate 210 appears on line 211 and is fed to an AND gate 212.

AND gate 212 is a ten input device which receives the sensing unit signal on line 211 from the e~clusive OR gate 210 and also receives the remaining nine address signals, B through J, shown generally at 214. As indicated a~ove, in this embodiment there are a total of eight 10-input AND gates identical to AND
gate 21~ on each of four cards which are plugged into the serial to parallel convertor 66.
, The nine other inputs to each 10-input AND gate, and to AND
gate 212 in particular, are provided by nine separate identifica-tion units, or jumper/inverter units3 such as the one shown at 216. The general operation of this identification unit is explained in detail in the aforementioned U.S. Patent No.
3j921,168. There are a total of nine identification units for each remo~e sensing device employed in this system and in Fig. 3B
there will be a group of nine identification units, such as 216, connected to each of the nine lines, B through J. Each identifi-cation unit 216 consists of an invertor 217 connected to the appropriate address line, in this case line B, the invertor 217 is connected in series with ~a switch or jumper 128 and another switch or jumper 219 is also connected directly to the address line, i.e., the B line. By choosing the manner in which the switches 218, 219 are thrown, the output of the identification unit can be dictated for each occurance of a zero or one at the X

., , ~7'7 input. It should be remembered at this point that the address lines carry signals which have increasingly doubled wavelengths and, thus, at each succes~ive 900 ~Iz clock pulse the high-low inter-relationship of the nine lines changes. Each remote sensing unit may then be individually identified by making or breaking the switches, e.g., 218 and 219, in the identification unit so that the inputs to the 10-input AND gate 212 are either inverted or not inverted.

For example, as will be shown hereinafter, the only time when the waveforms of alL address lines are low is during the first time interval. Therefore, if it is desired that the nine identification units, represented by unit 2l6, are to identify sensing unit 192 as the first unit, then the switches in serial with the invertors must be set closed and those in parallel must be set opened. Thus, at the first time interval AND gate 212 will be presented with nine high inputs and the state of the remote sensor 194 can be determined by the output of AND gate 2l2.

All comparators units, e.g., 188 and 190, in the system operate the same way. The inventive comparator arrangement is set up to sense for open trouble, ground trouble, normal, and alarm conditions. For example, a loss or reduction of the return current to the comparators unit means that the output on one of the lines, 207 or 208, of the comparator will be a steady high.
This steady high is derived from a comparison with the least significant bit of the address, i.e., the A line 185 and the output of the sensing unit 192. The other conditions will be explained hereinbelow in relation to Fig. 7.

Similarly, the output of exlcusive OR gate 233 on line 234 is fed to another 10-input AND gate 236. The other nine inputs to AND gate 236 are on line 238, which correspond to the B to J
lines produced by the nine separate identifying units, one of which is shown at 240. As in all the identifying units, two X

, ~ ' :~ :

~7'~:~4~

jumpers or switches are provided, one being in series with an invertor. In this manner, the specific remote sensing unit 226 can be readily iden~ified. It must be understood that there are six 10-input AND gates that have not been shown in Fig. 3B in the interest of clarity and simplicity. In other words, there are nine jumper and invertor units corresponding to units 2l5 and 240 for each of the si~ 10-input AND gates not shown. Similarly, there are also six other exclusive OR gates, corresponding to OR
gates 210 and 233. Each AND gate, 212, 236, and those not shown, produces an output signal which is fed to an eight input OR gate 242. Specifically, the output from the first AND gate 2l2 of the eight appears on line 244 and the output from the last AND gate 236 of the eight appears on line 246. Upon the presence of a high input signal, OR gate 242 produces an output on line 248, which is fed through a base resistor 252, appearing on line 55, is the monitor line fed back to the display. This monitor line might be also characterized as a data output line.

By using the OR gate 242, the reliability of the inventive system is greatly improved because this will eliminate seven additional transistors corresponding to transistor 252. The elimination of transistor amplifiers in circuits such as the present one, goes a long way toward improving the reliability of the system.

Additionally, the output on line 246 from AND gate 236 is fed to another AND gate 254, which has as a second input the control signal on line 62, produced by the control buffer 139 of Fig. 3A. This AND gate 254 produces a signal on line 256 when the output on line 246 of AND gate 236 is high simultaneously with the control signal being present on line 62. The signal on line 256 is fed through a base drive resistor 253 to a transistor 260.
The output of this transistor 260 appears on line 262 and is fed to the coil 264 of a relay unit 266, which represents a controlling device. The other side of the relay coil 264 is ....

7'7~4t~

connected to a suitable ~+ voltage. Relay 266 may consist of a number of four-pole, double-throw contacts, which may be used to control any ~ype of device, such as door locks, elevator controls, ventillator fans, etc.

Although only one actuating device 266, is shown connected to the output of AND gate 254, additiona] corresponding actuating devices could be connected to the output of every corresponding AND gate in the system, e.g., to AND gate 212, and to the single control signal on line 62.

Referring now to Fig. 4, an expanded group of identification units is shown. Each successive one of these identification units, such as 280, 282, 284, and 286 is identical to unit 216 described above and produces an output signal connected to the 10-input AND gate 212. There is an identification unit, e.g., 216, 280, etc., for each o the nine address lines, and there is a group of nine such identification units for every remote sensing unit employed. Such groups are necessary in order to address each sensing unit individually. In the embodiment under discussion, wherein thirty-two sensing devices may be empLoyed, there would be thirty-two groups of nine identification units identical to unit 216. The remaining tenth input to the lO-input A~D gate 212 is derived from the exclusive OR gate driven by the comparator network and, in this example, the signal is produced on line 211 by exclusive OR gate 210. Although in this embodiment the identification units use switches, e.g., 218 and 219, these may be advantageously replaced with jumpers preset at the manufacturing and assembly site.
.
Flg. 5 shows the comparators unit 190 in more detail. The sensing unit 230 and the end of line resistor 234 are connected via plug-in connector 226 to lines 300, 302 which are input to the comparators unit 190. The sensing unit 228 is connected on line 303 to a voltage source for biasing it through a fuse 304 . . ~
. ~ . ~ . :

: ; :

t7~:~4{1 and a series of diodes, shown generally at 306. The output signal from the sensing 228 unit is on line 300 and is fed to the positive input of a first voltage comparator 308 and to the negative input of a second comparator 310. These two comparators 308, 310 are biased in the conventional fashion by connection to a suitable voltage source, such as the voltage on line 303 which energizes the sensing unit 228, this also completes the circuit microvolt reference signals with the return signal from the sensing device 230 and the end of line resistor 234. These comparators 308, 310 can detect open circuits, grounds, and alarms, and constantly monitor the sensing unit to assure that it is in its normal operating condition. A loss or reduction of return current on line 300 will activate trouble comparator 310 and an increase in return current will activate alarm comparator 308.

The microvolt reference voltages are actually provided by the least significant bit of the address, which is on the A line 185. Line 185 is fed through a diode 312 and a voltage divider network, shown generally at 314. The exclusive OR gate 233 operates such that if the two inputs to it are instantaneously different alarm and trouble, it will put out a pulse. Thus, in an alarm condition if the return signal on line 300 to the plus input of the alarm comparator 308 is in the negative in relation to the LSB on the A line 185, then the output on line 318 of comparator 308 will go low. At the same time the output on line 316 from trouble comparator 310 will already have been low, because the plus input of comparator 310 would be negative. This is so because at that instant the negative portion of the A line pulse, possed by diode 312, is present a plus input 3lO, and in terminal must be more positive than the voltage at the minus terminal. In the second (positive) haLf of the least significant bit, i.e., the A line, the minus input of alarm comparator 308 will be more positive than the return signal on line 300, becuase of the voltage divider 314, which keeps the output of alarm t7'~

comparator 308 on line 318 Low. The p]us input of trouble comparator 310 will be positive in relation to the return line 300 voltage at the minus input, the output line 316 wiLl be high.
This in turn will mean that the output of exclusive OR gate 233 on line 234 will go high~

In a trouble condition3 and during the half cycle when the LSB or A line 300 input to the minus terminal of the trouble comparator 3LO will be negative in relation to the voltage at the plus terminal, due to the connection to the B~ line 303 and the voltage divider 314. Therefore, trouble comparator 310 will produce a high output on line 316. During this negative half cycle of the A line, the voltage level of the minus input to the alarm comparator 303 is more positive than the plus input on line 300 and line 313 output from comparator 308 goes low. It is noted that during a trouble condition, such as caused by the removal of the sensor 228, the voltage on the return line essentially goes to ground level. In the positive half cycle of the signal on the A line 185, the plus input to the trouble comparator 310 will be negative in relation to the return input on line 300, connected to the minus input of comparator 310, and the output on line 316 will go low.

~ eferring to Fig. 6, the clock generated time intervals or address line signals are shown. As indicated above, the present invention operates so as to halve the frequency of each succes-sive signal which has the effect of doubling the wavelength.
These address signals are produced by the clock and the divide by eight counter produced by the clock and the divide by eight counter producing a 9G0 Hz signal that is buffered, shaped, and fed to a serial to parallel convertor. This convertor, 48 of Fig.
3A, has a single input line and ten output lines. The first output line corresponds to the A address line and the convertor acts to produce a single pulse for every two pulses occuring in the preceding stage. Thus, address line B contains one pulse for ~C

.: ~ . . , .' ~, ' , , :

:, - 21 - l every two pulses on the A Line and line J contains one pulse for two pulses appearing on Line l.

In describing the operation of the present invention, reference is had to Fig. 7. In Fig. 7 the strobe line signals appearing on line 58, as produced by the divide by eight counter 44 at a frequency of 1.8 KHz, serve to define the measurement interval. In this graph, the A line signaL is arranged above the strobe signal, and the various signals which could possibly appear on the monitoring line 55 produced by the output transis-tor or amplifier 252, are arranged above the A line. Referring then to the monitoring line signals in Fig. 7, when the monitoring line signal goes low, in coincidence with the A line going low and then goes high, this represents an alarm condition at the particular sensing device being addressed. It should be remernbered that each particular individual remote sensing unit is compared with the LSB of the address, i.e., the 900 Hz A line. As explained above, when the monitoring line stays high all the time, regardless of the state of the A line, this indicates a trouble condition. Again, if the monitor line tracks or coincides with the A line exactly, this represents an alarm condition.

As indicated above, each remote sensing device is provided with an end of line resistor so as to provide an impedence for the comparators to monitor. Should the actuating device become defective or inoperative, or should it be physically removed from the circuit, the comparators will cause the exclusive OR gate 233 to provide a high output to indicate that a trouble situation is at hand. The data line signal which occurs during an alarm condition tracks the LSB line exactly. This is due to the operation of the comparators and exclusive OR gate explained above. Conversely, the normal line is shifted in phase l80 from the LSB line.

It should be understood that the Eoregoing is presented by ```~ ;11 ~7'~:~4~

way of example only and is not intended to limit the scope of the present invention, e~cept as set forth in the appendPd claims.

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:

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Claims (21)

WHAT IS CLAIMED IS:
1. A remote sensing and control system, comprising:
generator means producing a clock signal;

first serial to parallel convertor means connected to receive said clock signal and producing a first plurality of parallel address signals;

display means connected to receive said first plurality of parallel address signals;

second serial to parallel convertor means remotely located from said first serial to parallel means and connected to receive said clock signals for producing a second plurality of parallel address signals identical to said first plurality of parallel address signals;

a plurality of sensor means each having a preselected address and having an altered electrical state upon sensing a selected parameter or upon the occurrence of a malfunction of said sensor means;

sensor input means having inputs connected to each of said plurality of sensor means and being connected to receive said second plurality of parallel address signals, for interrogating a selected one of said plurality of sensor means upon the occur-rence of the address of the selected sensor means at said sensor input means and for producing a monitoring signal indicating the state of said sensor means; and means feeding said monitoring signal to said display means for displaying the state of said sensor means during the occurrence of the address of the selected one of said plurality of sensor means.
2. The system of Claim 1 further comprising:

Logic means connected to receive said first plurality of parallel address signals for producing a synchronization signal upon the production of all of said plurality of parallel address signals, said synchronization signal being fed to said first and second serial to parallel convertor means to reset said convertor means so as to commence producing said plurality of parallel address signals anew.
3. The system of Claim 1, further comprising:

computing means connected to receive said first plurality of parallel address signals from said first serial to parallel convertor means for producing a control signal upon the simul-taneous occurrence of a previously selected address signal and a monitoring signal from the selected one of said plurality of sensor means;

a plurality of actuating means associated with selected ones of said plurality of sensor means and being remotely located from said first serial to parallel convertor means, each for perform-ing a selected function; and means connected to receive said second plurality of parallel address signals and said control signal for producing an actu-ation signal fed to the corresponding actuating means during the occurrence of the address of the selected associated remote sensor means.
4. The system of Claim 1, further comprising:

programmable read only memory means having a predetermined program contained therein and connected to receive said first plurality of address signals from said first serial to parallel convertor means for producing a control signal upon the simul-taneous occurrence of a selected one of said plurality of address signals and a monitoring signal from the sensor means correspon-ding to the selected address signal;

a plurality of actuating means associated with selected ones of said plurality of sensor means and being remotely located from said first serial to parallel convertor means for performing a preselected function; and means connected to receive said second plurality of address signals and said control signal for producing an actuating signal fed to said actuating means during the occurrence of selected address signals and a monitoring signal.
5. The system of Claim 1, further comprising:

multiplexer means including a plurality of manually actu-atable switches for inserting an address of one of said plurality of address signals from said first serial to parallel convertor means, for producing a control signal upon the occurrence of the address signal corresponding to the address set in said switches and a monitoring signal corresponding to the selected on of said plurality of sensor means;

a plurality of actuating means remotely located from said first serial to parallel convertor means for performing a selected function; and means connected to receive said second plurality of address signals and said control signal for producing an actuating signal fed to said actuating means during the occurrence of the address of the preselected remote sensor means.
6. The system of Claim 1, wherein each of said plurality of sensor means includes a sensing element having altered electrical characteristics in the presence of a preselected environmental parameter, and an end-of-line resistor connected in parallel with said sensing element.
7. The system of Claim 1, wherein said sensor input means includes a plurality of pairs of comparator means having the least significant bit of said plurality of address signals connected to an input of both comparator means and each of said plurality of sensor means connected to the remaining inputs of one of said pairs two comparator means, the outputs of said two comparator means being connected to the inputs of a logical OR
gate from whose output is derived the monitoring signal.
8. The system of Claim 7, wherein said sensor input means includes an identification means connected to said second plural-ity of address signals for providing a plurality of distinct identification signals each corresponding to a specific sensor means;

a multiple input logical AND gate having one input connected to the output of said logical OR gate and the remaining inputs to the outputs from said identification means, for producing an output signal when all inputs are in a corresponding state.
9. The system of Claim 8, further including a transistor amplifier having an input from said multiple input logical AND
gate and whose output comprises said monitoring signal.
10. The system of Claim 3, wherein said sensor input means includes a plurality of pairs of comparator means each pair having the Least significant bit of said plurality of address signals connected to an input of both comparator means, the outputs of each pair of said two comparator means being connected to the inputs of a logical device having an output fed to one input of a multiple input AND gate and the remaining inputs connected to the outputs from identification means connected to said plurality of second address signals, said outputs comprising a plurality of distinct identification signals each corresponding to a specific sensing means, said multiple input AND gate producing an output signal when all inputs are in a corresponding state.
11. The system of Claim 10, further including a logical AND
gate having a first input connected to the output of said multiple input AND gate being connected to actuating means remotely located from said first serial to parallel converting means and being connected to a source of electrical power for performing a selected function upon the presence of the output signal from the two input logical AND gate.
12. A remote sensing and control system, comprising:
a signal generator producing a serial clock signal;

a centrally located serial to parallel convertor means connected to receive said serial clock signal for producing a first plurality of parallel address signals, each signal having a different wavelength;

a centrally located display means connected to receive said first plurality of parallel address signals for providing an information display to an operator of the system;

a plurality of remotely located environmental parameter sensing means, each having associated therewith an individual address represented by the instantaneous values of said first plurality of parallel address signals at preselected times;

at least one remotely located serial to parallel convertor means connected to receive said serial clock signals for pro-ducing a second plurality of parallel address signals identical to said first plurality of parallel address signals.

a plurality of remotely located identification means connec-ted to said plurality of sensing means and connected to receive said second plurality of parallels address signals for interro-gating a selected one of said plurality of sensing means upon the occurrence of the address of the corresponding selected sensing means, for producing a monitoring signal indicating a sensed environmental parameter; and means connecting said monitoring signal to said display means for displaying the information in said monitoring signal during the occurrence of the address of the corresponding selected one of said sensing means.
13. The system of Claim 12, further comprising centrally located logic means connected to receive said first plurality of parallel address signals for producing a synchronization signal upon the production of all of said plurality of parallel address signals, means connecting said synchronization signal to said centrally located serial to parallel convertor means and said at least one remotely located serial to parallel convertor means to reset both said convertor means so as to being anew the production of said plurality of parallel address signals.
14. The system of Claim 12, further comprising:

centrally located computing means connected to receive said first plurality of address signals and said monitoring signal, for producing a control signal during the occurrence of the monitoring signal and the portion of said plurality of parallel address signals corresponding to the address of the selected sensing means producing the monitoring signal;

a plurality of remotely located actuating means associated with selected ones of said plurality of sensing means for performing a selected function; and means connected to receive said second plurality of parallel address signals and said control signal for producing an actu-ating signal connected to said actuating means during the occurrence of the address of the selected associated remote sensing means.
15. The system of Claim 12, further comprising:

centrally located programmable read only memory means con-taining a program and being connected to receive said first plurality of address signals and said monitoring signal for producing a control signal during the occurrence of the monitor-ing signal and the portion of said plurality of parallel address signals corresponding to the address of the sensing means producing the monitoring signal;

a plurality of remotely located actuating means associated with selected ones of said plurality of sensing means for performing a selected work function; and means connected to receive said second plurality of parallel address signals and said control signal for producing an actu-acing signal connected to said actuating means during the occurrence of the address of the selected associated remote sensing means.
16. The system of Claim 12, further comprising:

centrally located multiplexer means including a plurality of manually actuatable switches for inserting the address correspon-ding to selected ones of said plurality of sensor means and being connected co receive said first plurality of address signals and said monitoring signal, for producing a control signal. during occurrence of the monitoring signal and the portion of said parallel address signal corresponding to the address manually inserted by said plurality of switches;

a plurality of remotely located actuating means associated with selected ones of said plurality of sensing means for performing selected functions; and means connected to receive said second plurality of parallel address signals and said control signal for producing an actu-ating signal connected to said actuating means, said actuating signal being produced during the occurrence of the address of the selected remote sensing means.
17. The sytem of Claim 12, wherein each of said plurality of sensing means includes a sensing element having altered electri-cal characteristics in the presence of said selected environ-mental parameter and an end-of-line impedance connected in parallel with said sensing element, for connection to the corresponding one of said plurality of remotely located identifi-cation means.
18. The system of Claim 14, wherein each of said plurality of remotely located identification means includes a pair of comparator means having a selected one of said plurality of parallel address signals connected to the same input of both comparator means and the corresponding sensing means connected to the remaining inputs of said pair comparator means for producing an output connected to a logic device from whose output is derived the monitoring signal.
19. The system of Claim 18, further including a multiple input logic device having one input connected to the output of said logic device from whose output is derived the monitoring signal and the remaining input to the outputs from said identifi-cation means for producing an output signal when all inputs are in a corresponding state.
20. The system of Claim 19, further comprising a transistor amplifier having an input connected to the output of said multiple input logic device and an output which represents the monitoring signal.
21. The system of Claim 19, further including a two input logical AND gate having one input connected to the output of said multiple input logic device and the other input connected to the control signal from said computing means, the output of said two input logical AND gate being connected to a source of electrical power for performing a selected function upon the presence of the output signal from said two input logical AND gate.
CA000386724A 1980-10-03 1981-09-25 Sensing and control system Expired CA1177140A (en)

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