CA1207876A - Distributed prioritized concentrator - Google Patents

Distributed prioritized concentrator

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Publication number
CA1207876A
CA1207876A CA000449122A CA449122A CA1207876A CA 1207876 A CA1207876 A CA 1207876A CA 000449122 A CA000449122 A CA 000449122A CA 449122 A CA449122 A CA 449122A CA 1207876 A CA1207876 A CA 1207876A
Authority
CA
Canada
Prior art keywords
input
concentrator
sorting
ports
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000449122A
Other languages
French (fr)
Inventor
Alan Huang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Application granted granted Critical
Publication of CA1207876A publication Critical patent/CA1207876A/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • H04L49/3009Header conversion, routing tables or routing tags
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/15Interconnection of switching modules
    • H04L49/1507Distribute and route fabrics, e.g. sorting-routing or Batcher-Banyan
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/58Arrangements providing connection between main exchange and sub-exchange or satellite
    • H04Q3/60Arrangements providing connection between main exchange and sub-exchange or satellite for connecting to satellites or concentrators which connect one or more exchange lines with a group of local lines
    • H04Q3/605Arrangements in the satellite or concentrator
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5603Access techniques
    • H04L2012/5609Topology
    • H04L2012/561Star, e.g. cross-connect, concentrator, subscriber group equipment, remote electronics
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5638Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5651Priority, marking, classes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/50Overload detection or protection within a single switching element
    • H04L49/505Corrective measures

Abstract

A DISTRIBUTED PRIORITIZED CONCENTRATOR

Abstract Disclosed is a distributed prioritized concentrator that manages the flow of information through high data rate communications paths. The concentrator accumulates incoming packets as necessary, sorts the accumulated packets in parallel based on the relative priority of the packets, and transmits as many of its highest priority packets as there are available communication channels. In its simplest form the prioritized concentrator comprises a parallel sorting network having some of its inputs connected to accept incoming signal packets and the remaining ones of its inputs connected to outputs of delay elements. A number of the highest priority sorting network outputs are connected to outgoing communication channels, a number of lower priority sorting network outputs are connected to inputs of the delay elements and the remaining number of lowest priority sorting network outputs are left unconnected.
More sophisticated forms which add various capabilities are also disclosed.

Description

78~

A DISTRIBUTED PRIORITIZED CONCENTRATOR

1 Field of the Invention .
This invention relates to wideband switching systems and, more specifically, to means for effectively managing co~munication lines based on the priority of the flowing information.
Background of the Invention With the burgeoning of electronic technologies, the demand for a wider variety of communications services has been steadily rising. New technologies have been continually developing to meet these demands including lasers, fiber optics, microprocessors, and very large scale integrated circuits. While many alternative approaches for realizing the new communications services are available, digital data transmission seems to be ~he one best equipped for future progress and, accordingly, digital transmission is currently receiving the most attention.
In terms of the services to be ofered, it is expected that, in addition to standard telephone services, a multitude of low, medium and wide bandwidth services would be introduced. This would include electronic mail, facsimile, high-fidelity a~dio, computerized data base searches (e.g., want ads, encyclopedia, travel arrangements, etc.), remote shopping, electronic banking and home computer networks. Business users would also use electronic blackboards, teleconference facilities, word processors, and large computer communication networks.
In Canadian copending application No 449,129 , entitled "A Self Routing Switching Networkn, filed concurrently herewith, is disclosed a wideband self-routing switch for simultaneously switching a plurality of incoming sisnals. Specific embodiments are described that switch signal packets with the aid of sorting networks and have shown that a wideband switch, which can grow modularly, is very useful~

~2~

In a second Canadian copending application No. 449,128 , entitled "A Wideband Digital Switching Networkl', also filed concurrently herewith, the wideband switch is enhanced and discloses a switching network that can offer one-to-one, one-to-many, and many-to-many types of communications, making it feasible to offer the wideband services described above by treating each such switching network as a self contained central office. What remains, then, is to interconnect the central offices in the most efficient manner.
A number o approaches are employed in the prior art to manage the communication interconnections between central offices. One approach uses high capacity lines to interconnect cen~ral offices, but this is inefficient because most of the time some capacity is idle. The inefficiency is reduced in a variation on this approach which switches the information onto a small number of lines, taking advantage of the fact that not all of the lines are active simultaneously. This is the classic concentration function. It improves the utilization of the communication paths at the cost of possible blocking of signals.
To reduce blocking of particularly ~ital signals, a th~rd approach emplo~s a computer to sequentially examine incoming lines, store the applied signal packets in a prioritized queue in the computer's memory and transmi~ the highest priority packets to its outgoing lines, as they become available. The difficulty with this approach is that a statistical multiplexer must scan the input, properly queue the data, and manage the outgoing lines in essentially a simultaneous manner. This becomes more and more difficult as the data rate increases or ~he number of incoming and outgoing lines increases. Wi~h present technology, ~he sequential nature of the computer approach cannot meet the demands imposed by the parallelism and consequent high "throughput~ rates of the switching network we disclosed.

. . . _ . . .

7~

Summary of the Invention In accordance with an aspect of the invention there is provided a prioritized concentrator having input and output ports comprising sorting means having input ports and ordered output ports, for sorting signal packets applied to said sorting means input ports in accordance with a priority field accompanying said signal packets, to cause signal packets with successively higher priority to be connected to successively higher order output ports of said sorting means, said sorting means having a number of its input ports connected to said concentrator input ports and another number of its output ports connected to said concentrator output ports; and delay means having input terminals and output terminal, with its input terminals connected to remaining ones of said sorting means output ports and its output terminals connected to remaining ones of said sorting means input ports.
To provide interconnection managing means for the high data rates of the switching network that effectively utilizes the available bandwidth of the communications paths among central offices, a distributed prioritized concentrator was invented. This concentrator accumulates incoming packets as necessary, sorts the accumulated packets in parallel based on the relative priority of the packets, and transmits as many of its highest priority packets to the next central office as there are communi-cation channels to that central office.
It its simpliest form the prioritized concentrator comprises a parallel sorting network having some of its inputs connected to output ports of a central office and the remaining ones of its inputs connected to outputs of delay elements. A number of sorting network outputs are connected to communication channels leading to another central office and another number of sorting network outputs are connected to inputs of the delay elements.

~IZ~7~37~

- 3a -More sophisticated forms which add various capabilities are, of course, possible and some of these capabilities are incorporated in this disclosure.
Brief Description of the Drawing FIG. 1 depicts a block diagram of a generalized distributed prioritized concentrator operating in accordance with the principles of this invention; and FIG. 2 depicts a block diagram of a distributed prioritized concentrator which utilizes a sort and a merge network in place of sorting network 30 in the FIG. 1 system.
Detailed Description The following description of the prioritlzed concentrator is presented in the context of the above men~ioned wideband self-routing switching network disclosed in the priorly identified copending Canadian applications.
In those Canadian applications, the described wideband switching network embodiment switches signal ~7~76 packets of a particular packet ~ormat, but any signal format having an accompanying destination address can be emp]oyed. The same generalization applies here and the same illustrative signal format is employed. That is, the signals described below flow in packets which contain a header field and a data fieldO The header field contains an activity bit (indicating whether the packet contains a valid signal - 1l0ll -, or no signal - "1") and an address field including a destination address subfield and possibl~
additional subfields, with the most significant bit residing in first bit position of each subfield. For purposes of the prioritized concentrator disclosed herein a priority subfield is included in the header which speciEies ~he packet's priority, Also for purposes of this disclosure, it is assumed that the priority subfield resides at, or has been moved to, the begining of the header, immediately following the activity bit. A high binary number in the priority subfield has been selected to represent high priority and, conversely, a low binary number to represent low priority.
FIG. 1 presents a olock diagram of a distributed prioritized concentrator embodying the principles of this invention. Sorting network 30 has a number of its inputs connected to a prioxity designation bloclc 20 and the remaining ones of its inputs connected to outputs of a delay network ~0. 'rhe inputs of priority designation block 20 are derived rom the concentrator's input ports via a rate changing block 10~ Priority designation block 20 assigns priorities to incoming packets when the concentrator interconnects central offices that do not assign packet priorities elsewhere. Rate changing block 10, as discussed below, is either a .~ultiplexer or a demultiplexer, depending vn the signal rates within and outside the concentrator. In some uses, neither block 10 nor block 20 would be required for tlne proper operation of the FI~. 1 concentrator.

Sorting network 30, whose output terminals are uniquely designated 0 through N-l (starting with the left-most terminal in FIG. 1), sorts the packets applied to its input terminals based on the priority of the packets as specified in the priority subfield. That is, sorting network 30 routes the applied signal packets so that a packet at output terminal M has a priority e~ual to or lower than the priority of a paclset at output terminal M-l, and a priority equal to or higher than the priority of a packet at output ter~inal M+l. Thus, the left-most output terminal of sorting network 30 in FIG. l receives the packet having the lowest priority.
As shown in FIG. 1 t a number of the highest designated output terminals of sorting network 30 are connected to a rate changing block 50 through which they are transmitted to the ne~t star. Rate changing block 50, like block lO, is either a multiplexer or a demultiplexer depending on the relative data rates of the distributed prioriti~ed concentrator and the outgoing lines. It, too, may not be necessary in some applications.
Most of the remaining packets at the output terminals of sorting network 30, having lower priorities and appearing at network 30 output terminals having lower designations, are applied to delay network ~0 and are fed back to sorting network 30 input terminals. Each input in delay network 40 has a corresponding output in network 40 to which it is connected via a shift register 41. Each shift register 41 contains sufficient storage so that, in combination with the storage inherent in sorting network 30, exactly one packet is stored. This provides the appropriate feedback delay between the input to network 30, through delay network 40, and back to the input of network 30.
When network 30 has an equal number of input and output terminals, a number of sorting network 30 output terminals with the lowest designations are left unconnected and packets appearing at these terminals are lost. These 7t;

packets are, in effect, overflow packets. Thus, at each iteration of sorting network 30 (at whatever iteration rate ~hat is suitable for network 30), the current highest priority packets are transmitted to the next star, most of the other packets are fed back to the input, and overflow packets, if any, are discarded.
The number of inputs and outputs of the concentrator, the incoming and outgoing packet rate and the iteration rate of sorting network 30 are all interrelated in a manner that may be appreciated ~rom the discussion below. It yields a great deal of flexibility to this prioriti~ed concentrator.
When the iteration rate of sorting network 30 is B and packets applied to the prioritized concentrator arrive on ml lines at rate nlBI block 10 is a demultiplexer `
which converts ml lines at rate nlB to mlnl lines at rate B. Similarly, when outgoing packets leave the prioritized concentrator on m2 lines at rate n2B, block 50 is a multiple~er which converts m2n2 lines at rate B to m2 lines at rate n2B. Of course~ m2 is smaller than ml for, otherwise, there would be no need for a concentrator.
The mlnl outputs of block 10 are connected through block 20 to the input terminals o~ sorting network 30. Therefore, when network 30 has N inputs, N-mlnl input terminals of network 30 are available to be connected to output terminals o~ delay network 40.
On the output side of sorting network 30, the m~n2 highest designation output terminals (carrying highest priority packets) are connected to rate changing block 50, the next N-mlnl highest designation output terminals are connected to delay network 40, and the remaining N-(mlnl+m2n2) output terminals of network 30 are left unconnected.
From the above it may be observed that the size of ~orting network 30, N, is the user's choice, as lony as it is larger than mlnl+m2n~. Larger values oE ~, with the associated larger memories contained in delay network ~0, 37~

permit keeping a larger number of low priority packets before they are either transmitted or discarded via the unconnected output terminals of sorting network 30. It may also be observed that the prioritized concentrator can easily serve as a buffer between central offices that operate at different rates and, furthermore, that this ability is not dependent on any particular iteration rate within the prioritized concentrator.
Priority designation block 20 is shown in FIG. 1 following rate changing block 10, but it can precede it.
Its implementation depends, of co~rse, on the particular scheme selected for assigning priorities. One scheme may simply comprise a "time stamp" that is applied to each incoming packe-~. To implement such a scheme, block 20 includes a digital clock and a register to connect each input line of block 20 to a corresponding output line of block 20. The size o~ each register equals the length of the priority subfield and, at the proper timer when the priority subfields of the packets traversing block 20 are in the registers, the clock time is inserted into the registers.
With respect to assigning priority to inactive packets which, of course, carry no information, the inverse of the activity bit may be used as part of the priority subfield. Active packet with activity bit "O" would automatically get a higher priority ~han inactive packets with activity bit "1". Alternatively, block 20 could detect empty packets (whatever their characteristics happen to be) and assign the lowest priority ~o those packets.
Implementation of the various other blocks of FIG. 1 may follow conventional design. For example, block 10 and 50 may be implemented with data selectors (e.g., TTL logic 74150 ICs), data distributors (e.gD, 74154 ICs), and shift registers in a straight forward manner.
Sorting network 30 may be implemented as taught by K. E.
Batcher in "Sorting Networks and Their Applications~', Spring 30int Computer Conference Proceedingsl 1968, pages lZ~

307 et seq.
The structure of sorting network 30 is matrix like, with rows and columns and with a number of elements in each row, N, being equal to the number of input terminals of the network, and a number of rows that is monotonically increasing with No Hence, the number of switching elements in network 30 is N times the number of rows.
The required number of switching elements can be reduced substantially when it is realized that the packets entering sorting network 3~ from delay network 40 are already sortedO Capitalizing on this reduced entropy, sorting network 30 of FIG 1 can be replaced with a much smaller sorting network that is followed by a simpler merge network. As shown in FIG. 2, sorting network 30 is replaced with a sortiny network 70 that sorts only the mln lines of block 20 (where mlnl N) and a merge network 60 that meryes the output signals of sorting network 70 and of delay network 40. Network 60 is of width N but requires many fewer switching elements than a sorting network of the same width because its two input sets are already sorted.
Implementation of merge network 60 can follow any one of standard approaches. One approach is described by Batcher in the aforementioned publication.

Claims (9)

Claims
1. A prioritized concentrator having input and output ports comprising:
sorting means having input ports and ordered output ports, for sorting signal packets applied to said sorting means input ports in accordance with a priority field accompanying said signal packets, to cause signal packets with successively higher priority to be connected to successively higher order output ports of said sorting means, said sorting means having a number of its input ports connected to said concentrator input ports and another number of its output ports connected to said concentrator output ports; and delay means having input terminals and output terminal, with its input terminals connected to remaining ones of said sorting means output ports and its output terminals connected to remaining ones of said sorting means input ports.
2. A prioritized concentrator having input and output lines comprising:
means for sorting signal packets applied to said input lines in accordance with a priority field accompanying said signal packets, said sorting means having input and output ports, said sorting means causing signals with successively higher priority to be connected to successively higher order output ports, and said sorting means having a number of its input ports connected to said concentrator input lines and another number of its output ports connected to said concentrator output lines;
delay network means having input terminals and output terminals; and connecting means for connecting said delay network means input terminals to some of the remaining ones of said sorting means output ports and said delay network output terminals to remaining ones of said sorting means input ports.
3. A prioritized concentrator in accordance with claim 2 wherein said sorting means comprises a sorting network having input ports and said connecting means connects said delay network output terminals to said sorting network input ports.
4. A prioritized concentrator in accordance with claim 2 wherein said sorting means comprises a sorting network having input and output ports and a merge network having input and output ports, said sorting network output ports being connected to certain of said merge network input ports and said connecting means connecting said delay network output terminals to other of said merge network input ports.
5. A prioritized concentrator in accordance with claim 2 wherein said delay network means comprises a plurality of delay means, each of said delay means connecting an input terminal of said delay network means to an output terminal of said delay network means.
6. A prioritized concentrator in accordance with claim 1 wherein the number of said sorting means output ports is smaller than the number of said sorting means input ports.
7. A prioritized concentrator in accordance with claim 2 further comprising first multiplexing means connected to each of said concentrator input lines for changing the rate of time division multiplexed signal packets on said input lines before applying them to said sorting means input ports; and second multiplexing means connected to said another number of said storing means output ports for changing the rate of time division multiplexed signal packets on said another number of said output ports before applying them to said concentrator output lines.
8. A prioritized concentrator in accordance with claim 2 wherein the number of said sorting means input ports connected to said concentrator input lines is larger than said another number of said output ports connected to said concentrator output lines.
9. A prioritized concentrator in accordance with claim 2 further comprising a priority controlling circuit interposed between said concentrator input lines and said sorting means input ports connected to said concentrator input lines.
CA000449122A 1983-03-28 1984-03-08 Distributed prioritized concentrator Expired CA1207876A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/479,858 US4472801A (en) 1983-03-28 1983-03-28 Distributed prioritized concentrator
US479,858 1990-02-14

Publications (1)

Publication Number Publication Date
CA1207876A true CA1207876A (en) 1986-07-15

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Country Status (9)

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US (1) US4472801A (en)
EP (1) EP0138950B1 (en)
JP (1) JPS60500935A (en)
KR (1) KR920005106B1 (en)
CA (1) CA1207876A (en)
DE (1) DE3484413D1 (en)
ES (1) ES8501592A1 (en)
IT (1) IT1173759B (en)
WO (1) WO1984004014A1 (en)

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Also Published As

Publication number Publication date
ES531027A0 (en) 1984-12-16
EP0138950B1 (en) 1991-04-10
IT8420237A0 (en) 1984-03-26
US4472801A (en) 1984-09-18
KR920005106B1 (en) 1992-06-26
WO1984004014A1 (en) 1984-10-11
JPH0574977B2 (en) 1993-10-19
IT1173759B (en) 1987-06-24
KR840008238A (en) 1984-12-13
EP0138950A1 (en) 1985-05-02
EP0138950A4 (en) 1988-05-26
ES8501592A1 (en) 1984-12-16
JPS60500935A (en) 1985-06-20
DE3484413D1 (en) 1991-05-16

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