CA1216376A - Memory device - Google Patents
Memory deviceInfo
- Publication number
- CA1216376A CA1216376A CA000469600A CA469600A CA1216376A CA 1216376 A CA1216376 A CA 1216376A CA 000469600 A CA000469600 A CA 000469600A CA 469600 A CA469600 A CA 469600A CA 1216376 A CA1216376 A CA 1216376A
- Authority
- CA
- Canada
- Prior art keywords
- state
- process according
- conductance
- conductance state
- amorphous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 230000004044 response Effects 0.000 claims abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000000463 material Substances 0.000 claims description 17
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 230000008569 process Effects 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 5
- 230000001678 irradiating effect Effects 0.000 claims description 5
- 230000005284 excitation Effects 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 230000000737 periodic effect Effects 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 29
- 239000000758 substrate Substances 0.000 description 11
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 8
- 229910000077 silane Inorganic materials 0.000 description 8
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 6
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- 239000002674 ointment Substances 0.000 description 3
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 3
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 241001235534 Graphis <ascomycete fungus> Species 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000001143 conditioned effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910000623 nickel–chromium alloy Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000000700 radioactive tracer Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/005—Arrangements for writing information into, or reading information out from, a digital store with combined beam-and individual cell access
Abstract
ABSTRACT OF THE DISCLOSURE
Memory device A method of determining the conductance state of a non-volatile memory device switchable between high and low conductance states is provided. The device comprises at least one p-type amorphous or microcrystalline semiconductor and an n or i-type layer. The device is irradiated with light to produce a photovoltaic response which is used to determine the conductance state.
Memory device A method of determining the conductance state of a non-volatile memory device switchable between high and low conductance states is provided. The device comprises at least one p-type amorphous or microcrystalline semiconductor and an n or i-type layer. The device is irradiated with light to produce a photovoltaic response which is used to determine the conductance state.
Description
3 7!~ Case 5754 (2) ~EMORY DEVICE
This invention relates to a method Eor determining the state of a memory device.
IEEE Proc., Vol 129, Pt I, Solid State and Electron Devices, No
This invention relates to a method Eor determining the state of a memory device.
IEEE Proc., Vol 129, Pt I, Solid State and Electron Devices, No
2, April, 1982, pages 51-54 discloses an electrically programmable non-volatile semiconductor memory device. In its simplest form this coneains p and n layers of amorphous silicon deposited onto a conducting stainless steel substrate. The layered structure was formed into a memory device by applying a large forward bias of known polarity which switches the structure into a stable ON state. This step of "forming" permanently modifies the electrical properties of the deviceO The forming voltage was approximately 20 to 25 volts.
After forming the dev1ce was then switched to the alternative OFF
state by applying a voltage pulse above a low threshold such as lV
with opposite polarity to the original pulse. The OFF state was stable for reverse bias voltage in excess of 10V and ~or ~orward voltages of approximately 4-5V. At higher forward voltages it switches to the ON state, i.e. the forward threshold voltage VThF is 4-5V. The ON state was stable for reverse bias voltages up to about l volt beyond which it switched to the OFF state i.e. the reverse bias threshold voltage VThR was lV.
Our published European patent application No 95283 discloses a memory device comprising an electrically conducting substrate and layers of i and p and/or n type amorphous or microcrystalline semi-conducting material which have been conditioned by the application of a voltage sufficiently large to cause the structure to ,~
2 ~;~163'76 be permanently modified to reduce the electrical resistance of the layers wherein no p and n layers are ad~acent in the devicè.
Both devices have remarkably fast switching times of less than 100 ns.
S US 3530441 discloses amorphous memory devices which use light to read the memory state of a device by means of a measurement of a light related property e.g. refraction. It also discloses the use of light energy to produce a change in the memory state of a device. The change in memory state is detected by electrical measurements. There is no disclosure of the use of a ~unction type memory device.
US 3530441 is concerned with Ovshinsky-effect devices which do not rely on the presence of a junction, but on special properties of a single layer of material.
Japanese examined patent publication 55-39915 shows a device having a sandwich structure of a photoconductive layer and a chalogenide memory material (i.e. an Ovshinsky-effect type material).
Irradiating the photoconductive layer with light gives a local reduction in resistance so applying a switching voltage to the chalogenide layer. The specification is thus concerned with writing to the device rather than with reading from it.
We have now discovered that memory amorphous or microcrystalline semiconductor junction devices possess a photovoltaic response when irradiated by light, the response differing substantially between the two conductivity levels characterising the ON and OFF states and that the response can be utilised to detect the state of the memory device.
Thus according to the present invention there is provided a process for detecting the conductance state of a non-volatile memory device which~is switchable between a high conductance and a low conductance state and which comprises a plurality of amorphous or microcrystalline semiconductor layers at least onè of which is a p-type layer in contact with an n or i-type layer, characterised by irradiating the device with light of a wavelength which causes band to band excitation and of an intensity which produces a detectable photovoltaic response and using the photovoltaic response to determine the conductance state of the device.
After forming the dev1ce was then switched to the alternative OFF
state by applying a voltage pulse above a low threshold such as lV
with opposite polarity to the original pulse. The OFF state was stable for reverse bias voltage in excess of 10V and ~or ~orward voltages of approximately 4-5V. At higher forward voltages it switches to the ON state, i.e. the forward threshold voltage VThF is 4-5V. The ON state was stable for reverse bias voltages up to about l volt beyond which it switched to the OFF state i.e. the reverse bias threshold voltage VThR was lV.
Our published European patent application No 95283 discloses a memory device comprising an electrically conducting substrate and layers of i and p and/or n type amorphous or microcrystalline semi-conducting material which have been conditioned by the application of a voltage sufficiently large to cause the structure to ,~
2 ~;~163'76 be permanently modified to reduce the electrical resistance of the layers wherein no p and n layers are ad~acent in the devicè.
Both devices have remarkably fast switching times of less than 100 ns.
S US 3530441 discloses amorphous memory devices which use light to read the memory state of a device by means of a measurement of a light related property e.g. refraction. It also discloses the use of light energy to produce a change in the memory state of a device. The change in memory state is detected by electrical measurements. There is no disclosure of the use of a ~unction type memory device.
US 3530441 is concerned with Ovshinsky-effect devices which do not rely on the presence of a junction, but on special properties of a single layer of material.
Japanese examined patent publication 55-39915 shows a device having a sandwich structure of a photoconductive layer and a chalogenide memory material (i.e. an Ovshinsky-effect type material).
Irradiating the photoconductive layer with light gives a local reduction in resistance so applying a switching voltage to the chalogenide layer. The specification is thus concerned with writing to the device rather than with reading from it.
We have now discovered that memory amorphous or microcrystalline semiconductor junction devices possess a photovoltaic response when irradiated by light, the response differing substantially between the two conductivity levels characterising the ON and OFF states and that the response can be utilised to detect the state of the memory device.
Thus according to the present invention there is provided a process for detecting the conductance state of a non-volatile memory device which~is switchable between a high conductance and a low conductance state and which comprises a plurality of amorphous or microcrystalline semiconductor layers at least onè of which is a p-type layer in contact with an n or i-type layer, characterised by irradiating the device with light of a wavelength which causes band to band excitation and of an intensity which produces a detectable photovoltaic response and using the photovoltaic response to determine the conductance state of the device.
3 12~63~6 The photovoltaic response which is measured to deter~ine the conductance state of the device may be the current across the device produced by irradiation, the voltage, or the power (the product of current and voltage).
The wavelength of the light is preferably less than 150 nm.
A laser is a suitable source of light.
The light may, if desired, be pulsed.
Response times of less than 500 ns may be obtained, thus optical reading can be used at frequencies up to 2 MHz, allowing either high speed data output or generation of a.c. output voltages which may be used or detected remotely, for example by a capacitive pick-up system.
The device ~ust of course be constructed so that the ~unction ~an be irradiated. This may conveniently be done by using a transparent~
substrate on which successive layers of amorphous semiconductor are deposited.
Glass having an electrically conducting surface of tin oxide, indium tin oxide or other light permeable, electrically conducting material is a convenient transparent substrate.
Other structures may be used however. Thus the amorphous semiconductor layers may be deposited on a metal substrate, followed by a layer of transparent ITO (indium-tin oxide) to provide an electrical contact to the top layer of amorphous semiconductor.
Suitable structures include layers ha-ving the configuration p-i, p-n, p+-n and rn+. A further layer can be added to p-n type structures to give p-i-n or p-n-i type structures. It is preferred to use structures which inherently have superior photovoltaic properties eg p-i and most preferably p-i-n.
The p, ~ or i-type amorphous or microcrystalline semiconductor material is a material which can be doped to provide p or n type conductivity (and in the case of p- and n-type material has been doped). For doping to be practicable the density of states in the gap between the valence band and the conduction band must be reduced to relatively low levels. The existence of a high density of states has been attributed to the presence of "dangling bonds". Techniques for reducing the density of states in amorphous and microcrystalline i37~
semiconductor material e.g. silicon are well-known. Thus the semiconductor material may be deposited in the presence of hydrogen and/or fluorine or may be treated with hydrogen or fluorine after deposition.
The semiconductor materials used in devices of the present invention may be elements of Group IV of the Periodic Table, eg Si, Ge, and components thereof eg;SiC.
The layers of semiconductor material may be such as to produce homojunctions in which there is a ~unction between layers of the same material thus having the same band gap e.g. silicon. The device may also be a heterojunction device in which there is a junction between different materials having different band gaps e.g. silicon and silicon carbide.
The devices of the present invention are normally two electrode~
devices in contrast to multielectrode devices such as transistors.
By suitable choice of conditions for the deposition the semiconductor may be deposited in microcrystalline or amorphous form.
Conditions favouring the deposition of amorphous semiconductor are well-known.
Layers of i-silicon can be made by methods known in the art, for example by decomposing silane in a glow discharge. Layers of p and p+
or n and n+ silicon can be made by adding diborane or phosphine respectively in varying quantities to the silane.
The silane and other decomposable gas if present are preferably in admixture with hydrogen and the total pressure controlled to obtain amorphous silicon.
In the case of silane/hydrogen mixtures the concentrations are preferably l~wer than those which are spontaneously combustible in air, eg about 5~ by volume silane.
Desirably the device includes one or more electrically conducting areas on the outer surface of the silicon layer remote from the substrate. These areas can conveniently be provided by zones of a metal such as aluminium or a nickel chromium alloy.
The device comprising and layers of amorphous or microcrystalline semiconductor is formed to a memory device by applying a voltage 5 ~L637~;
sufEiciently large to cause the device to be capahle of being put into a stable conductance state by a voltage of known polarity and changed to a second conductance state by a voltage of opposite polarity.
The invention is illustrated with reference to the following Example and Figures 1 to 5 of the accompanying drawings.
Figure 1 is a diagrammatic sideview of a device according to the invention, Figure 2 is a graphical representation of the voltage-current characteristic of the device before it is subjected to a voltage to convert it to a memory device, Figure 3 shows the current-voltage characteristic of the device after it has been converted to a memory device, Figure 4(a) and (b) are graphi~al representations of the open-circuit voltage and short-circuit current for devices in the on and off state, Figure 5 is a graphical representatlon of the memory photovoltaic output as a function of the memory conductance.
Example An ITO (indium tin oxide) coated glass substrate was placed on a temperature variable substrate holder inside a cylindrical reaction chamber. The chamber was evacuated to 10-4 (1.3 x 10-2 Pa) torr and the substrate heated to 250C. Neat silane was admitted to the chamber to bring the pressure up to about 0.1 torr (13 Pa). Once the pressure had stabilised, 1% by vol of diborane in hydrogen was added to the silane in the chamber. A glow discharge was initiated by exciting a capacitive plate system inside the reaction chamber from a radio frequency generator. This caused p-type amorphous silicon containing boron to be deposited on the ITO coated glass from the gss phase. After two minutes the diborane flow was terminated, thus causing a region of intrinsic (or undoped) material to be produced on top of the p-type region. This situation was maintained for 30 minutes. Finally, 1% by vol phosphine in hydrogen was progressively admitted to the reaction chamber and growth continued for a further 9iX minutes. This caused n-type amorphous silicon containing phosphorus to be deposited on top of the i-type material.
6 ~ 16~
At this stage the discharge was extlnguished, the phosphine flow was stopped and the device was allowed to cool under a flow of silane.
When the device had cooled to room temperature it was removed from the reaction chamber and placed in a vacuum coater where several spots of aluminium 1 mm in diameter were evaporated onto the surface of the device.
The complete structure is shown in Figure 1 wherein 1 represents the glass substrate, 2 the layer of ITO, 3 the layer of p-type silicon, 4 the layer of i-type, 5 the layer of n-type and 6 the aluminium spots. The p layer is about 200 A (20 nm) thick, the n layer about 500 A (50 nm) and the i layer about 2,000 A (200 nm).
The device was placed on a curve tracer and i-ts voltage/current characteristics examined. Initially these were in the form shown in Figure 2. Finally a large reverse bias voltage of about 15 V was applied to the device~ This step "conditions" the device into a memory (switching) device with the characteristics as shown in Figure 3.
Curves A and B in Figure 3 show the device in its OFF state.
Applying negative bias (curve A) has no effect on the conductivity state, applying forward bias (curve B) causes the device to switch to an intermediate conductivity state (curve C) at about 2V. Further forward bias finally switches the device to its ON state, (curve D).
Higher forward potentials have no further effect on the conductivity state. Applying negative bias now leaveæ the device in the ON state ~curve E) until a potential of 5V is attained, whereupon it immediately switches to its OFF state (curve A). This sequence of events is repeatable with no change in the ON-OFF conductivity or switching levels.
Optical excitation of the memory element was achieved by directing the output of a 4 mW He-Ne laser through the glass-ITO
substrate. By chopping the laser output at a frequency of 200 Hz, the laser induced ~emory response could be distinguished either directly on an oscilloscope, or via a phase-sensitive detector (PSD).
Figure 4(a) shows the effect of memory state on the laser induced open-circuit voltage; Figure 4(b), the effect on short-circuit 7 .'~ '76 current. A distinct difference in photo response is apparent bet~Jeen the OFF and ON states.
Figure 5 shows the memory photovoltaic output as a function of the memory conductance; conductivity levels applicable to the OFF and ON states are indicated. The points between these extremes were obtained by switching the device carefully into intermediate conductivity values (eg curve C in Figure 3) and then measuring response whilst this state was maintained, stability being adequate for the short experiment time required. It is apparent that the open-circuit voltage mode is extremely sensitive to memory conductivity and thus might be preferred in many applications.
The wavelength of the light is preferably less than 150 nm.
A laser is a suitable source of light.
The light may, if desired, be pulsed.
Response times of less than 500 ns may be obtained, thus optical reading can be used at frequencies up to 2 MHz, allowing either high speed data output or generation of a.c. output voltages which may be used or detected remotely, for example by a capacitive pick-up system.
The device ~ust of course be constructed so that the ~unction ~an be irradiated. This may conveniently be done by using a transparent~
substrate on which successive layers of amorphous semiconductor are deposited.
Glass having an electrically conducting surface of tin oxide, indium tin oxide or other light permeable, electrically conducting material is a convenient transparent substrate.
Other structures may be used however. Thus the amorphous semiconductor layers may be deposited on a metal substrate, followed by a layer of transparent ITO (indium-tin oxide) to provide an electrical contact to the top layer of amorphous semiconductor.
Suitable structures include layers ha-ving the configuration p-i, p-n, p+-n and rn+. A further layer can be added to p-n type structures to give p-i-n or p-n-i type structures. It is preferred to use structures which inherently have superior photovoltaic properties eg p-i and most preferably p-i-n.
The p, ~ or i-type amorphous or microcrystalline semiconductor material is a material which can be doped to provide p or n type conductivity (and in the case of p- and n-type material has been doped). For doping to be practicable the density of states in the gap between the valence band and the conduction band must be reduced to relatively low levels. The existence of a high density of states has been attributed to the presence of "dangling bonds". Techniques for reducing the density of states in amorphous and microcrystalline i37~
semiconductor material e.g. silicon are well-known. Thus the semiconductor material may be deposited in the presence of hydrogen and/or fluorine or may be treated with hydrogen or fluorine after deposition.
The semiconductor materials used in devices of the present invention may be elements of Group IV of the Periodic Table, eg Si, Ge, and components thereof eg;SiC.
The layers of semiconductor material may be such as to produce homojunctions in which there is a ~unction between layers of the same material thus having the same band gap e.g. silicon. The device may also be a heterojunction device in which there is a junction between different materials having different band gaps e.g. silicon and silicon carbide.
The devices of the present invention are normally two electrode~
devices in contrast to multielectrode devices such as transistors.
By suitable choice of conditions for the deposition the semiconductor may be deposited in microcrystalline or amorphous form.
Conditions favouring the deposition of amorphous semiconductor are well-known.
Layers of i-silicon can be made by methods known in the art, for example by decomposing silane in a glow discharge. Layers of p and p+
or n and n+ silicon can be made by adding diborane or phosphine respectively in varying quantities to the silane.
The silane and other decomposable gas if present are preferably in admixture with hydrogen and the total pressure controlled to obtain amorphous silicon.
In the case of silane/hydrogen mixtures the concentrations are preferably l~wer than those which are spontaneously combustible in air, eg about 5~ by volume silane.
Desirably the device includes one or more electrically conducting areas on the outer surface of the silicon layer remote from the substrate. These areas can conveniently be provided by zones of a metal such as aluminium or a nickel chromium alloy.
The device comprising and layers of amorphous or microcrystalline semiconductor is formed to a memory device by applying a voltage 5 ~L637~;
sufEiciently large to cause the device to be capahle of being put into a stable conductance state by a voltage of known polarity and changed to a second conductance state by a voltage of opposite polarity.
The invention is illustrated with reference to the following Example and Figures 1 to 5 of the accompanying drawings.
Figure 1 is a diagrammatic sideview of a device according to the invention, Figure 2 is a graphical representation of the voltage-current characteristic of the device before it is subjected to a voltage to convert it to a memory device, Figure 3 shows the current-voltage characteristic of the device after it has been converted to a memory device, Figure 4(a) and (b) are graphi~al representations of the open-circuit voltage and short-circuit current for devices in the on and off state, Figure 5 is a graphical representatlon of the memory photovoltaic output as a function of the memory conductance.
Example An ITO (indium tin oxide) coated glass substrate was placed on a temperature variable substrate holder inside a cylindrical reaction chamber. The chamber was evacuated to 10-4 (1.3 x 10-2 Pa) torr and the substrate heated to 250C. Neat silane was admitted to the chamber to bring the pressure up to about 0.1 torr (13 Pa). Once the pressure had stabilised, 1% by vol of diborane in hydrogen was added to the silane in the chamber. A glow discharge was initiated by exciting a capacitive plate system inside the reaction chamber from a radio frequency generator. This caused p-type amorphous silicon containing boron to be deposited on the ITO coated glass from the gss phase. After two minutes the diborane flow was terminated, thus causing a region of intrinsic (or undoped) material to be produced on top of the p-type region. This situation was maintained for 30 minutes. Finally, 1% by vol phosphine in hydrogen was progressively admitted to the reaction chamber and growth continued for a further 9iX minutes. This caused n-type amorphous silicon containing phosphorus to be deposited on top of the i-type material.
6 ~ 16~
At this stage the discharge was extlnguished, the phosphine flow was stopped and the device was allowed to cool under a flow of silane.
When the device had cooled to room temperature it was removed from the reaction chamber and placed in a vacuum coater where several spots of aluminium 1 mm in diameter were evaporated onto the surface of the device.
The complete structure is shown in Figure 1 wherein 1 represents the glass substrate, 2 the layer of ITO, 3 the layer of p-type silicon, 4 the layer of i-type, 5 the layer of n-type and 6 the aluminium spots. The p layer is about 200 A (20 nm) thick, the n layer about 500 A (50 nm) and the i layer about 2,000 A (200 nm).
The device was placed on a curve tracer and i-ts voltage/current characteristics examined. Initially these were in the form shown in Figure 2. Finally a large reverse bias voltage of about 15 V was applied to the device~ This step "conditions" the device into a memory (switching) device with the characteristics as shown in Figure 3.
Curves A and B in Figure 3 show the device in its OFF state.
Applying negative bias (curve A) has no effect on the conductivity state, applying forward bias (curve B) causes the device to switch to an intermediate conductivity state (curve C) at about 2V. Further forward bias finally switches the device to its ON state, (curve D).
Higher forward potentials have no further effect on the conductivity state. Applying negative bias now leaveæ the device in the ON state ~curve E) until a potential of 5V is attained, whereupon it immediately switches to its OFF state (curve A). This sequence of events is repeatable with no change in the ON-OFF conductivity or switching levels.
Optical excitation of the memory element was achieved by directing the output of a 4 mW He-Ne laser through the glass-ITO
substrate. By chopping the laser output at a frequency of 200 Hz, the laser induced ~emory response could be distinguished either directly on an oscilloscope, or via a phase-sensitive detector (PSD).
Figure 4(a) shows the effect of memory state on the laser induced open-circuit voltage; Figure 4(b), the effect on short-circuit 7 .'~ '76 current. A distinct difference in photo response is apparent bet~Jeen the OFF and ON states.
Figure 5 shows the memory photovoltaic output as a function of the memory conductance; conductivity levels applicable to the OFF and ON states are indicated. The points between these extremes were obtained by switching the device carefully into intermediate conductivity values (eg curve C in Figure 3) and then measuring response whilst this state was maintained, stability being adequate for the short experiment time required. It is apparent that the open-circuit voltage mode is extremely sensitive to memory conductivity and thus might be preferred in many applications.
Claims (7)
1. A process for detecting the conductance state of a non-volatile memory device which is switchable between a high conductance and a low conductance state and which comprises a plurality of amorphous or microcrystalline semiconductor layers at least one of which is a p-type layer in contact with an n or i-type layer, characterised by irradiating the device with light of a wavelength which causes band to band excitation and of an intensity which produces a detectable photovoltaic response and using the photovoltaic response to determine the conductance state of the device.
2. A process according to claim 1 wherein the semiconductor material consists essentially of elements of Group IV of the Periodic Table.
3. A process according to claim 2 wherein the semiconductor material is silicon and/or silicon carbide.
4. A process according to claim 3 wherein the semiconductor material is amorphous silicon.
5. A process according to claim 1 wherein the current across the device produced by irradiation is measured to determine the conductance state of the device.
6. A process according to claim 1 wherein the voltage produced by irradiating the device is measured to determine the conductance state of the device.
7. A process according to claim 1 where the electrical power produced by irradiating the device is measured to determine the conductance state of the device.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB8333033 | 1983-12-10 | ||
| GB838333033A GB8333033D0 (en) | 1983-12-10 | 1983-12-10 | Memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1216376A true CA1216376A (en) | 1987-01-06 |
Family
ID=10553155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000469600A Expired CA1216376A (en) | 1983-12-10 | 1984-12-07 | Memory device |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4747077A (en) |
| EP (1) | EP0152689A3 (en) |
| JP (1) | JPS61500696A (en) |
| CA (1) | CA1216376A (en) |
| GB (1) | GB8333033D0 (en) |
| WO (1) | WO1985002709A1 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL8602684A (en) * | 1986-10-27 | 1988-05-16 | 5Th Generation Bv | SEMICONDUCTOR MEMORY WITH MEMORY PLACES IN WHICH INFORMATION CAN BE STORED BY OPTICAL SIGNALS. |
| GB8910854D0 (en) * | 1989-05-11 | 1989-06-28 | British Petroleum Co Plc | Semiconductor device |
| NL1004886C2 (en) | 1996-12-23 | 1998-06-24 | Univ Utrecht | Semiconductor devices and method for making them. |
| EP1683158A1 (en) * | 2003-10-22 | 2006-07-26 | Siemens Aktiengesellschaft | Rewritable memory unit made from organic materials |
| JP2011077184A (en) * | 2009-09-29 | 2011-04-14 | Fujifilm Corp | Detection element |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3199087A (en) * | 1960-12-30 | 1965-08-03 | Ibm | Latching circuit |
| US3801966A (en) * | 1971-08-18 | 1974-04-02 | Hitachi Ltd | Optical memory device |
| FR2396420A1 (en) * | 1977-06-29 | 1979-01-26 | Commissariat Energie Atomique | TRANSPARENT PHOTOCONDUCTIVE MATERIAL, ITS MANUFACTURING PROCESS AND APPLICATION DEVICES |
| EP0095283A3 (en) * | 1982-05-15 | 1984-12-27 | The British Petroleum Company p.l.c. | Memory device |
| US4545111A (en) * | 1983-01-18 | 1985-10-08 | Energy Conversion Devices, Inc. | Method for making, parallel preprogramming or field programming of electronic matrix arrays |
-
1983
- 1983-12-10 GB GB838333033A patent/GB8333033D0/en active Pending
-
1984
- 1984-12-06 WO PCT/GB1984/000420 patent/WO1985002709A1/en unknown
- 1984-12-06 JP JP59504471A patent/JPS61500696A/en active Pending
- 1984-12-06 EP EP84308510A patent/EP0152689A3/en not_active Withdrawn
- 1984-12-06 US US06/760,740 patent/US4747077A/en not_active Expired - Fee Related
- 1984-12-07 CA CA000469600A patent/CA1216376A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61500696A (en) | 1986-04-10 |
| US4747077A (en) | 1988-05-24 |
| EP0152689A3 (en) | 1985-09-25 |
| WO1985002709A1 (en) | 1985-06-20 |
| GB8333033D0 (en) | 1984-01-18 |
| EP0152689A2 (en) | 1985-08-28 |
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