CA1285613C - Source volt-ampere/load volt-ampere differential converter - Google Patents
Source volt-ampere/load volt-ampere differential converterInfo
- Publication number
- CA1285613C CA1285613C CA000554913A CA554913A CA1285613C CA 1285613 C CA1285613 C CA 1285613C CA 000554913 A CA000554913 A CA 000554913A CA 554913 A CA554913 A CA 554913A CA 1285613 C CA1285613 C CA 1285613C
- Authority
- CA
- Canada
- Prior art keywords
- boost
- converter circuit
- oriented
- unidirectional
- product
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33538—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type
- H02M3/33546—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type with automatic control of the output voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
Abstract
ABSTRACT OF THE DISCLOSURE
A source V-A/load V-A differential converter (single quad-drant DC-DC topology) combines the canonical functions of both the boost and buck converter topologies. Basic advantages of the boost and buck topologies are retained, disadvantages of these and prior art compound topologies are eliminated, and several entirely new and useful functions are realized. These new func-tions include sub-microsecond source voltage/load step response (independent of feedback loop parameters), extremely wide source voltage range, very high conversion efficiency/power density, multiple auxiliary outputs with closely held voltage range para-meters (without resort to minimum load, pre-load, or sub-regula-tion), galvanic input/output isolation, enhanced capacitance safety/energy storage, reduced gain bandwidth requirements, and intrinsic stability. The differential term derives from the transfer function for this new compound topology, i.e., x=.delta.(a+x).
A source V-A/load V-A differential converter (single quad-drant DC-DC topology) combines the canonical functions of both the boost and buck converter topologies. Basic advantages of the boost and buck topologies are retained, disadvantages of these and prior art compound topologies are eliminated, and several entirely new and useful functions are realized. These new func-tions include sub-microsecond source voltage/load step response (independent of feedback loop parameters), extremely wide source voltage range, very high conversion efficiency/power density, multiple auxiliary outputs with closely held voltage range para-meters (without resort to minimum load, pre-load, or sub-regula-tion), galvanic input/output isolation, enhanced capacitance safety/energy storage, reduced gain bandwidth requirements, and intrinsic stability. The differential term derives from the transfer function for this new compound topology, i.e., x=.delta.(a+x).
Description
3.~35~
1 _CKGROUND OF THE INVENTION
1 _CKGROUND OF THE INVENTION
2 1~ Field of the Invention 3 The inventi~n relate~ to po~er converters, (90ura~ V-A~load 4 V-A) of the DC-DC gwitchmode converter famlly. In partlcular, S the inventlon relatag to DC-DC switchmode converter~ of the com-6 pound type. More particularly, the invention relateY to the 7 differential combinatlon o the boo~t (current sourced) topology 8 and the reciprocal buck (voltage sourced) topology, to effect the 9 new compound ~lngle quadrant DC-DC ~witchmode converter.
2. Descrlption of the Prior Art 11 E. E. Landsman state~ that ...~all three classiaal s~itchlng 12 converter clrcuits" (Flg l, 2, 3)fl can be derlved from a slngle 13 canonical qwitching cell.~, ~ee E. E. Landsman, "A Unifying Deri-14 vatlon of S~itching DC-DC Converter Topologieq, n PESC '79 Record ~IEEE_Power Electronic~ Speciallqt3 Conference-1979, (Publication~
16 #79CHl461-3 AE5), June 13-22, 1979, p 243.
17~ ~
18 Peter Wood state3 that ... Nwhen ~e arrive at thH slngle .: ~
19 ~quadrant DC-DC converters, we find that the volta~e sourced i9 the~'buck' converter~ (Flg 2)~ and the current sourced the .
21 ~'boo~t' n tFig l) n, reaiprocal~ in every re~pect including 22 tran~fer ch~r~cteristlc~... the usual 'buck-boost' n (Fig 3~ n i9 : : :
23 nothing more or leq~ than a ca3aaded connection of boost and buck 24 ~converters,, ., n, see Peter ~ood, "General Theory of Switohing 25 ~Power Convertersn, PE5C '79 Record (IEEE Power Eleatronic~ Se~C-26 iall~t~ Con~erence-1979,~ (Publication #~gCH1461-3 AES), June 18-27 ~22, 1979, p 5.
29 Slobodan M. Cuk, et al, state that "~..it has been :~
~ound tha~ the buck~ (Fig 2)n, boo~ Fig l)~ and buck-boost 31 converter~, previou~ly considered to be a clo~ed trlad of ~lmple 32 po~r stages, are actually only three men~bers of a our converter 33 amily. Completing the ~e~ ls ...the Cuk converter.~, ~ee Loman 34 Rensink, Art Brown, Shi-plng Hsu, and Slobodan Cuk, ~De~ign of a ~2~ 3 1 Kilowatt 0~-Line Switcher Uslng a Cuk Con~ert~r," Proceedlnas o~
2 the Sixth _Natlonal Solld-State Pow~r Conver~ion Conference, May 3 2-4, 1979, p H3-2.
4 Robert D. Middlebrook and Slobodan M. Cuk ~tate that '...general dc conver~ion...can be aahieved by ~lmply aascadlng 6 the two basic converterg, namely the boost" (Fig l)n...and the 7 buck" (Flg 2)~...re3ulting in the same overall dc gain...Whlle 3 thi~ converter~ (Fig 3) n has qome good propertie~ (both lnput and 9 output ourrents continuou~, that i9, non-pul~ating) lt ha~ some additlonal deficiencies. It needs an additlonal transiqtor Q2 11 and dlod~ D2 which aause added dc and switching lo~e~ and hence 12 ~lgnlficantly degrade the ef~iciency o the converter, besides 13 lt~ lncrea~e o~ complexity and number o component~. Also at 14 least one of the ~witchlng transistors require~ floAting drive 15~ airoultry, hence need for two i~olated drive circuits, ~hioh 16 fur~her oomplicates it~ drive. Al~o there 19 no pos~ibility to 17 lntroduce the l~olatlon property into thls convertsr by simple 18 me~n~ e~ Rober~ D. Middlebrook and Slobodan Cuk, Unltad l9 State~Patent 4~184,197, 1/1980, excerpted 3-63 through 4-18.
21 Slnce the~e prior art topologie~ have been 90 exhau~tively 22 analyzed, only the ~alient ~eature~ (or lack thereof~ w~ll be 23 dl~cussed.
24~ The boo~t oonverter (Fig 1) dl~playq continuou~ input 25 ~urrent (current sourced), dl~continuous output current, and the 26 tranefer funotion, E in/tl-~)=E out.
27 The i~olated boo~t converter tflyhack) tFig 4) loses the Z8 aontinuou~ inpu~ current property, as the inductor Ll tFlg 1) is 29 inaorporated lnto the 1yback transformer Tl (Fi~ 4).
30 ~ The b~ak conver~er (Flg 2) di~plays di~continuou~ input 31 current (voltage sourced) continuou~ output current~ Rnd the 32 tran~fer funotion E ln(~)-E out.
33 The l~olated buck coaverter (forward) (Fig 5) require~ an 34 ~ddltlonal tran~former T2 and dlode D3.
1 The cascade boo~t-buck converter ~Fig 3) displays oontlnu-. ., ~
2 ous input current, continuou9 output current, and the tran~fer 3 function E out = ~(E in + E out), thus realizlng the general DC-4 DC conver~ion funation. The boo5t-buck tran~fer function may be cl~rified by setting E in (Fig l~a, E out ~Fig l)-E ln (Fig 2)=
6 b, E out (Fig 2)=x, t on/T=~. Sub~tituting and transposing 7 [a~ )=b~(boo~t), tb(~)=x~ ~buck), then [x=~(a~x)3 (booqt-buak). Glven 0<~1, and O~ac~ then x may be derived rom differ-9 rential control of ~.
The isolated Cuk converter (Fig 6) realizes the general DC-11 DC oonvar~ion functlon, in compound topology. Ho~sver, thi~ ser-12 les capa~itanoe fed, coupled lnductor topology exhibits ~everal 13 undesirable properties. These negative properties include 14 (1) output ~oltage reversal at turn-on; G. E. Bloom, A. Eris, and R. Ruble ~tate that ~one undesirable feature of operatlon....
16 namely that of tranæient ~oltage polarity rever~al... mu~t be 17 circumvented or reduced to acoeptable magnitud~s.", ~ee G. E.
18 Bloom, A. Eri~, and R. Ruble, "Modeling, Analysls, and Design of l9 a~ Multi-Output Cuk Converter," Proceedinas of Powercon 7, Mar~h 24-Z7, 19~0, p 11-14.
~1 (2) requirement~ for~ power component damping, Alan Cocconl and :
2Z~ Slobodan Cuk ~t~te that "... one must find the method whi~h ~111 Z3 ~in~roduae th~ requi~red damping... to damp otherwise unaGceptable 24 high resonant peaks of the p~le pair~. N, see Alan Cocconi and Slobodan Cuk, ~De~ign o~ a 2KW,~ lOOKHZ Swi~ching Regulator for 26 Spaae Shuttlen, Poweraonver~ion International, January 19~3, p 27 14-15.
: ~ : I
~ 2~ ~3) right hal~ plane zero, Alan Coccini and 510bodan Cuk ~tate .
29 that ",,, r0quency response contains a very nasty rlght hal ~; 30 plane ~ero... lmmune to all attemp~ of pas~ively damping...~;
; 31 see pa~es 20-21 o~ the last~mentioned reference.
32 (4) topologlcal inefficlency; thi~ serles capacitor fed config-35~3 1 uration require3 that both primary and isecondary of Tl conduct ~; ~
2 aontinuously, i.e., during both the energy ~torage cycle (Ql 3 of~), and the energy dellve~y cycle (~1 on). At ~ - .5 du-ty 4 cyale, thi~ lnvolvement doublai3 the resistive los~es, accordlng to the formula 1 rms -J ~13~ 1'. The i3econd .51~ term dis-6 appearis from the conventlonal forward tran.sformer 108i~ equation.
7 Additionally, the unterminated reactance (leakage lnductanae) of 3 Tl contribut~s doubly to the damplng losses o~ (2):
9 (5) addltlonal i~afety burden, the ~floatlng~ (ungrounded) ca~e lnstallatlon o Cl and C2 (Flg 6) ~mpo~es ~n~ulation/safoty 11 con~iderations no~ found in parallel (grounded) capacitor topo-12 logieiY;
13 t6) complex loop compen~ation rsqulrements; Alan Cocconl and 14 Slobodan Cuk state that ~all attempts to close the ~eedback loop by conventlonal me~ni3,... are elther futile, or result ln...
16 unusable tranqient responseq, far away from required specifica-17 tlon~-, i3ee pagei3 20-21 of the last-mentioned reference.
18 The ca3cade boo~t-buck topology (Flg 3) 1~ ~een to realize 19 the idealized general DC-DC conversion function. If the iseeming-ly intractable deficiencie~ prevlou~ly cited could be overcome 21 (lnefflclency, comple~ity, impossibility of qimpls isolatlon, 22 etc.), the cascade boost-buck topolo~y ~Fig 3) would be the 23 preferred topology in~slngle-quadrant DC-DC conversion.
24 The foregoing suggest3 that ~n ldeal ~our~e V-A~'load V-A
converter should incorporate at leaat the followlng ~et of : ~ ` ::
26 ob~eotiveis:
:
27~ it~hould reallze the ldealized generRl DC-DC converi~ion 28 ~unction;
29 it iYhould provide for intrinisio aircuit rei~ponse to source/
, load demandis, extraordinary to feedback loop parameter~
31 it should be lntrinsically stable without rQsort to power 32 dissipatlng damping;
33 it i3hould exhlbit theoretlcally infinite i~ource~load vol-.~:
85~i~3 1 tage range;
2 it should requlre only flrst-order feedback loop compensa-3 tion and minlmum gain bandwid~h;
4 it should deploy both input voltage and load current feed-; 5 forward by ~opologioally inheren~ function, in current mode loop 6 control;
7 it ishould funotion in both the oontinuou.~ and discontinuou~
states of internal current flow;
9 it should obtain multiple, isolated, and istable output vol-tage~ without resort to minimum loads, pre-loads, sub-regulation, 11 or other circuit manipulation.
12 it should achleve galvanlc isolation between output vol-13 tages, aia well as between input and output voltages;
it ~hould eli~inate output inductor i3aturation as induced by volt-second unbalance during overload iand ~hort circuit;
16 : it should demonstrate continuous, non-pulsating, input and . 17 output current~;
: , .
13 : it should suffer no power losses, safety c~nstraintsi or 19 polarity anomalies: ln con.sequence of the topologlcally lnherent de~iciencies charaateristic of prior art, 21 ~ ~ it 3hould be capable of realization with readily available 22 mAterials:and oomponents, requiring no ~exotic" or yet-to-be-23 porfect~d appar~tu3~
24 lt should exceed the composite power/performance density of all prior oircuit art in the field o~ the invention.
26 ; ~ i~ should introduce an entirely new topology to the conve~t-27 er ami1y, A ifth and penultlmate:member o the i~et.
28: ; : ~un~ L~yL~lly~
:29 The invention provides new means o realizing the idealized general DC-DC aonverAion function. The invention oonsisti3 of two 31 switohe~ (may be combined) two power transformer~ (may be combln-32 ed), four or six rectifiers, two capacitoris ~one may be divlded), 33 one induator, and a control means, combincd illtO tha new compound 34 boost-buck topolo~y.
Rei3poni3ive to the control means, the swi~ch~ei3) connect the ~35~i~3 1 source voltage and the gource voltage/boost product voltage to 2 the tranqormer~g). The reisiultant current~ are 90 circui-t dl~-3 trlbuted as to produce the compound boost-buck energy tranisfer 4 (vla the reatifierg, capacitori~, and inductor) from the ~ource to the utllization load. Reference to the I in and I out wave 6 forms of Figure~ 1 through 5 and Figureg 7 and 8 illustrate the 7 generic canonlaal compound current structure.
8 Thsrefore, the invention ~ill accompli~h the followtng 9 objectives:
reallze the ideallzed general DC-DC aonverslon function:
11 provide for circuit re3poni~e to load demands, extraordi-12 nary to feedback loop parameteriq;
13 be intri.n~ically ~table without resort to power di~sipat-14 ing damplng;
lS exhlbit theoretically infinite source/load voltage range;
lG requirs only first-order feedbaak loop compensatlon and min-17 imum gain band~idth;
18 deploy both lnput voltage and l.oad aurrent feed-forward ~y 19 topologically int~erent function, in current mode loop aontrol:
~ ~ .
function in both the continuous and dl~icontlnuou~ states of 21~ internal aurrent 10w;
~: 22 obt~ln multlple, i~olated, and gtable output voltage~i with-~: 23 out resort to minimum loads, pre-loads, sub-regulation, or other : 24 cirault nanipulation.
25~ achieve galvanlc isolation between output voltage3, as well ;: 26 as betwe~n input and output voltages;
~: :
27 eliminate output inductor~'~aturation a3 induced by volt-28 seaond unbalance during overload and qhort circuits : `
29 ; demonstrate c~ontinuous, non-pulsating, input and output cur- :~
rent~s 31 suffer no power los~es, ~afety constraints, or polarity 32 anomalies ln conqequence o the topologicall.y inherent deficien-33 cies charQcteristic of prior arts 34 be aapable of realization with readily avallable materials and components, requiring no ~exotic" or yet-to-be-perfected ,. .
.
1 apparatUs;
2 exceed the composite power/performance den~lty of all prior 3 clrcuit art in the field of the inventlon;
4 introduce an entirely new topology to the converter famlly, a fi~th and penultimate member of the set.
6 BRIEF DESCRIPTION OF ~RAWINGS
~7 Fia 1 illustrates the canonical form of the ~ingle quadrant DC-DC boost converter circuit (non-lsolated) and atten-9 dant wave form~.
~g_~ illustrates the aanonical form of the single quadrant ~11 DC-DC buck converter circult tnon-isolated) and atten-I2 ~dant waveforms.
:
13 ~ illu~trates the canonical form of the ~ingle quadrant 14 ~ DC-DC cascade boo~t-buck~converter circuit (non i90-lated) and attenda~t waveform~.
,~ , 16~ ~g_~ illustrates the derivative form of the slngle quadrant 17~ : DC-DC boost converter circuit ~i~olated, flyback) and 18 ~ attendant waveforms.
9~ illustrates the derivative form of the ~ingle quadrant ~ ; DC-DC buck~converter circuit ~isolated, forwa~d) and ;21~ ; ettendant waveform~. ~
i 22~Fiq~6 lllu~trate~ the basla coupled inductor, ~erles capaci-23~ tor ed Cuk~oonverter clrouit ~i~olated) and attendant 24 ~ wave~orm~.
25~ Ei~_Z ~ il}ustrate~ a derivative pre~erred .~ource volt-ampere~
26 ; ~ loed ~olt-empere~differential converter in ~ingle quad-27 ~ rant DC-~DC cirouit ~mbodiment ti~ola-ted) and attendant 28~ ~ ~ waveformY.
29~Eig_Q ~ illustrate~ the~definitive pref~rred source volt-~ ampere/load vol~t-ampere differential converter ln :: : : : :
31 ~ ~ingle quadrant DC-DC cirauit embodiment ~isolated).
`~ ~ 32 VESCRIPTION OF INVENTION
33 For the purpoYe of explanation of the lnventlon, assume t 34 on~T-~ and t on = t off, then E ~oo~t = 2E in, accord:lng to the -¦
formula E~ in~ E boost; a ~ume a 1:1 turns ratio for power 9 ,, j~2f~8 S~3 1 transformerg 12 and 13, and a~5ume ldeal ~wltche~ arld unidlrec-2 tional conducting devices.
3 1. On state operation o swltch(e~) 14 and 15:
4 Referring now to Flg. 7, 9witch 14 and ~witch 15 are selec-tlvely and f~imultaneously clo~ed by control means 23 90 as to 6 connect the primary 24 of power tranf~former 12 across the l)C
7 voltage ~ource 11 (via unidirectional conducting davloe 16) and 8 the primary 26 of power tran~former 13 to the boo~t voltage prod-9 uct E boost. E out will derive (via unidirectional conducting device 19) from E boogt (ag applled to primary 26 and transform-- 11 ed to secondary 27) minuf~ E in (as applied to prlmary 24 and 12 transformed to secondary 25) and will there~ore equal E in. The 13 differentlal transfer function x = ~(a ~ x) i~ thus conflrmed, 14 i.e., E out = ~(E in + E out), during the on state of switch(es) 14 and 15, for the intervals 0~1 and O<a~.
16 2. Off ~tate operatlon of ~witah(e~) 14 and 15:
17 Referring again to Fig. 7, switch 14 and switch 15 are :: , 18 ~electlvely and 31multaneouf31y opened by control mean3 23 90 as 19 to disconnect the primarie~ 24 and 26 o power transformerfs 12 and 13. Primary 24 is now connected between E in and E boost 21 (vla unidireational oonductlng device 17) according to conven-22~ tional flyback performance. Primary 26 i9 non-functlonal in this 23 f~tate. E out will derlve ~via unidirectional conducting devIce 24 20) from E boost minu~ E in (a~ applied to primary 24 and trans-2S formed to secondary 25) and will therefore equal E in. The dlf-, ~ 26 ferential tran~fer function x =~(a 4 X~ i9 thu~ conflrmed, i.e~, f'~ . f 27 E out = ~ (E in l E out) during the off state of f~witch~es) 14 23 and 15, ~or the intervals 0<~1 and O~a<f~.
:
29; 3. On state utilization load 22 intrln~ic stability and non-loop derived energy transfer:
31 Referring agsin ~o Fig. 7, any delta in E out will result in 32 an instantaneou~ current tran~fer between windings of power 33 tran~former 12. Since E out is the ~um of E boo~t - E in (as 34 transformed), any lncrea0e in E out (as a consequence o~ a re-duation of u~ilization load 22) will rever~e bia~ unidireGtional , . 1 0 ~285~13 1 duatlon of utilizatlon load 22) wlll reverse bias unldirectional 2 conducting devlae 19, thug transferring ~econdary 25 current to 3 primary 24 until voltage equilibrium i3 ~ttained. Llkewi~e, any 4 decrea~e in E out (ag a congequence of an increa~e of utilization load 22) will rever~e bia~ unidirectlonal conducting device 16, 6 thu~ tran~ferring primary 24 current to ~econdary 25 until vol-7 tag~ equilibrium 1~ attained.
~ 4. Off state utilization lGad 22 intrinsia stability and non-9 loop derived energy ~ran~fer:
Referring again to Fig. 7, any delta ln E out will result ln 11 an instantaneou~ current ~ran~fer between windlngA of power 12 transformer 12. Sinae E out i~ the sum of E boost - E in (aQ
13 tran~formed), any increase ln E out (a~ a consequence of a re-14 duction oE utilization load 22) will rever~e bias unidirectional conductlng deviae 20, thus tran~ferrlng secondary 25 current to 16 primary 24 until voltage equilibrium is attained. Likewi~e, any 17 decrease in E out (as a con~equence of an increase of utilization 18 load 22) will reverse bias unidirectional conducting device 17, :: ~
19 thus tran~ferrislg primary 24 current to secondary 2S until vol-tage equilibrium is attained.
21 5. Referring now to Fig. 8, a~ymptotia elimination of the 22 right half plane zero erom the boo~t transfer function is accomp-23 ll~hed by serial division of capacitor lB and connection of this 24 division ~unction to DC voltage .~ource 11 posltive. Preservation ~' of the continuous input current boost characteri~tic may be ac-26 compli3hed by anti-parallel unidirectlonal conducting devices 28 j, .
27 and 29. Any DC ~ource voltage 11 perturbation relative to the 2~ boo~t voltage produat (a~ dlvide~) will forward bias one or the ; 29; other of unidirectional conductlng devices 2e and 29, thu~ asymp-totically circumventing the characteristic boost transfer unc-31 tion. This intru9ion is effective for the boost component ~32 x=a/~ of the boo~t-buck differential functlon.
33 6. Compen3ation for the les~ than ideal, l.e., zero, ESR of 34 capacito~ l~ is aacompli~hed by introduction o inductor 30 into the load curren~ off-state circuit. Inductor 30 has the ~, 1 1 ~285~
1 additional effect of enhanclng reverse recovery of unidirectional 2 conducting device 20.
3 7. Since the prlor art output aurrent lntegration funcl:ion of 4 an output inductor i~ herein accompli3hed by intrinsic circuit equilibrium, the lnductanae of ~econdary 25 may be reduced by an 6 order of magnitude from that prior art inductance ordinarily re-7 quired or continuou~ current at minimum-r~ted load. The advan-a tages of thl~ reduotion R~ regards si~e, eficiency, respOnQe 9 characteristics, and output capacitor 21 requirement~ are mani-fold and obvious. In act, absent para~ltics (an unattainable11 condition), the circuit would re~uire no output capacitor 21.
12 8. These and other features of the instant converter ~3uch as 13 recited in the SUMMARY OF INVENTION~ will be vbviou~ to those 14 ~killed in the art. It will be equally obviou~ that, ~or any given mode, control means 23 can be implemented in an inftnite 16 number o ways. Also equally obvious i~ that the switch(es) 14 17 and lS may be redeployed and augmented to conflgure all prtor art 18 circuit geometries, i.e., pu~h-pull, hal-bridge, two-tran~istor 19 forward, full-bridye, etc.
: :
~ ::
~:
;
~ ~
.
';
2. Descrlption of the Prior Art 11 E. E. Landsman state~ that ...~all three classiaal s~itchlng 12 converter clrcuits" (Flg l, 2, 3)fl can be derlved from a slngle 13 canonical qwitching cell.~, ~ee E. E. Landsman, "A Unifying Deri-14 vatlon of S~itching DC-DC Converter Topologieq, n PESC '79 Record ~IEEE_Power Electronic~ Speciallqt3 Conference-1979, (Publication~
16 #79CHl461-3 AE5), June 13-22, 1979, p 243.
17~ ~
18 Peter Wood state3 that ... Nwhen ~e arrive at thH slngle .: ~
19 ~quadrant DC-DC converters, we find that the volta~e sourced i9 the~'buck' converter~ (Flg 2)~ and the current sourced the .
21 ~'boo~t' n tFig l) n, reaiprocal~ in every re~pect including 22 tran~fer ch~r~cteristlc~... the usual 'buck-boost' n (Fig 3~ n i9 : : :
23 nothing more or leq~ than a ca3aaded connection of boost and buck 24 ~converters,, ., n, see Peter ~ood, "General Theory of Switohing 25 ~Power Convertersn, PE5C '79 Record (IEEE Power Eleatronic~ Se~C-26 iall~t~ Con~erence-1979,~ (Publication #~gCH1461-3 AES), June 18-27 ~22, 1979, p 5.
29 Slobodan M. Cuk, et al, state that "~..it has been :~
~ound tha~ the buck~ (Fig 2)n, boo~ Fig l)~ and buck-boost 31 converter~, previou~ly considered to be a clo~ed trlad of ~lmple 32 po~r stages, are actually only three men~bers of a our converter 33 amily. Completing the ~e~ ls ...the Cuk converter.~, ~ee Loman 34 Rensink, Art Brown, Shi-plng Hsu, and Slobodan Cuk, ~De~ign of a ~2~ 3 1 Kilowatt 0~-Line Switcher Uslng a Cuk Con~ert~r," Proceedlnas o~
2 the Sixth _Natlonal Solld-State Pow~r Conver~ion Conference, May 3 2-4, 1979, p H3-2.
4 Robert D. Middlebrook and Slobodan M. Cuk ~tate that '...general dc conver~ion...can be aahieved by ~lmply aascadlng 6 the two basic converterg, namely the boost" (Fig l)n...and the 7 buck" (Flg 2)~...re3ulting in the same overall dc gain...Whlle 3 thi~ converter~ (Fig 3) n has qome good propertie~ (both lnput and 9 output ourrents continuou~, that i9, non-pul~ating) lt ha~ some additlonal deficiencies. It needs an additlonal transiqtor Q2 11 and dlod~ D2 which aause added dc and switching lo~e~ and hence 12 ~lgnlficantly degrade the ef~iciency o the converter, besides 13 lt~ lncrea~e o~ complexity and number o component~. Also at 14 least one of the ~witchlng transistors require~ floAting drive 15~ airoultry, hence need for two i~olated drive circuits, ~hioh 16 fur~her oomplicates it~ drive. Al~o there 19 no pos~ibility to 17 lntroduce the l~olatlon property into thls convertsr by simple 18 me~n~ e~ Rober~ D. Middlebrook and Slobodan Cuk, Unltad l9 State~Patent 4~184,197, 1/1980, excerpted 3-63 through 4-18.
21 Slnce the~e prior art topologie~ have been 90 exhau~tively 22 analyzed, only the ~alient ~eature~ (or lack thereof~ w~ll be 23 dl~cussed.
24~ The boo~t oonverter (Fig 1) dl~playq continuou~ input 25 ~urrent (current sourced), dl~continuous output current, and the 26 tranefer funotion, E in/tl-~)=E out.
27 The i~olated boo~t converter tflyhack) tFig 4) loses the Z8 aontinuou~ inpu~ current property, as the inductor Ll tFlg 1) is 29 inaorporated lnto the 1yback transformer Tl (Fi~ 4).
30 ~ The b~ak conver~er (Flg 2) di~plays di~continuou~ input 31 current (voltage sourced) continuou~ output current~ Rnd the 32 tran~fer funotion E ln(~)-E out.
33 The l~olated buck coaverter (forward) (Fig 5) require~ an 34 ~ddltlonal tran~former T2 and dlode D3.
1 The cascade boo~t-buck converter ~Fig 3) displays oontlnu-. ., ~
2 ous input current, continuou9 output current, and the tran~fer 3 function E out = ~(E in + E out), thus realizlng the general DC-4 DC conver~ion funation. The boo5t-buck tran~fer function may be cl~rified by setting E in (Fig l~a, E out ~Fig l)-E ln (Fig 2)=
6 b, E out (Fig 2)=x, t on/T=~. Sub~tituting and transposing 7 [a~ )=b~(boo~t), tb(~)=x~ ~buck), then [x=~(a~x)3 (booqt-buak). Glven 0<~1, and O~ac~ then x may be derived rom differ-9 rential control of ~.
The isolated Cuk converter (Fig 6) realizes the general DC-11 DC oonvar~ion functlon, in compound topology. Ho~sver, thi~ ser-12 les capa~itanoe fed, coupled lnductor topology exhibits ~everal 13 undesirable properties. These negative properties include 14 (1) output ~oltage reversal at turn-on; G. E. Bloom, A. Eris, and R. Ruble ~tate that ~one undesirable feature of operatlon....
16 namely that of tranæient ~oltage polarity rever~al... mu~t be 17 circumvented or reduced to acoeptable magnitud~s.", ~ee G. E.
18 Bloom, A. Eri~, and R. Ruble, "Modeling, Analysls, and Design of l9 a~ Multi-Output Cuk Converter," Proceedinas of Powercon 7, Mar~h 24-Z7, 19~0, p 11-14.
~1 (2) requirement~ for~ power component damping, Alan Cocconl and :
2Z~ Slobodan Cuk ~t~te that "... one must find the method whi~h ~111 Z3 ~in~roduae th~ requi~red damping... to damp otherwise unaGceptable 24 high resonant peaks of the p~le pair~. N, see Alan Cocconi and Slobodan Cuk, ~De~ign o~ a 2KW,~ lOOKHZ Swi~ching Regulator for 26 Spaae Shuttlen, Poweraonver~ion International, January 19~3, p 27 14-15.
: ~ : I
~ 2~ ~3) right hal~ plane zero, Alan Coccini and 510bodan Cuk ~tate .
29 that ",,, r0quency response contains a very nasty rlght hal ~; 30 plane ~ero... lmmune to all attemp~ of pas~ively damping...~;
; 31 see pa~es 20-21 o~ the last~mentioned reference.
32 (4) topologlcal inefficlency; thi~ serles capacitor fed config-35~3 1 uration require3 that both primary and isecondary of Tl conduct ~; ~
2 aontinuously, i.e., during both the energy ~torage cycle (Ql 3 of~), and the energy dellve~y cycle (~1 on). At ~ - .5 du-ty 4 cyale, thi~ lnvolvement doublai3 the resistive los~es, accordlng to the formula 1 rms -J ~13~ 1'. The i3econd .51~ term dis-6 appearis from the conventlonal forward tran.sformer 108i~ equation.
7 Additionally, the unterminated reactance (leakage lnductanae) of 3 Tl contribut~s doubly to the damplng losses o~ (2):
9 (5) addltlonal i~afety burden, the ~floatlng~ (ungrounded) ca~e lnstallatlon o Cl and C2 (Flg 6) ~mpo~es ~n~ulation/safoty 11 con~iderations no~ found in parallel (grounded) capacitor topo-12 logieiY;
13 t6) complex loop compen~ation rsqulrements; Alan Cocconl and 14 Slobodan Cuk state that ~all attempts to close the ~eedback loop by conventlonal me~ni3,... are elther futile, or result ln...
16 unusable tranqient responseq, far away from required specifica-17 tlon~-, i3ee pagei3 20-21 of the last-mentioned reference.
18 The ca3cade boo~t-buck topology (Flg 3) 1~ ~een to realize 19 the idealized general DC-DC conversion function. If the iseeming-ly intractable deficiencie~ prevlou~ly cited could be overcome 21 (lnefflclency, comple~ity, impossibility of qimpls isolatlon, 22 etc.), the cascade boost-buck topolo~y ~Fig 3) would be the 23 preferred topology in~slngle-quadrant DC-DC conversion.
24 The foregoing suggest3 that ~n ldeal ~our~e V-A~'load V-A
converter should incorporate at leaat the followlng ~et of : ~ ` ::
26 ob~eotiveis:
:
27~ it~hould reallze the ldealized generRl DC-DC converi~ion 28 ~unction;
29 it iYhould provide for intrinisio aircuit rei~ponse to source/
, load demandis, extraordinary to feedback loop parameter~
31 it should be lntrinsically stable without rQsort to power 32 dissipatlng damping;
33 it i3hould exhlbit theoretlcally infinite i~ource~load vol-.~:
85~i~3 1 tage range;
2 it should requlre only flrst-order feedback loop compensa-3 tion and minlmum gain bandwid~h;
4 it should deploy both input voltage and load current feed-; 5 forward by ~opologioally inheren~ function, in current mode loop 6 control;
7 it ishould funotion in both the oontinuou.~ and discontinuou~
states of internal current flow;
9 it should obtain multiple, isolated, and istable output vol-tage~ without resort to minimum loads, pre-loads, sub-regulation, 11 or other circuit manipulation.
12 it should achleve galvanlc isolation between output vol-13 tages, aia well as between input and output voltages;
it ~hould eli~inate output inductor i3aturation as induced by volt-second unbalance during overload iand ~hort circuit;
16 : it should demonstrate continuous, non-pulsating, input and . 17 output current~;
: , .
13 : it should suffer no power losses, safety c~nstraintsi or 19 polarity anomalies: ln con.sequence of the topologlcally lnherent de~iciencies charaateristic of prior art, 21 ~ ~ it 3hould be capable of realization with readily available 22 mAterials:and oomponents, requiring no ~exotic" or yet-to-be-23 porfect~d appar~tu3~
24 lt should exceed the composite power/performance density of all prior oircuit art in the field o~ the invention.
26 ; ~ i~ should introduce an entirely new topology to the conve~t-27 er ami1y, A ifth and penultlmate:member o the i~et.
28: ; : ~un~ L~yL~lly~
:29 The invention provides new means o realizing the idealized general DC-DC aonverAion function. The invention oonsisti3 of two 31 switohe~ (may be combined) two power transformer~ (may be combln-32 ed), four or six rectifiers, two capacitoris ~one may be divlded), 33 one induator, and a control means, combincd illtO tha new compound 34 boost-buck topolo~y.
Rei3poni3ive to the control means, the swi~ch~ei3) connect the ~35~i~3 1 source voltage and the gource voltage/boost product voltage to 2 the tranqormer~g). The reisiultant current~ are 90 circui-t dl~-3 trlbuted as to produce the compound boost-buck energy tranisfer 4 (vla the reatifierg, capacitori~, and inductor) from the ~ource to the utllization load. Reference to the I in and I out wave 6 forms of Figure~ 1 through 5 and Figureg 7 and 8 illustrate the 7 generic canonlaal compound current structure.
8 Thsrefore, the invention ~ill accompli~h the followtng 9 objectives:
reallze the ideallzed general DC-DC aonverslon function:
11 provide for circuit re3poni~e to load demands, extraordi-12 nary to feedback loop parameteriq;
13 be intri.n~ically ~table without resort to power di~sipat-14 ing damplng;
lS exhlbit theoretically infinite source/load voltage range;
lG requirs only first-order feedbaak loop compensatlon and min-17 imum gain band~idth;
18 deploy both lnput voltage and l.oad aurrent feed-forward ~y 19 topologically int~erent function, in current mode loop aontrol:
~ ~ .
function in both the continuous and dl~icontlnuou~ states of 21~ internal aurrent 10w;
~: 22 obt~ln multlple, i~olated, and gtable output voltage~i with-~: 23 out resort to minimum loads, pre-loads, sub-regulation, or other : 24 cirault nanipulation.
25~ achieve galvanlc isolation between output voltage3, as well ;: 26 as betwe~n input and output voltages;
~: :
27 eliminate output inductor~'~aturation a3 induced by volt-28 seaond unbalance during overload and qhort circuits : `
29 ; demonstrate c~ontinuous, non-pulsating, input and output cur- :~
rent~s 31 suffer no power los~es, ~afety constraints, or polarity 32 anomalies ln conqequence o the topologicall.y inherent deficien-33 cies charQcteristic of prior arts 34 be aapable of realization with readily avallable materials and components, requiring no ~exotic" or yet-to-be-perfected ,. .
.
1 apparatUs;
2 exceed the composite power/performance den~lty of all prior 3 clrcuit art in the field of the inventlon;
4 introduce an entirely new topology to the converter famlly, a fi~th and penultimate member of the set.
6 BRIEF DESCRIPTION OF ~RAWINGS
~7 Fia 1 illustrates the canonical form of the ~ingle quadrant DC-DC boost converter circuit (non-lsolated) and atten-9 dant wave form~.
~g_~ illustrates the aanonical form of the single quadrant ~11 DC-DC buck converter circult tnon-isolated) and atten-I2 ~dant waveforms.
:
13 ~ illu~trates the canonical form of the ~ingle quadrant 14 ~ DC-DC cascade boo~t-buck~converter circuit (non i90-lated) and attenda~t waveform~.
,~ , 16~ ~g_~ illustrates the derivative form of the slngle quadrant 17~ : DC-DC boost converter circuit ~i~olated, flyback) and 18 ~ attendant waveforms.
9~ illustrates the derivative form of the ~ingle quadrant ~ ; DC-DC buck~converter circuit ~isolated, forwa~d) and ;21~ ; ettendant waveform~. ~
i 22~Fiq~6 lllu~trate~ the basla coupled inductor, ~erles capaci-23~ tor ed Cuk~oonverter clrouit ~i~olated) and attendant 24 ~ wave~orm~.
25~ Ei~_Z ~ il}ustrate~ a derivative pre~erred .~ource volt-ampere~
26 ; ~ loed ~olt-empere~differential converter in ~ingle quad-27 ~ rant DC-~DC cirouit ~mbodiment ti~ola-ted) and attendant 28~ ~ ~ waveformY.
29~Eig_Q ~ illustrate~ the~definitive pref~rred source volt-~ ampere/load vol~t-ampere differential converter ln :: : : : :
31 ~ ~ingle quadrant DC-DC cirauit embodiment ~isolated).
`~ ~ 32 VESCRIPTION OF INVENTION
33 For the purpoYe of explanation of the lnventlon, assume t 34 on~T-~ and t on = t off, then E ~oo~t = 2E in, accord:lng to the -¦
formula E~ in~ E boost; a ~ume a 1:1 turns ratio for power 9 ,, j~2f~8 S~3 1 transformerg 12 and 13, and a~5ume ldeal ~wltche~ arld unidlrec-2 tional conducting devices.
3 1. On state operation o swltch(e~) 14 and 15:
4 Referring now to Flg. 7, 9witch 14 and ~witch 15 are selec-tlvely and f~imultaneously clo~ed by control means 23 90 as to 6 connect the primary 24 of power tranf~former 12 across the l)C
7 voltage ~ource 11 (via unidirectional conducting davloe 16) and 8 the primary 26 of power tran~former 13 to the boo~t voltage prod-9 uct E boost. E out will derive (via unidirectional conducting device 19) from E boogt (ag applled to primary 26 and transform-- 11 ed to secondary 27) minuf~ E in (as applied to prlmary 24 and 12 transformed to secondary 25) and will there~ore equal E in. The 13 differentlal transfer function x = ~(a ~ x) i~ thus conflrmed, 14 i.e., E out = ~(E in + E out), during the on state of switch(es) 14 and 15, for the intervals 0~1 and O<a~.
16 2. Off ~tate operatlon of ~witah(e~) 14 and 15:
17 Referring again to Fig. 7, switch 14 and switch 15 are :: , 18 ~electlvely and 31multaneouf31y opened by control mean3 23 90 as 19 to disconnect the primarie~ 24 and 26 o power transformerfs 12 and 13. Primary 24 is now connected between E in and E boost 21 (vla unidireational oonductlng device 17) according to conven-22~ tional flyback performance. Primary 26 i9 non-functlonal in this 23 f~tate. E out will derlve ~via unidirectional conducting devIce 24 20) from E boost minu~ E in (a~ applied to primary 24 and trans-2S formed to secondary 25) and will therefore equal E in. The dlf-, ~ 26 ferential tran~fer function x =~(a 4 X~ i9 thu~ conflrmed, i.e~, f'~ . f 27 E out = ~ (E in l E out) during the off state of f~witch~es) 14 23 and 15, ~or the intervals 0<~1 and O~a<f~.
:
29; 3. On state utilization load 22 intrln~ic stability and non-loop derived energy transfer:
31 Referring agsin ~o Fig. 7, any delta in E out will result in 32 an instantaneou~ current tran~fer between windings of power 33 tran~former 12. Since E out is the ~um of E boo~t - E in (as 34 transformed), any lncrea0e in E out (as a consequence o~ a re-duation of u~ilization load 22) will rever~e bia~ unidireGtional , . 1 0 ~285~13 1 duatlon of utilizatlon load 22) wlll reverse bias unldirectional 2 conducting devlae 19, thug transferring ~econdary 25 current to 3 primary 24 until voltage equilibrium i3 ~ttained. Llkewi~e, any 4 decrea~e in E out (ag a congequence of an increa~e of utilization load 22) will rever~e bia~ unidirectlonal conducting device 16, 6 thu~ tran~ferring primary 24 current to ~econdary 25 until vol-7 tag~ equilibrium 1~ attained.
~ 4. Off state utilization lGad 22 intrinsia stability and non-9 loop derived energy ~ran~fer:
Referring again to Fig. 7, any delta ln E out will result ln 11 an instantaneou~ current ~ran~fer between windlngA of power 12 transformer 12. Sinae E out i~ the sum of E boost - E in (aQ
13 tran~formed), any increase ln E out (a~ a consequence of a re-14 duction oE utilization load 22) will rever~e bias unidirectional conductlng deviae 20, thus tran~ferrlng secondary 25 current to 16 primary 24 until voltage equilibrium is attained. Likewi~e, any 17 decrease in E out (as a con~equence of an increase of utilization 18 load 22) will reverse bias unidirectional conducting device 17, :: ~
19 thus tran~ferrislg primary 24 current to secondary 2S until vol-tage equilibrium is attained.
21 5. Referring now to Fig. 8, a~ymptotia elimination of the 22 right half plane zero erom the boo~t transfer function is accomp-23 ll~hed by serial division of capacitor lB and connection of this 24 division ~unction to DC voltage .~ource 11 posltive. Preservation ~' of the continuous input current boost characteri~tic may be ac-26 compli3hed by anti-parallel unidirectlonal conducting devices 28 j, .
27 and 29. Any DC ~ource voltage 11 perturbation relative to the 2~ boo~t voltage produat (a~ dlvide~) will forward bias one or the ; 29; other of unidirectional conductlng devices 2e and 29, thu~ asymp-totically circumventing the characteristic boost transfer unc-31 tion. This intru9ion is effective for the boost component ~32 x=a/~ of the boo~t-buck differential functlon.
33 6. Compen3ation for the les~ than ideal, l.e., zero, ESR of 34 capacito~ l~ is aacompli~hed by introduction o inductor 30 into the load curren~ off-state circuit. Inductor 30 has the ~, 1 1 ~285~
1 additional effect of enhanclng reverse recovery of unidirectional 2 conducting device 20.
3 7. Since the prlor art output aurrent lntegration funcl:ion of 4 an output inductor i~ herein accompli3hed by intrinsic circuit equilibrium, the lnductanae of ~econdary 25 may be reduced by an 6 order of magnitude from that prior art inductance ordinarily re-7 quired or continuou~ current at minimum-r~ted load. The advan-a tages of thl~ reduotion R~ regards si~e, eficiency, respOnQe 9 characteristics, and output capacitor 21 requirement~ are mani-fold and obvious. In act, absent para~ltics (an unattainable11 condition), the circuit would re~uire no output capacitor 21.
12 8. These and other features of the instant converter ~3uch as 13 recited in the SUMMARY OF INVENTION~ will be vbviou~ to those 14 ~killed in the art. It will be equally obviou~ that, ~or any given mode, control means 23 can be implemented in an inftnite 16 number o ways. Also equally obvious i~ that the switch(es) 14 17 and lS may be redeployed and augmented to conflgure all prtor art 18 circuit geometries, i.e., pu~h-pull, hal-bridge, two-tran~istor 19 forward, full-bridye, etc.
: :
~ ::
~:
;
~ ~
.
';
Claims (32)
1. A source volt-ampere/load volt-ampere differential converter circuit of single quadrant compound switching DC-DC topology com-prising:
a DC voltage source;
a first power transformer including a primary winding and a secondary winding, said first power transformer being con-figured and polarized in the isolated boost mode (fly-back);
a second power transformer including a primary winding and a secondary winding, said second power transformer being configured and polarized in the isolated buck mode (for-ward);
a first switching device to selectively couple said voltage source across the primary winding of said first power transformer;
a second switching device to selectively couple the boost voltage product of said first power transformer/said first switching device across the primary winding of said second power transformer;
a first unidirectional conducting device connected in series between said first switching device and the primary wind-ing of said first power transformer and oriented to con-duct during conduction by said first switching device;
a second unidirectional conducting device connected in ser-ies between the junction of said first unidirectional con-ducting device/primary winding of said first power trans-former and a first capacitor, and oriented to conduct dur-ing non-conduction by said first switching device; said first capacitor connected between the series combination of said second unidirectional conducting device/primary winding of said first power transformer and said DC volt-age source negative, and oriented to integrate the boost voltage product of said first switching device and said first power transformer;
a third unidirectional conducting device connected in series with the secondary windings of said first and second power transformers, and oriented to conduct during conduction by said second switching device;
a fourth unidirectional conducting device connected in par-allel with the series combination of said third unidirec-tional conducting device/secondary winding of said second power transformer, and oriented to conduct during noncond-uction by said first switching device;
a second capacitor connected in parallel with the series combination of said third unidirectional conducting device /secondary windings of said first and second power trans-formers, and oriented to integrate the compound boost-buck voltage product of said first and second power transform-ers/said first and second switching devices/said first, second, third, and fourth unidirectional conducting de-vices/said first capacitor;
a utilization load connected across said second capacitor;
a control means for selectively and simultaneously opening and closing said first and second switching devices for compound energy transfer from said DC voltage source to said utilization load, and responsive to the differential transfer function .delta.=t on/(t on + t off)/(1-[t on/(t on +
t off)]).
a DC voltage source;
a first power transformer including a primary winding and a secondary winding, said first power transformer being con-figured and polarized in the isolated boost mode (fly-back);
a second power transformer including a primary winding and a secondary winding, said second power transformer being configured and polarized in the isolated buck mode (for-ward);
a first switching device to selectively couple said voltage source across the primary winding of said first power transformer;
a second switching device to selectively couple the boost voltage product of said first power transformer/said first switching device across the primary winding of said second power transformer;
a first unidirectional conducting device connected in series between said first switching device and the primary wind-ing of said first power transformer and oriented to con-duct during conduction by said first switching device;
a second unidirectional conducting device connected in ser-ies between the junction of said first unidirectional con-ducting device/primary winding of said first power trans-former and a first capacitor, and oriented to conduct dur-ing non-conduction by said first switching device; said first capacitor connected between the series combination of said second unidirectional conducting device/primary winding of said first power transformer and said DC volt-age source negative, and oriented to integrate the boost voltage product of said first switching device and said first power transformer;
a third unidirectional conducting device connected in series with the secondary windings of said first and second power transformers, and oriented to conduct during conduction by said second switching device;
a fourth unidirectional conducting device connected in par-allel with the series combination of said third unidirec-tional conducting device/secondary winding of said second power transformer, and oriented to conduct during noncond-uction by said first switching device;
a second capacitor connected in parallel with the series combination of said third unidirectional conducting device /secondary windings of said first and second power trans-formers, and oriented to integrate the compound boost-buck voltage product of said first and second power transform-ers/said first and second switching devices/said first, second, third, and fourth unidirectional conducting de-vices/said first capacitor;
a utilization load connected across said second capacitor;
a control means for selectively and simultaneously opening and closing said first and second switching devices for compound energy transfer from said DC voltage source to said utilization load, and responsive to the differential transfer function .delta.=t on/(t on + t off)/(1-[t on/(t on +
t off)]).
2. The converter circuit of claim 1 wherein said first and se-cond switching devices are combined into a single switching device.
3. The converter circuit of claim 1 wherein said first and se-cond power transformers are combined into a single integrat-ed core structure.
4. The converter circuit of claim 2 wherein said first and se cond power transformers are combined into a single integrat-ed core structure.
5. The converter circuit of claim 1 wherein the proliferation of secondary windings of said first and second power trans-formers, said third and fourth unidirectional conducting de-vices, and said second capacitor, (all according to the term ) provides for proliferation of said utilization load (according to the term ).
6. The converter circuit of claim 2 wherrein the proliferation of secondary windings of said first and second power trans-formers, said third and fourth unidirectional conducting de-vices, and said second capacitor, (all according to the term ) provides for proliferation of said utilization load (according to the term ).
7. The converter circuit of claim 3 wherein the proliferation of secondary windings of said integrated core structure, said third and fourth unidirectional conducting devices, and said second capacitor, (all according to the term ) provides for proliferation of said utilization load (according to the term ).
8. The converter circuit of claim 4 wherein the proliferation of secondary windings of said integrated core structure, said third and fourth unidirectional conducting devices, and said second capacitor, (all according to the term ) provides for proliferation of said utilization load (according to the term ).
9. The converter circuit of claim 1 wherein anti-parallel fifth the sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-tor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excusions between said DC voltage source and said boost voltage product as serially divided by said first capacitor.
10. The converter circuit of claim 2 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-itor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excursions between said DC voltage source and said boost voltage product as serially divided by said first capacitor.
11. The converter circuit of claim 3 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-tor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excursions between said DC voltage source and said boost voltage product as serially divided by said first capacitor.
12. The converter circuit of claim 4 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-tor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excursionsb etween said DC voltage source and said boost voltage product as serially divided by said first capacitor.
13. The converter circuit of claim 5 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-tor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excursions between said DC voltage source and said boost voltage product as serially divided by said first capacitor.
14. The converter circuit of claim 6 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-itor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excursions between said DC voltage source and said boost voltage product as serially divided by said first capacitor.
15. The converter circuit of claim 7 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-tor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during pos-itive or negative voltage excursions between said DC voltage source and said boost voltage product as serially divided by said first capacitor.
16. The converter circuit of claim 8 wherein anti-parallel fifth and sixth unidirectional conducting devices are connected between the junction of serially divided said first capaci-tor/said boost voltage product and said DC voltage source positive, and oriented to asymptotically conduct during positive or negative voltage excursions between said DC
voltage source and said boost voltage product as serially divided by said first capacitor.
voltage source and said boost voltage product as serially divided by said first capacitor.
17. The converter circuit of claim 1 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformers/said first and second switching devices/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
18. The converter circuit of claim 2 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformer/said combined single switching devices/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
19. The converter circuit of claim 3 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said first and second switching devices/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
20. The converter circuit of claim 4 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said combined single switching device/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
21. The converter circuit of claim 5 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformers/said first and second switching devices/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
22. The converter circuit of claim 6 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to intergrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformers/said combined single switching device/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
23. The converter circuit of claim 7 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said first and second switching device/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
24. The converter circuit of claim 8 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said combined single switching device/said first, second, third, and fourth unidirectional conducting devices/said first and second capacitors.
25. The converter circuit of claim 9 wherein a first inductor is connected in series with said fourth unidirectional conduct-ing device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformers/said first and second switching devices/said first, second, third, fourth, fifth, and sixth nidirectional conducting devices/said first and second capacitors.
26. The converter circuit of claim 10 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power treansformers/said combined single switching device/said first, second, thlrd, fourth, fifth, and sixth unidirectional conducting devices/
said first and second capacitors.
said first and second capacitors.
27. The converter circuit of claim 11 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said first and second switching devices/said first, second, third, fourth, fifth, and sixth unidirectional conducting devices/said first and second capacitors.
28. The converter circuit of claim 12 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said combined single switching device/said first, second, third, fourth, fifth, and sixth unidirectional conducting devices/said first and second capacitors.
29. The converter circuit of claim 13 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformers/said first and second switching devices/said first, second, third, fourth, fifth, and sixth unidirectional conducting devices/said first and second capacitors.
30. The converter circuit of claim 14 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said first and second power transformers/said combined single switching device/said first, second, third, fourth, fifth, and sixth unidirectional conducting devices/
said first and second capacitors.
said first and second capacitors.
31. The converter circuit of claim 15 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said first and second switching devices/said first, second, third, fourth, fifth, and sixth unidirectional conducting devices/said first and second capacitors.
32. The converter circuit of claim 16 wherein a first inductor is connected in series with said fourth unidirectional con-ducting device, and oriented to integrate the isolated boost mode current component of the compound boost-buck current product of said integrated core structure/said combined single switching device/said first, second, third, fourth, fifth, and sixth unidirectional conducting devices/said first and second capacitors.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/028,900 US4734839A (en) | 1987-03-23 | 1987-03-23 | Source volt-ampere/load volt-ampere differential converter |
| US028,900 | 1987-03-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1285613C true CA1285613C (en) | 1991-07-02 |
Family
ID=21846133
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000554913A Expired - Lifetime CA1285613C (en) | 1987-03-23 | 1987-12-21 | Source volt-ampere/load volt-ampere differential converter |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4734839A (en) |
| EP (1) | EP0284172A3 (en) |
| JP (1) | JPS63242169A (en) |
| CN (1) | CN1035212A (en) |
| CA (1) | CA1285613C (en) |
| IL (1) | IL85086A (en) |
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| US5418709A (en) * | 1993-03-24 | 1995-05-23 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Forback DC-to-DC converter |
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| JPS52204B2 (en) * | 1972-08-14 | 1977-01-06 | ||
| US4184197A (en) * | 1977-09-28 | 1980-01-15 | California Institute Of Technology | DC-to-DC switching converter |
| US4641229A (en) * | 1981-03-18 | 1987-02-03 | Rca Corporation | Switching DC-to-DC converters |
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| US4481565A (en) * | 1982-07-08 | 1984-11-06 | Rca Corporation | Core reset for single-ended dc-to-dc converter |
| US4513361A (en) * | 1983-02-15 | 1985-04-23 | Hughes Aircraft Company | Multi-phase DC-to-AC and DC-to-DC boost converter |
| DE3328723A1 (en) * | 1983-08-09 | 1985-02-28 | Siemens AG, 1000 Berlin und 8000 München | DC/DC converter |
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| GB8508064D0 (en) * | 1985-03-28 | 1985-05-01 | Coutant Electronics Ltd | Electrical power supplies |
-
1987
- 1987-03-23 US US07/028,900 patent/US4734839A/en not_active Expired - Fee Related
- 1987-12-21 CA CA000554913A patent/CA1285613C/en not_active Expired - Lifetime
-
1988
- 1988-01-06 EP EP88300062A patent/EP0284172A3/en not_active Withdrawn
- 1988-01-12 IL IL85086A patent/IL85086A/en unknown
- 1988-02-13 CN CN88100763.3A patent/CN1035212A/en active Pending
- 1988-02-15 JP JP63032584A patent/JPS63242169A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CN1035212A (en) | 1989-08-30 |
| IL85086A (en) | 1991-05-12 |
| EP0284172A3 (en) | 1990-04-18 |
| IL85086A0 (en) | 1988-06-30 |
| EP0284172A2 (en) | 1988-09-28 |
| JPS63242169A (en) | 1988-10-07 |
| US4734839A (en) | 1988-03-29 |
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