CA1317658C - Individual subchannel loopback in the pcm interfaces of a digital telephone exchange with control of the outbound path - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE

A digital radiotelephone exchange having self diagnostic individual subchannel loopback is disclosed.
An individual subchannel of an outbound PCM data stream is substituted for an individual subchannel of an inbound PCM data stream. The removed individual subchannel of the inbound PCM data stream is either substituted in the outbound PCM data stream or discarded. Line signal bits may be generated and substituted for the line signal bits of the individual subchannel in the outbound PCM data stream.

Description

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INDIVIDUAL SUBCHANNEL LOOPBACK IN TH~ PCM
INTERFACES OF A DIGITAL TELEPHONE EXCHANGE~
WIT~I CONTROL OF TH~ OUTBOUND PATH

BACKG OUND OF THE INVENTION
S This invention relates generally to digital telephone exchanges and more particularly to a self diagnostic test feature of a digital telephone ~:~ exchange which enables complete testing of a single time multiplexed channel without taking an entire trunk of time multiplexed channels out of service.
One of the advantages of digital telephone equipment is that it ~ lends itself to testing by digital methods, which if properly implemented : can eliminate some of the ambiguities attendant in the testing and operation of analog systems such as analog level drift.

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For the digital method~, bit patterns injected at various point~ ~hould yield exactly predictable bit patterns at any point in the tran~ission path.

05 Many digital ~xchanges inter~ace t~eir switching subsy te~ (called herein the ~witching network) through which calls ar~ routed, ~ll or in part, to the outside world via Tl~e-Division-Multiplexed (TD~) Pulse-Code- -: Modulat~d (P~M) ~our-wire circuits which can carry 24 or 30 or mor~ four-wire ~peechpath~ herein re~erred to as sub~hannel Th~ PGM circuits ar~ herQ$n raferred to as ~PC~ groups". Each su~channel i3 allocated specific bit po~itions for speech or data and for channel associa~ed line ~lgnaling for trunk U8e or subscriber line use or or unrelat~d u~e. WhQrs tha trunks employ co~mon channel signaling, the lina ~$gnaling bit positions may ; be used ~or that purpose, or even go unu~ed, as migh~
also b~ the ca~e in certain data and audio applications.

A techniqua known as loopback i9 o~ten used in telephone syst~ as a method of testing either the exchange equipment or the ~acilltie~ tha~ interconnect exahanges or the facilities b~twQen an exchange and the customer's premlses. Many digital axchangQs incorporate loopback, eith~r antira PCM group~ or a multiplex of PCM
groups (callsd supergroups~ in ~he digital domain, as a : mQans by which th~ integrity o~ a connection or an entire exchange can bQ quali~led, and by which defectlve compon~ntry an~ ubsection~ o~ an exchange can b~
isolat~d elth~r auto~atically or ~anually.

Looping bacX all the incoming 3ubchannels in the outgoing dir~ction i~ g~nerally callad "inco~ing loopback". It is not wid~ly u~ed. So~ exchanges may be ~:~ 35 . .

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able to perform this inbound loopback for an entire PCM
group. SO~Q PC~ t~r~inal equipment i~ capabls o~
per~orming thl~ function ~or te~t purposes.

05 ~ooping back th~ outbound sp~ech and line ~ignals of a subchannel so that it return~ on the inco~ing input for that same subchannel 1~ rafsrred to herein as 'ioutbound loopback". Another for~ o~ looping sometimes :: call~d loopbac~ but r~rerred h~r~in a~ "~urnaround"
es9entially cro~s-connects an outgoing trunk with a dif~erent incoming trunk ~o that an exchange can complete ; ~ a ts~t call to it~elf. On~ of the problems with outbound loopback and turnaround i8 that ~he distant exchange will of~on "see" ~purious data and or lina 3ignal~. Th~ exchange~ on the di tant ends of di~ferent type~ of trunk~ prefor to ~e~, under abnor~al conditions or when t~porarily busied out or when out of service for r~pa$x, dif~erent linQ ~ignaling combinations, which when violat~d leads to oonfusion and po~ibly congestion because that of~ice may mark th~ trunk~ out o~ ~arv$ce at th~ir ~nd du~ to p~rceived problems.

In the ca~ o~ PCM group outbound loopback~ s$nce the entiro group i9 unu~abl~ under the~e conditions, it 25 i9 most common to simultaneously transmit an alarm signal toward tho dlstant and.

Fle~ibility in the tr~atmsnt o~ thQ ind~vidual : 3ubchann~1~ whll~ not actually carrying ~rafric would : 30 allow ~or~:d~grQ~ o~ fr~edo~ in tQ~t aapa~ility ~ ~ co~n~urat~ wit~ laa~ di3~urbanc~ to ~hs dl~ant : ~ o~ic~.

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SUMMARY OF THE INVENTION

Therefore, it is one ob;ect of the present invention to provide the PCM interfaces of a digital telephone exchange with flexible capability to loop the outbound speech of one or more subchannels bacX into the digital exchange while 6imultaneously trans~itting this outbound speech, looped back incoming speech, or quiet line on each such subchannel toward the distant end.
lo It is another object of the pre~ent invention to provide the PCM interfaces of a digital telephone exchange with the capability to loop the outbound line signals, loop back incoming line ~ignal3, or route any desired unchanging line signal combination for each 1 subchannel independently.

Accordingly, these and other objects are achieved by the present invention which encompasses a digital telephone exchange with individual subchannel loopback.
Individual subchannel loopback is accomplished by substituting at least one o~ the data bit3 of a selected subchannel of the serial outbound data which i~ coupled from the switching network to the distant office for at least one of the data bits of a subchannel of the serial inbound data coupled from the distant offica to the sw~tching network.

Figure 1 is a block diagram of a digi~al exchange group interfac2 coupled in a conventional loopbacX
configuration.

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Figure~ 2A 2D are block diagrams o~ a digital exchang2 employing the present invention and illustrating normal and individual channel loopback con~igurations.

OS Figur~ 3 i8 a block diagram of a small digital exchange.

Figure 4 is a block diagra~ of ons of khe PCM
: int~rface module~ ~hown in Fig. 3.

Figure 5 i~ a ti~ing diagram of outbound and lnbound PCM data str~a~ in th2 CEPT-30 ~or~at.

DESCRIPTION OF THE PRE FERRE~D EMBODIMEN'r Whan te~ting a pul~o code ~odulatsd (PCMj group in convQntional digital telephon- ~x~hange3, tho entire 24 or 30 subchann~l group i looped back to the switch portion of the exchang~. Such a conventional loopback is shown in Fig. 1 whexc a group inter~ace 102 twhich may be part of a digital exchange) couple~ the serlal data repre~nting the subchannel groups tr~nsmitted from the switching network portion (not shown) o~ ~he exchange ;, back to the r~ceive input o~ the inter~ac~ circuits 102 rath~r than to the di~ant o~ice. This results, as far a~ the distant o~ico is conc~rned, in all the 3ubchannels contained in the group b~ing tested going out : oS ~ervlc~ to provid~ the loopback function ~or a single channel at th~ group int~rPaca ~onnection to tha : ~ 30 switching n~worX. The~ group;which~i~ in loopback must : tran~mit an all "1" ("out o~ s~rvice") patt~rn toward ; th~:~diatant o~fic- o~h- tel~phon~ network ~not shown) to indica~e lo:opback te~ting. ~Th~ all "1" pat~ern may caus~ ~ynchronization:lo~at the di~tan~ of~ic~ end.
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ThQ digital telephone exchangs including the pre~ent invention i~ 3hown in Fig. 2A. Gr~up interface 202 coupl~ outbound data, digital audio, and signaling bit~ for all 24 or 30 channels in a serial PCM d~ta 05 s~r~am, A, on th~ output port 204 toward the distant o~ic~ 206. Inbound data, digitized audio, and signaling bit3 r~urn to group intQrrace 202 via input port 208 in a sQrial PCM data stream, C. Data stream C
is couplad to ths switching n~twork portion 210 of a lo digital ~xchang~ 212 and data str~a~ A i~ output from the ~witchin~ n~twork 210 to group interfaca 202.

To avoid thQ disadvantages o~ placing an entire PCM
group into loopback ~or diagno~tic purposes, a single ~ubchannel ~ay be put into loopback in ~he present invention by the group interface 202 under command from a control proces~or 214. A ~impli~ied diagram of an individual channal loopback e~ployed in the present inventlon i~ shown in Fig. 2~. In the pre~erred embodiment, group inter~ace 202 receive~ two data bit stream~ ~rom ~witch ~10, conventional PCM da~a ~tream A
and a data ~tr~am ~ which con3ists generally of eight data bit~ o~ pr~dotermined value. (The typical contents of data ~tream~ A, B, and C are shswn in Fig. 5.
Although tho bltstrea~ o~ B i~ shown a~ e~anating from th~ switching network 210, it i3 equally valid that the ~: data bit~ co~prising bi~3tream B be generated within the group interfac~ 202). It i~ w~ll ~ own that ona bit of a subchannol duriny speci~i~d ~ra~es may be employed as a "~ignaling" or "lin0 signal" bit. This lin~ ~ignal bit may b~ u~d to control the subchannel ~tatus, ~or exa~pl~, to indicate a ~el~phone o~-hook condition. In th~ Ioopbac~ conditlon oP ~h~ praferr~d embodiment, the lins signal bits ar~ given value3 which pravent~ the di~tant ofXice ~ro~ attQmpting ts u~ th~ loop backed subch~nnel. Sinc~ thQ linR ~ignal bit~ aro essentially ~: ' 13 ~ 3~

independent from the remaining bits of the subchannel, they can be handled in a different manner than the subchannel bits. Therefore, it is a feature of the present invention that the subchannel and its associated line signal bits may be independently looped back or : routed in accordance with the needs of the system designer.

Referring again to Fig. 2B, the diaagnostic test loopback of a single subchannel, 7, for example, may be 1 accomplished by seleation o~ the subchannel 7 timeslot by con~rol processor 214 and the insertion of outbound guiescent signal bits or data byte, B7, in subchannel 7 of the serial PCM data 3tream outout at port 204. The ; data bits in the ~ubchannel 7 timeslot on the data stream A output ~rom the switch 210 (bits A7) are removed from the serial PCM data stream and coupled to the input switch 210 in ~ubchannal 7 timoslot of data ~tream C.
; The subchann21 7 data bits originally input into input port 208 are discarded from data stream C.

: Thus, the serial PCM data ~tream output ~rom the digital exchange 212 at port 204 consists o~ the data stream: A-A7+B7. The serial PC~ data s~ream input to the switch 210 consists of the data stream: C C7+A7. Only a single subchannel has been looped back and the need ~or taking an entire subchannel group out of service has been n~gated. At this point it should be obvious that additional subchannels could be looped back in addition to subchannel 7 by eimilarly coupling the appropriate : output timeslots back to the switch 210, subtracting the corresponding timeslot bits from PCN data s~ream C, and adding corresponding ~uiescent signal timeslot data to :PCM data stream A.

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The group inter~ace of the present invention may al o have the capability of bo~h looping back a ~ubchannel in A to the switching network 210 whil~
di~carding thQ associated inbound subchannel in C. This 05 capability is shown in Fig. 2C. Furthermore, loopback of subchannel~ in both A and C may ba realized by the group inter~ace 202 as shown in Fig. 2D.

It i5 desirable that thR lina signal bits be looped back indep~ndently fro~ tha ~ubchannel data. In a pr~erred i~pl~ntatlon, llne ~i~nal bits indicating a busy 3ubchann~1 are in~ert~d into the appropriatQ bit ti~o~lots o~ th~ as~ociat~d outbound ~ubchannel and the original lin~ ignal bits ar~ looped back to the æwitching network in th~ a~sociat~d inbound ~ubchannel.
Th~ lin~ ~ignal bits originally in the a3~0ciated inbound subchann~l ar~ discard~d. ThQ remainder of the outbound subchannel bit~ ar~ r~oved from the outbound data stream and loopQd back to the switching network on the inbound data strea~. Tha inbound data str~am subchannel, for which the outbound ~ubchannel was substitu~d, is itself loopsd back to tho outbound data ~trQam. Simply stated, the lino ~lgnal bit~ are loop~d back in acaordance with Fig. 2B (outbound data str~am line signal bits - A-A7 +
B7~ inbound data stre~m line signal bit~ - CoC7+A7) and th- ~ubchann~l data bit~ aro loopad back in accordance wlth Fig. 2D (out~ound da~a ~trea~ - A-A7+C7; inbound data ~trea~ ~ C-C7+A7).

Con3idaring the pre~rr~d e~bodi~ent in greater detail, ~ small dlgital exehan~e i~ shown in Flg. 3.
Thi~ Qxchango 8~rv8s a maxi~ of ~ight int~rfac3 module~, eaeh o~ whleh interfac~s two P~ eircuits at ~ith~r 1.544 ~bp~ or 200~8 Mbp~. When serving a total of ~ixte~n CEPT-30 clxeuits, th~ small exchangQ can ~ccor~od~te total o~ 4ao ubchannel~. Synchroniz~tlon :~ ' . .

is accomplished by thQ distribution of a 4.096 M~z clock and a 0.500 kHz superframe reference to the switching natwork 302, the interfac~ controller 310, and all the interface modules 321-328. Sp~ech and line signaling information between the switching network 302 and the interfacs modul~ 321~328 i~ carried on twa 8-bit busses, Inbound Data 304 (inbound ~eaning ~rom th2 various interface modul2s toward tho swltching network 302) and Outbound Data 306 (outbound ~anlng from the switching network 302 to the various int0rfac~ modules). These bu ~ each carry 4.09C megabyte3/second, apportioned into 512 bu~-time~lot~, a byt~ balng allocated to each time~lot during each ~ra~e o~ 125 ~icro~econd~. Bus-tima~lots ara int~rl~aved such th~t ~ach inte~face module is a~lgned QVery eighth ad~açent p~lr o~ bus-timeslots and each 24 or 30 ~ubchann~l PC~ group inter~ace (h~relnaft~r re~rred to as "inter~ace"~ i~ a~igned one oP this pair, or every sixteenth bu~-time~lot. Thu~, each lnt~r~ace 1~ allocated 32 bus-tim~slots per frame of 125 micro~econd~, the~e bus-t~Qalots being re~erred ~o in ~ach respsctlve inter~ace as si~ply "timeslo~s," and being numbered 0 through 31. The Xormat o~ each int~rface 1 8 ti~e910ts on the~Q bUR8e9 i~ essentially ~hat of CEPT-30 seri~l, but in 8-bit parallel form. There are 16 fra~es in a ~uperframa, numbered 0 through 15. ~ike CEPT for~at, during ~rames 1-15, each timeslot number 16 carrlas thQ ~our-bit channel associa~Qd line signals for a pair o~ subchannels, in ~he sam~ respective positions as CEP~ ~ubch~nn~ls 1 and 16 during ~rame 1, 2 and 17 during ~ra~e 2, etc.).
o The excha~ga'~ con~rol processor 308 interwork3 the witching n~twork 302 ln ~h- following ways 1. Wri~ in~tructLon~ to th~ voice Time Slot Interchang~ (TSI) 320, thereby con~rolling th~ speech paths, and .

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2. Audit the path status of the TSI 320, and 3a. Write the data to be tran~mitted on any outbound signaling 4-bit word into the Line Signal Sequencer (LSS) 332, or 3b. Write a cross path instruction in 332 which 05 will cause the 4-hit word to be deriYed directly from a specified incoming line signal word, and 5. Audit the path ~tatus of the LSS 332, and 6. Read the data of any of the 480 incoming signaling 4-bit words in the LSS 332 to detect changes as for call control processing~

Each PCM interface module 321-328 contains two DS-l or CEPT-30 interfaces. Fig. 4 ahows the essential path routing within a module in block form. Complete interconn~ction of the microprocessor 400 (for example an ~C6809 microproce~sor available from Motorola, Inc.) and the timing complexities have been omitted Aere in the interests of ~unctional clarity but should be apparent to one of average skill in the art. The two interfaces to a distant office may be designated transceiver A and transceiver ~, operating indpendently, except that in practice they sharo co~mon bus connection~, part~, and ; microproce~sor control, and that in certain other variations of this embodiman~ they are combined into a d~uble-rate PCM interface. Each interface module determines its pair of 32 ~us-timelsots by card edge dacoding Or prearranged edge connector connections to ground or supply voltage. The transceivers 421 and 422 may functionally be MH89760 or MH89780, manufactured by Mitel. In order to provide line to line switching within t~e interface module, a digital symmetrical matrix (cross point switch, hereinaf~er "X-point") may be used.
In the preferred~embodiment, X-Poin~s 424 and ~26 may be MT8980 digital cros~point switching integra~ed circuits manu~actursd by ~itel, and X~Point 428 may be a MT8981 ~: :
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digital crosspoi~t switching integrated circuit, alss manufaatured by Mitel. All the Mitel parts operate in frame synchronization. X-Points 424, 426, and 428 are intarfaced to the microprocessor 400 via a conventional I/O bus structure on which they operate as peripherals.
05 Timing circuitry employs system clock and superframe reference to generate:
1. Tlmeslot and frame counting and an internal 2.048 MHz clock: also, module timeslot boundaries, synchronized with the X-Point and transceiver timeslots.
2. Bus-timed outbound ~trobes once per timeslot per interface. These precede module timeslot boundaries by several bus-timeslots.
3. Bus-timed inbound ~trobes once per timeslot per interface. These follow module timeslot boundaries by several bus-timelsots. These enable latched tri-state bus drivers on the status bus 314 and the inbound data bus 304, properly timed so that, in Fig. 3, the interface controller 310 and the switching network 302, resp~ctively, will receive these signals.

The delays between the outbound strobing, the module timeslot boundarie~, and the i~bound ~trobing permit both interfaces to be logically identiaal only the bus-timed strobing i~ different and then only by one bus-timeslot.

Control proc~ssor 308 includes a data base in it~
associated memory in which the desired operational properties of all of the subchannels and o~ all of thæ
interfaces i~ stored. Such a con~rol processor 308 may be a TRN9154B control processor availabIe from Motorola, Inc. Control processor 308, through its interface con~roller 310, communicates with t~ in~er~ace modules 321-328 via a pair of 4.096 Mbps signal busses- the control bus 312 communicates toward the interfaces to -.

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control them and the status bus 314 provides a return communications path on which th~ interfaces reply and report changes in statue. Control bus-timeslot assignments coincide with Outbound Data bus-timeslots.
Status similarly coincides with Inbound Data. Each 05 mes~age in either direction is 32 bytes long, and is transmitted one bit per timeslot (32 bits per frame), a different set of bits in each of eight selected frames during a superframe, and is reiterated until receipt is acknowledged by the receiving end. By these paths and a si~ple pro~ocol, the control processor 308 imposes comprehen~ive control of the operation of the individual interfaces. One category of message is~u~d by the control processor 308, called the subchannel parameter message, significant to this embodiment is further described following the description of interface operation.

Considering now the operation of a PCM interface module such as that shown in Fig. 4, a serial PCM bit stream is input to one of the RX PCM inputs of transceiver A 422. Tran~ceivsr A 422 receives RX PCM and converts the inbound bit~tream to conventional ~itel S~-Bus 2.048 Mbps bitstream~, separating the inbound speech on line 430 ~rom tha inbound line signal~ and transceiver status on line 432.

From traneceiver 422, the inbound speech on line 430 enters X-Point 428, and in normal operation emerges as a bitstream on line 434. For DS-l/ESF, the 24 subchannels 30 appear on line 434 in timeslots 0-14 and 16-24, in succession, and for CEPT in time~lotæ 0-14 and 16-30.
The bitstream on 434 enter~ a ~erial-to-parallel converter 436, which presents, on~ timeslot later (i.e., ~ 1 15 and 17-25) 8-bit wide speech bytes to translator RO~
;~ 35 438, a~ 8 of 12 addre~s bits, the other 4 bits being ; . .
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provlded by thQ translator control on line 444. ROM 438 i~ programmed to contain as many a3 16 dlfferent 8-blt tran lation~, such as ~-Law to A-Law, A-Law to ~-~aw, with or without select~d level ~hi~ts, bit inversion3, 05 ADI ox unchang~d. The 8-bit parallel output gets latched into latch 446 on a ~odul~ tim~lot boundary; the latch 446 fe~d~ multipl~xer 448 which ~elect~ speech during all tlmeslots except O and 16, wh~n the 8ignal on line 464 is ~el~ctad. A bus-tim~d ~trob~ on line 403 gates a tri-~tate ~U8 driver that fe~d~ this data onto inbound databu~ 304 toward th~ switching network 210.

Tran ceiver A 422 send~ the inbound lins signals and tran~ceiv~r ~tatu~ bit~tr~am on 1 ine 432 to X-Point 426, ~nd to a 4-bit d21ay ~h~t r~gistor 450 which feeds a d~layed strQ~m on lin2 452 ~o X-Point 426. Dif~erent : model~ of transceiver~ ~or~at tho lin~ signals and status o~ the signals on line 432 di~srQntly. Thesa di~erenc~s are accommodated by th~ microproces~or progra~. Statu~ handling i~ described abovQ, in th~
discussion of 3tatu~ bus 314.

For tho DS-l/ESF compa~iblo tr~nsceivers (MT89760), ths 24 ~Qts o~ inbound llne signal~ appear on lin~ 432 r~iteratlv~ly as ~our bit~ o~ every thrQe out of four tl~lota, O, 1, 2, 4, 5, 6, 8, . . . The microprocessor 400 sat~ up tho X-Poin~ 426 to route input~ 432 and 452 ~ to output~ 454 and 456 as ~ollows. Timeslot~ 0-14 of ~he : bitstr~a~ on lin~ 45~ eontain th~ lin~ ~iynal~ o~
~ubchann~ 15 as r~celved on lin~ 432. Ti~e~lots 0-8 o~ the bit~tr~am on lin~ 45~ contain th~ lln~ ~ignal~ of ~ qubchann~ls 16W24 a~ r~caiv~d on lin~ 452, ~hereroro :~ shl~t~d in positio~ four place~. Multipl~xer 458 selact~
th~ ~1r~t ~our bit~ o~ a ti~lot ~rom line 454 and the ~cond ~our fro~ 4-bi~ d~layed line 456, thu~ double p~ck1ng th- 11n- 1gn~1~ of ~ubch~nnel~ 1 and 16 dur1ng ~3~7~3~

timeslot 0, 2 and 17 during timeslot 1, and so forth, feeding serial-to-parallel converter 460 which forms the~e pairs of 4-bit line signals into parallel words.
one timeslot later latch 462 captures only one such pair each frame, that of timeslst 1, timeslot 2 during frame 2, and so forth through frame 15. During timeslot 16 of each frame, multiplexer 448 merges these line signals on 464 into the inbound data bus 304 toward the switching network 21U (or 302).
For the CEPT compatible transceiver~ (MH89780), the line ~ignals are already double packed as per the ~witching network's requirements, but tha above hardware remains identical. X-Point 426 routes the line signals on line 432 to timeslots 0-14 of both lines 454 and 456, ~0 the line signals emerge in latch 462 during timeslots 1-15, to be available during timeslot 16 in correct order, multiplexed by multiplexer 448 into inbound data on bus 304.

~ imeslot 0 of the outbound bus 306 is provided by the switching network 302 (or 210) and timeslot 0 of inbound bus 304 is provided by X-Point 426 ~because of the slot delay, ~n it9 timeslot 31), and is initialized by the microprocessor 400.

~ he microprocessor 400 preestablishes the X-Point path in X-Point 424 from line 470 to line 468 as an identify in all 32 time slots to provide refresh.
(Interface transceiver "B'l 421 o~ Fig. 4, being logically connected the same as interface transceiver A 422, works ~ in similar fashion). In each timeslot, one bit of the -~ control line 312 is latched into latch 417 by a bus-timed ;~ strobe line 412 and then transferred into latch 419 on an occurrence of a module time~lot boundry. During eight selected frames of each superframe this bit is then ~317~

merged into refreshing the reiterative bitstream on line 468 at a frama-dependent bit position within the current timeslot by a multiplexar 466 (which may be a conventional 74LS157 or equivalent) to ~orm an updated 05 reiterative bitstream on lin~ 470, which 1~ thQ current control me~6age in ~erial form. The microprocessor 400 has acces~ to all thirty-two bytes o~ a control message, onQ at a tim~, by per~odically int0rrogatlng the X-Point 424. It u~e~ 4his in~or~atlon to establi~h operational para~ter~, including:
1. For~atting th~ reiterati~e bit~trea~ on line 472 in transcelver compatible ~orm, and 2. For~atting the r~iterativ~ timeslots o~ the bit~ream on outbound linQ 496~ such a~ ~rame alignment and non-fra~ allgnment ln~ormation, and 3. Fo~tting th~ ral~erativ~ bitqtrea~ on line 440 whlch i~ used ~or tran~lation ln~ruction~ for individual subchannel~, and 4. Performing speci~ic te~ts an~ diagnostics, and 5. Reporting selected abnor~alities in operation.

The microproc2ssor 400 ~onitors transceiver A 422 status informatlon o~ the ~eiterative bit~tream on the inbound signal3 and status lin0 432 by periodically int~rrogating its salient tim~slots in X-Point 426.
Changes in ~tatus reported by ths transc~iver A 422 as well a~ oth~r abnormalitie~ and acknowledgments of control m~ sag~ ar~ ~ormatted into ~hirty-two byte m~ag2s which the microproce~sor 400 writes in~o X-Point 424, ~o that th~ entir~ m~3age i3 rei~era~sd every frame on th~ blt3tream o~ lin~ 425. Each time810t 0~ Qight sQl~c~ed fra~es o~ a up~r~ra~e, a fxam~-dependent bit of thi~ ~Q~ag~ i~ captured by iatch 427, and then trans~erred at a modulQ ti~eslot boundary to latch 429, from whence it i~ strobed by the bu~-timed ~robe line 402 onto status bus 314. ThU~ the entire statu~ ~essage 1~ e-iterated on bu~ 3l4 onc- cvery ~uper~rame.

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The reiterative bitstream on line 440 feeds through serial-to-parallel converter 442 to latch 441, which provides up to eight bits on line 444, four each ~or inbound translator 438 and outbound tr~nslator 476.

Outbound data (speech and line 3ignals) on the bus 306 is strobed each timeslot into latch 420 by the bus-timed signal on line 413. Each speech byte thus latched feeds transl~tor RO~ 476, which translation iB determined by the ~our bit of line 444. The ROM i5 programmed to contain as many a~ 16 di~ferent 8-bit tran~lations, such ~ as ~-Law to A-Law, A-~aw to ~-Law, with or without ;~ selected level shifts, bit inversions, ADI or unchanged.
The output of ROM 476 feed~ parallel~to-serial converter 478 which in turn provides a continuou~ speech bitstream 15 to X-Point 428. The mi~roprocessor 400 sets up th~ paths in X-Point 428 to the spee~h bitstream on outbound speech line 480. For CEPT this is identity, but for DS-l/ESF
the timeslots are shifted to meet tha tran~ceiver tMH89760) device requirements.

~ Outbound line signals, 4-bits per subchannel, two :` subchannels per frame, are packed into timeslot 16 of the outbound data bus 306. During timeslot 16 o~ each frame, : latch 473 captures the contents of 8-bit latch 420, which is then made available to conventional ring shift ~ regi~ter 474 at the end of tlme~lot 31. During each : timeslot o~ sach frame, ring shift regi~ter 474 i~
clocked around on itself so that output on line 482 is bit-for-bit aligned wikh the X-Point 426 timeslots~and the output on line 490,half around the ring, appears aligned to a X-Point 426 time810t a~ "nibble-swapped".
In only the timeslots u~ed by~the particular transceiver model for line signals, the microprocessor 400 sets up X-Poin~ 426 for identity from ~he output of multiplexer 484 : 35 (which may be a 74LS157) to re~reshing the reiterative :,i~

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bitstream on line 486 and from the output of multiplexer 492 (which also may be a 74LS157) to refreshi~g the reiterative bitstream on line 488. The microprocessor 400 write~ reiterative instructions for the transceiver in other timeslots, such as frame alignment words and 05 transceiver control command ~ ultiplexers 484 and 492 mergQ line 4~2 and line 490 with the refreshing bitsteams on lines 486 and 488, respectively, to accomplish updating during one timeslot 0~ a ~rame. The selected æequence of timeslots is frame-dependent and transceiver model-dependent, and i3 such as to merge the line signal~ on lines 482 and 490 for their ~: respective subchannels into the exact timeslots requierd by the particular transceiver model. Multiplexer 494 selects appropxiately from the stgraight-through line signals of line 486 and the nibbl~-swapped line signals on line 488 to construct the outbound line signal stream on line 496 to the tran~cei~er A 422. ThQ di*ferences in DS-l/ESF and CEPT timing are accommodated by differences in programmable array logic in the timing circuitry. The transceiver A 422 thus is provided with the control, line signals and speech bitstreams to be able to transmit TX
PCM.

: 25 Control processor 308 uses the subchannel parameter message to control the preferre~ e~bodiment of the -present invention. During initialization, the interface receive~ and acknowledges one subchannel parameter massage for each of it~ subchannels, as described above;
any of these may ba updated at any time thereafter. A
-~ message in this category establishes all of the unique ;~ param ~ers of a specified subchannel, including all ~he : information required of the transceiver, the translation control information, and, of significance to this embodiment, the subchannel lodpback control information, , ' ~j r~
~ 18 ~ CE00371H

including the disposition of the PCM connectisn toward the distant office.
The translation information provided by a subschannel parameter message is used by the microprocessor 400 to write the required translations as the fir~t eight bits of a timeslot, one timeslot early (i.e,, for subchannel 1 in timeslot 0, etc.), in the reiterative bitstream on line 440 in X-Point 424.

The loopback information provided by a subchannel parameter message is sued to establish loopback conditions, including:
1. Normal, transceiver loopback, or inter~ace loopback.
2. If in transceiver loopback, the functional operation i8 as defined by the model of transceiver in use and the interface operation will otherwise be as described above.
3. I~ in interface loopback, the microprocessor 400 will establish paths and/or reiterative timeslots in X-Points 426 and 428 to accomplish the following:
a. The outbound line signal condition in the bitstream on line 496. This may be either the subchannel's line signal~ o~ the bitstream on line 432 or any permitted combination of the four line signal bi~s, which will be reiterated until loopback is removed.
b. The outbound speech condition in the bi~stream of line 480. This may be either the subchannel's speech o~ th~ bitsteam on lin~ 430 or "quiet line".
:: c. The inbound speech/data and line signal condition of a specified subchannel at bus 304 will be that received ~rom the switching network 302 on bus 306 on tha corresponding subchannel. ~he speech/data will be subject to the two tran~lations, first by ROM 476 and ~` then by RO~ 438.
, 35 ,:

'~

,. ., ", i . . , -- 13~ 7~g one category o~ control message transmitted to an interface i3 the group service message, used to remove the entire PCM group from service, or to attempt to restore it to service. This me~sage permits a number of options on the information presented toward the switching 05 network, including each of the following, always whle sending tha appropriate alarm condition toward the :~: distant end:
1. On hook quiet linel as provided by the transceiver 422 when it is removed ~rom service, as when it alarms due to defects in the RX PCM.
2. Looped back outbound data and line signals from bus 306 to inbound bus 304, subject to current translations, achieved by path connection manipulation in X-Points 426 and 428.
3. Looped back outbound data and line signals from bus 306 to inbound bus 304, ~ubject to current translations, achieved by execution in the transceiver 422.
4. Loopsd back outbound data and line signals from bug 306 to inbound bu~ 304, sub~ect to unchanged translations. This is achieved by path connection manipulation in X-Points 426 and 428, and manipula~ion of the reiterative tran~lation bitstream on line 440 by X-Point 424. When normal service is rastored, the previous translations will be restored. If the interface is placed in service while the transc~iver is in alarm due : to defects in RX PCM, a~ soon as the alarm condition is removed in the transceiver, the interface resumes normal : operation.
~: 30 In an alternative embodiment, the transceivers 421 and ~2 of Fig. 4 may be replaced by a single transceiv that operates in DS-lC pro~ocol at a~out 3.152 Mbps, .~ . appropriately interleaving the speech/data and line signal~ of two DS-l/ESF circuit~. In a further :, '``'` ' 13~7~J~
- 20 - CEOQ3~1H

versio~ o~ this alternative embodiment, the transceivers 421 and 422 o~ F~g. 4 may be replaced by a 3ingle transceiver that op~ra~es at 4.096 Mbps, combining ths speech/data and line signals of two CEPT circuits.

Re~errlng now to Flg. 5, two CEY~ ~or~at PCM
bit~tream~ ar~ $11ustratQd, outbound 501 and inbound 503.
A3 dsscrib~d pr~v~ou~ly, a loopback o~ a single ; ~ubchannel may be achieved in th~ pre~ent lnvention by selec~ing a ~inglo subchannel (A7) rrOm ~h~ outbound framQ 501 and replacing it with appropriat~ data blts (B) in ~h~ ~v~nth ubchann~l ti~e 510t. Tha data bits o~
~u~channal A7 ar~ subetitu~ed ~or th~ da~a bit~ of subchannel C7 Or the inbound data PCM bi~stream 503. C7 data bit~ may b~ di~card~d.
.
~ In sum~ary, then, a digital talephone exchange : having individual subchannel loopback with separate control o~ th~ outbound p~th has been shown and deacrib~d. Thi~ individual chann~l loopback i~ achieved by re~oving th~ data bits o~ a ~lected subchannel from ths PCM data 3tream e~anating fro~ the ~xchanga swi~ch . network. In th~ emptied ti~e310t, a generated ~eries of ;;l tast data bit~ ar~ inserted and transmitted, as part of the PCM dat~ 3tr~a~, to th~ distant office. Th~ inbound PCM data str~am fro~ the di~tant office ha~ the data bits ~rom a corr~3ponding 3ubchannel removed and th~ data bits : from th~ selscted outbound Yubchannsl in~Qrted in ~he e~ptied ti~310t. Th~ inte~ace can, for any combination o~ subchann~ls, loop back ou~boun~ spe~ch and/or line aignal~, whlls either ~ransmitting th~
outbound or looping back l~bound, ~peech and/or lin~
ignals, or providing ~ini~u~ disrup~iv~ ~tatus outbound.
Th~refor~, whllo a partlcular e~bodimont o~ the invention has be~n ~hown and da~crib-d, it ~hould be unders~ood 1 3 ~ g that the invention is not limited thereto since modifications unrelated to the true spirit and scope o~
the invention may be made by those skilled ln the art.
It is therefore contemplated to cover the present inv~ntion and any and all such modi~ications by the 05 claims of the present invention.
We claim:

; 20 :`

~ 30 :; ::

. -~ 35 '~ ~
:

:
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Claims (22)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A digital telephone exchange with individual subchannel loopback, comprising:
means for coupling serial outbound data comprising a first plurality of digital subchannels from a switching network to a distant office;
means for coupling serial inbound data comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network; and means for substituting at least one bit of a predetermined one of said first plurality of digital subchannels for at least one bit of one of said second plurality of digital subchannels in said serial inbound data while maintaining coupling of said means for coupling serial outbound data.

2. A digital telephone exchange in accordance with claim 1 wherein said means for coupling serial outbound data further comprises a pulse code modulated transceiver.

3. A digital telephone exchange in accordance with claim 1 wherein said means for coupling serial inbound data further comprises a pulse code modulated transceiver.

4. A digital telephone exchange in accordance with claim 1 wherein said means for substituting further comprises a digital symmetrical matrix switching circuit coupled to a serial to parallel converter.

5. A digital telephone exchange with individual subchannel loopback, comprising:
means for coupling serial outbound data comprising a first plurality of digital subchannels from a switching network to a distant office;
means for coupling serial inbound data comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network;
means for generating at least one first data bit independent of said serial outbound data and said serial inbound data:
means for substituting aid at least one first data bit for at least one second data bit of a predetermined digital subchannel of said first plurality of subchannels in said outbound data, and means for substituting said at least one second data bit for at least one third data bit of a predetermined digital subchannel of said second plurality of subchannels in said serial inbound data.

6. A digital telephone exchange in accordance with claim 5 wherein said means for substituting said at least one first data bit further comprises a digital symmetrical matrix switching circuit coupled to a serial to parallel converter.

7. A digital telephone exchange in accordance with claim 5 wherein said means for substituting said at least one second data bit further comprises a digital symmetrical matrix switching circuit coupled to a serial to parallel converter.

8. A digital telephone exchange with individual subchannel loopback, comprising:
means for coupling serial outbound data comprising a first plurality of digital subchannels form a switching network to a distant office;
means for coupling serial inbound data comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network;
means for substituting a predetermined one of said first plurality of digital subchannels for one of said second plurality of digital subchannels in said serial inbound data while maintaining coupling of said means for coupling serial outbound data;
means for substituting said one of said second plurality of digital subchannels for said predetermined one of said first plurality of digital subchannels in said serial outbound data while maintaining coupling of said means for coupling said inbound data.

9. A method of individual channel loopback for a digital telephone exchange, comprising the steps of:
coupling serial outbound data comprising a first plurality of digital subchannels from a switching network to a distant exchange;
coupling serial inbound data comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network; and substituting at least one bit of a predetermined one of said first plurality of digital subchannels for at least one bit of one of said second plurality of digital subchannels in said serial inbound data while maintaining coupling of said means for coupling serial outbound data.

10. A method of individual channel loopback for a digital telephone exchange, comprising the steps of:
coupling serial outbound data comprising a first plurality of digital subchannels from a switching network to a distant exchange;
coupling serial inbound data comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network generating at least one first data bit which is independent of said serial outbound data and said serial inbound data;
substituting said at least one first data bit for at least one second data bit of a predetermined digital subchannel of said first plurality of subchannels in said outbound data; and substituting said at least one second data bit for at least one third data bit of a predetermined digital subchannel of second plurality of subchannels in said serial inbound data.

11. A digital telephone exchange with self diagnostic individual subchannel loopback, comprising:
means for generating independent quiescent data bits;
means for substituting said quiescent data bit for first line signal data bits of a predetermined digital subchannel of an outbound pulse code modulated serial data bitstream to a distant office, further comprising:
(a) a parallel to serial converter and (b) a digital symmetrical matrix coupled to said parallel to serial converter; and means for substituting said first line signal data bits for second line signal data bits of a predetermined digital subchannel of an inbound pulse code modulated serial data bitstream from a distant office, further comprising:
(a) said digital symmetrical matrix and (b) a serial to parallel converter coupled to said digital symmetrical matrix.

12. A digital telephone exchange with self diagnostic individual subchannel loopback, comprising:
means for coupling a serial outbound pulse code modulated serial data bitstream comprising a first plurality of digital subchannels from a switching network to a distant office;
means for coupling a serial inbound pulse code modulated serial data bitstream comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network;
means for substituting at least one bit of a predetermined one of said first plurality of digital subchannels for at least one bit of one of said second plurality of digital subchannels while maintaining coupling of said means for coupling a serial outbound pulse code modulated serial data bitstream, further comprising:
(a) a parallel to serial converter and (b) a digital symmetrical matrix coupled to said parallel to serial converter; and means for substituting said at least one bit of one of said second plurality of digital subchannels for said at least one bit of predetermined one of said first plurality of digital subchannels while maintaining coupling of said means for coupling a serial inbound pulse coda modulated serial inbound data bitstream, further comprising:
(a) said digital symmetrical matrix and (b) a serial to parallel converter coupled to said digital symmetrical matrix.

13. A digital telephone exchange with self diagnostic individual subchannel loopback and control of outbound path, comprising:
means for coupling an outbound serial data bitstream comprising a first plurality of digital subchannels from a switching network to a distant office;
means for coupling an inbound serial data bitstream comprising a second plurality of digital subchannels unlike said first plurality of digital subchannels from said distant office to said switching network;
means for substituting one of said first plurality of digital subchannels for one of said second plurality of digital subchannels;
means for generating a predetermined series of data bits independent of said serial outbound data bitstream and said serial inbound data bitstream;
means for substituting said predetermined series of data bits for first line signal data bits of a second one of said first plurality of digital subchannels; and means for substituting said first line signal data bits for line signal second data bits of a second one of said second plurality of digital subchannels.

14. A digital telephone exchange in accordance with claim 13 further comprising means for substituting said one of said second plurality of digital subchannels for said one of said first plurality of digital subchannels.

15. A digital telephone exchange in accordance with claim 14 wherein said means for substituting said one of said second plurality of digital subchannels further comprises a digital symmetrical matrix and a parallel to serial converter coupled to said digital symmetrical matrix

16. A digital telephone exchange in accordance with claim 13 wherein said means for substituting one of said first plurality of digital subchannels further comprises a parallel to serial converter and a digital symmetrical matrix coupled to said parallel to serial converter.

17. A digital telephone exchange in accordance with claim 13 wherein said means for substituting said predetermined series of data bits further comprises a parallel to serial converter and a digital symmetrical matrix coupled to said parallel to serial converter

18. A digital telephone exchange in accordance with claim 13 wherein said means for substituting said first line signal data bits for second data bits further comprises a digital symmetrical matrix and a parallel to serial converter coupled to said digital symmetrical matrix.

19. A digital telephone exchange in accordance with claim 5 wherein said means for substituting said at least one first data bit further comprises means for maintaining coupling of said means for coupling serial outbound data during substitution of said at least one first data bit for said at least one second data bit.

20. A digital telephone exchange in accordance with claim 5 wherein said means for substituting said at least one second data bit further comprise means for maintaining coupling of said means for coupling serial inbound data during substitution of said at least one second data bit for said at least one third data bit.

21. A method in accordance with the method of claim 10 wherein said step of substituting said at least one first data bit further comprises the step of maintaining coupling of said serial outbound data during substitution of said at least one first data bit for said at least one second data bit.

22. A method in accordance with the method of claim 10 wherein said step of substituting said at least one second data bit further comprises the step of maintaining coupling of said serial inbound data during substitution of said at least one second data bit for said at least one third data bit.