CA2004258C - Tdma satellite communications system operating in wide and narrow aperture modes for receiving bursts of various timing deviations - Google Patents
Tdma satellite communications system operating in wide and narrow aperture modes for receiving bursts of various timing deviationsInfo
- Publication number
- CA2004258C CA2004258C CA002004258A CA2004258A CA2004258C CA 2004258 C CA2004258 C CA 2004258C CA 002004258 A CA002004258 A CA 002004258A CA 2004258 A CA2004258 A CA 2004258A CA 2004258 C CA2004258 C CA 2004258C
- Authority
- CA
- Canada
- Prior art keywords
- carrier
- unique word
- aperture
- signal
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/204—Multiple access
- H04B7/212—Time-division multiple access [TDMA]
- H04B7/2125—Synchronisation
Abstract
ABSTRACT OF THE DISCLOSURE
In a satellite communications system, a time slot assignment signal and a reference timing signal are transmitted from a central station to terminal stations to allow them to send bursts on assigned time slots and to establish the frame timing. In the central station, first and second self-resettable counters increment their respective binary counts at clock intervals and reset their counts to an initial value at time-slot intervals. A local timing signal is generated synchronously with the reference timing signal and delayed by an amount corresponding to a minimum round-trip propagation delay to reset the first counter. In an initial, wide aperture mode, the output of the first counter is used to generate control signals for recovering a carrier and clock and widely opening an aperture gate for detecting unique words of a burst that is affected by satellite drift. If a unique word is detected, the central station switches to a narrow aperture mode in which the output of the second counter is used instead to generate control signals for recovering the carrier and clock and narrowly opening the gate to reduce the possibility of detecting false unique words. In a preferred embodiment, the output of the second counter is stored in a memory in response to the detection of a unique word and an average value of the stored counts is derived to optimize the reset timing of the second counter.
In a satellite communications system, a time slot assignment signal and a reference timing signal are transmitted from a central station to terminal stations to allow them to send bursts on assigned time slots and to establish the frame timing. In the central station, first and second self-resettable counters increment their respective binary counts at clock intervals and reset their counts to an initial value at time-slot intervals. A local timing signal is generated synchronously with the reference timing signal and delayed by an amount corresponding to a minimum round-trip propagation delay to reset the first counter. In an initial, wide aperture mode, the output of the first counter is used to generate control signals for recovering a carrier and clock and widely opening an aperture gate for detecting unique words of a burst that is affected by satellite drift. If a unique word is detected, the central station switches to a narrow aperture mode in which the output of the second counter is used instead to generate control signals for recovering the carrier and clock and narrowly opening the gate to reduce the possibility of detecting false unique words. In a preferred embodiment, the output of the second counter is stored in a memory in response to the detection of a unique word and an average value of the stored counts is derived to optimize the reset timing of the second counter.
Description
``-` 2~4?.58 TITLE OF THE INVENTION
"TDMA Satellite Communications System Operating in Wide and Narrow Aperture Modes for Receiving Bursts of Various Timing Deviations"
BACKGROUND OF THE INVENTION
The present invention relates generally to time-division multiple access satellite communications systems, and more particularly to a technique to be employed by a central s~ation of the TDMA system to receive a burst from terminal stations with a large timing deviation resulting from a satellite drift in orbital position and subsequent bursts arriving at times deviating by small amounts due to variabilities of the operating parameters of the terminal stations.
In the central earth station of a TDMA satellite communications system, the demodulator includes a carrier and clock recovery circuit, which is required to accommodate variabilities between successive bursts received from different terminal stations in a short period of time. These variabilities include carrier frequency deviations, level deviatlons, clock deviations and burst timing deviations. Control signals are generated at time slot intervals for the carrier and clock recovery circuit, including a resetting signal for initializing . ~
the recovery circuit before the arrival of each burst, a gating ;~
pulse for detecting an unmodulated signal appended to the header of each burst, and an aperture gating pulse for unique word detection. Since the arrival of a first burst after the period of no bursts may differ significantly from the instant which can be ;~
expected from the reference timing of the central station due to a satellite drlft in orbital position, the timing at which the :;'. ~ "'.,,:, 2 2 ~ a ~ 71024~123 ~ ~
control signals are generated for the recovery circuit ~ust be corrected according to the deviation of tha round-trip propagation delay of the satellite communications system.
According to the technique currently employed in a satellite communications system, the central station sends a burst -~
to all terminal stations in a broadcast mode by containing in it a --~
time-slot assignment signal which assigns time slots to terminal -~
stations having a message to transmit and a reference timing ;~
signal to allow the sending stations to establish the frame timing. The central station is provided with a telemetry circuit which includes a demodulator to receive its own burst returning ~ ~-from the satellite during the broadcast mode, a timing circuit that extracts the timing signal from the received burst and a framing circuit to establish the frame timing. A counter is ~
provided which increments a binary count at clock intervals and `
resets it in response to the output of the framing circuit. The :-output of the counter is supplied to a control signal generator which generates control signals for application to the carrier and clock recovery circuit. Since the time slot position of the received burst offsets from the extracted timing signal by an amount corresponding to the satellite drift, the resetting of the counter is brought into correct timing relationship with the retuining burst.
However, the telemetry circuit requires a separate frequency converter and must be duplicated for system reliability.
Furthermore, the duplicated system requires protection switching circuitry, thus adding to the complexity and cost of the central station e~uipment.
: ~ :
2 ~ X ~ :
2a 71024-123 SUMHARY OF THE INVENTION
It is therefore an object of the present invention to provide a satellite communications system in which the central :.:
station corrects timing variations due to satellite drift without the need to receive its own burst , ~,, NE-236 2~a~2~8 , .
during the broadcast mode.
2 The central earth station of the present invention transmits a time slot3 assignment signal and a reference timing signal to the terminal stations via 4 a satellite channel to allow the terminal earth stations to send bursts on time S slots specified by the assignment slgnal and establish a timing reference for 6 timing the bursts. The central station includes a detector for detecting the 7 bursts from the terminal stations, a carrier and clock recovery circuit to 8 recover a carrier and clock pulses from the output of the detector, and a 9 unique word detector for detecting a unique word ~ontained in the detected 10 burst.
11 According to the present invention, the central earth station comprises12 a tirning circuit for synchronously generating a local timing signal with the 13 reference timing signal which is transmitted to the te~ninal stations, and a 14 delay circuit for introducing a delay to the local timing signal by an amount corresponding to the minimum round-trip propagation delay. In response 16 to the delayed local timing signal, the carrier and clock recovery circuit is 17 controlled to recover the carrier and clock pulses from a first arrived burst 18 and a wide aperture gating pulse is generated to detect an output signal 19 from the unique word detector in the presence of the wide aperture gating 2 0 pulse. In response to the output signal of the unique word detected during 21 the wide aperture gating pulse, the carrier and clock recovery circuit is 22 controlled to recover said carrier and clock pulses from a subsequent 2 3 incoming burst and a narrow aperture gating pulse is generated to detect an 2 4 output signal from the unique word detector in the presence of the narrow 2 5 aperture gating pulse.
2 6 Specifically, a first counter is provided for incrementing a first binary `' . ..~ .
::
, .~..q ~ ,.. , . . - . . .. ... . . ~ . . . . . . . ..
NE-236 2~042~8 count at clock intervals, automatically resetting the count to an initial value 2 at time-slot intervals, and further resetting the count in response to the 3 delayed local ffming signal. A first control signal generator is responsive to4 the first binary count for generating a first control signal for controlling the 5 carrier and clock recovery circuit and generating a wide aperture gating 6 pulse. A second counter increments a second binary count at clock intervals 7 and resets it to an initial value at the time-slot intervals. A second control8 signal generator is responsive to the second binary col~nt for generating a 9 second control signal for controlling the carrier and clock recovery circuit 10 and generating a narrow aperture gating pulse. An aperture gate is 11 connected to the output of the unique word detector for passing an output 12 signal therefrom to the second counter as an external reset pulse if the 13 output of unique word detector coincides with either a wide or narrow 14 aperture gating pulse supplied from a selector. The selector has a first 15 position which couples the first control signal to the carrier and clock 16 recovery circuit and the wide aperture gating pulse to the aperture gate and 17 a second position which couples the second control signal to the carrier and 18 clock recover,v circuit and the narrow aperture gating pulse to the aperture 19 gate. A control circuit initially causes the selector to switch to the first 2 0 position to operate the central station in a wide aperture mode and switches21 it to the second position in response to an output from the aperture gate for2 2 narrow aperture mode. When no output appears subsequently at the output 2 3 of the aperture gate, the control circuit switches the selector back to the first 2 4 position.
2 5 According to a modified form of the present invention, the central 26 station additionally includes a memory having a plurality of storage : : , , 2~a~
locations for storing the second binary count into one of the locations in response to each output of the aperture gate. A
unique word counter is provided for counting the output of the aperture gate to produce a count representing the number of unique words that occur during an aperture defined either by the wide or narrow aperture gating pulse. A comparator generates an equality pulse when the second binary count equals a reference value which is normally set at the maximum value of the second counter. An average value of the second binary counts stored in the locations of the memory is derived when the unique word representative count reaches a predetermined value and the reference value of the comparator is switched to the average value. Upon coincidence between the second binary count and the average value, the comparator produces an equality pulse which is applied to the second counter as a reset pulse. The selector, which is initially switched to the first position, is switched to the second position in response to the equality pulse.
A time slot counter may be provided for counting the aperture gating pulses supplied to the gate to produce a count representlng the number of tlme slots. The selector is switched back to the first position when the time slot representative count reaches a second predetermined value before the unique word , representative count reaches the first-mentioned predetermined value, the second predetermined value being greater than the first predetermined value In summary, according to one exemplary aspect of the invention, there is provided A satellite communications system having a central earth station and a plurality of terminal earth ~q ' .
.~.. ~ ..... . . . ~ . - . . . . . ...
6 2~2~8 71024 123 ~
stations establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal stations via the satellite channel to allow the terminal earth s~ations to send buxsts on time slots specified by the assignment signal and establish a ~iming reference for timing said bursts, the central station including burst detector means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, the central earth station comprising: timing means for generating a ;.
local timing signal synchronously with said reference timing signal; delay means for introducing a delay to the local timing .
signal by an amount corresponding to a minimum round-trip ; :.
propagation delay of the satellite communlcations system; first :
control means responsive to said delayed local timing signal for generating a first control signal to recover said carrier and :
clock pulses, and generating a wide aperture gating pulse; second control means responsive to a reset pulse applied thereto for ~ -generating a second control signal to recover said carrier and clock pulses, and generating a narrow aperture gating pulse; and aperture control means for initially applying said first control signal to said carrier and clock recovery circuit and allowing said second control means to respond to an output signal from the unique word detector as said reset pulse during the wide aperture ; :
` 2~2a8 :
6a 71024-123 gating pulse of first occurrence; applying the ~econd contr~l signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output .
signal during the narrow aperture gating pulse of first occurrence if a unique word is present during the wide aperture gating pulse of the first occurrence and continuously applying the second control signal to the carrier and clock recovery circuit and continuously allowing the second control means to respond to a unique word detector output signal as said reset pulse during the narrow aperture gating pulse of subsequent occurrence if a unique word is present during the narrow aperture gating pulse of the :
first occurrence; and applying the first control signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output signal as said reset pulse during the wide aperture gating pulse of subsequent occurrence if a unique word is not present during at least one of the narrow aperture gating pulses of successive occurrences.
According to another exemplary aspect, the invention ~:
provides a satellite communlcation system as claimed in claim 1, ~ .
wherein saId first control means comprises: first counter means for incrementing a binary count at clock intervals, said first counter means being resettable to an initial value at time-slot -intervals and further resettable to said initial value in response to the delayed timing signal; and first control signal generator .
means responsive to the binary count of the first counter means -for generating said first control signal for controlling said carrier and clock recovery circuit for recovering said carrier and ~ :-clock pulses and for generating a wide aperture gating pulse; :
,.
., ~ : :~
6b 2 ~ 8 71024-123 ;~
wherein said second control means comprises: second counter means for incrementing a binary count at clock intervals, said second counter means being resettable to an initial value at said time- ~;
slot intervals and further resettable to the initial value in response to said reset pulse; and second control signal generator means responsive to the binary count of the second counter means for generating said second control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said narrow aperture gating pulse;
wherein said aperture control means comprises: an aperture gate connected to the output of said unique word detector for applying an output signal from said unique word detector to said second counter means as said reset pulse in the presence of an aperture ~ ~ ;
gating pulse applied thereto; selector means having a first position for coupling said first control signal to said carrier and clock recovery circuit and coupling said wide aperture gating ~ :
pulse to said aperture gate and a second position for coupling ~ :
: , -- :.
said second control signal to said carrier and clock recovery circuit and coupling said narrow aperture gating pulse to said aperture gate; and control means for initially switching said selector means to said first position, switching the selector means to the second position in response to an output signaI from ~ -said aperture gate, and switching the selector means back to said ,: - :
first position when no unique word detector output signal appears . `~
subsequently at the output of said gate. ;~
According to yet another exemplary aspect, the invention provldes in a satellite communications system having a central earth station and a plurality of terminal earth stations :~
; ' ;. ,~
: ' ." ' ' " ':' '.
F~
:2 ~
6c 710~4-123 establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal sta~ions via the satellite channel to allow the terminal earth stations to send bursts on time slots specified by the assignment signal and establish a timing reference for ~ .
timing said bursts, the central station including burst detector ~ .
means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique :
word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, a method comprising the steps of: a) generating a local timing signal in ~ ~;
synchronism with said reference timing signal; b) introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system; c) applying a control signal to the carrier and clock recovery circuit in response to the delayed timing signal to recover ~aid carrier and clock pulses and detecting a unique word detector output signal through a wide-open window;
d) applying said control signal to the carrier and clock recovery circuit in response to the detection of a unique word by the step (c) to recover said carrier and clock pulses and searching for a unique word detector output signal through a narrow window; and e) repeating the step (c) if a unique word is not detected by the step (d) and repeating the step (d) if a unique word is detected by the step (d).
~.
' ' 6d 2 ~ ~ '12 ~ ~ 71024-123 ~:
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will be described in further detail with reference to the accompanying drawings, in which:
Figure 1 is a block diagram of a central earth station of a satellite communications system according to a first embodiment of the present invention;
Figure 2 is a timing diagram associated with the first emhodiment;
Figure 3 is a block diagram of a modified embodimen~ of the invention; ~ ;
Figure 4 is a block diagram of a further modification of ;~
the present invention and I Figure 5 is a flowchart describing the programmed steps performed by the control circuit of Figure 4.
DETAILED DESCRIPTION ;~
Referring now to Figure 1, there is shown a central :
earth station of a satellite communications system according to an embodiment of the present invention. The satellite communications system includes a plurality of remote terminal stations. The ~ ~
central station transmits burst signals to a satellite on a ~ -geosynchronous orbit which relays the signals from the central ,:
station to the terminal stations in a broadcast mode. The central "
station waits for burst signals sent via the satellite from the ' . ~ , .
terminal stations on a time-division multiple access mode.
The transmit section of the central s~ation includes a timing circuit 1, a multiplexer 2, a modulator 3 and a high frequency transmitter 4 cascaded to an earth station antenna systèm 5. Transmit data signals are time-division multiplexed by .
~ .
6e 2 ~ ~ 4 2 5 8 71024-12~
the multiplexer 2 with a reference timing signal and a slot assignment signal which are supplied from timing circuit 1 and the multiplexed signals are digitally modulated upon a carrier. After uplink-frequency translation and power amplification by transmitter 4, the signals are sent to the antenna system 5 for transmission to a satellite transponder. Upon receipt of the signal from the central station, terminal stations extract . .
'~ ~ ' ' " ' ' . . ' ' ' , . ; . .
NE-236 2 C~ O ~ ~ ~ 8 the reference timing signal from the received signal to establish the frame 2 timing and examines the slot assignment signal to determine to which time 3 slots they are assigned. If there is a message to transmit, a sending station 4 transmits it in burst form on a time slot specified by the assigr~nent signal.
A local timing signal is also generated by the timing circuit 1 6 synchronously with the transmitted reference timing signal and applied to a7 delay line 6 where it is delayed for an interval corresponding to the 8 minimum of all possible round-trip propagation delays of the satellite 9 communications system which will occur due to satellite drift in its position.
Self-resettable counters 8 and 17 are driven by a clock source 7 to 1 1 continuously increment their binary counts until they reach a predeterminedl 2 value, whereupon the count values are reset to zero to increment their l 3 counts. The interval between successive reset times of counters 8 and 17 1 4 corresponds to the duration of a time slot in which each of the terminal stations is allowed to send its message. Therefore, counters 8 and 17 recycle 16 their counts at time-slot intervals. Each of these counters is also initialized 17 by a reset signal supplied from externals sources. The delayed local timing18 signal from delay line 6 is the external reset signal of counter 8 so it 19 reinitiates incrementing its count from the instant which coincides with the arrival of a burst from a terminal station. The output of counter 8 is 2 l translated by a control signal generator 9 to generate control signals 2 2 necessary for the recovery of a carrier and clock timing and further generate 2 3 a wide aperture gating pulse for the detection of a unique word.
2 4 The incoming burst signal is detected by the antenna 5 and passed through a receiver 12 for amplification and frequency conversion to a 2 6 demodulator 13 which includes a coherent detection and threshold detection NE-236 20~25~
circuit 13a and a carrier and clock recovery circuit 13b. The control signals 2 from generator 9 are applied through the upper position of a selector 10 to3 the carrier and clock recovery circuit 13b to permit it to recover a replica of 4 the carrier employed in the terminal stations' modulators and clock pulses S for application to the coherent detection and thresho1d decision arcuit 13a.
6 The output of demodulator 13 is applied to a unique word detector 14 7 as well as to utilization circuitr,v, not shown. Unique word detector 14 8 produces an output when it detects a unique word contained in the preamble 9 of each burst following the carrier ant clock recovery sequence.
The wide aperture gating pulse from generator 9 has a duration l 1 sufficient to cover the maximum range of all possible variations of the 12 round-trip propagation delay which are expected in the satellite l 3 communications system and is applied through the upper position of a l 4 selector 11 to an aperture gate 15. If the output of the unique word detector l 5 14 occurs within the period of the wide aperture, it is passed to a switching l 6 controller 16 as well as to counter 17. As will ~e described, switching l 7 controller 16 operates the selectors 10 and 11 in response to the outputs of l 8 selector 11 and aperture gate 15.
l 9 The binary output of counter 17 is applied to a second control signal 2 0 generator 18 to generate control signals necessary for the recovery of the 2 l carrier and clock similar to the control signals generated by the first control 2 2 signal generator 9 and a narrow aperture gating pulse necessary for the 23 detection of unique words. The control signals from gener~tor 18 are 2 4 applied through the lower position of selector 10 to the carrier and clock 2 5 recovery circu* 13b in a manner similar to the control signals supplied from 2 6 the generator 9. I~e narrow aperture gffing pulse from generator 18 has a 2a~2~
9 7102~-123 duration which covers twice the guard time between successive bursts in order to accommodate their possible timing errors. The narrow aperture gating pulse is applied through the lower position of the selector 11 to the aperture gate 15.
The operation of the embodiment of Figure 1 will be better understood with reference to a timing diagram shown in :
Fiyure 2. If all terminal stations haYe no messages to transmit, unique word detector 14 produces no output, and hence, the ~ ~;
selectors 10 and 11 remain switched to their upper position.
Therefore, in response to each of the ~ocal timing signals generated by the timing circuit 1, the recovery-sequence control signals and wide aperture gating pulses are generated by the control signal generator 9 to be used for the recovery of carrier ~-~
and clock from a burst sent from a terminal station and for the detection of a unique word contained in that burst. Due to the -wide aperture gating pulse, the unique word of such a burst can be ;~
detected even though it has undergone a large timing deviation due to satellite drift. ;
If a burst 31-1 is transmitted from a terminal station :~ `:
in an asslgned time slot in response to a reference timing signal ¦ sent synchronously with a local timing pulse 30-1 from the central ~ ~
station, a unique word contained in that burst is detected by the ;~ -unique word detector 14. A unique-word detect pulse 33-1 appears at the output of unique word detector 14 and is passed through aperture gate 15 if it coincides with a wide aperture gating pulse 35-1, from generator 9. This gating pulse is generated in response to a local timing pulse 32-1 from delay circuit 6 which ~ ;
is delayed by an interval T corresponding to the minimum round-. ,.
"'. ., lo 2 ~ 2 ~ ~ 71024-123 trip propagation delay with respect to the local timing signal 30-1. The unique-word detect pulse 31-1 is applied as a reset pulse 38-1 to counter 17 as well as to switching controller 16. Counter 17 is thus conditioned to initiate incrementing its binary count from zero count value. Concurrently, carrier and timing recovery control signals 34-1 from genera~or 9 are supplied to the recovery circuit 13b through selector 10. Such control signals include a carrier window pulse for burst acquisition and a reset pulse for resetting phase-locked loops included in the carrier and clock recovery circuit 13b.
Switching controller 16 includes an edge detector 19, and flip-flops 20 and 21. Edge detector 19 is responsive to each edge transition of an aperture gating pulse supplied from either of the generators 9 and 18 to generate a pulse which resets the flip-flop 20, which has been set in response to the output of the aperture gate 15. The output of gate 15 is further applied to the set input of flip-flop 21, whose data input is connected to the output of flip-flop 20 and whose negative clock input is coupled ;
to the output of selector 11. The output of flip-flop 21 is connected to the control inputs of selectors 10 and 11.
In response to the reset pulse 38-1 from aperture gate 15, flip-flops 20 and 21 are set, establishing the leading edge of pul!ses 40-1 and 41-1, respectively. At the trailing edge of the wide aperture 35-1, edge detector 19 produces an edge-detect pulse 39-1 which resets flip-flop 20, defining the trailing edge of the ;~
pulse 40-1. Since the logic-1 from flip-flop 20 is still present at the data input of flip-flop 21 when pulse 39-1 appears at the negative clock input, the output of flip-flop 21 remains high.
"~
11 2~3~ 71024-123 Selectors 10 and 11 are, therefore~ switched to the lower position, coupling recovery-sequence control signals 36-1 ~' and a narrow aperture gating pulse 37-1 from the control signal generator 18 to the carrier and clock recovery circuit 13b and - :~
aperture gate 15 respectively. By the narrowing of the aperture gate 15, the probability of detecting false unique words is reduced for subsequent unique word detection. Thereafter, the demodulator operates in a narrow aperture mode in which it is not necessary to take into account the variations of the round-trip propagation delay. During this mode, the timing errors between successive incoming bursts are the only concern to be taken into consideration. However, the timing errors between successive ~
'. '~' ~.-': ;
bursts are much smaller than the timing variations due to the satellite drift in its position. -~
If there is no burst that immediately follows the first s~
burst 31-1 as illustrated in Figure 2, no unique-word detect pulse is produced and the data input of flip-flop 21 is low at the :~
trailing edge of the narrow aperture 37-1. Flip-flop 21 thus switches to loglc-0, defining the trailing edge of the selector swltching pulse 41-1. In this way, selectors 10 and 11 are -switched back to the upper position to use the outputs of control signal generator 9 in preparation to receive the next burst which is likely to have a wide range of propagation delay variations.
If a series of bursts as shown at 31-2, 31-3 and 31-4 are received in response to the transmission of the next timing signal 30-2, a series of events occur in response to burst 31-2 in a manner similar to those that occurred in response to burst 31- ;
1. Specifically, control signals 34-2 and a wide aperture 35-2 ' .' . '' 11a 2~ J 5 ~ 71024-123 are generated for detecting the unique word of burst 31-2 as a pulse 33-2 which is passed through aperture gate 15 as a pulse 38-2, setting the leading edge of pulses 40-2 and 41-2 at the outputs of flip-flops 20 and 21, narrowing the width of the aperture by a narrow aperture gating pulse 37-2 to reduce the likelihood of : .
false unique words being detected. An edge detector output 39-2 defines the trailing edge of the flip-flop 20 output 40-2 at the trailing edge of wide aperture 35-2.
:: . ..
,::
I
;~' ''~" '".~ ' . ,.
1 .
~. :. :- ~-.
=~
NE-236 200~2~8 Due to the presence of burst 31-3 which is spaced a guard time from 2 the preceding burst 31-2, the unique word of burst 31-3 is detected, 3 producing a pulse 33 3 which is passed through the narrowed aperture gate 4 15 as an output pulse 38-3 to define the leading edge of an output pulse 40-3 5 from flip-flop 20. Pulse 40-3 terminates in response to an edg~detect pulse 6 39-3 that is produced at the trailing edge of a narrow gating pulse 37-2. At 7 this trailing edge, the pulse 4~3 is still present at the data input of fli~flop 8 21 and the latter remains in the logic-1 state to continue operating the 9 demodulator in a narrow aperture mode. Therefore, the switching 0 controller 16 initially sets the selectors 10 and 11 to their upper position, l l switches them to the lower position in response to an output from aperture l 2 gate 15, and switches them back to the upper pos*ion depending on the l 3 timing of each of the wide and narrower aperture gating pulses if no output l 4 subsequently appears at the output of the gate 15.
l S Fig. 3 is a block diagram of a modified embodiment of the invention in l 6 which parts corresponding to those in Fig. 1 are marked with the same 17 numerals as used in Fig. 1. In this embodiment, the switching controller 16 l 8 of Fig. 1 is replaced with a switching controller 16A which comprises a time1 9 slot counter 22 and a flip-flop 23. Time slot counter 22 is reset in response to 2 0 the output of aperture gate 15 to start counting the output of selector 11 to 2 l produce an output when a predeterrnined count is reached. Since the 2 2 number of aperture gating pulses at the output of selector 11 represents the2 3 number of time slots, the appearance of an output from counter 22 indicates 2 4 that a predetermined number of time slots has been counted from the time it 2 5 is reset. The output of counter 22 is supplied to the reset input of fli~flop 23, 2 6 to the set input of which the output of aperture gate 15 is applied. The '~
-2~9~2~
output of flip-flop 23 thus switches to a logic-1 state if an output pulse from detector 14 is gated through gate 15 to flip-flop 23. The logic-1 output of flip-flop 23 causes the selectors 10 and 11 to be switched to the lower position so that the central station enters a narrow aperture mode. If unique words are not detected for a certain period of time due to the absence of incoming bursts, time slot counter 22 will produce an output, resetting the flip-flop 23. Selectors 10 and 11 are switched back to the upper posltion for a wide aperture mode of operation.
Figure 4 is a block diagram of a further embodiment of the present invention. In this embodiment, timing errors between ;~
successive incoming burst during narrow aperture modes are compensated for by deriving an average count corresponding to an average value of the guard times between successive bursts. In Figure 4, the output of counter 17 is coupled to a memory 50 having a plurality of latches to successively store the binary count value of counter 17 in response to a unique-word detect pulse from aperture gate 15. The output of selector 11 is applied to a time slot counter 52 to provide a count of aperture gating ~ ~ ;
pulses from either of the generators 9 and 18 to generate a signal representing the number of time slots, or bursts which the central station is expected to receive from the time the time slot counter ~ -. ' . ~
52 is reset. The output of aperture gate 15 is further applied to a unique word counter 51 which generates a signal indicative of the number of unique words detected from the time the counter 51 is reset. A control circuit 54 is provided to control the memory 50, time slot counter 52 and unigue word counter 51 to obtain data ;-- . . :- .
therefrom and control the selectors 10 and 11 in a manner as : ' :,., , ~
200~2~ :
described with reference to Figure 5. The output of counter 17 is further applied to a comparator 53 which compares it with a reference binary count supplied from the control circuit 54 to produce an equality pulse when coincidence occurs between them.
Control circuit 54 normally sets the reference count at the maximum value of the coun~er 17. The equality pulse is applied to the reset input of counter 17.
Control circuit 54 is a microprocessor-based controller which is pro~rammed as shown in Figure 5. The program execution starts with operations block 60 which directs the selecting of the -control signal generator 9 by switching the selectors 10 and 11 to the upper position. Control exits to operations block 61 which ~ -directs the resetting of memory 50 and counters 51 and 52, so that all latches of the memory 50 are cleared and the counters 51 and 52 are initialized to zero. In addition, the reference count -~
supplied to comparator 53 is reset to the maximum value K of -counter 17. ~xit then is to decision block 62 which checks to see if there is a pulse appearing at the output of aperture gate 15.
I the answer is negative in decision block 62, control moves ~.
ahead to decision block 64 to check to see if the count provided by time slot counter 52 is equal to M or not. If the answer is negative in block 64, control returns to block 62, and if it is affirmative, control returns to block 60.
If the answer is affirmative in decision block 62, ;
control advances to decision block 63 to check to see if the unique word count provided by counter 51 is equal to N which is ~ -~
smaller than M. If the answer is negative in block 63, control goes to decision block 64 to determine if the time slot count is 2 ~
equal to M. Thereforer if M time slots are counted by counter 52 before N unique words are detected while operating in a wide aperture mode, blocks 60 and 61 are executed again to select the ~ ~ -generator 9 to coniinue the wide aperture mode and re-set the memory 50 and counters 51 and 52.
If N unique words are detected before M time slots are counted during a wide aperture mode, an affirmative decision is made in block 63 and control proceeds to operations block 65 to read the contents of memory 50 which are latched successively therein in response to the detections of the N unique words and calculates the average value of the N binary counts of counter 17 .,:: : : :-. ::
which has been operating in a free-running mode. Since the guard times between successive incoming bursts tend to vary due to the variabilities of the operating parameters of the sending terminal `~
stations, the binary counts attained by counter 17 at the instants a unique word is detected represent the deviations from the instant at which the counter 17 must be reset. Thus, the average ;
value of the binaxy counts represents an average of the timing deviations of counter 17 from the reset instant which is optimum fcr receiving subsequent incoming bursts.
Control then proceeds to operations block 66 which directs the setting of the average value obtained by the step 65 ~ -as a reference value of comparator 53. If the current output of counter 17 is equal to the average count at the reference input of comparator 53, an equality pulse will be produced by comparator 53 without delay and resets the counter 17 immediately. If the current value of counter 17 is smaller than the average by two countsr for example, the timing of counter 17 will be delayed by ,,,~
~ '`' ',`.' lSa 2~4~8 71024-123 two counts, and if it is larger than the average by the same amount, the timing of counter 17 will be delayed by (K-2) counts, i.e., advanced by two counts.
Exit then is to decision block 67 which tests whether an equality pulse is produced by comparator 53. When this pulse is generated, control proceeds to operations block 68 to select the generator 18 by switching the selectors 10 and 11 to the lower position. Control now returns to block 50 to reset the : ~
':
- 16 - ~ 0 ~ 8 ~ ~
memoly 50, counters 51, 52 and reset the comparator's reference count to the 2 maximum value K
3 Thereafter, the demodulator operates with a narrow aperture mode.
4 Since counter 17 is synchronized precisely with the timing of the average s value of guard ffmes between successive incoming bursts, the unique words ;
6 of the subsequent incoming bursts will be correctly gated through the 7 narrowed aperture gate 15. If (N-1) unique words are subsequently detected ;
8 by the narrowed aperture gate 15, control will loop through blocks 62, 63 and 9 64 and counter 17 is reset at the maximum value K Therefore, the timing of counter 17 is corrected at every N incoming bursts to the average value of 1 1 guard times between such incoming burst.
1 2 If, during the narrow aperture mode, the number of time slots becomes 1 3 equal to M before N unique words are detected due to disruption or loss of 14 incoming bursts, control exits from the loop of blocks 62, 63 and 64 and ~ ~ -1 5 returns to block 60 to switch the selectors 10 and 11 to the upper position and 16 so the demodulator operates in a wide aperture, or initial mode again for 17 receiving a burst which may be affected by a large satellite drift in its 18 position.
19 The foregoing description shows only preferred embodiments of the 2 0 present invention. Various modifications are apparent to those skilled in the 2 l art without departing from the scope of the present invention which is only2 2 limited by the appended claims. Therefore, the embodiments shown and ............ ................................................................................. ... ... ... ...
... --. ~ .
2 3 described are only illustrative, not restrictive.
, .
, ~:
, ~ ~
"TDMA Satellite Communications System Operating in Wide and Narrow Aperture Modes for Receiving Bursts of Various Timing Deviations"
BACKGROUND OF THE INVENTION
The present invention relates generally to time-division multiple access satellite communications systems, and more particularly to a technique to be employed by a central s~ation of the TDMA system to receive a burst from terminal stations with a large timing deviation resulting from a satellite drift in orbital position and subsequent bursts arriving at times deviating by small amounts due to variabilities of the operating parameters of the terminal stations.
In the central earth station of a TDMA satellite communications system, the demodulator includes a carrier and clock recovery circuit, which is required to accommodate variabilities between successive bursts received from different terminal stations in a short period of time. These variabilities include carrier frequency deviations, level deviatlons, clock deviations and burst timing deviations. Control signals are generated at time slot intervals for the carrier and clock recovery circuit, including a resetting signal for initializing . ~
the recovery circuit before the arrival of each burst, a gating ;~
pulse for detecting an unmodulated signal appended to the header of each burst, and an aperture gating pulse for unique word detection. Since the arrival of a first burst after the period of no bursts may differ significantly from the instant which can be ;~
expected from the reference timing of the central station due to a satellite drlft in orbital position, the timing at which the :;'. ~ "'.,,:, 2 2 ~ a ~ 71024~123 ~ ~
control signals are generated for the recovery circuit ~ust be corrected according to the deviation of tha round-trip propagation delay of the satellite communications system.
According to the technique currently employed in a satellite communications system, the central station sends a burst -~
to all terminal stations in a broadcast mode by containing in it a --~
time-slot assignment signal which assigns time slots to terminal -~
stations having a message to transmit and a reference timing ;~
signal to allow the sending stations to establish the frame timing. The central station is provided with a telemetry circuit which includes a demodulator to receive its own burst returning ~ ~-from the satellite during the broadcast mode, a timing circuit that extracts the timing signal from the received burst and a framing circuit to establish the frame timing. A counter is ~
provided which increments a binary count at clock intervals and `
resets it in response to the output of the framing circuit. The :-output of the counter is supplied to a control signal generator which generates control signals for application to the carrier and clock recovery circuit. Since the time slot position of the received burst offsets from the extracted timing signal by an amount corresponding to the satellite drift, the resetting of the counter is brought into correct timing relationship with the retuining burst.
However, the telemetry circuit requires a separate frequency converter and must be duplicated for system reliability.
Furthermore, the duplicated system requires protection switching circuitry, thus adding to the complexity and cost of the central station e~uipment.
: ~ :
2 ~ X ~ :
2a 71024-123 SUMHARY OF THE INVENTION
It is therefore an object of the present invention to provide a satellite communications system in which the central :.:
station corrects timing variations due to satellite drift without the need to receive its own burst , ~,, NE-236 2~a~2~8 , .
during the broadcast mode.
2 The central earth station of the present invention transmits a time slot3 assignment signal and a reference timing signal to the terminal stations via 4 a satellite channel to allow the terminal earth stations to send bursts on time S slots specified by the assignment slgnal and establish a timing reference for 6 timing the bursts. The central station includes a detector for detecting the 7 bursts from the terminal stations, a carrier and clock recovery circuit to 8 recover a carrier and clock pulses from the output of the detector, and a 9 unique word detector for detecting a unique word ~ontained in the detected 10 burst.
11 According to the present invention, the central earth station comprises12 a tirning circuit for synchronously generating a local timing signal with the 13 reference timing signal which is transmitted to the te~ninal stations, and a 14 delay circuit for introducing a delay to the local timing signal by an amount corresponding to the minimum round-trip propagation delay. In response 16 to the delayed local timing signal, the carrier and clock recovery circuit is 17 controlled to recover the carrier and clock pulses from a first arrived burst 18 and a wide aperture gating pulse is generated to detect an output signal 19 from the unique word detector in the presence of the wide aperture gating 2 0 pulse. In response to the output signal of the unique word detected during 21 the wide aperture gating pulse, the carrier and clock recovery circuit is 22 controlled to recover said carrier and clock pulses from a subsequent 2 3 incoming burst and a narrow aperture gating pulse is generated to detect an 2 4 output signal from the unique word detector in the presence of the narrow 2 5 aperture gating pulse.
2 6 Specifically, a first counter is provided for incrementing a first binary `' . ..~ .
::
, .~..q ~ ,.. , . . - . . .. ... . . ~ . . . . . . . ..
NE-236 2~042~8 count at clock intervals, automatically resetting the count to an initial value 2 at time-slot intervals, and further resetting the count in response to the 3 delayed local ffming signal. A first control signal generator is responsive to4 the first binary count for generating a first control signal for controlling the 5 carrier and clock recovery circuit and generating a wide aperture gating 6 pulse. A second counter increments a second binary count at clock intervals 7 and resets it to an initial value at the time-slot intervals. A second control8 signal generator is responsive to the second binary col~nt for generating a 9 second control signal for controlling the carrier and clock recovery circuit 10 and generating a narrow aperture gating pulse. An aperture gate is 11 connected to the output of the unique word detector for passing an output 12 signal therefrom to the second counter as an external reset pulse if the 13 output of unique word detector coincides with either a wide or narrow 14 aperture gating pulse supplied from a selector. The selector has a first 15 position which couples the first control signal to the carrier and clock 16 recovery circuit and the wide aperture gating pulse to the aperture gate and 17 a second position which couples the second control signal to the carrier and 18 clock recover,v circuit and the narrow aperture gating pulse to the aperture 19 gate. A control circuit initially causes the selector to switch to the first 2 0 position to operate the central station in a wide aperture mode and switches21 it to the second position in response to an output from the aperture gate for2 2 narrow aperture mode. When no output appears subsequently at the output 2 3 of the aperture gate, the control circuit switches the selector back to the first 2 4 position.
2 5 According to a modified form of the present invention, the central 26 station additionally includes a memory having a plurality of storage : : , , 2~a~
locations for storing the second binary count into one of the locations in response to each output of the aperture gate. A
unique word counter is provided for counting the output of the aperture gate to produce a count representing the number of unique words that occur during an aperture defined either by the wide or narrow aperture gating pulse. A comparator generates an equality pulse when the second binary count equals a reference value which is normally set at the maximum value of the second counter. An average value of the second binary counts stored in the locations of the memory is derived when the unique word representative count reaches a predetermined value and the reference value of the comparator is switched to the average value. Upon coincidence between the second binary count and the average value, the comparator produces an equality pulse which is applied to the second counter as a reset pulse. The selector, which is initially switched to the first position, is switched to the second position in response to the equality pulse.
A time slot counter may be provided for counting the aperture gating pulses supplied to the gate to produce a count representlng the number of tlme slots. The selector is switched back to the first position when the time slot representative count reaches a second predetermined value before the unique word , representative count reaches the first-mentioned predetermined value, the second predetermined value being greater than the first predetermined value In summary, according to one exemplary aspect of the invention, there is provided A satellite communications system having a central earth station and a plurality of terminal earth ~q ' .
.~.. ~ ..... . . . ~ . - . . . . . ...
6 2~2~8 71024 123 ~
stations establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal stations via the satellite channel to allow the terminal earth s~ations to send buxsts on time slots specified by the assignment signal and establish a ~iming reference for timing said bursts, the central station including burst detector means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, the central earth station comprising: timing means for generating a ;.
local timing signal synchronously with said reference timing signal; delay means for introducing a delay to the local timing .
signal by an amount corresponding to a minimum round-trip ; :.
propagation delay of the satellite communlcations system; first :
control means responsive to said delayed local timing signal for generating a first control signal to recover said carrier and :
clock pulses, and generating a wide aperture gating pulse; second control means responsive to a reset pulse applied thereto for ~ -generating a second control signal to recover said carrier and clock pulses, and generating a narrow aperture gating pulse; and aperture control means for initially applying said first control signal to said carrier and clock recovery circuit and allowing said second control means to respond to an output signal from the unique word detector as said reset pulse during the wide aperture ; :
` 2~2a8 :
6a 71024-123 gating pulse of first occurrence; applying the ~econd contr~l signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output .
signal during the narrow aperture gating pulse of first occurrence if a unique word is present during the wide aperture gating pulse of the first occurrence and continuously applying the second control signal to the carrier and clock recovery circuit and continuously allowing the second control means to respond to a unique word detector output signal as said reset pulse during the narrow aperture gating pulse of subsequent occurrence if a unique word is present during the narrow aperture gating pulse of the :
first occurrence; and applying the first control signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output signal as said reset pulse during the wide aperture gating pulse of subsequent occurrence if a unique word is not present during at least one of the narrow aperture gating pulses of successive occurrences.
According to another exemplary aspect, the invention ~:
provides a satellite communlcation system as claimed in claim 1, ~ .
wherein saId first control means comprises: first counter means for incrementing a binary count at clock intervals, said first counter means being resettable to an initial value at time-slot -intervals and further resettable to said initial value in response to the delayed timing signal; and first control signal generator .
means responsive to the binary count of the first counter means -for generating said first control signal for controlling said carrier and clock recovery circuit for recovering said carrier and ~ :-clock pulses and for generating a wide aperture gating pulse; :
,.
., ~ : :~
6b 2 ~ 8 71024-123 ;~
wherein said second control means comprises: second counter means for incrementing a binary count at clock intervals, said second counter means being resettable to an initial value at said time- ~;
slot intervals and further resettable to the initial value in response to said reset pulse; and second control signal generator means responsive to the binary count of the second counter means for generating said second control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said narrow aperture gating pulse;
wherein said aperture control means comprises: an aperture gate connected to the output of said unique word detector for applying an output signal from said unique word detector to said second counter means as said reset pulse in the presence of an aperture ~ ~ ;
gating pulse applied thereto; selector means having a first position for coupling said first control signal to said carrier and clock recovery circuit and coupling said wide aperture gating ~ :
pulse to said aperture gate and a second position for coupling ~ :
: , -- :.
said second control signal to said carrier and clock recovery circuit and coupling said narrow aperture gating pulse to said aperture gate; and control means for initially switching said selector means to said first position, switching the selector means to the second position in response to an output signaI from ~ -said aperture gate, and switching the selector means back to said ,: - :
first position when no unique word detector output signal appears . `~
subsequently at the output of said gate. ;~
According to yet another exemplary aspect, the invention provldes in a satellite communications system having a central earth station and a plurality of terminal earth stations :~
; ' ;. ,~
: ' ." ' ' " ':' '.
F~
:2 ~
6c 710~4-123 establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal sta~ions via the satellite channel to allow the terminal earth stations to send bursts on time slots specified by the assignment signal and establish a timing reference for ~ .
timing said bursts, the central station including burst detector ~ .
means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique :
word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, a method comprising the steps of: a) generating a local timing signal in ~ ~;
synchronism with said reference timing signal; b) introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system; c) applying a control signal to the carrier and clock recovery circuit in response to the delayed timing signal to recover ~aid carrier and clock pulses and detecting a unique word detector output signal through a wide-open window;
d) applying said control signal to the carrier and clock recovery circuit in response to the detection of a unique word by the step (c) to recover said carrier and clock pulses and searching for a unique word detector output signal through a narrow window; and e) repeating the step (c) if a unique word is not detected by the step (d) and repeating the step (d) if a unique word is detected by the step (d).
~.
' ' 6d 2 ~ ~ '12 ~ ~ 71024-123 ~:
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will be described in further detail with reference to the accompanying drawings, in which:
Figure 1 is a block diagram of a central earth station of a satellite communications system according to a first embodiment of the present invention;
Figure 2 is a timing diagram associated with the first emhodiment;
Figure 3 is a block diagram of a modified embodimen~ of the invention; ~ ;
Figure 4 is a block diagram of a further modification of ;~
the present invention and I Figure 5 is a flowchart describing the programmed steps performed by the control circuit of Figure 4.
DETAILED DESCRIPTION ;~
Referring now to Figure 1, there is shown a central :
earth station of a satellite communications system according to an embodiment of the present invention. The satellite communications system includes a plurality of remote terminal stations. The ~ ~
central station transmits burst signals to a satellite on a ~ -geosynchronous orbit which relays the signals from the central ,:
station to the terminal stations in a broadcast mode. The central "
station waits for burst signals sent via the satellite from the ' . ~ , .
terminal stations on a time-division multiple access mode.
The transmit section of the central s~ation includes a timing circuit 1, a multiplexer 2, a modulator 3 and a high frequency transmitter 4 cascaded to an earth station antenna systèm 5. Transmit data signals are time-division multiplexed by .
~ .
6e 2 ~ ~ 4 2 5 8 71024-12~
the multiplexer 2 with a reference timing signal and a slot assignment signal which are supplied from timing circuit 1 and the multiplexed signals are digitally modulated upon a carrier. After uplink-frequency translation and power amplification by transmitter 4, the signals are sent to the antenna system 5 for transmission to a satellite transponder. Upon receipt of the signal from the central station, terminal stations extract . .
'~ ~ ' ' " ' ' . . ' ' ' , . ; . .
NE-236 2 C~ O ~ ~ ~ 8 the reference timing signal from the received signal to establish the frame 2 timing and examines the slot assignment signal to determine to which time 3 slots they are assigned. If there is a message to transmit, a sending station 4 transmits it in burst form on a time slot specified by the assigr~nent signal.
A local timing signal is also generated by the timing circuit 1 6 synchronously with the transmitted reference timing signal and applied to a7 delay line 6 where it is delayed for an interval corresponding to the 8 minimum of all possible round-trip propagation delays of the satellite 9 communications system which will occur due to satellite drift in its position.
Self-resettable counters 8 and 17 are driven by a clock source 7 to 1 1 continuously increment their binary counts until they reach a predeterminedl 2 value, whereupon the count values are reset to zero to increment their l 3 counts. The interval between successive reset times of counters 8 and 17 1 4 corresponds to the duration of a time slot in which each of the terminal stations is allowed to send its message. Therefore, counters 8 and 17 recycle 16 their counts at time-slot intervals. Each of these counters is also initialized 17 by a reset signal supplied from externals sources. The delayed local timing18 signal from delay line 6 is the external reset signal of counter 8 so it 19 reinitiates incrementing its count from the instant which coincides with the arrival of a burst from a terminal station. The output of counter 8 is 2 l translated by a control signal generator 9 to generate control signals 2 2 necessary for the recovery of a carrier and clock timing and further generate 2 3 a wide aperture gating pulse for the detection of a unique word.
2 4 The incoming burst signal is detected by the antenna 5 and passed through a receiver 12 for amplification and frequency conversion to a 2 6 demodulator 13 which includes a coherent detection and threshold detection NE-236 20~25~
circuit 13a and a carrier and clock recovery circuit 13b. The control signals 2 from generator 9 are applied through the upper position of a selector 10 to3 the carrier and clock recovery circuit 13b to permit it to recover a replica of 4 the carrier employed in the terminal stations' modulators and clock pulses S for application to the coherent detection and thresho1d decision arcuit 13a.
6 The output of demodulator 13 is applied to a unique word detector 14 7 as well as to utilization circuitr,v, not shown. Unique word detector 14 8 produces an output when it detects a unique word contained in the preamble 9 of each burst following the carrier ant clock recovery sequence.
The wide aperture gating pulse from generator 9 has a duration l 1 sufficient to cover the maximum range of all possible variations of the 12 round-trip propagation delay which are expected in the satellite l 3 communications system and is applied through the upper position of a l 4 selector 11 to an aperture gate 15. If the output of the unique word detector l 5 14 occurs within the period of the wide aperture, it is passed to a switching l 6 controller 16 as well as to counter 17. As will ~e described, switching l 7 controller 16 operates the selectors 10 and 11 in response to the outputs of l 8 selector 11 and aperture gate 15.
l 9 The binary output of counter 17 is applied to a second control signal 2 0 generator 18 to generate control signals necessary for the recovery of the 2 l carrier and clock similar to the control signals generated by the first control 2 2 signal generator 9 and a narrow aperture gating pulse necessary for the 23 detection of unique words. The control signals from gener~tor 18 are 2 4 applied through the lower position of selector 10 to the carrier and clock 2 5 recovery circu* 13b in a manner similar to the control signals supplied from 2 6 the generator 9. I~e narrow aperture gffing pulse from generator 18 has a 2a~2~
9 7102~-123 duration which covers twice the guard time between successive bursts in order to accommodate their possible timing errors. The narrow aperture gating pulse is applied through the lower position of the selector 11 to the aperture gate 15.
The operation of the embodiment of Figure 1 will be better understood with reference to a timing diagram shown in :
Fiyure 2. If all terminal stations haYe no messages to transmit, unique word detector 14 produces no output, and hence, the ~ ~;
selectors 10 and 11 remain switched to their upper position.
Therefore, in response to each of the ~ocal timing signals generated by the timing circuit 1, the recovery-sequence control signals and wide aperture gating pulses are generated by the control signal generator 9 to be used for the recovery of carrier ~-~
and clock from a burst sent from a terminal station and for the detection of a unique word contained in that burst. Due to the -wide aperture gating pulse, the unique word of such a burst can be ;~
detected even though it has undergone a large timing deviation due to satellite drift. ;
If a burst 31-1 is transmitted from a terminal station :~ `:
in an asslgned time slot in response to a reference timing signal ¦ sent synchronously with a local timing pulse 30-1 from the central ~ ~
station, a unique word contained in that burst is detected by the ;~ -unique word detector 14. A unique-word detect pulse 33-1 appears at the output of unique word detector 14 and is passed through aperture gate 15 if it coincides with a wide aperture gating pulse 35-1, from generator 9. This gating pulse is generated in response to a local timing pulse 32-1 from delay circuit 6 which ~ ;
is delayed by an interval T corresponding to the minimum round-. ,.
"'. ., lo 2 ~ 2 ~ ~ 71024-123 trip propagation delay with respect to the local timing signal 30-1. The unique-word detect pulse 31-1 is applied as a reset pulse 38-1 to counter 17 as well as to switching controller 16. Counter 17 is thus conditioned to initiate incrementing its binary count from zero count value. Concurrently, carrier and timing recovery control signals 34-1 from genera~or 9 are supplied to the recovery circuit 13b through selector 10. Such control signals include a carrier window pulse for burst acquisition and a reset pulse for resetting phase-locked loops included in the carrier and clock recovery circuit 13b.
Switching controller 16 includes an edge detector 19, and flip-flops 20 and 21. Edge detector 19 is responsive to each edge transition of an aperture gating pulse supplied from either of the generators 9 and 18 to generate a pulse which resets the flip-flop 20, which has been set in response to the output of the aperture gate 15. The output of gate 15 is further applied to the set input of flip-flop 21, whose data input is connected to the output of flip-flop 20 and whose negative clock input is coupled ;
to the output of selector 11. The output of flip-flop 21 is connected to the control inputs of selectors 10 and 11.
In response to the reset pulse 38-1 from aperture gate 15, flip-flops 20 and 21 are set, establishing the leading edge of pul!ses 40-1 and 41-1, respectively. At the trailing edge of the wide aperture 35-1, edge detector 19 produces an edge-detect pulse 39-1 which resets flip-flop 20, defining the trailing edge of the ;~
pulse 40-1. Since the logic-1 from flip-flop 20 is still present at the data input of flip-flop 21 when pulse 39-1 appears at the negative clock input, the output of flip-flop 21 remains high.
"~
11 2~3~ 71024-123 Selectors 10 and 11 are, therefore~ switched to the lower position, coupling recovery-sequence control signals 36-1 ~' and a narrow aperture gating pulse 37-1 from the control signal generator 18 to the carrier and clock recovery circuit 13b and - :~
aperture gate 15 respectively. By the narrowing of the aperture gate 15, the probability of detecting false unique words is reduced for subsequent unique word detection. Thereafter, the demodulator operates in a narrow aperture mode in which it is not necessary to take into account the variations of the round-trip propagation delay. During this mode, the timing errors between successive incoming bursts are the only concern to be taken into consideration. However, the timing errors between successive ~
'. '~' ~.-': ;
bursts are much smaller than the timing variations due to the satellite drift in its position. -~
If there is no burst that immediately follows the first s~
burst 31-1 as illustrated in Figure 2, no unique-word detect pulse is produced and the data input of flip-flop 21 is low at the :~
trailing edge of the narrow aperture 37-1. Flip-flop 21 thus switches to loglc-0, defining the trailing edge of the selector swltching pulse 41-1. In this way, selectors 10 and 11 are -switched back to the upper position to use the outputs of control signal generator 9 in preparation to receive the next burst which is likely to have a wide range of propagation delay variations.
If a series of bursts as shown at 31-2, 31-3 and 31-4 are received in response to the transmission of the next timing signal 30-2, a series of events occur in response to burst 31-2 in a manner similar to those that occurred in response to burst 31- ;
1. Specifically, control signals 34-2 and a wide aperture 35-2 ' .' . '' 11a 2~ J 5 ~ 71024-123 are generated for detecting the unique word of burst 31-2 as a pulse 33-2 which is passed through aperture gate 15 as a pulse 38-2, setting the leading edge of pulses 40-2 and 41-2 at the outputs of flip-flops 20 and 21, narrowing the width of the aperture by a narrow aperture gating pulse 37-2 to reduce the likelihood of : .
false unique words being detected. An edge detector output 39-2 defines the trailing edge of the flip-flop 20 output 40-2 at the trailing edge of wide aperture 35-2.
:: . ..
,::
I
;~' ''~" '".~ ' . ,.
1 .
~. :. :- ~-.
=~
NE-236 200~2~8 Due to the presence of burst 31-3 which is spaced a guard time from 2 the preceding burst 31-2, the unique word of burst 31-3 is detected, 3 producing a pulse 33 3 which is passed through the narrowed aperture gate 4 15 as an output pulse 38-3 to define the leading edge of an output pulse 40-3 5 from flip-flop 20. Pulse 40-3 terminates in response to an edg~detect pulse 6 39-3 that is produced at the trailing edge of a narrow gating pulse 37-2. At 7 this trailing edge, the pulse 4~3 is still present at the data input of fli~flop 8 21 and the latter remains in the logic-1 state to continue operating the 9 demodulator in a narrow aperture mode. Therefore, the switching 0 controller 16 initially sets the selectors 10 and 11 to their upper position, l l switches them to the lower position in response to an output from aperture l 2 gate 15, and switches them back to the upper pos*ion depending on the l 3 timing of each of the wide and narrower aperture gating pulses if no output l 4 subsequently appears at the output of the gate 15.
l S Fig. 3 is a block diagram of a modified embodiment of the invention in l 6 which parts corresponding to those in Fig. 1 are marked with the same 17 numerals as used in Fig. 1. In this embodiment, the switching controller 16 l 8 of Fig. 1 is replaced with a switching controller 16A which comprises a time1 9 slot counter 22 and a flip-flop 23. Time slot counter 22 is reset in response to 2 0 the output of aperture gate 15 to start counting the output of selector 11 to 2 l produce an output when a predeterrnined count is reached. Since the 2 2 number of aperture gating pulses at the output of selector 11 represents the2 3 number of time slots, the appearance of an output from counter 22 indicates 2 4 that a predetermined number of time slots has been counted from the time it 2 5 is reset. The output of counter 22 is supplied to the reset input of fli~flop 23, 2 6 to the set input of which the output of aperture gate 15 is applied. The '~
-2~9~2~
output of flip-flop 23 thus switches to a logic-1 state if an output pulse from detector 14 is gated through gate 15 to flip-flop 23. The logic-1 output of flip-flop 23 causes the selectors 10 and 11 to be switched to the lower position so that the central station enters a narrow aperture mode. If unique words are not detected for a certain period of time due to the absence of incoming bursts, time slot counter 22 will produce an output, resetting the flip-flop 23. Selectors 10 and 11 are switched back to the upper posltion for a wide aperture mode of operation.
Figure 4 is a block diagram of a further embodiment of the present invention. In this embodiment, timing errors between ;~
successive incoming burst during narrow aperture modes are compensated for by deriving an average count corresponding to an average value of the guard times between successive bursts. In Figure 4, the output of counter 17 is coupled to a memory 50 having a plurality of latches to successively store the binary count value of counter 17 in response to a unique-word detect pulse from aperture gate 15. The output of selector 11 is applied to a time slot counter 52 to provide a count of aperture gating ~ ~ ;
pulses from either of the generators 9 and 18 to generate a signal representing the number of time slots, or bursts which the central station is expected to receive from the time the time slot counter ~ -. ' . ~
52 is reset. The output of aperture gate 15 is further applied to a unique word counter 51 which generates a signal indicative of the number of unique words detected from the time the counter 51 is reset. A control circuit 54 is provided to control the memory 50, time slot counter 52 and unigue word counter 51 to obtain data ;-- . . :- .
therefrom and control the selectors 10 and 11 in a manner as : ' :,., , ~
200~2~ :
described with reference to Figure 5. The output of counter 17 is further applied to a comparator 53 which compares it with a reference binary count supplied from the control circuit 54 to produce an equality pulse when coincidence occurs between them.
Control circuit 54 normally sets the reference count at the maximum value of the coun~er 17. The equality pulse is applied to the reset input of counter 17.
Control circuit 54 is a microprocessor-based controller which is pro~rammed as shown in Figure 5. The program execution starts with operations block 60 which directs the selecting of the -control signal generator 9 by switching the selectors 10 and 11 to the upper position. Control exits to operations block 61 which ~ -directs the resetting of memory 50 and counters 51 and 52, so that all latches of the memory 50 are cleared and the counters 51 and 52 are initialized to zero. In addition, the reference count -~
supplied to comparator 53 is reset to the maximum value K of -counter 17. ~xit then is to decision block 62 which checks to see if there is a pulse appearing at the output of aperture gate 15.
I the answer is negative in decision block 62, control moves ~.
ahead to decision block 64 to check to see if the count provided by time slot counter 52 is equal to M or not. If the answer is negative in block 64, control returns to block 62, and if it is affirmative, control returns to block 60.
If the answer is affirmative in decision block 62, ;
control advances to decision block 63 to check to see if the unique word count provided by counter 51 is equal to N which is ~ -~
smaller than M. If the answer is negative in block 63, control goes to decision block 64 to determine if the time slot count is 2 ~
equal to M. Thereforer if M time slots are counted by counter 52 before N unique words are detected while operating in a wide aperture mode, blocks 60 and 61 are executed again to select the ~ ~ -generator 9 to coniinue the wide aperture mode and re-set the memory 50 and counters 51 and 52.
If N unique words are detected before M time slots are counted during a wide aperture mode, an affirmative decision is made in block 63 and control proceeds to operations block 65 to read the contents of memory 50 which are latched successively therein in response to the detections of the N unique words and calculates the average value of the N binary counts of counter 17 .,:: : : :-. ::
which has been operating in a free-running mode. Since the guard times between successive incoming bursts tend to vary due to the variabilities of the operating parameters of the sending terminal `~
stations, the binary counts attained by counter 17 at the instants a unique word is detected represent the deviations from the instant at which the counter 17 must be reset. Thus, the average ;
value of the binaxy counts represents an average of the timing deviations of counter 17 from the reset instant which is optimum fcr receiving subsequent incoming bursts.
Control then proceeds to operations block 66 which directs the setting of the average value obtained by the step 65 ~ -as a reference value of comparator 53. If the current output of counter 17 is equal to the average count at the reference input of comparator 53, an equality pulse will be produced by comparator 53 without delay and resets the counter 17 immediately. If the current value of counter 17 is smaller than the average by two countsr for example, the timing of counter 17 will be delayed by ,,,~
~ '`' ',`.' lSa 2~4~8 71024-123 two counts, and if it is larger than the average by the same amount, the timing of counter 17 will be delayed by (K-2) counts, i.e., advanced by two counts.
Exit then is to decision block 67 which tests whether an equality pulse is produced by comparator 53. When this pulse is generated, control proceeds to operations block 68 to select the generator 18 by switching the selectors 10 and 11 to the lower position. Control now returns to block 50 to reset the : ~
':
- 16 - ~ 0 ~ 8 ~ ~
memoly 50, counters 51, 52 and reset the comparator's reference count to the 2 maximum value K
3 Thereafter, the demodulator operates with a narrow aperture mode.
4 Since counter 17 is synchronized precisely with the timing of the average s value of guard ffmes between successive incoming bursts, the unique words ;
6 of the subsequent incoming bursts will be correctly gated through the 7 narrowed aperture gate 15. If (N-1) unique words are subsequently detected ;
8 by the narrowed aperture gate 15, control will loop through blocks 62, 63 and 9 64 and counter 17 is reset at the maximum value K Therefore, the timing of counter 17 is corrected at every N incoming bursts to the average value of 1 1 guard times between such incoming burst.
1 2 If, during the narrow aperture mode, the number of time slots becomes 1 3 equal to M before N unique words are detected due to disruption or loss of 14 incoming bursts, control exits from the loop of blocks 62, 63 and 64 and ~ ~ -1 5 returns to block 60 to switch the selectors 10 and 11 to the upper position and 16 so the demodulator operates in a wide aperture, or initial mode again for 17 receiving a burst which may be affected by a large satellite drift in its 18 position.
19 The foregoing description shows only preferred embodiments of the 2 0 present invention. Various modifications are apparent to those skilled in the 2 l art without departing from the scope of the present invention which is only2 2 limited by the appended claims. Therefore, the embodiments shown and ............ ................................................................................. ... ... ... ...
... --. ~ .
2 3 described are only illustrative, not restrictive.
, .
, ~:
, ~ ~
Claims (9)
1. A satellite communications system having a central earth station and a plurality of terminal earth stations establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal stations via the satellite channel to allow the terminal earth stations to send bursts on time slots specified by the assignment signal and establish a timing reference for timing said bursts, the central station including burst detector means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, the central earth station comprising, timing means for generating a local timing signal synchronously with said reference timing signal;
delay means for introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system;
first control means responsive to said delayed local timing signal for generating a first control signal to recover said carrier and clock pulses, and generating a wide aperture gating pulse;
second control means responsive to a reset pulse applied thereto for generating a second control signal to recover said carrier and clock pulses, and generating a narrow aperture gating pulse; and aperture control means for initially applying said first control signal to said carrier and clock recovery circuit and allowing said second control means to respond to an output signal from the unique word detector as said reset pulse during the wide aperture gating pulse of first occurrence; applying the second control signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output signal during the narrow aperture gating pulse of first occurrence if a unique word is present during the wide aperture gating pulse of the first occurrence and continuously applying the second control signal to the carrier and clock recovery circuit and continuously allowing the second control means to respond to a unique word detector output signal as said reset pulse during the narrow aperture gating pulse of subsequent occurrence if a unique word is present during the narrow aperture gating pulse of the first occurrence; and applying the first control signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output signal as said reset pulse during the wide aperture gating pulse of subsequent occurrence if a unique word is not present during at least one of the narrow aperture gating pulses of successive occurrences.
delay means for introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system;
first control means responsive to said delayed local timing signal for generating a first control signal to recover said carrier and clock pulses, and generating a wide aperture gating pulse;
second control means responsive to a reset pulse applied thereto for generating a second control signal to recover said carrier and clock pulses, and generating a narrow aperture gating pulse; and aperture control means for initially applying said first control signal to said carrier and clock recovery circuit and allowing said second control means to respond to an output signal from the unique word detector as said reset pulse during the wide aperture gating pulse of first occurrence; applying the second control signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output signal during the narrow aperture gating pulse of first occurrence if a unique word is present during the wide aperture gating pulse of the first occurrence and continuously applying the second control signal to the carrier and clock recovery circuit and continuously allowing the second control means to respond to a unique word detector output signal as said reset pulse during the narrow aperture gating pulse of subsequent occurrence if a unique word is present during the narrow aperture gating pulse of the first occurrence; and applying the first control signal to the carrier and clock recovery circuit and allowing the second control means to respond to a unique word detector output signal as said reset pulse during the wide aperture gating pulse of subsequent occurrence if a unique word is not present during at least one of the narrow aperture gating pulses of successive occurrences.
2. A satellite communication system as claimed in claim 1, wherein said first control means comprises:
first counter means for incrementing a binary count at clock intervals, said first counter means being resettable to an initial value at time-slot intervals and further resettable to said initial value in response to the delayed timing signal; and first control signal generator means responsive to the binary count of the first counter means for generating said first control signal for controlling said carrier and clock recovery circuit for recovering said carrier and clock pulses and for generating a wide aperture gating pulse;
wherein said second control means comprises:
second counter means for incrementing a binary count at clock intervals, said second counter means being resettable to an initial value at said time-slot intervals and further resettable to the initial value in response to said reset pulse; and second control signal generator means responsive to the binary count of the second counter means for generating said second control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said narrow aperture gating pulse;
wherein said aperture control means comprises:
an aperture gate connected to the output of said unique word detector for applying an output signal from said unique word detector to said second counter means as said reset pulse in the presence of an aperture gating pulse applied thereto;
selector means having a first position for coupling said first control signal to said carrier and clock recovery circuit and coupling said wide aperture gating pulse to said aperture gate and a second position for coupling said second control signal to said carrier and clock recovery circuit and coupling said narrow aperture gating pulse to said aperture gate; and control means for initially switching said selector means to said first position, switching the selector means to the second position in response to an output signal from said aperture gate, and switching the selector means back to said first position when no unique word detector output signal appears subsequently at the output of said gate.
first counter means for incrementing a binary count at clock intervals, said first counter means being resettable to an initial value at time-slot intervals and further resettable to said initial value in response to the delayed timing signal; and first control signal generator means responsive to the binary count of the first counter means for generating said first control signal for controlling said carrier and clock recovery circuit for recovering said carrier and clock pulses and for generating a wide aperture gating pulse;
wherein said second control means comprises:
second counter means for incrementing a binary count at clock intervals, said second counter means being resettable to an initial value at said time-slot intervals and further resettable to the initial value in response to said reset pulse; and second control signal generator means responsive to the binary count of the second counter means for generating said second control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said narrow aperture gating pulse;
wherein said aperture control means comprises:
an aperture gate connected to the output of said unique word detector for applying an output signal from said unique word detector to said second counter means as said reset pulse in the presence of an aperture gating pulse applied thereto;
selector means having a first position for coupling said first control signal to said carrier and clock recovery circuit and coupling said wide aperture gating pulse to said aperture gate and a second position for coupling said second control signal to said carrier and clock recovery circuit and coupling said narrow aperture gating pulse to said aperture gate; and control means for initially switching said selector means to said first position, switching the selector means to the second position in response to an output signal from said aperture gate, and switching the selector means back to said first position when no unique word detector output signal appears subsequently at the output of said gate.
3. A satellite communications system as claimed in claim 2, wherein said control means comprises:
a flip-flop responsive to the output of said aperture gate for assuming a first binary state; and means for switching said flip-flop to a second binary state in response to either of said wide or narrow aperture gating pulse at the output of said selector means, said selector means being responsive to the binary states of said flip-flop.
a flip-flop responsive to the output of said aperture gate for assuming a first binary state; and means for switching said flip-flop to a second binary state in response to either of said wide or narrow aperture gating pulse at the output of said selector means, said selector means being responsive to the binary states of said flip-flop.
4. A satellite communications system as claimed in claim 3, wherein said switching means comprises a counter resettable in response to said reset pulse for counting aperture gating pulses at the output of said selector means and resetting said flip-flop when the count of said gating pulses reaches a predetermined value.
5. A satellite communication system as claimed in claim 1, wherein said first control means comprises:
first counter means for incrementing a binary count at clock intervals, said first counter means being resettable to an initial value at time-slot intervals and further resettable to said initial value in response to the delayed timing signal; and first control signal generator means responsive to the binary count of the first counter means for generating said first control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said wide aperture gating pulse;
said second control means comprises:
second counter means for incrementing a binary count at clock intervals, said second counter means being resettable to an initial value at said time-slot intervals and further resettable to the initial value in response to said reset pulse; and second control signal generator means responsive to the binary count of the second counter means for generating said second control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said narrow aperture gating pulse;
said aperture control means comprises:
an aperture gate connected to the output of said unique word detector for gating an output signal from said unique word detector in the presence of an aperture gating pulse applied thereto;
selector means having a first position for coupling said first control signal to said carrier and clock recovery circuit and coupling said wide aperture gating pulse to said aperture gate and a second position for coupling said second control signal to said carrier and clock recovery circuit and coupling said narrow aperture gating pulse to said aperture gate, said selector means initially assuming said first position;
memory means having a plurality of storage locations for storing the binary count of the second counter means into one of the locations in response to an output signal from said aperture gate;
unique word counter means for counting an output signal of said aperture gate to produce a count representing the number of unique words that occur during a period defined either by said wide or narrow aperture gating pulse;
comparator means for generating an equality pulse when the binary count of the second counter means equals a reference value and applying the equality pulse to said second counter means as said reset pulse, said reference value being normally set at a maximum count value of said second counter means; and control means for deriving an average value of the binary counts store in said memory means when said unique word representative count reaches a predetermined value, setting said average value as said reference value of said comparator means, and causing said selector means to assume said second position when said equality pulse is generated by said comparator means.
first counter means for incrementing a binary count at clock intervals, said first counter means being resettable to an initial value at time-slot intervals and further resettable to said initial value in response to the delayed timing signal; and first control signal generator means responsive to the binary count of the first counter means for generating said first control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said wide aperture gating pulse;
said second control means comprises:
second counter means for incrementing a binary count at clock intervals, said second counter means being resettable to an initial value at said time-slot intervals and further resettable to the initial value in response to said reset pulse; and second control signal generator means responsive to the binary count of the second counter means for generating said second control signal for controlling said carrier and clock recovery circuit to recover said carrier and clock pulses and for generating said narrow aperture gating pulse;
said aperture control means comprises:
an aperture gate connected to the output of said unique word detector for gating an output signal from said unique word detector in the presence of an aperture gating pulse applied thereto;
selector means having a first position for coupling said first control signal to said carrier and clock recovery circuit and coupling said wide aperture gating pulse to said aperture gate and a second position for coupling said second control signal to said carrier and clock recovery circuit and coupling said narrow aperture gating pulse to said aperture gate, said selector means initially assuming said first position;
memory means having a plurality of storage locations for storing the binary count of the second counter means into one of the locations in response to an output signal from said aperture gate;
unique word counter means for counting an output signal of said aperture gate to produce a count representing the number of unique words that occur during a period defined either by said wide or narrow aperture gating pulse;
comparator means for generating an equality pulse when the binary count of the second counter means equals a reference value and applying the equality pulse to said second counter means as said reset pulse, said reference value being normally set at a maximum count value of said second counter means; and control means for deriving an average value of the binary counts store in said memory means when said unique word representative count reaches a predetermined value, setting said average value as said reference value of said comparator means, and causing said selector means to assume said second position when said equality pulse is generated by said comparator means.
6. A satellite communications system as claimed in claim 5, further comprising time slot counter means for counting the aperture gating pulses supplied to said aperture gate to produce a count representing the number of time slots, wherein said control means causes said selector means to assume said first position when said time slot representative count reaches a second predetermined value before said unique word representative count reaches the first-mentioned predetermined value, said second predetermined value being greater than said first predetermined value.
7. In a satellite communications system having a central earth station and a plurality of terminal earth stations establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal stations via the satellite channel to allow the terminal earth stations to send bursts on time slots specified by the assignment signal and establish a timing reference for timing said bursts, the central station including burst detector means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, a method comprising the steps of:
a) generating a local timing signal in synchronism with said reference timing signal;
b) introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system;
c) applying a control signal to the carrier and clock recovery circuit in response to the delayed timing signal to recover said carrier and clock pulses and detecting a unique word detector output signal through a wide-open window;
d) applying said control signal to the carrier and clock recovery circuit in response to the detection of a unique word by the step (c) to recover said carrier and clock pulses and searching for a unique word detector output signal through a narrow window; and e) repeating the step (c) if a unique word is not detected by the step (d) and repeating the step (d) if a unique word is detected by the step (d).
a) generating a local timing signal in synchronism with said reference timing signal;
b) introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system;
c) applying a control signal to the carrier and clock recovery circuit in response to the delayed timing signal to recover said carrier and clock pulses and detecting a unique word detector output signal through a wide-open window;
d) applying said control signal to the carrier and clock recovery circuit in response to the detection of a unique word by the step (c) to recover said carrier and clock pulses and searching for a unique word detector output signal through a narrow window; and e) repeating the step (c) if a unique word is not detected by the step (d) and repeating the step (d) if a unique word is detected by the step (d).
8. In a satellite communications system having a central earth station and a plurality of terminal earth stations establishing a satellite channel with the central earth station via a geosynchronous satellite, the central earth station transmitting a time slot assignment signal and a reference timing signal to the terminal stations via the satellite channel to allow the terminal earth stations to send bursts on time slots specified by the assignment signal and establish a timing reference for timing said bursts, the central station including burst detector means for detecting said bursts from the terminal stations, a carrier and clock recovery circuit for recovering a carrier and clock pulses from the output of the detector means, and a unique word detector for detecting a unique word contained in the burst detected by the burst detector means and generating an output signal representative of the presence of a unique word, a method comprising the steps of:
a) generating a local timing signal in synchronism with said reference timing signal;
b) introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system;
c) applying a control signal to the carrier and clock recovery circuit in response to the delayed timing signal to recover said carrier and clock pulses and detecting a unique word detector output signal through a wide-open window;
d) incrementing a binary count at clock intervals;
e) storing said binary count into a memory in response to the detection of a unique word detector output signal;
f) counting the detected unique word detector output signals;
g) if the count given by the step (f) reaches a predetermined value, deriving an average value of the binary counts stored in the memory;
h) comparing the binary count of the step (d) with the average value;
i) if the binary count of the step (d) is equal to the average value, applying said control signal to the carrier and clock recovery circuit to recover said carrier and clock pulses and searching for a unique word detector output signal through a narrow window; and j) repeating the steps (c) to (i) if a unique word is not detected by the step (i) and repeating the steps (f) to (i).
a) generating a local timing signal in synchronism with said reference timing signal;
b) introducing a delay to the local timing signal by an amount corresponding to a minimum round-trip propagation delay of the satellite communications system;
c) applying a control signal to the carrier and clock recovery circuit in response to the delayed timing signal to recover said carrier and clock pulses and detecting a unique word detector output signal through a wide-open window;
d) incrementing a binary count at clock intervals;
e) storing said binary count into a memory in response to the detection of a unique word detector output signal;
f) counting the detected unique word detector output signals;
g) if the count given by the step (f) reaches a predetermined value, deriving an average value of the binary counts stored in the memory;
h) comparing the binary count of the step (d) with the average value;
i) if the binary count of the step (d) is equal to the average value, applying said control signal to the carrier and clock recovery circuit to recover said carrier and clock pulses and searching for a unique word detector output signal through a narrow window; and j) repeating the steps (c) to (i) if a unique word is not detected by the step (i) and repeating the steps (f) to (i).
9. A method as claimed in claim 8, wherein the step (g) further comprises the steps of:
G1) counting time slots;
G2) if the count given by the step (f) is smaller than said predetermined value, comparing the count of the time slots with a threshold value;
G3) if the count of the time slots is smaller than the threshold value, repeating the steps (h) to (j); and G4) if the count of the time slots is equal to the threshold value, repeating the steps (c) to (j).
G1) counting time slots;
G2) if the count given by the step (f) is smaller than said predetermined value, comparing the count of the time slots with a threshold value;
G3) if the count of the time slots is smaller than the threshold value, repeating the steps (h) to (j); and G4) if the count of the time slots is equal to the threshold value, repeating the steps (c) to (j).
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30523288 | 1988-12-01 | ||
| JP63-305232 | 1988-12-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2004258A1 CA2004258A1 (en) | 1990-06-01 |
| CA2004258C true CA2004258C (en) | 1994-08-02 |
Family
ID=17942622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002004258A Expired - Lifetime CA2004258C (en) | 1988-12-01 | 1989-11-30 | Tdma satellite communications system operating in wide and narrow aperture modes for receiving bursts of various timing deviations |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5072445A (en) |
| EP (1) | EP0371500B1 (en) |
| JP (1) | JPH02256329A (en) |
| AU (1) | AU623201B2 (en) |
| CA (1) | CA2004258C (en) |
| DE (1) | DE68921705T2 (en) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2723691B2 (en) * | 1991-04-30 | 1998-03-09 | 日本電気株式会社 | Variable timing signal generation circuit |
| GB9117645D0 (en) * | 1991-08-15 | 1991-10-02 | Motorola Ltd | Improvements in or relating to digital communication systems |
| JP2799476B2 (en) * | 1992-04-13 | 1998-09-17 | 富士通株式会社 | Receive aperture control method |
| JPH0738606B2 (en) * | 1992-10-30 | 1995-04-26 | 日本電気株式会社 | Satellite communication system |
| DE4316225C2 (en) * | 1993-05-14 | 2000-06-08 | Deutsche Telekom Ag | Method and arrangement for interference-free clock recovery on the receiver side for digital signals with constant bit rate |
| JPH0828754B2 (en) | 1993-06-30 | 1996-03-21 | 日本電気株式会社 | Frame synchronization method |
| FI106824B (en) * | 1993-07-05 | 2001-04-12 | Nokia Networks Oy | The base station |
| JPH0795142A (en) * | 1993-09-20 | 1995-04-07 | Fujitsu Ltd | Master station terminal equipment for star network |
| US5586150A (en) * | 1993-11-24 | 1996-12-17 | Rajupandaram K. Balasubramaniam | Method and apparatus for symbol synchronization in multi-level digital FM radio |
| ES2078179B1 (en) * | 1993-12-31 | 1997-10-16 | Alcaltel Standard Electrica S | METHOD AND DEVICE FOR AUTOMATIC SYNCHRONIZATION OF DATA GUSTS. |
| US5644573A (en) * | 1995-01-20 | 1997-07-01 | Amati Communications Corporation | Methods for coordinating upstream discrete multi-tone data transmissions |
| US5625651A (en) * | 1994-06-02 | 1997-04-29 | Amati Communications, Inc. | Discrete multi-tone data transmission system using an overhead bus for synchronizing multiple remote units |
| AU738026B2 (en) * | 1994-06-02 | 2001-09-06 | Amati Communications Corporation | Method and apparatus for coordinating multi-point-to-point communications in a multi-tone data transmission system |
| WO1995034149A1 (en) * | 1994-06-02 | 1995-12-14 | Amati Communications Corporation | Method and apparatus for coordinating multi-point-to-point communications in a multi-tone data transmission system |
| US5659545A (en) * | 1994-11-15 | 1997-08-19 | Motorola, Inc. | Apparatus for mobile unit acquisition in a satellite communication system and method therefor |
| DE69534445T2 (en) * | 1995-04-28 | 2006-04-27 | Alcatel | Method for TDMA management, central station, subscriber station and network for carrying out the method |
| US5805583A (en) * | 1995-08-25 | 1998-09-08 | Terayon Communication Systems | Process for communicating multiple channels of digital data in distributed systems using synchronous code division multiple access |
| US6356555B1 (en) | 1995-08-25 | 2002-03-12 | Terayon Communications Systems, Inc. | Apparatus and method for digital data transmission using orthogonal codes |
| US6307868B1 (en) | 1995-08-25 | 2001-10-23 | Terayon Communication Systems, Inc. | Apparatus and method for SCDMA digital data transmission using orthogonal codes and a head end modem with no tracking loops |
| US6665308B1 (en) | 1995-08-25 | 2003-12-16 | Terayon Communication Systems, Inc. | Apparatus and method for equalization in distributed digital data transmission systems |
| US5761255A (en) * | 1995-11-30 | 1998-06-02 | The Boeing Company | Edge-synchronized clock recovery unit |
| US5812545A (en) * | 1996-01-04 | 1998-09-22 | Orion Atlantic, L.P. | Full mesh satellite-based multimedia networking system |
| US5757784A (en) * | 1996-01-04 | 1998-05-26 | Orion Atlantic, L.P. | Usage-based billing system for full mesh multimedia satellite network |
| JPH09298521A (en) * | 1996-05-08 | 1997-11-18 | Nec Eng Ltd | Method and system for controlling radio communication repetition |
| FI101438B (en) * | 1996-05-21 | 1998-06-15 | Nokia Mobile Phones Ltd | Signal retrieval in a satellite telephone system |
| US5784411A (en) * | 1996-05-22 | 1998-07-21 | Motorola, Inc. | Method and system for processing signals for use in a wireless communication system |
| US5726983A (en) * | 1996-08-09 | 1998-03-10 | Motorola, Inc. | Communication device with variable frame processing time |
| AU6987896A (en) * | 1996-09-06 | 1998-03-26 | Brigitta Wagner | Wireless communications system using beam direction multiplexing |
| JP3335530B2 (en) * | 1996-09-25 | 2002-10-21 | 松下電器産業株式会社 | Known pattern detector |
| CA2275408C (en) * | 1997-10-20 | 2003-04-01 | Comsat Corporation | A method for generation of accurate doppler-free local clock in satellite/wireless networks |
| US6539003B1 (en) | 1997-10-20 | 2003-03-25 | Viasat, Inc. | Method for acquisition and synchronization of terminals in a satellite/wireless TDMA system |
| US6937623B2 (en) * | 1997-10-22 | 2005-08-30 | Texas Instruments Incorporated | Method and apparatus for coordinating multi-point to point communications in a multi-tone data transmission system |
| US6298048B1 (en) * | 1998-04-29 | 2001-10-02 | Hughes Electronics Corporation | TDMA system timer for maintaining timing to multiple satellite simultaneously |
| US6674730B1 (en) * | 1998-08-04 | 2004-01-06 | Tachyon, Inc. | Method of and apparatus for time synchronization in a communication system |
| US20020167918A1 (en) * | 1998-12-24 | 2002-11-14 | Brewer Charles R. | Real-time satellite communication system using separate control and data transmission paths |
| US6208626B1 (en) | 1998-12-24 | 2001-03-27 | Charles R. Brewer | Real-time satellite communication system using separate control and data transmission paths |
| ATE341167T1 (en) * | 2001-02-06 | 2006-10-15 | Harris Corp | MANAGEMENT OF BURST PROFILE PROPERTIES IN TDM SYSTEMS |
| US8121050B2 (en) * | 2010-04-08 | 2012-02-21 | Exelis Inc. | Maintaining time of day synchronization |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3789142A (en) * | 1971-03-26 | 1974-01-29 | Communications Satellite Corp | Frame synchronization technique for satellite on-board switching systems |
| JPS61170150A (en) * | 1985-01-24 | 1986-07-31 | Nec Corp | Slave station controller of reference station in time division multiple address system |
| JPS62214739A (en) * | 1986-03-15 | 1987-09-21 | Nec Corp | Synchronization control system |
| DE3729586A1 (en) * | 1987-09-04 | 1989-03-16 | Ant Nachrichtentech | METHOD FOR COMPENSATING DURING DURATION OF THE BURSTS Caused by the DOPPLER EFFECT IN A TDMA FRAME, AND ARRANGEMENT |
| JPH0828704B2 (en) * | 1988-09-07 | 1996-03-21 | 国際電信電話株式会社 | Unique word detection method |
-
1989
- 1989-11-29 JP JP1310031A patent/JPH02256329A/en active Granted
- 1989-11-30 US US07/443,737 patent/US5072445A/en not_active Expired - Lifetime
- 1989-11-30 DE DE68921705T patent/DE68921705T2/en not_active Expired - Lifetime
- 1989-11-30 EP EP89122079A patent/EP0371500B1/en not_active Expired - Lifetime
- 1989-11-30 CA CA002004258A patent/CA2004258C/en not_active Expired - Lifetime
- 1989-12-01 AU AU45794/89A patent/AU623201B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| CA2004258A1 (en) | 1990-06-01 |
| DE68921705T2 (en) | 1995-07-27 |
| JPH0580181B2 (en) | 1993-11-08 |
| EP0371500B1 (en) | 1995-03-15 |
| EP0371500A2 (en) | 1990-06-06 |
| JPH02256329A (en) | 1990-10-17 |
| US5072445A (en) | 1991-12-10 |
| EP0371500A3 (en) | 1991-10-02 |
| AU4579489A (en) | 1990-06-07 |
| AU623201B2 (en) | 1992-05-07 |
| DE68921705D1 (en) | 1995-04-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2004258C (en) | Tdma satellite communications system operating in wide and narrow aperture modes for receiving bursts of various timing deviations | |
| CA1130481A (en) | Processor for a tdma burst modem | |
| US4262356A (en) | Method and system for synchronizing a TDMA communication network comprising a satellite equipped with several directional beam antennas transmitting signals at various frequencies | |
| US3532985A (en) | Time division radio relay synchronizing system using different sync code words for "in sync" and "out of sync" conditions | |
| US4107608A (en) | Method and apparatus for burst synchronization in a time division multiple access communication system | |
| US4757502A (en) | Automatic gain control method and circuit for a time division multiple access receiver | |
| US4105973A (en) | Multibeam, digitally modulated, time division, switched satellite communications system | |
| US4086537A (en) | Time division multiplex communication receiving apparatus | |
| GB1395511A (en) | Communication system | |
| JPS58202642A (en) | Space diversity receiver | |
| EP0004702A1 (en) | Simulcast transmission system having phase-locked remote transmitters | |
| US3772475A (en) | Satellite communications system with super frame format and frame segmented signalling | |
| US4004225A (en) | Method for synchronizing the pulse frames in time multiplex data transmission via communication satellites | |
| US4129755A (en) | Frame synchronizing system for TDMA radio communications | |
| US3462551A (en) | Channel synchronizer for multiplex pulse communication receiver | |
| JPH052022B2 (en) | ||
| US5437059A (en) | Radio transmitting system having back-up radio receiver operable in response to failure of main feed line | |
| DE1591341C2 (en) | Method for bit synchronization of a ground station in a time division multiplex transmission system with several ground stations and a satellite as a relay station | |
| Shark et al. | Adaptive frame synchroniser for digital satellite communication systems | |
| Acampora et al. | Baseband processing in a high-speed burst modem for a satellite-switched TDMA system | |
| US3526719A (en) | Double aperture technique for detecting station identifying signal in a time division multiple access satellite communication system | |
| US5602880A (en) | Method and system for minimizing resynchronization delays in digital microwave radio systems | |
| US3555425A (en) | Synchronization apparatus for two-way synchronous coded link | |
| US4470148A (en) | Satellite-receiver time division multiple-access burst duration and guard space monitor | |
| SU425365A1 (en) | DEVICE FOR AUTOMATIC DISCRETE SIGNALS |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| MKEX | Expiry |