CA2013559C - Intelligent battery system - Google Patents
Intelligent battery systemInfo
- Publication number
- CA2013559C CA2013559C CA002013559A CA2013559A CA2013559C CA 2013559 C CA2013559 C CA 2013559C CA 002013559 A CA002013559 A CA 002013559A CA 2013559 A CA2013559 A CA 2013559A CA 2013559 C CA2013559 C CA 2013559C
- Authority
- CA
- Canada
- Prior art keywords
- battery
- charge
- battery cells
- current
- sensing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
- G01R31/382—Arrangements for monitoring battery or accumulator variables, e.g. SoC
- G01R31/3842—Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
- H02J7/00036—Charger exchanging data with battery
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/00047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with provisions for charging different types of batteries
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
- G01R31/374—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC] with means for correcting the measurement for temperature or ageing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Abstract
An intelligent battery system senses current flowing in the direction of charge current through positive and negative terminals and battery cells of a battery pack. In response, a processor within the battery pack transmits battery parameter data to a separate output port of the battery pack. The battery parameter data includes the state of charge of the battery cells, temperature data and the type of battery pack. The processor also responds to specific data requests transmitted into the battery terminals by transmitting the requested battery parameter data. The battery pack is also designed to minimize power dissipation of the processor. When the battery pack is not subjected to either charge or discharge for a predetermined period, the processor is rendered into a "light-sleep" mode in which power dissipation is substantially reduced. The processor is awakened from the light-sleep either by a timer or hy charge or discharge activity to monitor the amount of charge or discharge and other battery parameters.
Description
The invention relates generally to intelligent battery systems comprising a battery pack with electronic circuitry to monitor battery parameters, and an associated battery charger.
The invention deals more particularly with apparatus and processes for minimizing power dissipation by the electronic circuitry, and providing two-way communication between the battery pack and the battery charger.
A previously known battery pack with a microprocessor was disclosed in U.S. Patent No. 4,289,836 to Lemelson. The microprocessor monitors battery parameters such as the state of battery charge, number of charging cycles, battery temperature, and battery pressure. The microprocessor may also be used to control a display for the battery parameters. The battery pack is coupled to a simple power supply for recharging purposes.
Another previously known battery pack is disclosed in U.S. Patent No. 4,553,081 to Koenck which battery pack includes a microprocessor secured to a battery housing. The microprocessor monitors battery operation to determine remaining battery capacity, and counts the number of shallow discharges and successive recharging cycles to estimate deterioration of the battery. Circuitry within the battery pack occasionally causes a discharge of the battery to determine present battery capacity.
The microprocessor and other circuitry require little operating power so that the shelf-life of the battery pack is long. The microprocessor is also coupled to a display for indicating battery capacity and other information obtained from the battery.
~ .~
_ - 2 - 201 3559 The battery pack of U.S. Patent No. 4,553,081 also includes several I/O ports to communicate with a portable computer terminal device and a battery charger.
A general object of the present invention is to provide a battery pack which includes electronic circuitry to monitor battery parameters, which electronic circuitry draws minimal average power.
Another general object of the present invention is to provide a battery pack of the foregoing type and an associated battery charger which can provide two-way communication between each other via a small number of interconnections.
A more specific object of the present invention is to provide a battery pack of the foregoing type which accurately monitors battery discharge and charge.
, -- .. .--~`~ 3 201 3559 The invention resides in an intelligent battery system which monitors battery parameters such as the state of charge of the battery, the temperature of the battery cells and the type of battery. A battery pack within the system comprises positive and negative terminals serially coupled to the battery cells. The positive terminal is adapted to output load current and receive charging current.
According to one aspect of the invention, there is provided a battery system comprising a battery pack. The battery pack includes a plurality of battery cells. Positive and negative terminals are serially coupled to the battery cells, the positive terminal delivering output current to a load and receiving input current in the direction of charging current. Sensing means is provided for sensing current and data pulses flowing through the lS battery cells and said positive and negative terminals. An output port outputs data from the battery pack. Memory means stores battery parameter data. Also, electronic means is coupled to the sensing means and the memory means for transmitting the battery parameter data to the output port in response to the sensing means sensing the current input through the positive terminal in the direction of charging current.
According to another aspect of the invention, there is provided a battery pack comprising a plurality of battery cells having a state of charge. Sensing means is provided for sensing current flowing through the battery cells. Processor means is coupled to the sensing means, the processor means being powered by the battery cells and functional in a relatively high power consumption mode to determine the state of charge of the battery cells based on the amount of current flowing through the battery cells. First means is provided for rendering the processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of the battery cells. Also, second means is provided for automatically rendering the processor means into a non-functional relatively low power current consumption mode at other times to conserve power, wherein the flow of current is due to discharge A
~- 201 355q of or charging of the battery cells, and the processor means determines the state of charge based at least in part on the amount of ampere-hours of the respective discharge or charge current.
According to yet another aspect of the invention there is provided in a battery system comprising a battery pack and a battery charger, the battery pack including a battery and electronic circuitry monitoring battery parameters, a method of minimizing power dissipation by the electronic circuitry. The method comprises the steps of providing a battery pack including a battery and electronic circuitry, the battery having an instantaneous state of charge or discharge. A battery charger is connected to the battery pack for providing a charging current to the battery. A resistor is connected in the battery pack in series with the battery for developing a voltage drop across the resistor indicative of charge current flowing into or discharge current flowing out of the battery. A first portion of the electronic circuitry is caused to enter into a "light-sleep" mode when there is neither charging nor discharging activity sensed for a predetermined period of time. Non-volatile memory is provided for storing battery parameter data sensed or calculated by the first portion of the electronic circuitry. During the light-sleep mode of the first portion of the electronic circuitry, power is supplied to a timer in a second portion of the electronic circuitry, the timer periodically "waking-up" the first portion of the electronic circuitry. In the first portion of the electronic circuitry, the instantaneous state of charge or discharge is sensed upon waking-up. Other battery parameter data is read and calculated during the wake-up period. The battery parameter data is stored in the non-volatile memory, and then the light-sleep mode is re-entered in preparation for the next periodic wake-up by the timer. Also, the cycles of light-sleep and periodic waking-up are continuously repeated until either charging or discharging activity above a threshold is 3S detected or the battery voltage drops below a predetermined level at which time the first portion of the electronic circuitry enters a fully functional mode. Also, an output port is further 4a 201 3559 provided in the battery pack, and the stored battery parameter data is transmitted out of the output port to the charger in response to sensed charge current, wherein the battery includes a series of cells, and further comprising sensing the voltage across a fractional portion of the battery cells.
Preferred embodiment of the invention will now be described with reference to the accompanying drawings, in which:
Figure 1 is a simplified circuit diagram of a battery pack and an associated battery charger in accordance with the present invention.
Figure 2 is a more detailed circuit diagram of the battery pack of Figure 1.
Figure 3 is a timing diagram illustrating digital communication between the battery charger and battery pack of Figure 1.
Figure 4 is a schematic circuit diagram of an amplifier within the battery pack.
Figure 5 is a flow chart illustrting operation of a microprocessor and the other electronic circuitry of Figure 2.
Referring now to the figures in detail wherein like reference numerals indicate like elements throughout the several views, FIGURE 1 illustrates a battery pack generally designated 10 and an associated battery charge 11 embodying the present invention in simplified schematic form. The battery pack includes a plurality of rechargeable battery cells 12 and, by way of example, there are ten to twelve such cells of the nickle cadmium type. Collectively, the battery cells may have a capacity of either two ampere-hours or four ampere-hours. The battery pack 10 further includes a positive terminal 14 and a negative or return terminal 16 to receive charging current from and return charging current to battery charge 11. The positive terminal 14 also can deliver current to a load (not shown).
When the battery cells 12 delivery current to the load, the current flows in the direction indicated by an arrow 18.
Conversely, when the battery cells are charged, current flows in the direction indicated by an arrow 19. Either current develops a voltage across a resistor 20 which is connected in series with the battery terminals and cells. To minimize power dissipation in the resistor 20, the resistor is small, for example, 0.025 ohms.
Battery pack 10 further includes electronic circuitry 21 illustrated in more detail in FIGURE 2. A differential amplifier 22 has inputs connected across the resistor 20 to sense the instantaneous charge or discharge current. The output of the amplifier 22 is applied through a switch 23 and a buffer , 6 201 355~
amplifier 25 to input of an A/D converter 31 within a CPU 28. As described in more detail below, the CPU reads the output of the A/D converter to determine the state of charge of the battery cells based on the measured charge and discharge currents.
In order to minimize power dissipation by the electronic circuitry 21, the CPU 28 is a type which is capable of entering into a non-functional "light-sleep" mode in which power is disconnected from most of the electronic circuitry within the CPU
28 and the CPU cannot monitor battery parameters. Motorolla Model MC68HCll is such a type. The CPU is programmed to enter into the light-sleep mode when there is neither charging nor discharging activity for a predetermined period, for example, one hour. A
timer 101 within the CPU, which may comprise a register incremented with the passage of time, measures the inactive time as described in more detail below. The CPU 28 includes a non-volatile RAM 60 which stores battery parameter data indicating the amount of discharge of the battery cells 12, the number of discharge and recharging cycles, the highest temperature that either the battery cells or the battery system 10 has ever experienced, and the type and serial number of the battery.
During the light-sleep, power is supplied to a timer 62 external to the CPU which periodically "wakes-up" the entire CPU to its functional mode to monitor battery parameters. By way of example, the timer 62 wakes-up the CPU every 250 milliseconds to enable the CPU to read the output of the A/D converter 31 to determine the amount of instantaneous charge or discharge current, if any.
If amplifier 22 indicates battery discharge, the CPU approximates . ,. ~v the ampere-hour discharge during the previous 250 millisecond interval. By way of example, to estimate the amount of discharge between the readings, the CPU may multiply the discharge current times 250 milliseconds. Then, the CPU calculates the remaining charge in the battery cells 12 by subtracting the amount of discharge between the readings from the battery charge calculated at the previous reading.
When awake, the CPU also monitors the temperature of the battery cells by commanding selection decoder 61 via lines 63 to activate a switch 65 coupled to temperature sensor 67 so that the signal provided by temperature sensor 67 is supplied to the input of buffer 25. Simultaneously, the CPU directs the decoder 61 to disable switch 23 via gate 73. The CPU then reads the temperature from the A/D converter. Next, the CPU activities switch 75 by appropriate commands on lines 63 to interconnect battery pack, surface temperature sensor 77 to the input of buffer 25 while simultaneously disabling switches 23 and 65. Next, the CPU
enables switch 79 to interconnect the positive terminal 14 of the battery pack via a voltage divider 81 to the input of buffer 25 while disabling the other switches so that the CPU can monitor the combined voltage of the battery cells. Then, the CPU
activates a switch 87 to interconnect a voltage tap 85, which sensors the voltage of half of the battery cells, to the buffer 25 via a voltage divider 89 while disabling the other switches.
During the light-sleep and functional modes of operation, power is supplied to the CPU via a switch 68 and a buffer amplifier 69. The CPU continuously repeats the foregoing cycles of light-sleep and periodic awakening until either the CPU
detects charging or discharging activity, or the cell voltage drops below a predetermined level. If the voltage drops below this low level, the CPU 28 transmits a reset pulse to a latch 66 which opens the switch 68 and thereby prevents the delivery of power to the CPU 28. Consequently, the CPU enters into a "deep-sleep" mode. By way of example, during light-sleep the CPU draws approximately 20% of the power that it draws during the functional, "awake" mode, and during "deep-sleep", the CPU draws essentially no power. However, as noted above, during deep-sleep, the data is retained in the non-volatile RAM 60.
During the light-sleep and deep-sleep modes, power is still applied to the amplifier 22 and to comparators 70 and 72, which amplifier and comparators are capable of awakening the CPU
from either deep-sleep or light-sleep during charging or discharging. An input of each of the comparators is connected to the output of the amplifier 22. The other, negative input of comparator 70 is provided with a threshold voltage determined by the magnitude of resistors 74 and 76 in relation to the magnitude of resistor 78. The other, positive input of comparator 72 i8 provided with a threshold voltage determined by the magnitude of resistor 76 in relation to the magnitudes of resistors 74 and 78.
When the battery system is connected to a load, a voltage develops across the resistor 20. The voltage is sensed by the amplifier 22 and applied to the comparator 70. If the voltage is above the threshold level, comparator 70 transmits a binary 1 set signal to the latch 66 via OR gate 80. This resumes the supply of power to CPU 28 if it was in deep-sleep. Comparator 70 also transmits a binary 1 signal to interrupt port 83 of the CPU via OR gates 82 and 84. This awakens the CPU from light-sleep if it was in light-sleep and directs the CPU to read the A/D converter and thus, the discharge current. The CPU remains in the functional, awake mode for a predetermined period in which it continuously monitors the discharge. After the predetermined period which, for example, is one hour after the cessation of discharge, the CPU returns to the light-sleep and periodic awakening mode in which timer 62 is used to awaken the CPU. One reason that both the timer 62 and the comparator 82 are used to awaken the CPU from light-sleep is that the comparator is preferably a CMOS or other low power type and may not be sensitive to small discharge currents while the amplifier 22 is sensitive and the timed awakening is useful to monitor such small discharge.
The battery charger 11 includes a source 92 of voltage and an electronic switch 94 which couples the voltage source 92 to the positive terminal 14 of the battery pack. Thus, when the battery charger delivers current to the positive terminal 14, current flows into battery cells 12 and across the resistor 20 in the direction indicated by arrow 19 as noted above. A
corresponding voltage is developed across the input of amplifier 22 and comparator 72. This voltage is greater than the threshold voltage of comparator 72 so that the comparator supplies a binary , . .
10 201 355q 1 set pulse to latch 66 via OR gate 80 which resumes the supply of power to CPU 28 (if it was in deep-sleep) via switch 68 and buffer 69. The comparator 72 also supplies a binary 1 signal to interrupt port 83 via OR gates 82 and 84. As noted above, the signal applied to interrupt port 83 awakens the CPU from light-sleep if it was in light-sleep and directs the CPU to read the A/D converter. Comparator 72 also outputs to a serial data input port 99 via OR gate 101, and if the A/D converter indicates that the battery is receiving current in the polarity of charge, the CPU reads the serial data input port 99.
As illustrated in FIGURE 3, when the battery pack 10 is installed in battery charger 11, the battery charger can transmit a code 102 to the CPU requesting specific battery parameter data lS by delivering current pulses 104 into the positive terminal 14.
The current pulses cause voltage pulses to develop across the resistor 20 and at the outputs of amplifier 22 and comparator 72.
These voltage pulses, as noted above, are supplied to the serial data input port 99 of the CPU. Thus, CPU 28 is awakened by the onset of the first pulse 104 of code 102 by setting of latch 66 (if necessary) and activation of interrupt port 80, and alerted to read the subsequent data. By way of example, the code 102 includes a start bit, a stop bit, and 8 intervening data bits specifying the requested battery parameter data. Code 102 instructs the CPU to transmit battery parameter data to the logic and microprocessor ~ P circuitry 96 within battery charger 11.
This data is the data contained within the non-volatile RAM 60 and, as noted above, includes the amount of discharge of the ~' battery, the battery capacity, the number of charging/recharging cycles, the highest battery cell or surface temperature that the battery has experienced, the type of battery, and the serial number of the battery. The CPU transmits the requested information by outputting serial data pulses 108 from output port 120 and through FET buffer 122 and battery pack port 124. The data is received by the charger at input port 126. Then the battery charger 11 may request additional information by transmitting the respective code into the positive terminal 14.
The CPU is also programmed to transmit all of its battery parameter data to output port 124 in a predetermined order after the onset of receipt of charge current 127 if no specific data request current is received.
After the battery charger receives all the data it requires, it charges the battery cells 12 by delivering charging current to the positive terminal 14 in accordance with the state of charge of the battery cell 12, the type of battery, and the temperatures of the cells and battery pack surface. For example, if the battery is substantially discharged and within a safe charging temperature range, charger 11 supplies a m~x;mum charging current. However, if the battery is nearly fully charged or above the temperature range, then charger 11 supplies a lesser current. Charging techniques suitable for the battery pack 10 and battery charger 11 are described in commonly assigned U.S. Patent Application Serial No. 115,155 entitled "Battery Charging System"
filed October 30, 1987 by George W. Bauer et al, and U.S. Patent No. 4,554,500 to Sokira issued November 19, 1985, which patent application and patent are hereby incorporated by reference as part of the present disclosure.
It should be appreciated that the positive terminal 14 serves to route operating current from the battery cells to an actual load, route data from battery charger 11 to the CPU, and route charging current from the battery charger to the battery cells.
During charging of the battery pack 10, the CPU is continuously awake and functional to accurately monitor the charging current.
Electronic circuitry 21 further includes a communication link 130 comprising a zener diode 132, input resistors 134 and 136 and transistor 137 which link receives data at port 124 and transmits it to the serial data input port 99 of the CPU via OR
gate 101. This communication link may be used at the factory or during service to transmit a code to the CPU to elicit data via FET 122. However, battery charger 11 and other types of battery chargers may not be equipped to transmit data to the CPU via port 124 and communication link 130 so that transmission of a data request into terminal 14 either by a specific data code or by the onset of charging current is important.
The battery pack 10 further includes an LCD bar graph 140 which receives information from the CPU via lines 142 indicating ~ 13 201 3559 the amount of charge remaining in the battery, and displays this information. The CPU also outputs via line 144, an analog signal, representing the remaining charge in the battery, through a switch 146 to a sample and hold circuit 148. The analog output S is provided on port 150 of the battery pack to supply an optional meter within a video camera or other appliance. The output of the sample and hold circuit 148 is also fed back to the A/D converter for calibration purposes.
FIGURES 5(a) and 5(b) form a flow chart illustrating the operation of the CPU and associated circuitry. To begin the operation, the system is powered-up by the application of power to the CPU (step 200) by setting of latch 66 as noted above.
Then, the CPU starts the timer 62 (step 202) by transmitting a pulse on line 205 and enters into the non-functional, light-sleep mode (step 203). Next, a pulse is applied to interrupt port 83 either by the timer, comparator 70 or comparator 72 (step 204).
As noted above, comparator 70 transmits such a pulse to interrupt port 83 upon discharge of the battery and comparator 72 transmits such a pulse to interrupt port 83 upon charge of the battery.
After many of the three events, the CPU awakens from the light or deep-sleep, reads the temperature sensors 67 and 77, the full battery voltage, and the half battery voltage to determine if the battery is within safe operating limits (steps 206 and 208).
Next, the CPU reads the charge or discharge current by reading A/D converter 31 (step 210). If no current is flowing at the time, the CPU determines whether the overall battery voltage is less than the low, cut-off level which represents the specified _r;;~
`~ 14 20 1 3559 usable limit of the battery pack (step 214). If the battery voltage is below this level, the CPU transmits a reset pulse on line 215 to latch 66 to power-down the CPU. If not, the CPU loops back to step 202 to start the timer again.
Returning to step 212, if current was flowing at the time, the CPU determines whether the current is in the charge or discharge mode (step 218) by reading the output of the A/D
converter. If in the charge mode, the CPU proceeds to step 220 in which it determines whether data is being transmitted into terminal 14. If so, the CPU reads the data (step 227) and in response, transmits the requested information via output port 124 (step 224). If, on the other hand, the charging current was simply charging current and did not contain variable data, the CPU proceeds from step 220 to step 226 in which it transmits all relevant data in a predetermined order to output port 124. After the transmission of data in either step 224 or step 226, the CPU
calculates the amount of charge of the battery pack (step 230).
Returning again to step 218, if amplifier 22 indicates that the battery is being discharged instead of charged, step 218 leads to step 232 in which the CPU calculates the amount of discharge of the battery cells (step 232).
After either of steps 230 or 232, the CPU updates the LCD
display 140 and the sample and hold circuit 148 with the current state of charge of the battery (step 234).
_ Next, the CPU again monitors the temperature sensors 67 and 77 and the full battery voltage and half battery voltage (steps 236 and 238). The CPU also stores data indicating the extreme temperatures and voltages to which the battery pack has been exposed (step 240). Then, the CPU resets the timer 101 (step 241).
Next, the CPU reads the output of A/D converter 31 to determine if there is additional current flowing through the battery cells (step 242), and if so, loops back to the step 218 to monitor the charger or discharge as the case may be. If not, the CPU loops from step 242 to a step 244 in which it updates the timer 101. Until the timer times out as noted in step 245, step 245 leads back to step 242 in which the CPU reads the output of A/D converter 31 to determine if current is flowing. Thus, if no current flows for the duration of the timer, for example, one hour, then step 245 leads back to step 202 in which the CPU
starts timer 62 and enters again into the light-sleep mode. as noted above, this conserves power because most of the power to the CPU is turned off until the interrupt pulse is generated at interrupt port 83 in step 204. This begins another iteration of the flow chart.
FIGURE 4 illustrates one type of design for the amplifier 22. According to this design, the amplifier is a switching type and includes associated circuitry as follows. One side of resistor 20 is connected to a positive input of an amplifier 222 via a switch 150 and a series capacitor 152. The other side of - 16 201 355q resistor 20 is connected to the same input of amplifier 122 via a switch 156 and the capacitor 152. The output of amplifier 222 is supplied through another series capacitor 158 to the switch 23 en route to buffer 25 and the A/D converter of the CPU. To calibrate the amplifier 222, the CPU directs the selection decoder 61 to transmit a binary 1 calibrate pulse ("CAL") to the input of inverter gate 161 and a binary 1 pulse to AND gate 73.
Consequently, a binary zero pulse is sent to the inputs of NAND
gate 160 and AND gate 164, and switch 156 is opened and switch 150 is closed. A square wave clock 168 supplies the other inputs of NAND gate 160, AND gate 164, and an input 151 of AND gate 73.
Consequently, a reference voltage of the battery pack is supplied through switch 150 to a first side of capacitor 152. The other side of capacitor 152 is connected between resistors 170 and 172 which are identical to each other. The resistor 172 is connected to Vcc so that a zero current reference voltage of Vcc/2 is supplied to the positive input of amplifier 222. Resistors 176 and 178 are identical to the resistors 170 and 172 and similarly center the output voltage provided by amplifier 222 through capacitor 158. Resistors 170, 172, 176 and 178 are provided to center the zero current so that the A/D converter can indicate both positive and negative voltages associated with charging and discharging current. Then, when the clock outputs a po~itive pulse to input 151 of gate 73, switch 23 supplies the reference voltage to A/D converter 36 via buffer 25. The CPU reads and stores the reference voltage.
It should also be noted that amplifier 222 is capable of two voltage gain ranges. When a transistor 180 is deactivated by a binary zero signal from port 182 of the CPU, the amplifier provides relatively low gain because a resistor 184 receives all the feed back current. However, when a binary 1 signal is supplied from port 182, the amplifier provides the relatively high gain because resistor 184 is in parallel with a resistor 186. Capacitor 188 ensures that amplifier 22 amplifies only AC
signals. The CPU selects the gain to best utilize the range of the amplifier and A/D converter.
Next, the CPU directs the selection decoder 61 to deliver a binary 1 signal to NAND gate 160 and AND gate 164 by transmitting a binary zero pulse to inverter gate 161 so that the voltages at each end of resistor 20 are sequentially supplied to the first side of capacitor 152 and the resultant, centered voltages are applied to the positive input of amplifier 222. The output of amplifier 222 is smoothed by a capacitor 29 (FIGURE 2) and indicates the voltage across resistor 20 due to either charge or discharge of the battery cells. The voltage is read by the CPU
at the output of the A/D converter.
By the foregoing, a battery charging system comprising a battery pack and an associated battery charger embodying the present invention has been disclosed. However, numerous modifications and substitutions may be made without deviating from the scope of the invention. For example, if desired, a non-switching amplifier may be utilized for amplifier 22. Therefore, the invention has been disclosed by way of illustration and not ~.~
-~ .
limitation, and reference should be made to the following claims to determine the scope of the invention.
The invention deals more particularly with apparatus and processes for minimizing power dissipation by the electronic circuitry, and providing two-way communication between the battery pack and the battery charger.
A previously known battery pack with a microprocessor was disclosed in U.S. Patent No. 4,289,836 to Lemelson. The microprocessor monitors battery parameters such as the state of battery charge, number of charging cycles, battery temperature, and battery pressure. The microprocessor may also be used to control a display for the battery parameters. The battery pack is coupled to a simple power supply for recharging purposes.
Another previously known battery pack is disclosed in U.S. Patent No. 4,553,081 to Koenck which battery pack includes a microprocessor secured to a battery housing. The microprocessor monitors battery operation to determine remaining battery capacity, and counts the number of shallow discharges and successive recharging cycles to estimate deterioration of the battery. Circuitry within the battery pack occasionally causes a discharge of the battery to determine present battery capacity.
The microprocessor and other circuitry require little operating power so that the shelf-life of the battery pack is long. The microprocessor is also coupled to a display for indicating battery capacity and other information obtained from the battery.
~ .~
_ - 2 - 201 3559 The battery pack of U.S. Patent No. 4,553,081 also includes several I/O ports to communicate with a portable computer terminal device and a battery charger.
A general object of the present invention is to provide a battery pack which includes electronic circuitry to monitor battery parameters, which electronic circuitry draws minimal average power.
Another general object of the present invention is to provide a battery pack of the foregoing type and an associated battery charger which can provide two-way communication between each other via a small number of interconnections.
A more specific object of the present invention is to provide a battery pack of the foregoing type which accurately monitors battery discharge and charge.
, -- .. .--~`~ 3 201 3559 The invention resides in an intelligent battery system which monitors battery parameters such as the state of charge of the battery, the temperature of the battery cells and the type of battery. A battery pack within the system comprises positive and negative terminals serially coupled to the battery cells. The positive terminal is adapted to output load current and receive charging current.
According to one aspect of the invention, there is provided a battery system comprising a battery pack. The battery pack includes a plurality of battery cells. Positive and negative terminals are serially coupled to the battery cells, the positive terminal delivering output current to a load and receiving input current in the direction of charging current. Sensing means is provided for sensing current and data pulses flowing through the lS battery cells and said positive and negative terminals. An output port outputs data from the battery pack. Memory means stores battery parameter data. Also, electronic means is coupled to the sensing means and the memory means for transmitting the battery parameter data to the output port in response to the sensing means sensing the current input through the positive terminal in the direction of charging current.
According to another aspect of the invention, there is provided a battery pack comprising a plurality of battery cells having a state of charge. Sensing means is provided for sensing current flowing through the battery cells. Processor means is coupled to the sensing means, the processor means being powered by the battery cells and functional in a relatively high power consumption mode to determine the state of charge of the battery cells based on the amount of current flowing through the battery cells. First means is provided for rendering the processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of the battery cells. Also, second means is provided for automatically rendering the processor means into a non-functional relatively low power current consumption mode at other times to conserve power, wherein the flow of current is due to discharge A
~- 201 355q of or charging of the battery cells, and the processor means determines the state of charge based at least in part on the amount of ampere-hours of the respective discharge or charge current.
According to yet another aspect of the invention there is provided in a battery system comprising a battery pack and a battery charger, the battery pack including a battery and electronic circuitry monitoring battery parameters, a method of minimizing power dissipation by the electronic circuitry. The method comprises the steps of providing a battery pack including a battery and electronic circuitry, the battery having an instantaneous state of charge or discharge. A battery charger is connected to the battery pack for providing a charging current to the battery. A resistor is connected in the battery pack in series with the battery for developing a voltage drop across the resistor indicative of charge current flowing into or discharge current flowing out of the battery. A first portion of the electronic circuitry is caused to enter into a "light-sleep" mode when there is neither charging nor discharging activity sensed for a predetermined period of time. Non-volatile memory is provided for storing battery parameter data sensed or calculated by the first portion of the electronic circuitry. During the light-sleep mode of the first portion of the electronic circuitry, power is supplied to a timer in a second portion of the electronic circuitry, the timer periodically "waking-up" the first portion of the electronic circuitry. In the first portion of the electronic circuitry, the instantaneous state of charge or discharge is sensed upon waking-up. Other battery parameter data is read and calculated during the wake-up period. The battery parameter data is stored in the non-volatile memory, and then the light-sleep mode is re-entered in preparation for the next periodic wake-up by the timer. Also, the cycles of light-sleep and periodic waking-up are continuously repeated until either charging or discharging activity above a threshold is 3S detected or the battery voltage drops below a predetermined level at which time the first portion of the electronic circuitry enters a fully functional mode. Also, an output port is further 4a 201 3559 provided in the battery pack, and the stored battery parameter data is transmitted out of the output port to the charger in response to sensed charge current, wherein the battery includes a series of cells, and further comprising sensing the voltage across a fractional portion of the battery cells.
Preferred embodiment of the invention will now be described with reference to the accompanying drawings, in which:
Figure 1 is a simplified circuit diagram of a battery pack and an associated battery charger in accordance with the present invention.
Figure 2 is a more detailed circuit diagram of the battery pack of Figure 1.
Figure 3 is a timing diagram illustrating digital communication between the battery charger and battery pack of Figure 1.
Figure 4 is a schematic circuit diagram of an amplifier within the battery pack.
Figure 5 is a flow chart illustrting operation of a microprocessor and the other electronic circuitry of Figure 2.
Referring now to the figures in detail wherein like reference numerals indicate like elements throughout the several views, FIGURE 1 illustrates a battery pack generally designated 10 and an associated battery charge 11 embodying the present invention in simplified schematic form. The battery pack includes a plurality of rechargeable battery cells 12 and, by way of example, there are ten to twelve such cells of the nickle cadmium type. Collectively, the battery cells may have a capacity of either two ampere-hours or four ampere-hours. The battery pack 10 further includes a positive terminal 14 and a negative or return terminal 16 to receive charging current from and return charging current to battery charge 11. The positive terminal 14 also can deliver current to a load (not shown).
When the battery cells 12 delivery current to the load, the current flows in the direction indicated by an arrow 18.
Conversely, when the battery cells are charged, current flows in the direction indicated by an arrow 19. Either current develops a voltage across a resistor 20 which is connected in series with the battery terminals and cells. To minimize power dissipation in the resistor 20, the resistor is small, for example, 0.025 ohms.
Battery pack 10 further includes electronic circuitry 21 illustrated in more detail in FIGURE 2. A differential amplifier 22 has inputs connected across the resistor 20 to sense the instantaneous charge or discharge current. The output of the amplifier 22 is applied through a switch 23 and a buffer , 6 201 355~
amplifier 25 to input of an A/D converter 31 within a CPU 28. As described in more detail below, the CPU reads the output of the A/D converter to determine the state of charge of the battery cells based on the measured charge and discharge currents.
In order to minimize power dissipation by the electronic circuitry 21, the CPU 28 is a type which is capable of entering into a non-functional "light-sleep" mode in which power is disconnected from most of the electronic circuitry within the CPU
28 and the CPU cannot monitor battery parameters. Motorolla Model MC68HCll is such a type. The CPU is programmed to enter into the light-sleep mode when there is neither charging nor discharging activity for a predetermined period, for example, one hour. A
timer 101 within the CPU, which may comprise a register incremented with the passage of time, measures the inactive time as described in more detail below. The CPU 28 includes a non-volatile RAM 60 which stores battery parameter data indicating the amount of discharge of the battery cells 12, the number of discharge and recharging cycles, the highest temperature that either the battery cells or the battery system 10 has ever experienced, and the type and serial number of the battery.
During the light-sleep, power is supplied to a timer 62 external to the CPU which periodically "wakes-up" the entire CPU to its functional mode to monitor battery parameters. By way of example, the timer 62 wakes-up the CPU every 250 milliseconds to enable the CPU to read the output of the A/D converter 31 to determine the amount of instantaneous charge or discharge current, if any.
If amplifier 22 indicates battery discharge, the CPU approximates . ,. ~v the ampere-hour discharge during the previous 250 millisecond interval. By way of example, to estimate the amount of discharge between the readings, the CPU may multiply the discharge current times 250 milliseconds. Then, the CPU calculates the remaining charge in the battery cells 12 by subtracting the amount of discharge between the readings from the battery charge calculated at the previous reading.
When awake, the CPU also monitors the temperature of the battery cells by commanding selection decoder 61 via lines 63 to activate a switch 65 coupled to temperature sensor 67 so that the signal provided by temperature sensor 67 is supplied to the input of buffer 25. Simultaneously, the CPU directs the decoder 61 to disable switch 23 via gate 73. The CPU then reads the temperature from the A/D converter. Next, the CPU activities switch 75 by appropriate commands on lines 63 to interconnect battery pack, surface temperature sensor 77 to the input of buffer 25 while simultaneously disabling switches 23 and 65. Next, the CPU
enables switch 79 to interconnect the positive terminal 14 of the battery pack via a voltage divider 81 to the input of buffer 25 while disabling the other switches so that the CPU can monitor the combined voltage of the battery cells. Then, the CPU
activates a switch 87 to interconnect a voltage tap 85, which sensors the voltage of half of the battery cells, to the buffer 25 via a voltage divider 89 while disabling the other switches.
During the light-sleep and functional modes of operation, power is supplied to the CPU via a switch 68 and a buffer amplifier 69. The CPU continuously repeats the foregoing cycles of light-sleep and periodic awakening until either the CPU
detects charging or discharging activity, or the cell voltage drops below a predetermined level. If the voltage drops below this low level, the CPU 28 transmits a reset pulse to a latch 66 which opens the switch 68 and thereby prevents the delivery of power to the CPU 28. Consequently, the CPU enters into a "deep-sleep" mode. By way of example, during light-sleep the CPU draws approximately 20% of the power that it draws during the functional, "awake" mode, and during "deep-sleep", the CPU draws essentially no power. However, as noted above, during deep-sleep, the data is retained in the non-volatile RAM 60.
During the light-sleep and deep-sleep modes, power is still applied to the amplifier 22 and to comparators 70 and 72, which amplifier and comparators are capable of awakening the CPU
from either deep-sleep or light-sleep during charging or discharging. An input of each of the comparators is connected to the output of the amplifier 22. The other, negative input of comparator 70 is provided with a threshold voltage determined by the magnitude of resistors 74 and 76 in relation to the magnitude of resistor 78. The other, positive input of comparator 72 i8 provided with a threshold voltage determined by the magnitude of resistor 76 in relation to the magnitudes of resistors 74 and 78.
When the battery system is connected to a load, a voltage develops across the resistor 20. The voltage is sensed by the amplifier 22 and applied to the comparator 70. If the voltage is above the threshold level, comparator 70 transmits a binary 1 set signal to the latch 66 via OR gate 80. This resumes the supply of power to CPU 28 if it was in deep-sleep. Comparator 70 also transmits a binary 1 signal to interrupt port 83 of the CPU via OR gates 82 and 84. This awakens the CPU from light-sleep if it was in light-sleep and directs the CPU to read the A/D converter and thus, the discharge current. The CPU remains in the functional, awake mode for a predetermined period in which it continuously monitors the discharge. After the predetermined period which, for example, is one hour after the cessation of discharge, the CPU returns to the light-sleep and periodic awakening mode in which timer 62 is used to awaken the CPU. One reason that both the timer 62 and the comparator 82 are used to awaken the CPU from light-sleep is that the comparator is preferably a CMOS or other low power type and may not be sensitive to small discharge currents while the amplifier 22 is sensitive and the timed awakening is useful to monitor such small discharge.
The battery charger 11 includes a source 92 of voltage and an electronic switch 94 which couples the voltage source 92 to the positive terminal 14 of the battery pack. Thus, when the battery charger delivers current to the positive terminal 14, current flows into battery cells 12 and across the resistor 20 in the direction indicated by arrow 19 as noted above. A
corresponding voltage is developed across the input of amplifier 22 and comparator 72. This voltage is greater than the threshold voltage of comparator 72 so that the comparator supplies a binary , . .
10 201 355q 1 set pulse to latch 66 via OR gate 80 which resumes the supply of power to CPU 28 (if it was in deep-sleep) via switch 68 and buffer 69. The comparator 72 also supplies a binary 1 signal to interrupt port 83 via OR gates 82 and 84. As noted above, the signal applied to interrupt port 83 awakens the CPU from light-sleep if it was in light-sleep and directs the CPU to read the A/D converter. Comparator 72 also outputs to a serial data input port 99 via OR gate 101, and if the A/D converter indicates that the battery is receiving current in the polarity of charge, the CPU reads the serial data input port 99.
As illustrated in FIGURE 3, when the battery pack 10 is installed in battery charger 11, the battery charger can transmit a code 102 to the CPU requesting specific battery parameter data lS by delivering current pulses 104 into the positive terminal 14.
The current pulses cause voltage pulses to develop across the resistor 20 and at the outputs of amplifier 22 and comparator 72.
These voltage pulses, as noted above, are supplied to the serial data input port 99 of the CPU. Thus, CPU 28 is awakened by the onset of the first pulse 104 of code 102 by setting of latch 66 (if necessary) and activation of interrupt port 80, and alerted to read the subsequent data. By way of example, the code 102 includes a start bit, a stop bit, and 8 intervening data bits specifying the requested battery parameter data. Code 102 instructs the CPU to transmit battery parameter data to the logic and microprocessor ~ P circuitry 96 within battery charger 11.
This data is the data contained within the non-volatile RAM 60 and, as noted above, includes the amount of discharge of the ~' battery, the battery capacity, the number of charging/recharging cycles, the highest battery cell or surface temperature that the battery has experienced, the type of battery, and the serial number of the battery. The CPU transmits the requested information by outputting serial data pulses 108 from output port 120 and through FET buffer 122 and battery pack port 124. The data is received by the charger at input port 126. Then the battery charger 11 may request additional information by transmitting the respective code into the positive terminal 14.
The CPU is also programmed to transmit all of its battery parameter data to output port 124 in a predetermined order after the onset of receipt of charge current 127 if no specific data request current is received.
After the battery charger receives all the data it requires, it charges the battery cells 12 by delivering charging current to the positive terminal 14 in accordance with the state of charge of the battery cell 12, the type of battery, and the temperatures of the cells and battery pack surface. For example, if the battery is substantially discharged and within a safe charging temperature range, charger 11 supplies a m~x;mum charging current. However, if the battery is nearly fully charged or above the temperature range, then charger 11 supplies a lesser current. Charging techniques suitable for the battery pack 10 and battery charger 11 are described in commonly assigned U.S. Patent Application Serial No. 115,155 entitled "Battery Charging System"
filed October 30, 1987 by George W. Bauer et al, and U.S. Patent No. 4,554,500 to Sokira issued November 19, 1985, which patent application and patent are hereby incorporated by reference as part of the present disclosure.
It should be appreciated that the positive terminal 14 serves to route operating current from the battery cells to an actual load, route data from battery charger 11 to the CPU, and route charging current from the battery charger to the battery cells.
During charging of the battery pack 10, the CPU is continuously awake and functional to accurately monitor the charging current.
Electronic circuitry 21 further includes a communication link 130 comprising a zener diode 132, input resistors 134 and 136 and transistor 137 which link receives data at port 124 and transmits it to the serial data input port 99 of the CPU via OR
gate 101. This communication link may be used at the factory or during service to transmit a code to the CPU to elicit data via FET 122. However, battery charger 11 and other types of battery chargers may not be equipped to transmit data to the CPU via port 124 and communication link 130 so that transmission of a data request into terminal 14 either by a specific data code or by the onset of charging current is important.
The battery pack 10 further includes an LCD bar graph 140 which receives information from the CPU via lines 142 indicating ~ 13 201 3559 the amount of charge remaining in the battery, and displays this information. The CPU also outputs via line 144, an analog signal, representing the remaining charge in the battery, through a switch 146 to a sample and hold circuit 148. The analog output S is provided on port 150 of the battery pack to supply an optional meter within a video camera or other appliance. The output of the sample and hold circuit 148 is also fed back to the A/D converter for calibration purposes.
FIGURES 5(a) and 5(b) form a flow chart illustrating the operation of the CPU and associated circuitry. To begin the operation, the system is powered-up by the application of power to the CPU (step 200) by setting of latch 66 as noted above.
Then, the CPU starts the timer 62 (step 202) by transmitting a pulse on line 205 and enters into the non-functional, light-sleep mode (step 203). Next, a pulse is applied to interrupt port 83 either by the timer, comparator 70 or comparator 72 (step 204).
As noted above, comparator 70 transmits such a pulse to interrupt port 83 upon discharge of the battery and comparator 72 transmits such a pulse to interrupt port 83 upon charge of the battery.
After many of the three events, the CPU awakens from the light or deep-sleep, reads the temperature sensors 67 and 77, the full battery voltage, and the half battery voltage to determine if the battery is within safe operating limits (steps 206 and 208).
Next, the CPU reads the charge or discharge current by reading A/D converter 31 (step 210). If no current is flowing at the time, the CPU determines whether the overall battery voltage is less than the low, cut-off level which represents the specified _r;;~
`~ 14 20 1 3559 usable limit of the battery pack (step 214). If the battery voltage is below this level, the CPU transmits a reset pulse on line 215 to latch 66 to power-down the CPU. If not, the CPU loops back to step 202 to start the timer again.
Returning to step 212, if current was flowing at the time, the CPU determines whether the current is in the charge or discharge mode (step 218) by reading the output of the A/D
converter. If in the charge mode, the CPU proceeds to step 220 in which it determines whether data is being transmitted into terminal 14. If so, the CPU reads the data (step 227) and in response, transmits the requested information via output port 124 (step 224). If, on the other hand, the charging current was simply charging current and did not contain variable data, the CPU proceeds from step 220 to step 226 in which it transmits all relevant data in a predetermined order to output port 124. After the transmission of data in either step 224 or step 226, the CPU
calculates the amount of charge of the battery pack (step 230).
Returning again to step 218, if amplifier 22 indicates that the battery is being discharged instead of charged, step 218 leads to step 232 in which the CPU calculates the amount of discharge of the battery cells (step 232).
After either of steps 230 or 232, the CPU updates the LCD
display 140 and the sample and hold circuit 148 with the current state of charge of the battery (step 234).
_ Next, the CPU again monitors the temperature sensors 67 and 77 and the full battery voltage and half battery voltage (steps 236 and 238). The CPU also stores data indicating the extreme temperatures and voltages to which the battery pack has been exposed (step 240). Then, the CPU resets the timer 101 (step 241).
Next, the CPU reads the output of A/D converter 31 to determine if there is additional current flowing through the battery cells (step 242), and if so, loops back to the step 218 to monitor the charger or discharge as the case may be. If not, the CPU loops from step 242 to a step 244 in which it updates the timer 101. Until the timer times out as noted in step 245, step 245 leads back to step 242 in which the CPU reads the output of A/D converter 31 to determine if current is flowing. Thus, if no current flows for the duration of the timer, for example, one hour, then step 245 leads back to step 202 in which the CPU
starts timer 62 and enters again into the light-sleep mode. as noted above, this conserves power because most of the power to the CPU is turned off until the interrupt pulse is generated at interrupt port 83 in step 204. This begins another iteration of the flow chart.
FIGURE 4 illustrates one type of design for the amplifier 22. According to this design, the amplifier is a switching type and includes associated circuitry as follows. One side of resistor 20 is connected to a positive input of an amplifier 222 via a switch 150 and a series capacitor 152. The other side of - 16 201 355q resistor 20 is connected to the same input of amplifier 122 via a switch 156 and the capacitor 152. The output of amplifier 222 is supplied through another series capacitor 158 to the switch 23 en route to buffer 25 and the A/D converter of the CPU. To calibrate the amplifier 222, the CPU directs the selection decoder 61 to transmit a binary 1 calibrate pulse ("CAL") to the input of inverter gate 161 and a binary 1 pulse to AND gate 73.
Consequently, a binary zero pulse is sent to the inputs of NAND
gate 160 and AND gate 164, and switch 156 is opened and switch 150 is closed. A square wave clock 168 supplies the other inputs of NAND gate 160, AND gate 164, and an input 151 of AND gate 73.
Consequently, a reference voltage of the battery pack is supplied through switch 150 to a first side of capacitor 152. The other side of capacitor 152 is connected between resistors 170 and 172 which are identical to each other. The resistor 172 is connected to Vcc so that a zero current reference voltage of Vcc/2 is supplied to the positive input of amplifier 222. Resistors 176 and 178 are identical to the resistors 170 and 172 and similarly center the output voltage provided by amplifier 222 through capacitor 158. Resistors 170, 172, 176 and 178 are provided to center the zero current so that the A/D converter can indicate both positive and negative voltages associated with charging and discharging current. Then, when the clock outputs a po~itive pulse to input 151 of gate 73, switch 23 supplies the reference voltage to A/D converter 36 via buffer 25. The CPU reads and stores the reference voltage.
It should also be noted that amplifier 222 is capable of two voltage gain ranges. When a transistor 180 is deactivated by a binary zero signal from port 182 of the CPU, the amplifier provides relatively low gain because a resistor 184 receives all the feed back current. However, when a binary 1 signal is supplied from port 182, the amplifier provides the relatively high gain because resistor 184 is in parallel with a resistor 186. Capacitor 188 ensures that amplifier 22 amplifies only AC
signals. The CPU selects the gain to best utilize the range of the amplifier and A/D converter.
Next, the CPU directs the selection decoder 61 to deliver a binary 1 signal to NAND gate 160 and AND gate 164 by transmitting a binary zero pulse to inverter gate 161 so that the voltages at each end of resistor 20 are sequentially supplied to the first side of capacitor 152 and the resultant, centered voltages are applied to the positive input of amplifier 222. The output of amplifier 222 is smoothed by a capacitor 29 (FIGURE 2) and indicates the voltage across resistor 20 due to either charge or discharge of the battery cells. The voltage is read by the CPU
at the output of the A/D converter.
By the foregoing, a battery charging system comprising a battery pack and an associated battery charger embodying the present invention has been disclosed. However, numerous modifications and substitutions may be made without deviating from the scope of the invention. For example, if desired, a non-switching amplifier may be utilized for amplifier 22. Therefore, the invention has been disclosed by way of illustration and not ~.~
-~ .
limitation, and reference should be made to the following claims to determine the scope of the invention.
Claims (18)
1. A battery system comprising a battery pack, said battery pack including:
a plurality of battery cells;
positive and negative terminals serially coupled to said battery cells, said positive terminal delivering output current to a load and receiving input current in the direction of charging current;
sensing means for sensing current and data pulses flowing through said battery cells and said positive and negative terminals;
an output port outputting data from said battery pack;
memory means for storing battery parameter data; and electronic means, coupled to the sensing means and said memory means, for transmitting said battery parameter data to said output port in response to said sensing means sensing said current input through said positive terminal in the direction of charging current.
a plurality of battery cells;
positive and negative terminals serially coupled to said battery cells, said positive terminal delivering output current to a load and receiving input current in the direction of charging current;
sensing means for sensing current and data pulses flowing through said battery cells and said positive and negative terminals;
an output port outputting data from said battery pack;
memory means for storing battery parameter data; and electronic means, coupled to the sensing means and said memory means, for transmitting said battery parameter data to said output port in response to said sensing means sensing said current input through said positive terminal in the direction of charging current.
2. A battery system as set forth in claim 1 wherein said output port of said battery pack is separate from said positive and negative terminals.
3. A battery system as set forth in claim 1 wherein the sensing means comprises a resistor in series with said positive and negative terminals and said battery cells, and an amplifier coupled across the series resistor to measure the voltage across said series resistor, the output of said amplifier being provided to said electronic means.
4. A battery system as set forth in claim 3 wherein:
said sensing means further comprises a comparator having a first input connected to the output of said amplifier, a second input connected to a source of threshold voltage, and an output connected to said electronic means, whereby said electronic means receives a binary signal corresponding to the level of said input current; and said electronic means includes means for reading said binary signal.
said sensing means further comprises a comparator having a first input connected to the output of said amplifier, a second input connected to a source of threshold voltage, and an output connected to said electronic means, whereby said electronic means receives a binary signal corresponding to the level of said input current; and said electronic means includes means for reading said binary signal.
5. A battery system as set forth in claim 1 wherein said electronic means responds to the sensing means sensing data pulses input through said positive terminal in the direction of charging current, and transmits specific battery parameter data over said output port in response to said data pulses.
6. A battery system as set forth in claim 2 wherein said data pulses initiate transmission of battery parameter data by the electronic means describing the state of charge of said battery cells.
7. A battery system as set forth in claim 5 further comprising:
a battery charger, said battery charger including means releasably coupled to said positive and negative terminals of said battery pack for delivering substantial charging current and the data pulses to said positive terminal and battery cells.
a battery charger, said battery charger including means releasably coupled to said positive and negative terminals of said battery pack for delivering substantial charging current and the data pulses to said positive terminal and battery cells.
8. A battery system as set forth in claim 7 wherein said battery charger further comprises means coupled to said output port of said battery pack for reading and processing said battery parameter data, and controlling the means for delivering substantial charging current in accordance with said battery parameter data.
9. A battery pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said flow of current is due to discharge of said battery cells, and said processor means determines the state of charge based at least in part on the amount of ampere-hours of the discharge current.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said flow of current is due to discharge of said battery cells, and said processor means determines the state of charge based at least in part on the amount of ampere-hours of the discharge current.
10. A battery pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said flow of current is due to charging of said battery cells, and said processor means determines the state of charge based at least in part on the amount of ampere-hours of the charge current.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said flow of current is due to charging of said battery cells, and said processor means determines the state of charge based at least in part on the amount of ampere-hours of the charge current.
11. A battery pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode a other times to conserve power;
wherein said second rendering means renders said processor means into said relatively low power consumption mode when said current does not flow through said battery pack for a predetermined period.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode a other times to conserve power;
wherein said second rendering means renders said processor means into said relatively low power consumption mode when said current does not flow through said battery pack for a predetermined period.
12. A battery pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein the first rendering means comprises a timer which periodically renders said processor means functional.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein the first rendering means comprises a timer which periodically renders said processor means functional.
13. A batter pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
further comprising third means for rendering said microprocessor means into a still lower power consumption mode when the voltage of said battery cells falls below a predetermined level.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
further comprising third means for rendering said microprocessor means into a still lower power consumption mode when the voltage of said battery cells falls below a predetermined level.
14. A battery pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said second rendering means comprises timer.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said second rendering means comprises timer.
15. A battery pack comprising:
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said processor means when functional also monitors battery temperature.
a plurality of battery cells having a state of charge;
sensing means for sensing current flowing through said battery cells;
processor means coupled to the sensing means, said processor means powered by said battery cells and functional in a relatively high power consumption mode to determine the state of charge of said battery cells based on the amount of current flowing through said battery cells;
first means for rendering said processor means into the functional, relatively high power consumption mode at times when the battery is being charged or discharged to monitor the amount of current flow and determine the state of charge of said battery cells; and second means for automatically rendering said processor means into a non-functional relatively low power current consumption mode at other times to conserve power;
wherein said processor means when functional also monitors battery temperature.
16. In a battery system comprising a battery pack and a battery charger, said battery pack including a battery and electronic circuitry monitoring battery parameters, a method of minimizing power dissipation by the electronic circuitry, comprising:
providing a battery pack including a battery and electronic circuitry, said battery having an instantaneous state of charge or discharge;
connecting a battery charger to the battery pack for providing a charging current to the battery;
connecting, in the battery pack, a resistor in series with the battery for developing a voltage drop across the resistor indicative of charge current flowing into or discharge current flowing out of the battery;
causing a first portion of the electronic circuitry to enter into a "light-sleep" mode when there is neither charging nor discharging activity sensed for a predetermined period of time;
providing non-volatile memory for storing battery parameter data sensed or calculated by the first portion of the electronic circuitry;
during the light-sleep mode of the first portion of the electronic circuitry, supplying power to a timer in a second portion of the electronic circuitry, said timer periodically "waking-up" the first portion of the electronic circuitry;
in the first portion of the electronic circuitry, sensing the instantaneous state of charge or discharge upon waking-up, reading and calculating other battery parameter data during the wake-up period, storing said battery parameter data in the non-volatile memory, and then re-entering the light-sleep mode in preparation for the next periodic wake-up by the timer; and continuously repeating the cycles of light-sleep and periodic waking-up until either charging or discharging activity above a threshold is detected or the battery voltage drops below a predetermined level at which time the first portion of the electronic circuitry enters a fully functional mode;
further comprising:
providing an output port in the battery pack; and transmitting the stored battery parameter data out of the output port to the charger in response to sensed charge current;
wherein the battery includes a series of cells, and further comprising:
sensing the voltage across a fractional portion of the battery cells.
providing a battery pack including a battery and electronic circuitry, said battery having an instantaneous state of charge or discharge;
connecting a battery charger to the battery pack for providing a charging current to the battery;
connecting, in the battery pack, a resistor in series with the battery for developing a voltage drop across the resistor indicative of charge current flowing into or discharge current flowing out of the battery;
causing a first portion of the electronic circuitry to enter into a "light-sleep" mode when there is neither charging nor discharging activity sensed for a predetermined period of time;
providing non-volatile memory for storing battery parameter data sensed or calculated by the first portion of the electronic circuitry;
during the light-sleep mode of the first portion of the electronic circuitry, supplying power to a timer in a second portion of the electronic circuitry, said timer periodically "waking-up" the first portion of the electronic circuitry;
in the first portion of the electronic circuitry, sensing the instantaneous state of charge or discharge upon waking-up, reading and calculating other battery parameter data during the wake-up period, storing said battery parameter data in the non-volatile memory, and then re-entering the light-sleep mode in preparation for the next periodic wake-up by the timer; and continuously repeating the cycles of light-sleep and periodic waking-up until either charging or discharging activity above a threshold is detected or the battery voltage drops below a predetermined level at which time the first portion of the electronic circuitry enters a fully functional mode;
further comprising:
providing an output port in the battery pack; and transmitting the stored battery parameter data out of the output port to the charger in response to sensed charge current;
wherein the battery includes a series of cells, and further comprising:
sensing the voltage across a fractional portion of the battery cells.
17. In a battery system comprising a battery pack and a battery charger, said battery pack including a battery and electronic circuitry monitoring battery parameters, a method of minimizing power dissipation by the electronic circuitry, comprising:
providing a battery pack including a battery and electronic circuitry, said battery having an instantaneous state of charge or discharge;
connecting a battery charger to the batter pack for providing a charging current to the battery;
connecting, in the battery pack, a resistor in series with the battery for developing a voltage drop across the resistor indicative of charge current flowing into or discharge current flowing out of the battery;
causing a first portion of the electronic circuitry to enter into a "light-sleep" mode when there is neither charging nor discharging activity sensed for a predetermined period of time;
providing non-volatile memory for storing battery parameter data sensed or calculated by the first portion of the electronic circuitry;
during the light-sleep mode of the first portion of the electronic circuitry, supplying power to a timer in a second portion of the electronic circuitry, said timer periodically "waking-up" the first portion of the electronic circuitry;
in the first portion of the electronic circuitry, sensing the instantaneous state of charge or discharge upon waking-up, reading and calculating other battery parameter data during the wake-up period, storing said battery parameter data in the non-volatile memory, and then re-entering the light-sleep mode in preparation for the next periodic wake-up by the timer; and continuously repeating the cycles of light-sleep and periodic waking-up until either charging or discharging activity above a threshold is detected or the battery voltage drops below a predetermined level, at which time the first portion of the electronic circuitry enters a fully functional mode;
further comprising:
providing an output port in the battery pack; and transmitting the stored battery parameter data out of the output port to the charger in response to sensed charge current;
further comprising:
transmitting a coded signal, in the form of current pulses, from the battery charger to the battery pack, via at lest one of the battery terminals used for providing charging current to the battery.
providing a battery pack including a battery and electronic circuitry, said battery having an instantaneous state of charge or discharge;
connecting a battery charger to the batter pack for providing a charging current to the battery;
connecting, in the battery pack, a resistor in series with the battery for developing a voltage drop across the resistor indicative of charge current flowing into or discharge current flowing out of the battery;
causing a first portion of the electronic circuitry to enter into a "light-sleep" mode when there is neither charging nor discharging activity sensed for a predetermined period of time;
providing non-volatile memory for storing battery parameter data sensed or calculated by the first portion of the electronic circuitry;
during the light-sleep mode of the first portion of the electronic circuitry, supplying power to a timer in a second portion of the electronic circuitry, said timer periodically "waking-up" the first portion of the electronic circuitry;
in the first portion of the electronic circuitry, sensing the instantaneous state of charge or discharge upon waking-up, reading and calculating other battery parameter data during the wake-up period, storing said battery parameter data in the non-volatile memory, and then re-entering the light-sleep mode in preparation for the next periodic wake-up by the timer; and continuously repeating the cycles of light-sleep and periodic waking-up until either charging or discharging activity above a threshold is detected or the battery voltage drops below a predetermined level, at which time the first portion of the electronic circuitry enters a fully functional mode;
further comprising:
providing an output port in the battery pack; and transmitting the stored battery parameter data out of the output port to the charger in response to sensed charge current;
further comprising:
transmitting a coded signal, in the form of current pulses, from the battery charger to the battery pack, via at lest one of the battery terminals used for providing charging current to the battery.
18. A method according to claim 17, wherein the coded signal is used to request specific battery parameter data from the electronic circuitry.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/189,958 US4965738A (en) | 1988-05-03 | 1988-05-03 | Intelligent battery system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2013559A1 CA2013559A1 (en) | 1990-11-03 |
| CA2013559C true CA2013559C (en) | 1995-10-31 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002013559A Expired - Fee Related CA2013559C (en) | 1988-05-03 | 1990-03-30 | Intelligent battery system |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4965738A (en) |
| EP (1) | EP0448755B1 (en) |
| AT (1) | ATE122151T1 (en) |
| CA (1) | CA2013559C (en) |
| DE (2) | DE448755T1 (en) |
| ES (1) | ES2041626T1 (en) |
| GR (1) | GR930300077T1 (en) |
Families Citing this family (223)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5619117A (en) * | 1982-06-07 | 1997-04-08 | Norand Corporation | Battery pack having memory |
| US5986435A (en) * | 1982-06-07 | 1999-11-16 | Intermec Ip Corp. | Method of utilizing a battery powered system having two processors |
| US5278487A (en) * | 1988-03-15 | 1994-01-11 | Norand Corporation | Battery conditioning system having communication with battery parameter memory means in conjunction with battery conditioning |
| US6075340A (en) | 1985-11-12 | 2000-06-13 | Intermec Ip Corp. | Battery pack having memory |
| US6271643B1 (en) | 1986-12-18 | 2001-08-07 | Intermec Ip Corp. | Battery pack having memory |
| US5182546A (en) * | 1988-02-12 | 1993-01-26 | Canon Kabushiki Kaisha | Electronic apparatus which can discriminate between different power sources which it uses |
| US5047961A (en) * | 1988-05-31 | 1991-09-10 | Simonsen Bent P | Automatic battery monitoring system |
| JPH07120536B2 (en) * | 1989-03-31 | 1995-12-20 | 三菱電機株式会社 | Battery level recognition device |
| US5164652A (en) * | 1989-04-21 | 1992-11-17 | Motorola, Inc. | Method and apparatus for determining battery type and modifying operating characteristics |
| US5017856A (en) * | 1989-06-30 | 1991-05-21 | Motorola, Inc. | Battery charging system |
| EP0432690B1 (en) * | 1989-12-11 | 1996-03-13 | Canon Kabushiki Kaisha | Charging apparatus |
| EP0435317A3 (en) * | 1989-12-28 | 1992-06-17 | Kabushiki Kaisha Toshiba | Personal computer for performing charge and switching control of different types of battery packs |
| US5363312A (en) * | 1990-03-30 | 1994-11-08 | Kabushiki Kaisha Toshiba | Method and apparatus for battery control |
| US5427679A (en) * | 1990-10-23 | 1995-06-27 | Daniels; Byron C. | Septic system filter assembly, filter arrangement |
| US6377028B1 (en) | 1990-10-23 | 2002-04-23 | Texas Instruments Incorporated | System for charging monitoring batteries for a microprocessor based method |
| US5432429A (en) | 1990-10-23 | 1995-07-11 | Benchmarq Microelectronics, Inc. | System for charging/monitoring batteries for a microprocessor based system |
| US5563496A (en) * | 1990-12-11 | 1996-10-08 | Span, Inc. | Battery monitoring and charging control unit |
| WO1992011680A1 (en) * | 1990-12-17 | 1992-07-09 | Motorola, Inc. | Battery characteristic detection scheme and apparatus |
| US5136620A (en) * | 1990-12-31 | 1992-08-04 | Eaves Stephen S | Battery charge cycle counter |
| GB2251515B (en) * | 1991-01-03 | 1995-07-12 | Technophone Ltd | Rechargeable battery |
| US5345392A (en) * | 1991-01-25 | 1994-09-06 | International Business Machines Corporation | Battery charge monitor for a personal computer |
| US5239652A (en) * | 1991-02-04 | 1993-08-24 | Apple Computer, Inc. | Arrangement for reducing computer power consumption by turning off the microprocessor when inactive |
| US5153558A (en) * | 1991-02-08 | 1992-10-06 | Delco Electronics Corp. | Vehicle security system with battery tampering detection |
| DE4106725A1 (en) * | 1991-03-02 | 1992-09-03 | Bosch Gmbh Robert | BATTERY CHARGE LEVEL INDICATOR |
| US5164761A (en) * | 1991-03-06 | 1992-11-17 | Nikon Corporation | Battery system for camera |
| US5225763A (en) * | 1991-03-20 | 1993-07-06 | Sherwood Medical Company | Battery charging circuit and method for an ambulatory feeding pump |
| DE4110777A1 (en) * | 1991-03-28 | 1992-10-01 | Bosch Gmbh Robert | CIRCUIT ARRANGEMENT FOR MEASURING AND DISPLAYING THE AVAILABLE CAPACITY OF A ACCUMULATOR |
| DE4230204A1 (en) * | 1991-09-09 | 1993-03-11 | Toshiba Kawasaki Kk | Mains supply control for personal computer and coupled expansion unit - has intelligent power supply units within computer and expansion unit, each with fault detector |
| US5184059A (en) * | 1991-09-16 | 1993-02-02 | Motorola, Inc. | Expanded battery capacity identification scheme and apparatus |
| US5321626A (en) * | 1991-09-25 | 1994-06-14 | Spd Technologies Inc. | Battery performance monitoring and forecasting system |
| US5254928A (en) * | 1991-10-01 | 1993-10-19 | Apple Computer, Inc. | Power management system for battery powered computers |
| FR2682330B1 (en) * | 1991-10-11 | 1994-09-16 | Peugeot Automobiles | SYSTEM FOR CONTROLLING THE ENERGY OF A BATTERY SUPPLYING AN ELECTRIC MOTOR OF DRIVE OF A VEHICLE. |
| EP0539640A1 (en) * | 1991-10-30 | 1993-05-05 | Texas Instruments Limited | Improvements in or relating to batteries |
| US5341503A (en) * | 1992-04-16 | 1994-08-23 | International Business Machines Corporation | Battery operated computer having improved battery gauge and system for measuring battery charge |
| US5420493A (en) * | 1992-06-30 | 1995-05-30 | Apple Computer, Inc. | Power supply and battery charger |
| US5357203A (en) * | 1992-07-08 | 1994-10-18 | Benchmarq Microelectronics, Inc. | Battery monitoring circuit for operating with high battery discharge rates |
| US5284719A (en) * | 1992-07-08 | 1994-02-08 | Benchmarq Microelectronics, Inc. | Method and apparatus for monitoring battery capacity |
| US6107802A (en) * | 1992-07-08 | 2000-08-22 | Matthews; Wallace Edward | Battery pack with monitoring function utilizing association with a battery charging system |
| US5440221A (en) | 1992-07-08 | 1995-08-08 | Benchmarg Microelectronics, Inc. | Method and apparatus for monitoring batttery capacity with charge control |
| US6369576B1 (en) | 1992-07-08 | 2002-04-09 | Texas Instruments Incorporated | Battery pack with monitoring function for use in a battery charging system |
| JPH06124731A (en) * | 1992-08-31 | 1994-05-06 | Toshiba Corp | Attachment for external battery connection, battery pack and battery discrimination and control method |
| US5530336A (en) * | 1992-09-17 | 1996-06-25 | Sony Corporation | Battery protection circuit |
| JP3291530B2 (en) * | 1992-09-17 | 2002-06-10 | ソニー株式会社 | Battery protection circuit |
| US5325040A (en) * | 1992-09-21 | 1994-06-28 | Motorola, Inc. | Method and apparatus for charging a battery powered electronic device |
| US5592069A (en) * | 1992-10-07 | 1997-01-07 | Dallas Semiconductor Corporation | Battery charger |
| DE4234231A1 (en) * | 1992-10-10 | 1994-04-14 | Wuerth Adolf Gmbh & Co Kg | Rechargeable battery |
| DE69331492T2 (en) * | 1992-10-23 | 2002-08-29 | Sony Corp | BATTERY PACK |
| FR2697637B1 (en) * | 1992-11-04 | 1994-12-16 | Renault | Method and device for measuring the charge of a storage battery. |
| US5629604A (en) * | 1992-11-13 | 1997-05-13 | Zenith Data Systems Corporation | Computer power supply system |
| US5371453A (en) * | 1993-01-28 | 1994-12-06 | Motorola, Inc. | Battery charger system with common charge and data exchange port |
| EP0746895B1 (en) * | 1993-03-05 | 2000-08-30 | Motorola, Inc. | Battery with a memory for storage of charging methods |
| FR2704982B1 (en) * | 1993-05-06 | 1995-06-09 | Alsthom Cge Alcatel | ELECTROCHEMICAL GENERATOR RECOGNITION AND MANAGEMENT SYSTEM. |
| JP3172977B2 (en) * | 1993-05-26 | 2001-06-04 | 富士重工業株式会社 | In-vehicle battery capacity meter |
| JP2998877B2 (en) * | 1993-07-26 | 2000-01-17 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Battery packs and electric / electronic devices |
| US5864220A (en) * | 1993-09-16 | 1999-01-26 | Chartec Laboratories A/S | Method and apparatus for controlling the charging of a rechargeable battery to ensure that full charge is achieved without damaging the battery |
| US5403093A (en) * | 1993-11-12 | 1995-04-04 | Anton/Bauer, Inc. | DT/Dt detector for cell pack charge determination |
| US5557188A (en) * | 1994-02-01 | 1996-09-17 | Sun Microsystems, Inc. | Smart battery system and interface |
| US6274950B1 (en) * | 1994-03-03 | 2001-08-14 | American Power Conversion | Battery communication system |
| US5608306A (en) * | 1994-03-15 | 1997-03-04 | Ericsson Inc. | Rechargeable battery pack with identification circuit, real time clock and authentication capability |
| EP1149744A3 (en) | 1994-06-22 | 2001-12-19 | Intra Development A/S | Anti-theft battery |
| US5565756A (en) * | 1994-07-11 | 1996-10-15 | Motorola, Inc. | Microprocessor controlled portable battery charger and method of charging using same |
| US5606242A (en) * | 1994-10-04 | 1997-02-25 | Duracell, Inc. | Smart battery algorithm for reporting battery parameters to an external device |
| US5621298A (en) * | 1994-10-06 | 1997-04-15 | Motor Appliance Corporation | Power supply with automatic charge measuring capability |
| US5631539A (en) * | 1994-10-24 | 1997-05-20 | Norand Corporation | Process and apparatus for charging lithium cells or the like |
| US5633573A (en) * | 1994-11-10 | 1997-05-27 | Duracell, Inc. | Battery pack having a processor controlled battery operating system |
| US5717306A (en) * | 1994-11-18 | 1998-02-10 | Shipp; John I. | Battery identification and power interrupt system |
| US5572110A (en) * | 1994-12-15 | 1996-11-05 | Intel Corporation | Smart battery charger system |
| US5568039A (en) * | 1994-12-16 | 1996-10-22 | Motorola, Inc. | Apparatus and method of providing an initiation voltage to a rechargeable battery system |
| FR2731110B1 (en) * | 1995-02-23 | 1997-05-16 | Texas Instruments France | RECHARGEABLE BATTERY PROTECTION DEVICE AND MOSFET TRANSISTOR EQUIPPED WITH THIS DEVICE |
| US5587924A (en) * | 1995-03-31 | 1996-12-24 | Compaq Computer Corporation | Automatic system for handling batteries |
| US5596567A (en) * | 1995-03-31 | 1997-01-21 | Motorola, Inc. | Wireless battery charging system |
| JP3649296B2 (en) * | 1995-05-12 | 2005-05-18 | ソニー株式会社 | Battery pack and electronic equipment |
| US5625291A (en) * | 1995-05-16 | 1997-04-29 | Brink; Gregory D. | System for exchanging information in a battery mailbox |
| US5780992A (en) * | 1995-08-09 | 1998-07-14 | Norand Corporation | Rechargeable battery system adaptable to a plurality of battery types |
| US5696436A (en) * | 1995-10-27 | 1997-12-09 | Motorola Inc. | Method and system for battery charging |
| US5646501A (en) * | 1995-11-02 | 1997-07-08 | Lucent Technologies Inc. | Flexible power architecture which supports multiple battery technologies for use with a portable device |
| JP3575646B2 (en) * | 1995-12-06 | 2004-10-13 | ソニー株式会社 | Battery Pack |
| JPH09271144A (en) * | 1996-01-29 | 1997-10-14 | Sony Corp | Power supply identifying method, battery pack, and electronic device |
| US5767778A (en) * | 1996-03-06 | 1998-06-16 | Aspire Corporation | Event sensing circuit and alert generator |
| DE19610627A1 (en) * | 1996-03-19 | 1997-09-25 | Bosch Gmbh Robert | Microcontroller with self-alarm device |
| US6008620A (en) * | 1996-04-05 | 1999-12-28 | Sony Corporation | Battery charging device, method for charging battery pack and battery pack |
| JP3270327B2 (en) * | 1996-05-24 | 2002-04-02 | セイコーインスツルメンツ株式会社 | Overcharge / discharge detection circuit |
| US5867008A (en) * | 1996-06-05 | 1999-02-02 | Double-Time Battery Corporation | Overcharge protection circuitry for rechargeable battery pack |
| US5729115A (en) * | 1996-06-11 | 1998-03-17 | Ericsson Inc. | Apparatus and method for identifying and charging batteries of different types |
| US6625477B1 (en) | 1996-06-12 | 2003-09-23 | Ericsson Inc. | Apparatus and method for identifying and charging batteries of different types |
| KR0181164B1 (en) * | 1996-07-06 | 1999-05-15 | 삼성전자주식회사 | Charging apparatus for variable kinds of batteries and its control method |
| US5754027A (en) * | 1996-07-08 | 1998-05-19 | Motorola, Inc. | Battery pack and associated charging system |
| WO1998002933A1 (en) * | 1996-07-17 | 1998-01-22 | Duracell Inc. | Battery operating system |
| US8198900B2 (en) | 1996-07-29 | 2012-06-12 | Midtronics, Inc. | Automotive battery charging system tester |
| US8872517B2 (en) | 1996-07-29 | 2014-10-28 | Midtronics, Inc. | Electronic battery tester with battery age input |
| US6850037B2 (en) | 1997-11-03 | 2005-02-01 | Midtronics, Inc. | In-vehicle battery monitor |
| US6566883B1 (en) | 1999-11-01 | 2003-05-20 | Midtronics, Inc. | Electronic battery tester |
| SE515366C2 (en) * | 1996-11-20 | 2001-07-23 | Ericsson Telefon Ab L M | Battery pack for a portable electrical appliance and way of charging the same |
| KR200161967Y1 (en) * | 1997-05-01 | 1999-12-01 | 윤종용 | A portable electronic appliance |
| US6025695A (en) * | 1997-07-09 | 2000-02-15 | Friel; Daniel D. | Battery operating system |
| US7774151B2 (en) * | 1997-11-03 | 2010-08-10 | Midtronics, Inc. | Wireless battery monitor |
| US8958998B2 (en) | 1997-11-03 | 2015-02-17 | Midtronics, Inc. | Electronic battery tester with network communication |
| US7705602B2 (en) | 1997-11-03 | 2010-04-27 | Midtronics, Inc. | Automotive vehicle electrical system diagnostic device |
| US6034504A (en) * | 1998-06-10 | 2000-03-07 | Ericsson Inc. | Two-wire multi-rate battery charger |
| US6266786B1 (en) * | 1998-08-04 | 2001-07-24 | Via Technologies, Inc. | Method and circuit for safeguarding CMOS RAM data in a computer system at low battery power |
| JP2000350374A (en) * | 1999-06-01 | 2000-12-15 | Sony Corp | Portable electronic equipment |
| JP2001037078A (en) * | 1999-07-16 | 2001-02-09 | Alps Electric Co Ltd | Low power consumption on-vehicle control equipment |
| US6252406B1 (en) * | 2000-01-12 | 2001-06-26 | Honeywell International Inc. | Programmable event limit detector for computer system power control |
| US6307349B1 (en) | 2000-02-24 | 2001-10-23 | Intermec Ip Corp. | Battery pack having memory |
| US7446536B2 (en) | 2000-03-27 | 2008-11-04 | Midtronics, Inc. | Scan tool for electronic battery tester |
| US8513949B2 (en) | 2000-03-27 | 2013-08-20 | Midtronics, Inc. | Electronic battery tester or charger with databus connection |
| US7398176B2 (en) | 2000-03-27 | 2008-07-08 | Midtronics, Inc. | Battery testers with secondary functionality |
| JP4566392B2 (en) * | 2000-11-16 | 2010-10-20 | レノボ シンガポール プライヴェート リミテッド | Battery, battery pack, computer apparatus, electric device, and battery temperature control method for determining action level associated with temperature control |
| US7041055B2 (en) * | 2002-10-07 | 2006-05-09 | Mark LoGuidice | Instruments and methods for use in laparoscopic surgery |
| JP2003072059A (en) * | 2001-06-21 | 2003-03-12 | Ricoh Co Ltd | Inkjet recorder and duplicator |
| KR100812209B1 (en) * | 2001-07-18 | 2008-03-13 | 삼성전자주식회사 | Battery apparatus with self-diagnosis and control method thereof |
| US6995963B2 (en) * | 2001-10-22 | 2006-02-07 | Apple Computer, Inc. | Methods and apparatus for charging a battery in a peripheral device |
| US7573159B1 (en) | 2001-10-22 | 2009-08-11 | Apple Inc. | Power adapters for powering and/or charging peripheral devices |
| US6983212B2 (en) * | 2001-11-27 | 2006-01-03 | American Power Conversion Corporation | Battery management system and method |
| DE10202603B4 (en) | 2002-01-24 | 2012-08-30 | Robert Bosch Gmbh | Method and device for slowing down the discharge process of a battery |
| US9018958B2 (en) | 2003-09-05 | 2015-04-28 | Midtronics, Inc. | Method and apparatus for measuring a parameter of a vehicle electrical system |
| US9255955B2 (en) | 2003-09-05 | 2016-02-09 | Midtronics, Inc. | Method and apparatus for measuring a parameter of a vehicle electrical system |
| US7154276B2 (en) | 2003-09-05 | 2006-12-26 | Midtronics, Inc. | Method and apparatus for measuring a parameter of a vehicle electrical system |
| US8164343B2 (en) | 2003-09-05 | 2012-04-24 | Midtronics, Inc. | Method and apparatus for measuring a parameter of a vehicle electrical system |
| US7977914B2 (en) * | 2003-10-08 | 2011-07-12 | Midtronics, Inc. | Battery maintenance tool with probe light |
| US20050162122A1 (en) * | 2004-01-22 | 2005-07-28 | Dunn Glenn M. | Fuel cell power and management system, and technique for controlling and/or operating same |
| US7777612B2 (en) | 2004-04-13 | 2010-08-17 | Midtronics, Inc. | Theft prevention device for automotive vehicle service centers |
| US7772850B2 (en) | 2004-07-12 | 2010-08-10 | Midtronics, Inc. | Wireless battery tester with information encryption means |
| US7581119B2 (en) * | 2004-07-18 | 2009-08-25 | Apple Inc. | Method and system for discovering a power source on a peripheral bus |
| US8344685B2 (en) | 2004-08-20 | 2013-01-01 | Midtronics, Inc. | System for automatically gathering battery information |
| US8436619B2 (en) | 2004-08-20 | 2013-05-07 | Midtronics, Inc. | Integrated tag reader and environment sensor |
| US8442877B2 (en) | 2004-08-20 | 2013-05-14 | Midtronics, Inc. | Simplification of inventory management |
| US9496720B2 (en) | 2004-08-20 | 2016-11-15 | Midtronics, Inc. | System for automatically gathering battery information |
| US7710119B2 (en) | 2004-12-09 | 2010-05-04 | Midtronics, Inc. | Battery tester that calculates its own reference values |
| US7541776B2 (en) * | 2004-12-10 | 2009-06-02 | Apple Inc. | Method and system for operating a portable electronic device in a power-limited manner |
| US7525216B2 (en) | 2005-01-07 | 2009-04-28 | Apple Inc. | Portable power source to provide power to an electronic device via an interface |
| US7176806B2 (en) | 2005-02-23 | 2007-02-13 | Eaglepicher Energy Products Corporation | Physical key to facilitate an inactive mode for a state-of-charge indicator within a battery |
| US7970560B2 (en) | 2005-10-11 | 2011-06-28 | Phoenix Broadband Technologies, Llc | Method and apparatus for measuring and monitoring a power source |
| US7770036B2 (en) * | 2006-02-27 | 2010-08-03 | Apple Inc. | Power management in a portable media delivery system |
| US7848527B2 (en) | 2006-02-27 | 2010-12-07 | Apple Inc. | Dynamic power management in a portable media delivery system |
| US8001400B2 (en) * | 2006-12-01 | 2011-08-16 | Apple Inc. | Power consumption management for functional preservation in a battery-powered electronic device |
| US7791348B2 (en) | 2007-02-27 | 2010-09-07 | Midtronics, Inc. | Battery tester with promotion feature to promote use of the battery tester by providing the user with codes having redeemable value |
| US7808375B2 (en) * | 2007-04-16 | 2010-10-05 | Midtronics, Inc. | Battery run down indicator |
| GB2463829B (en) | 2007-07-17 | 2012-11-21 | Midtronics Inc | Battery tester for electric vehicle |
| US9274157B2 (en) | 2007-07-17 | 2016-03-01 | Midtronics, Inc. | Battery tester for electric vehicle |
| US7944182B2 (en) * | 2007-08-03 | 2011-05-17 | American Power Conversion Corporation | Adjustable battery charger for UPS |
| GB2451650B (en) * | 2007-08-07 | 2012-05-30 | Shakerscope Ltd | Multi Purpose Control Circuit |
| US8358108B2 (en) * | 2007-09-05 | 2013-01-22 | Black & Decker Inc. | System and method for re-initiating charge cycle for battery pack left in a charger |
| US7825615B2 (en) | 2007-10-16 | 2010-11-02 | Glj, Llc | Intelligent motorized appliances with multiple power sources |
| US8203345B2 (en) | 2007-12-06 | 2012-06-19 | Midtronics, Inc. | Storage battery and battery tester |
| US7759900B2 (en) * | 2008-04-02 | 2010-07-20 | American Power Conversion Corporation | Non-isolated charger with bi-polar inputs |
| US8032316B2 (en) | 2008-04-16 | 2011-10-04 | Phoenix Broadband Technologies, Llc | Measuring and monitoring a power source |
| DE102008019810A1 (en) * | 2008-04-19 | 2009-10-22 | Jungheinrich Aktiengesellschaft | Data exchange between a battery unit and a control unit |
| US7959476B2 (en) | 2008-06-16 | 2011-06-14 | Midtronics, Inc. | Clamp for electrically coupling to a battery contact |
| JP5561916B2 (en) * | 2008-07-11 | 2014-07-30 | ミツミ電機株式会社 | Battery status monitoring device |
| WO2010040015A2 (en) | 2008-10-03 | 2010-04-08 | Access Business Group International Llc | Power system |
| RU2508592C2 (en) * | 2008-10-08 | 2014-02-27 | Макита Корпорейшн | Charging system of electric power-driven tool, battery power source of electric power-driven tool, and charging device for batteries of electric power-driven tool |
| CN101714647B (en) * | 2008-10-08 | 2012-11-28 | 株式会社牧田 | Battery pack for power tool, and power tool |
| JP4793426B2 (en) * | 2008-11-10 | 2011-10-12 | パナソニック電工株式会社 | Rechargeable power tool |
| US10132870B2 (en) * | 2009-04-24 | 2018-11-20 | Dell Products L.P. | Dynamic discharging to detect derated battery cells |
| US8581554B2 (en) * | 2009-07-10 | 2013-11-12 | Schneider Electric It Corporation | Battery charging method and apparatus |
| US8604754B2 (en) | 2009-09-10 | 2013-12-10 | Ivus Industries, Llc | Universal power interface bus |
| US11218003B2 (en) * | 2009-09-22 | 2022-01-04 | Phoenix Broadband Technologies, Llc | Method and apparatus for intelligent battery charge equalization and monitoring |
| US9588185B2 (en) | 2010-02-25 | 2017-03-07 | Keith S. Champlin | Method and apparatus for detecting cell deterioration in an electrochemical cell or battery |
| CN102804478B (en) | 2010-03-03 | 2015-12-16 | 密特电子公司 | For the watch-dog of front terminals battery |
| US9229062B2 (en) | 2010-05-27 | 2016-01-05 | Midtronics, Inc. | Electronic storage battery diagnostic system |
| US11740294B2 (en) | 2010-06-03 | 2023-08-29 | Midtronics, Inc. | High use battery pack maintenance |
| US8738309B2 (en) | 2010-09-30 | 2014-05-27 | Midtronics, Inc. | Battery pack maintenance for electric vehicles |
| KR20130030766A (en) | 2010-06-03 | 2013-03-27 | 미드트로닉스, 인크. | Battery pack maintenance for electric vehicles |
| US10046649B2 (en) | 2012-06-28 | 2018-08-14 | Midtronics, Inc. | Hybrid and electric vehicle battery pack maintenance device |
| US9419311B2 (en) | 2010-06-18 | 2016-08-16 | Midtronics, Inc. | Battery maintenance device with thermal buffer |
| JP5170177B2 (en) * | 2010-06-30 | 2013-03-27 | トヨタ自動車株式会社 | Vehicle anti-theft device |
| JP5505932B2 (en) * | 2010-07-16 | 2014-05-28 | トヨタ自動車株式会社 | Charging system |
| US9201120B2 (en) | 2010-08-12 | 2015-12-01 | Midtronics, Inc. | Electronic battery tester for testing storage battery |
| DE102010043582A1 (en) * | 2010-11-08 | 2012-05-10 | Hilti Aktiengesellschaft | Mobile electrical device with charge level indicator and accumulator for this |
| KR101211875B1 (en) * | 2011-03-11 | 2012-12-18 | 삼성에스디아이 주식회사 | Battery management system and battery pack comprising the same |
| US9239605B1 (en) * | 2011-04-04 | 2016-01-19 | Google Inc. | Computing device power state transitions |
| GB2526005B (en) | 2011-09-02 | 2016-04-06 | Pag Ltd | Battery management system, method and battery |
| WO2013070850A2 (en) | 2011-11-10 | 2013-05-16 | Midtronics, Inc. | Battery pack tester |
| EP2645523B1 (en) * | 2012-03-30 | 2016-10-05 | EH Europe GmbH | Battery charging system and method |
| US11325479B2 (en) | 2012-06-28 | 2022-05-10 | Midtronics, Inc. | Hybrid and electric vehicle battery maintenance device |
| US9851411B2 (en) | 2012-06-28 | 2017-12-26 | Keith S. Champlin | Suppressing HF cable oscillations during dynamic measurements of cells and batteries |
| CN102944734B (en) * | 2012-11-21 | 2015-12-23 | 小米科技有限责任公司 | A kind of method of monitor terminal state, supervisory circuit and terminal |
| US9635605B2 (en) | 2013-03-15 | 2017-04-25 | Elwha Llc | Protocols for facilitating broader access in wireless communications |
| US8965288B2 (en) | 2012-12-31 | 2015-02-24 | Elwha Llc | Cost-effective mobile connectivity protocols |
| US9781664B2 (en) | 2012-12-31 | 2017-10-03 | Elwha Llc | Cost-effective mobile connectivity protocols |
| US9832628B2 (en) | 2012-12-31 | 2017-11-28 | Elwha, Llc | Cost-effective mobile connectivity protocols |
| US9451394B2 (en) | 2012-12-31 | 2016-09-20 | Elwha Llc | Cost-effective mobile connectivity protocols |
| US9876762B2 (en) * | 2012-12-31 | 2018-01-23 | Elwha Llc | Cost-effective mobile connectivity protocols |
| US9980114B2 (en) | 2013-03-15 | 2018-05-22 | Elwha Llc | Systems and methods for communication management |
| US9713013B2 (en) | 2013-03-15 | 2017-07-18 | Elwha Llc | Protocols for providing wireless communications connectivity maps |
| US9244100B2 (en) | 2013-03-15 | 2016-01-26 | Midtronics, Inc. | Current clamp with jaw closure detection |
| US9706060B2 (en) | 2013-03-15 | 2017-07-11 | Elwha Llc | Protocols for facilitating broader access in wireless communications |
| US9807582B2 (en) | 2013-03-15 | 2017-10-31 | Elwha Llc | Protocols for facilitating broader access in wireless communications |
| US9843917B2 (en) | 2013-03-15 | 2017-12-12 | Elwha, Llc | Protocols for facilitating charge-authorized connectivity in wireless communications |
| US9596584B2 (en) | 2013-03-15 | 2017-03-14 | Elwha Llc | Protocols for facilitating broader access in wireless communications by conditionally authorizing a charge to an account of a third party |
| US9813887B2 (en) | 2013-03-15 | 2017-11-07 | Elwha Llc | Protocols for facilitating broader access in wireless communications responsive to charge authorization statuses |
| US9866706B2 (en) | 2013-03-15 | 2018-01-09 | Elwha Llc | Protocols for facilitating broader access in wireless communications |
| US9706382B2 (en) | 2013-03-15 | 2017-07-11 | Elwha Llc | Protocols for allocating communication services cost in wireless communications |
| US9781554B2 (en) | 2013-03-15 | 2017-10-03 | Elwha Llc | Protocols for facilitating third party authorization for a rooted communication device in wireless communications |
| US9693214B2 (en) | 2013-03-15 | 2017-06-27 | Elwha Llc | Protocols for facilitating broader access in wireless communications |
| US9312575B2 (en) | 2013-05-16 | 2016-04-12 | Midtronics, Inc. | Battery testing system and method |
| US9653719B2 (en) | 2013-10-04 | 2017-05-16 | Pag Ltd. | Battery |
| US10843574B2 (en) | 2013-12-12 | 2020-11-24 | Midtronics, Inc. | Calibration and programming of in-vehicle battery sensors |
| US9923289B2 (en) | 2014-01-16 | 2018-03-20 | Midtronics, Inc. | Battery clamp with endoskeleton design |
| US10937286B2 (en) | 2014-06-10 | 2021-03-02 | Pb Inc. | Radiobeacon data sharing by forwarding low energy transmissions to a cloud host |
| US10473555B2 (en) | 2014-07-14 | 2019-11-12 | Midtronics, Inc. | Automotive maintenance system |
| US10295608B2 (en) | 2014-07-18 | 2019-05-21 | Phoenix Broadband Technologies, Llc | Non-intrusive correlating battery monitoring system and method |
| US10222397B2 (en) | 2014-09-26 | 2019-03-05 | Midtronics, Inc. | Cable connector for electronic battery tester |
| WO2016123075A1 (en) | 2015-01-26 | 2016-08-04 | Midtronics, Inc. | Alternator tester |
| US10291040B2 (en) | 2015-03-03 | 2019-05-14 | Nec Energy Solutions, Inc. | Energy storage system charger wake-up |
| US11277726B2 (en) | 2015-03-20 | 2022-03-15 | Pb Inc. | Battery beacon systems and methods of use |
| JP7010703B2 (en) * | 2015-06-10 | 2022-01-26 | ブラウン ゲーエムベーハー | Methods for controlling the battery capacity of secondary batteries, and battery-powered household appliances |
| AU2016315858B2 (en) * | 2015-09-02 | 2019-09-26 | Tti (Macao Commercial Offshore) Limited | Power tool, battery pack, and combination, and method of controlling the same |
| US9966676B2 (en) | 2015-09-28 | 2018-05-08 | Midtronics, Inc. | Kelvin connector adapter for storage battery |
| DE102016204277B4 (en) * | 2016-03-16 | 2022-09-01 | Volkswagen Aktiengesellschaft | Electrical component and method for driving an electrical component |
| US10608353B2 (en) | 2016-06-28 | 2020-03-31 | Midtronics, Inc. | Battery clamp |
| US11054480B2 (en) | 2016-10-25 | 2021-07-06 | Midtronics, Inc. | Electrical load for electronic battery tester and electronic battery tester including such electrical load |
| US11121892B2 (en) | 2017-05-11 | 2021-09-14 | Analog Devices International Unlimited Company | Digital modulation scheme for data transfer |
| CN109489845A (en) * | 2018-11-05 | 2019-03-19 | 北京长城华冠汽车科技股份有限公司 | A kind of determining method and apparatus for simulating battery core real time temperature in discharge process |
| US11513160B2 (en) | 2018-11-29 | 2022-11-29 | Midtronics, Inc. | Vehicle battery maintenance device |
| JP7114514B2 (en) * | 2019-03-14 | 2022-08-08 | ルネサスエレクトロニクス株式会社 | Semiconductor device and battery pack |
| US11566972B2 (en) | 2019-07-31 | 2023-01-31 | Midtronics, Inc. | Tire tread gauge using visual indicator |
| US11545839B2 (en) | 2019-11-05 | 2023-01-03 | Midtronics, Inc. | System for charging a series of connected batteries |
| US11668779B2 (en) | 2019-11-11 | 2023-06-06 | Midtronics, Inc. | Hybrid and electric vehicle battery pack maintenance device |
| US11474153B2 (en) | 2019-11-12 | 2022-10-18 | Midtronics, Inc. | Battery pack maintenance system |
| US11486930B2 (en) | 2020-01-23 | 2022-11-01 | Midtronics, Inc. | Electronic battery tester with battery clamp storage holsters |
| EP4016782A1 (en) * | 2020-12-15 | 2022-06-22 | Andreas Stihl AG & Co. KG | Multi-slot charger and multi-slot battery charger set |
Family Cites Families (48)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4031450A (en) * | 1971-03-26 | 1977-06-21 | The Gates Rubber Company | Two step solid state battery charger |
| US4006397A (en) * | 1972-11-01 | 1977-02-01 | General Electric Company | Controlled battery charger system |
| US3911350A (en) * | 1973-04-09 | 1975-10-07 | Union Carbide Corp | Dual battery charging rate device |
| US3864617A (en) * | 1973-07-12 | 1975-02-04 | Esb Inc | Charge control means for motive power battery charger |
| CA981746A (en) * | 1973-09-24 | 1976-01-13 | Alfred M. Hase | Battery charging circuit |
| US3959707A (en) * | 1973-10-01 | 1976-05-25 | Martin Marietta Corporation | Battery charger having fast charge rate and high reliability |
| GB1486425A (en) * | 1973-12-21 | 1977-09-21 | Macharg J A | Control systems for battery charges |
| DE2400090B2 (en) * | 1974-01-02 | 1978-03-23 | Varta Batterie Ag, 3000 Hannover | Method and circuit arrangement for charging accumulators |
| US3867681A (en) * | 1974-03-20 | 1975-02-18 | Gen Electric | Battery charging circuit |
| US3917990A (en) * | 1974-04-11 | 1975-11-04 | Gen Electric | Battery charging control using temperature differential circuit |
| US3963976A (en) * | 1974-07-08 | 1976-06-15 | Utah Research & Development Co. | Pulsed current battery charging method and apparatus |
| US4035709A (en) * | 1975-04-30 | 1977-07-12 | Gould Inc. | Battery charging system |
| CA1025940A (en) * | 1975-07-25 | 1978-02-07 | Serge Casagrande | Battery charger |
| FR2326052A1 (en) * | 1975-09-26 | 1977-04-22 | Accumulateurs Fixes | CHARGING METHOD AND DEVICE FOR ACCUMULATOR BATTERIES |
| US4016473A (en) * | 1975-11-06 | 1977-04-05 | Utah Research & Development Co., Inc. | DC powered capacitive pulse charge and pulse discharge battery charger |
| GB1569619A (en) * | 1976-03-17 | 1980-06-18 | Chloride Group Ltd | Electric battery charges |
| FR2361754A1 (en) * | 1976-08-11 | 1978-03-10 | Accumulateurs Fixes | METHOD AND DEVICE FOR MONITORING THE CHARGE AND DISCHARGE OF AN ACCUMULATOR BATTERY |
| US4097792A (en) * | 1976-12-09 | 1978-06-27 | Lester Electrical Of Nebraska, Inc. | Battery charger control circuit |
| JPS53120548A (en) * | 1977-03-30 | 1978-10-21 | Toshiba Corp | Battery life display system |
| DE2748644A1 (en) * | 1977-10-29 | 1979-05-03 | Varta Batterie | PROCEDURES FOR CHARGE MAINTENANCE AND CONTINUOUS CHARGE OF ACCUMULATORS |
| US4321523A (en) * | 1978-10-05 | 1982-03-23 | The Gates Rubber Company | Battery charger and power supply circuitry |
| JPS5558739A (en) * | 1978-10-24 | 1980-05-01 | Nippon Denso Co | Method of and device for controlling voltage of automotive generator |
| US4270080A (en) * | 1978-12-14 | 1981-05-26 | Sun Electric Corporation | Automatic battery charge apparatus and method |
| US4254475A (en) * | 1979-03-12 | 1981-03-03 | Raytheon Company | Microprocessor having dual frequency clock |
| US4217645A (en) * | 1979-04-25 | 1980-08-12 | Barry George H | Battery monitoring system |
| US4302714A (en) * | 1979-04-27 | 1981-11-24 | Yefsky Sheldon A | Rechargeable battery charger system for charging testing, rejuvenation and preventative maintenance |
| JPS5628476A (en) * | 1979-08-14 | 1981-03-20 | Shin Kobe Electric Mach Co Ltd | Remained capacity meter for storage battery |
| US4355275A (en) * | 1979-10-15 | 1982-10-19 | Anglin Russell E | Battery charger with current pulse regulation |
| US4313078A (en) * | 1979-12-05 | 1982-01-26 | Rca Corporation | Battery charging system |
| US4289836A (en) * | 1980-03-05 | 1981-09-15 | Lemelson Jerome H | Rechargeable electric battery system |
| US4301398A (en) * | 1980-05-29 | 1981-11-17 | Exide Electronics Corporation | Method and apparatus for controlling a resonant power module |
| US4352067A (en) * | 1980-06-02 | 1982-09-28 | Dc Electronic Industries, Inc. | Battery analyzer |
| US4297630A (en) * | 1980-06-23 | 1981-10-27 | General Electric Company | Timed fast charger |
| DE3031931C2 (en) * | 1980-06-28 | 1984-09-20 | Lucas Industries Ltd., Birmingham, West Midlands | Method for monitoring the drive battery of an electric vehicle |
| US4316185A (en) * | 1980-07-17 | 1982-02-16 | General Electric Company | Battery monitor circuit |
| US4390841A (en) * | 1980-10-14 | 1983-06-28 | Purdue Research Foundation | Monitoring apparatus and method for battery power supply |
| US4329406A (en) * | 1981-03-27 | 1982-05-11 | Dahl Ernest A | Specific gravity transducer and battery performance indicator |
| US4553081A (en) * | 1982-06-07 | 1985-11-12 | Norand Corporation | Portable battery powered system |
| US4716354A (en) * | 1985-11-12 | 1987-12-29 | Norand Corporation | Automatic voltage regulator means providing a dual low power responsive and output-voltage-controlling regulator signal particularly for a plural source battery powered system |
| US4709202A (en) * | 1982-06-07 | 1987-11-24 | Norand Corporation | Battery powered system |
| US4737702A (en) * | 1982-06-07 | 1988-04-12 | Norand Corporation | Battery charging control system particularly for hand held device |
| US4455523A (en) * | 1982-06-07 | 1984-06-19 | Norand Corporation | Portable battery powered system |
| US4558281A (en) * | 1982-06-12 | 1985-12-10 | Lucas Industries | Battery state of charge evaluator |
| US4554500A (en) * | 1983-03-31 | 1985-11-19 | Anton/Bauer, Inc. | Battery charging apparatus and method |
| US4747041A (en) * | 1983-06-27 | 1988-05-24 | Unisys Corporation | Automatic power control system which automatically activates and deactivates power to selected peripheral devices based upon system requirement |
| US4649373A (en) * | 1983-08-10 | 1987-03-10 | International Business Machines Corporation | Powered conservation system in battery powered keyboard device including a microprocessor |
| US4698748A (en) * | 1983-10-07 | 1987-10-06 | Essex Group, Inc. | Power-conserving control system for turning-off the power and the clocking for data transactions upon certain system inactivity |
| US4716463A (en) * | 1986-10-24 | 1987-12-29 | Zenith Electronics Corporation | Power down sense circuit |
-
1988
- 1988-05-03 US US07/189,958 patent/US4965738A/en not_active Expired - Fee Related
-
1990
- 1990-03-28 DE DE90105870T patent/DE448755T1/en active Pending
- 1990-03-28 EP EP90105870A patent/EP0448755B1/en not_active Expired - Lifetime
- 1990-03-28 DE DE69019139T patent/DE69019139T2/en not_active Expired - Fee Related
- 1990-03-28 ES ES199090105870T patent/ES2041626T1/en active Pending
- 1990-03-28 AT AT90105870T patent/ATE122151T1/en not_active IP Right Cessation
- 1990-03-30 CA CA002013559A patent/CA2013559C/en not_active Expired - Fee Related
-
1993
- 1993-10-29 GR GR930300077T patent/GR930300077T1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP0448755A1 (en) | 1991-10-02 |
| US4965738A (en) | 1990-10-23 |
| ATE122151T1 (en) | 1995-05-15 |
| CA2013559A1 (en) | 1990-11-03 |
| EP0448755B1 (en) | 1995-05-03 |
| ES2041626T1 (en) | 1993-12-01 |
| GR930300077T1 (en) | 1993-10-29 |
| DE69019139D1 (en) | 1995-06-08 |
| DE448755T1 (en) | 1993-10-14 |
| DE69019139T2 (en) | 1995-11-09 |
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