CA2025164A1 - Adaptive phase lock loop system - Google Patents

Adaptive phase lock loop system

Info

Publication number
CA2025164A1
CA2025164A1 CA2025164A CA2025164A CA2025164A1 CA 2025164 A1 CA2025164 A1 CA 2025164A1 CA 2025164 A CA2025164 A CA 2025164A CA 2025164 A CA2025164 A CA 2025164A CA 2025164 A1 CA2025164 A1 CA 2025164A1
Authority
CA
Canada
Prior art keywords
optimum
center frequency
input signal
pll
vco
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2025164A
Other languages
French (fr)
Other versions
CA2025164C (en
Inventor
Yohtaro Yatsuzuka
Takuro Muratani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK filed Critical Kokusai Denshin Denwa KK
Publication of CA2025164A1 publication Critical patent/CA2025164A1/en
Application granted granted Critical
Publication of CA2025164C publication Critical patent/CA2025164C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator

Abstract

A phase lock loop for a digital input signal has a phase detector, a loop filter, a digital voltage controlled oscillator (VCO), an initial phase difference calculator, a center frequency difference calculator and an input buffer memory. In an initial training mode prepared in the PLL operation, an optimum initial phase and an optimum center frequency of the VCO to complete a lock-in state is searched for the input signal stored in the buffer memory. By estimating the initial phase difference and the center frequency different between the input signal and the VCO output with repetitive kick-offs in calculators, optimum values mentioned above are obtained. In a normal operation mode as a second mode in which the PLL operates normally as a conventional PLL, a phase lock operation between the VCO output as the reference signal and the input signal in the buffer memory is carried out after the PLL is kicked off with the optimum initial phase and the optimum center frequency determined in the initial training mode.
CA002025164A 1990-02-14 1990-09-13 Adaptive phase lock loop system Expired - Fee Related CA2025164C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31444/1990 1990-02-14
JP2031444A JP2712706B2 (en) 1990-02-14 1990-02-14 Adaptive phase detection synchronization method

Publications (2)

Publication Number Publication Date
CA2025164A1 true CA2025164A1 (en) 1991-08-15
CA2025164C CA2025164C (en) 1994-04-05

Family

ID=12331420

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002025164A Expired - Fee Related CA2025164C (en) 1990-02-14 1990-09-13 Adaptive phase lock loop system

Country Status (3)

Country Link
US (1) US5128625A (en)
JP (1) JP2712706B2 (en)
CA (1) CA2025164C (en)

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US7280564B1 (en) 1995-02-06 2007-10-09 Adc Telecommunications, Inc. Synchronization techniques in multipoint-to-point communication using orthgonal frequency division multiplexing
USRE42236E1 (en) 1995-02-06 2011-03-22 Adc Telecommunications, Inc. Multiuse subcarriers in multipoint-to-point communication using orthogonal frequency division multiplexing
JP3504470B2 (en) * 1997-09-18 2004-03-08 日本放送協会 AFC circuit, carrier regeneration circuit and receiving device
JP3348661B2 (en) * 1998-10-09 2002-11-20 双葉電子工業株式会社 Carrier phase tracking device and frequency hopping receiver
US6594613B1 (en) * 1998-12-10 2003-07-15 Rosemount Inc. Adjustable bandwidth filter for process variable transmitter
GB9913154D0 (en) * 1999-06-08 1999-08-04 Pace Micro Tech Plc Frequency searching method and apparatus
US8014724B2 (en) * 1999-10-21 2011-09-06 Broadcom Corporation System and method for signal limiting
JP4488569B2 (en) * 1999-12-22 2010-06-23 日本テキサス・インスツルメンツ株式会社 Shortest time PLL circuit
US6307411B1 (en) 2000-10-13 2001-10-23 Brookhaven Science Associates Wide tracking range, auto ranging, low jitter phase lock loop for swept and fixed frequency systems
US6993445B2 (en) * 2001-01-16 2006-01-31 Invensys Systems, Inc. Vortex flowmeter
US6696900B2 (en) * 2001-09-24 2004-02-24 Finepoint Innovations, Inc. Method for demodulating PSK modulated signals
US6946984B2 (en) * 2002-04-10 2005-09-20 Systel Development And Industries Ltd. System on chip for digital control of electronic power devices
JP4165413B2 (en) 2003-06-05 2008-10-15 セイコーエプソン株式会社 Radio data communication demodulator and demodulation method
FR2859329A1 (en) * 2003-09-02 2005-03-04 St Microelectronics Sa Method for processing frequency shift of carrier frequency, involves correcting carrier frequency by phase lock loop initiated by frequency shift estimation value, with frequency locking range of loop lower than that of frequency estimator
US20050201230A1 (en) * 2003-09-19 2005-09-15 Shinichi Kurobe Wobble signal demodulating method, wobble signal demodulating circuit and optical disk apparatus
WO2005099093A1 (en) 2004-03-30 2005-10-20 Itron, Inc. Frequency shift compensation, such as for use in a wireless meter reading environment
US6920799B1 (en) 2004-04-15 2005-07-26 Rosemount Inc. Magnetic flow meter with reference electrode
US7398071B2 (en) * 2004-12-17 2008-07-08 Broadcom Corporation Loop filter with gear shift for improved fractional-N PLL settling time
US7747405B2 (en) * 2006-03-24 2010-06-29 Ics Triplex Technology Ltd. Line frequency synchronization
US7476891B2 (en) * 2006-03-24 2009-01-13 Ics Triplex Technology, Ltd. Fault detection method and apparatus
US7729098B2 (en) * 2006-03-24 2010-06-01 Ics Triplex Technology Limited Overload protection method
US7688560B2 (en) * 2006-03-24 2010-03-30 Ics Triplex Technology Limited Overload protection method
US7613974B2 (en) * 2006-03-24 2009-11-03 Ics Triplex Technology Limited Fault detection method and apparatus
US8166362B2 (en) * 2006-03-24 2012-04-24 Rockwell Automation Limited Fault detection method and apparatus for analog to digital converter circuits
EP1837995B1 (en) * 2006-03-24 2010-04-21 ICS Triplex Technology Limited Line frequency synchronisation
US7504975B2 (en) * 2006-03-24 2009-03-17 Ics Triplex Technology Limited Method and apparatus for output current control
CN101517377B (en) 2006-09-29 2012-05-09 罗斯蒙德公司 Magnetic flowmeter with verification
US7509163B1 (en) * 2007-09-28 2009-03-24 International Business Machines Corporation Method and system for subject-adaptive real-time sleep stage classification
JP5066466B2 (en) * 2008-03-12 2012-11-07 日本電波工業株式会社 Frequency synthesizer
TWI382673B (en) * 2008-09-03 2013-01-11 Pixart Imaging Inc Center frequency adjustment device and related method for a communication receiver
DE102009004565B4 (en) * 2009-01-14 2015-04-02 Texas Instruments Deutschland Gmbh Apparatus and method for caching data between memory controller and DRAM
US8531909B2 (en) * 2010-06-18 2013-09-10 SK Hynix Inc. Delay-locked loop having loop bandwidth dependency on operating frequency
JP5761748B2 (en) * 2011-06-08 2015-08-12 日本電気航空宇宙システム株式会社 Symbol synchronization acquisition system and method
US9529763B2 (en) 2013-07-02 2016-12-27 Infineon Technologies Ag Sensor systems and methods utilizing adaptively selected carrier frequencies
US9571315B2 (en) * 2013-09-10 2017-02-14 Infineon Technologies Ag Sensor systems and methods utilizing band pass filter tuning
JP6756172B2 (en) * 2016-01-06 2020-09-16 セイコーエプソン株式会社 Circuits, oscillators, electronics and mobiles
CN110022135A (en) * 2017-12-07 2019-07-16 英飞凌科技股份有限公司 Tunable resonant element, filter circuit and method
CN108011851B (en) * 2017-12-19 2021-05-07 普联技术有限公司 Frequency synchronization method, device, terminal equipment and storage medium

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US4461014A (en) * 1980-09-23 1984-07-17 Mitsubishi Denki Kabushiki Kaisha Carrier regenerating circuit
JPS60139029A (en) * 1983-12-27 1985-07-23 Pioneer Electronic Corp Random noise detecting method
JPS63128842A (en) * 1986-11-19 1988-06-01 Hitachi Ltd Adaptive type carrier phase controller
US4920320A (en) * 1988-12-19 1990-04-24 Motorola, Inc. Phase locked loop with optimally controlled bandwidth

Also Published As

Publication number Publication date
US5128625A (en) 1992-07-07
JPH03236652A (en) 1991-10-22
CA2025164C (en) 1994-04-05
JP2712706B2 (en) 1998-02-16

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