CA2061949A1 - Electronic circuit package - Google Patents
Electronic circuit packageInfo
- Publication number
- CA2061949A1 CA2061949A1 CA2061949A CA2061949A CA2061949A1 CA 2061949 A1 CA2061949 A1 CA 2061949A1 CA 2061949 A CA2061949 A CA 2061949A CA 2061949 A CA2061949 A CA 2061949A CA 2061949 A1 CA2061949 A1 CA 2061949A1
- Authority
- CA
- Canada
- Prior art keywords
- substrate
- chips
- bus line
- wiring
- electronic circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15182—Fan-in arrangement of the internal vias
- H01L2924/15183—Fan-in arrangement of the internal vias in a single layer of the multilayer substrate
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Abstract
An electronic circuit package has a wiring substrate, at least two semiconductor chips and a bus line. All the semiconductor chips are connected by means of the bus line and are bare chip packaged on a substrate. The chips and the wiring substrate are connected by wiring bonding between pads formed on the chips and the substrate. The substrate may be a multilayer. Preferably, there is an insulating layer partially formed on a surface of the multilayer substrate, and a die bonding ground is formed on a surface of the insulating layer in order to use a portion of the substrate under the ground as a wiring or hole region. At least one of the chips is formed on the die bonding ground. The bus line preferably includes two data bus lines, the chips connected to one data bus line being located on one side of the substrate and the chips connected to the other data bus line being located on the other side of the substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002205528A CA2205528C (en) | 1991-02-28 | 1992-02-27 | Data processing apparatus and method of data transmission of data processing apparatus |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP03-34038 | 1991-02-28 | ||
JP3034038A JP2960560B2 (en) | 1991-02-28 | 1991-02-28 | Microelectronic equipment |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002205528A Division CA2205528C (en) | 1991-02-28 | 1992-02-27 | Data processing apparatus and method of data transmission of data processing apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2061949A1 true CA2061949A1 (en) | 1992-08-29 |
CA2061949C CA2061949C (en) | 1998-01-27 |
Family
ID=12403153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002061949A Expired - Lifetime CA2061949C (en) | 1991-02-28 | 1992-02-27 | Electronic circuit package |
Country Status (5)
Country | Link |
---|---|
US (11) | US5468992A (en) |
EP (3) | EP0786809B1 (en) |
JP (1) | JP2960560B2 (en) |
CA (1) | CA2061949C (en) |
DE (2) | DE69233063T2 (en) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2960560B2 (en) * | 1991-02-28 | 1999-10-06 | 株式会社日立製作所 | Microelectronic equipment |
US5721452A (en) * | 1995-08-16 | 1998-02-24 | Micron Technology, Inc. | Angularly offset stacked die multichip device and method of manufacture |
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US6255833B1 (en) | 1997-03-04 | 2001-07-03 | Micron Technology, Inc. | Method for testing semiconductor dice and chip scale packages |
US5929647A (en) * | 1996-07-02 | 1999-07-27 | Micron Technology, Inc. | Method and apparatus for testing semiconductor dice |
US6639416B1 (en) | 1996-07-02 | 2003-10-28 | Micron Technology, Inc. | Method and apparatus for testing semiconductor dice |
SE509570C2 (en) * | 1996-10-21 | 1999-02-08 | Ericsson Telefon Ab L M | Temperature compensating means and procedure for mounting electronics on a circuit board |
WO1998025213A1 (en) * | 1996-12-04 | 1998-06-11 | Hitachi, Ltd. | Semiconductor integrated circuit device |
DE19724053A1 (en) * | 1997-06-07 | 1998-12-10 | Biotronik Mess & Therapieg | Electronic storage device, in particular for use in implantable medical devices |
WO1999024896A1 (en) * | 1997-11-06 | 1999-05-20 | Hitachi, Ltd. | Information processor |
US5933327A (en) * | 1998-04-03 | 1999-08-03 | Ericsson, Inc. | Wire bond attachment of a integrated circuit package to a heat sink |
JP2000077609A (en) | 1998-08-28 | 2000-03-14 | Hitachi Ltd | Semiconductor integrated circuit device |
US6281042B1 (en) | 1998-08-31 | 2001-08-28 | Micron Technology, Inc. | Structure and method for a high performance electronic packaging assembly |
US6586835B1 (en) * | 1998-08-31 | 2003-07-01 | Micron Technology, Inc. | Compact system module with built-in thermoelectric cooling |
US6392296B1 (en) | 1998-08-31 | 2002-05-21 | Micron Technology, Inc. | Silicon interposer with optical connections |
US6154364A (en) * | 1998-11-19 | 2000-11-28 | Delco Electronics Corp. | Circuit board assembly with IC device mounted thereto |
US6255852B1 (en) | 1999-02-09 | 2001-07-03 | Micron Technology, Inc. | Current mode signal interconnects and CMOS amplifier |
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-
1991
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-
1992
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- 1992-02-27 DE DE69233063T patent/DE69233063T2/en not_active Expired - Lifetime
- 1992-02-27 EP EP03025414A patent/EP1394557A3/en not_active Withdrawn
- 1992-02-27 EP EP92103361A patent/EP0501474B1/en not_active Expired - Lifetime
- 1992-02-27 CA CA002061949A patent/CA2061949C/en not_active Expired - Lifetime
- 1992-02-27 DE DE1992633297 patent/DE69233297T2/en not_active Expired - Lifetime
- 1992-02-28 US US07/843,234 patent/US5468992A/en not_active Expired - Lifetime
-
1995
- 1995-09-05 US US08/523,346 patent/US5614761A/en not_active Expired - Lifetime
-
1996
- 1996-11-18 US US08/746,942 patent/US5789805A/en not_active Expired - Lifetime
-
1998
- 1998-06-10 US US09/095,049 patent/US6195742B1/en not_active Expired - Fee Related
-
1999
- 1999-03-18 US US09/271,448 patent/US6223273B1/en not_active Expired - Fee Related
-
2001
- 2001-02-28 US US09/793,968 patent/US6584004B2/en not_active Expired - Fee Related
-
2003
- 2003-02-24 US US10/370,518 patent/US6728904B2/en not_active Expired - Fee Related
-
2004
- 2004-02-26 US US10/786,008 patent/US7120069B2/en not_active Expired - Fee Related
-
2005
- 2005-07-14 US US11/180,733 patent/US7233534B2/en not_active Expired - Fee Related
-
2007
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-
2008
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Also Published As
Publication number | Publication date |
---|---|
EP1394557A3 (en) | 2004-10-20 |
JP2960560B2 (en) | 1999-10-06 |
US20070158814A1 (en) | 2007-07-12 |
US6728904B2 (en) | 2004-04-27 |
CA2061949C (en) | 1998-01-27 |
US6195742B1 (en) | 2001-02-27 |
DE69233063D1 (en) | 2003-06-26 |
JPH04273470A (en) | 1992-09-29 |
EP0786809A1 (en) | 1997-07-30 |
DE69233297T2 (en) | 2004-11-18 |
US6223273B1 (en) | 2001-04-24 |
US20010010064A1 (en) | 2001-07-26 |
US7425763B2 (en) | 2008-09-16 |
US5614761A (en) | 1997-03-25 |
US5789805A (en) | 1998-08-04 |
US7701743B2 (en) | 2010-04-20 |
US5468992A (en) | 1995-11-21 |
US6584004B2 (en) | 2003-06-24 |
US20040164324A1 (en) | 2004-08-26 |
DE69233063T2 (en) | 2004-09-16 |
EP0786809B1 (en) | 2004-01-28 |
DE69233297D1 (en) | 2004-03-04 |
US20080303175A1 (en) | 2008-12-11 |
EP0501474A2 (en) | 1992-09-02 |
EP0501474A3 (en) | 1993-01-13 |
EP0501474B1 (en) | 2003-05-21 |
US7120069B2 (en) | 2006-10-10 |
US20050248017A1 (en) | 2005-11-10 |
US20030156441A1 (en) | 2003-08-21 |
US7233534B2 (en) | 2007-06-19 |
EP1394557A2 (en) | 2004-03-03 |
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