CA2115665C - Microprocessor watch-dog monitor for electronic trip units - Google Patents
Microprocessor watch-dog monitor for electronic trip unitsInfo
- Publication number
- CA2115665C CA2115665C CA002115665A CA2115665A CA2115665C CA 2115665 C CA2115665 C CA 2115665C CA 002115665 A CA002115665 A CA 002115665A CA 2115665 A CA2115665 A CA 2115665A CA 2115665 C CA2115665 C CA 2115665C
- Authority
- CA
- Canada
- Prior art keywords
- transistor
- switching transistor
- watch
- resistor
- dog monitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0428—Safety, monitoring
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/02—Details
- H02H3/05—Details with means for increasing reliability, e.g. redundancy arrangements
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24125—Watchdog, check at timed intervals
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
- Y04S20/20—End-user application control systems
Abstract
A microprocessor watch-dog monitor for electronic trip units includes an input transistor (Q1), a timing circuit (16), and a comparator circuit (18). The comparator circuit is formed of a first bipolar transistor (Q3) of the PNP-type conductivity and a second bipolar transistor (Q4) of the NPN-type conductivity.
Description
~ 94/0~8992 1 1 ~ 6 6 ~ P~T/US93/~l946 ~. .
r~' ~ DESCRIPTION
. .
~ MICROPROCESSOR WATCH-DOG MONITOR
: FOR ELECTRONIC TRIP UNITS
.., . ;;
~ 5 BACKGROUND OF THE lNv~Nl~lON
:
This invention relates general~y to solid-state circuit inte~l~yLers in electrical distrib~tion systems : and more particularly, it relates to an improved micro-processor wat h-dog monitor for electronic trip units - 10 used in circuit inte-lu~Lers so as to maintain the i~-tegrity of the trip unite.
As is generally well-known in the art, circuit bxeakers have been widely used in commercial and industrial applications for protecting electrical con-: 15~ ductors and~apparatus co~~ected thereto from damage dueto~ iv~ current ~low. Circui~ ~rea~ers typically ;:int:luded~ trip :~yste~s.~which w~re d~sign~d to inte~L~
when the ~u~en~ flowing through them ex~e~3 a pre-det~rmined level. Specifically, moslt simpl~ trip y~t~ns 20~ ~:utilized an electromagnet to trip the circuit in response ~to ~rl~nt or voltage fluctuations. The electroma~net provided a magnetic field in response to current flowing through the circuit breaker. When the ~L L en~ level in-crP~ beyond the predetermined lev 1 or trip point, the magnetic field "trips" a mech~n ism~which causes a set of circuit breaker eontacts to release, thereby ~9Opening" or 9'breaking" the circuit path.
:~' i ~'W094/008g9 PCT~US93/01946 ~ ) 211S6G~ ' .:
Gradually, how~ver, there has arisen a n~ed in the .' industry for ~ore sophisticated and ela~orate tripping syste~s as the complexity of electrical distribution ; systems increased. For example, in many commercial and industrial eguipment today it is desired to'have circuit breakers that perform both an instantaneous and delayed tripping (i.e., ti~c current interrupting character istics) so as to provide improved accuracy and flexi-bility on the equipment to be controlled. For this :: 10 reason, many microprocessor-based soiid-state circuit : ~ : interrupters have been also developed in the prior art in an attempt to pro~ide more accurate and reliable control operations on the electrical distribution system on which the circuit inte u~er was being employed. To this end, a micro~ er is provided which is coupled between the ent path: and a ~ trip solenoid conSrolling the mec~ sm for br~A~i ng the current path. ~he micro-:~ computer~stores~ trip points which activate the trip solenoid when the current within the current path exceeds : the trip points.
; Therefore,-in order to ~h~nce system ~çren~hility there~ is generally required a watch-dog circuit for protecting the tripping system in the event of a micro-o~ Ler malfunction. Prior art watch-dog circuits are known to exist ~which include either an operational am-~: plifier or a discrete ~L~yl ammable unijunction transis-tor. While these prior art circuits performed their :~ ~unction adequately, they suffer from the disadvantage of ~: being high in cost and having a low reliability.
, :
.
~ ~ 094/00899 PCT/US93/01946 ' 2 1 1 5 6 6 ~
. J
:~ -3-A~cordingly, the present invention is directed to an impxoved micropro~-Ccor watch-dog monitor which pro~ides for more reliable operation and performance at a reduced , cost. Specifically, the micropro~ccor watc~-dog monitor i 5 of the instant invention includes a comparator circuit : formed of a first bipol~r transistor of the PNP-type con-ductivity and a second bipolar transistor of the NPN-type conductivity.
..
' :~
; ~ SUNMP.RY OF THE INVENTION
~ Accordingly, it~is a general object of the present ; :invention to provide an i~oved microproceC~or watch-dog monitor for ele~LL~I.ic trip units which is relatively simple and economical to manufacture and assemble, but yet overcomes ~he disadvantages of the prior art 15~ circuits.
It is an object of the pr~sent invention to provide :an~ improved microproc~Por watch-dog monitor for ele~LLol~ic trip units which has a high reliability in its : ~ ~ operation.
' :~:
~;~ 20 It is another object of the present in~ention to . provide an improved micropror~Qeor watch-dog monitor for ~: electronic trip units which is formed of omponents with relatively low cost.
:' CA 0211~66~ 1998-05-29 It is still another object of the present invention to provide an i~Lo~ed mi~u~ucessor watch-dog monitor for electronic trip units which may include a comparator circuit formed of a first bipolar transi~tor of the PNP-type conductivity and a ~econd bipoIar transietor of-the NPN-type conductivity.
In accordance with these aims and objectives, the present invention is concerned with the provision of and improved mi~o~,ocessor watch-dog monitor for electronic trip units which includes an input transistor, a timing circuit, and a comparator circuit. The input transistor has its gate coupled to an input terminal and its source connected to a ground potential. A first resistor has its one end connected to the drain of the input transis-lS tor and its other end connected to an internal node. Thetiming circuit is formed of a second resistor and a capacitor. The second resistor has its one end connected to a power supply potential and its other end connected to one end of the capacitor and to the internal node.
The other end of the capacitor is connected to the ground potential.
The comparator circuit is formed of a first switch-ing transistor and a second switching transistor. The first switching transistor has its emitter connected to the internal node. The second switching transistor has its base connected to the collector of the first switch-ing transistor, its collector cG",.e_Led to the base of the first switching transistor, and its emitter coupled ~ - ;
' ~VO 94/00899 PC~r/US93/01946 211~6S~
to an output terminal. A vo~tage divider is formed of third and fourth resistors. The third resistor has its : : one end connected to the power supply potential and its other end connected to the collector o~?~the se~ond switching transistor and to one end of the fourth resistor. The other end of the fourth resistor is con-nected to the ~ou,.d:potential.
BRIEF DESCRIPTION OF THE D~U~WINGS
These and other~ objects and advantages of the :10 ~ ~present invèntion will become more fully apparent from ~,',,,~?',~ ; the ~following~detailed d scription when read in con-junction :with the~accompanying drawings with like reference n ~ erals~ indicating correspon~;~g parts ;throughout, wherein:~
15~rigure~ a~d-~ailed sche~atic circuit diagram of à:~'mi~lo~ Qr~watch-dog- ~onitor, constructed in ao~u..l~noç with-the principles of the present~il,va..~ion;
Figure 2 ~are waveforms at various points in the ; 20~ ~ circuit of:~ Figure 1, useful in understanding~ its operation.
. ~, -:' ~, .~ W0~4/0089~ PCT/US93/Olg46 ~
... ~, .
~ 211~66~
-~ESCRIPTION OF THE PR~ K~ED EMBODIMENT
~ ~Referring now to the drawings, there ~s shown in .:Figure 1 a detailed schematic circuit diagram of an im~Ioved microprccessor watch-dog monitoring circuit 10 ~or use in association with microcomputer-based elec-tronic trip units employed in solid-state circuit inter-rupters. The watch dog monitoring circuit 10 serves to maintain the integrity of the microcomputer-based elec-tronic trip units. In other words, the watch-dog moni-toring circuit protects the trip units in the event of ~:~mi~o~mputer malfunctions. Therefore, the watch-dog monitoring ~circUit 10 is designed to engage a trip solenoid 11~for br~kin~ the ~r:~ent path in the circuit i~te~.u~Ler if the microcomputer 12 fails to reset it 15~ within:a~predetermined time period.
The watch-dog monitoring circuit 10 is comprised of an:input switching circuit 14, a timing circuit 16, and a~comparator circuit:18. ~The input circui~ 14 includes an~N~ nn~ input field-eff ct tran~istor Q1, a ~ ent-2~0:~ 1imiting:colleetor:resistor Rl, a base resistor R6, an :input resistor:R5, and a.diode D1. The transistor Ql has its drain connected to one end of:the current-limiting resistor R1, its gate connected to one end of the ~ase resistor R6,~:and its source connected to a ground poten-25 -~ tial GND. The anode of the diode Dl is also connected to the ~ound potential and to one end of the input resistor R5~, and the cathode of the diode D1 is ~onnected to the : gate of the transistor Ql. The other end of the resistor R5 is connected to the other end of the base resistor R6.
, ~-~: .
r ~
'~WO 94/00899 2 1 1 5 6 6 ~ Pcr~lJS93/01946 The other and of the resistor R~ is c:onnected to ~n ~- intarnal node A.
~he monitoring circuit 10 further include~ an input terminal 20 and an ou~yuL terminal 22. The input Sterminal 20 is coupled to the microcomputer 12 for receiving reset pulses in the form of a pulse train, each pulse ha~ing a pulse width of approximately 200 ms and a period of 500 ms. The amplitude of lthe pul~;es varies between z~ro and +5. 0 volts. The input terminal 20 is 10cormected *o one end of an input resistor R18. The other end of the resistor R18 is connected to one end of a ~oupling capacitor C3. The other end of th~ capac:itor C3 i9 cor~nected to :the junction of the resistors R5 and R6.
A ~oQnd input transistor Q2 ~ay be optionally pro-~; 15vîd~d f or testing ~he watch-dog monitoring ::irc:uit by si~mulating a malfunction of the microcomputer 12 ( i . e ., reset pulses are ~kopped3. As can b~ s~en, the transi~-tor Q2 has its colle~tor conne ::ted to one ~nd of the r~itor C3, its base coupled to a second input terminal 2024 via a current-li~iting resistor R9, a~d its e~itter ~: connected to th~ ylO~IId potential. In order to si~ulate a failure, the ~econd input terminal 20 has applied thereto a voltage o~ +5~0 volts, thereby rendering the tr~nsistor Q1 non-conductive.
' 25The timing circuit 16 is ~ormed of a resistor R2 and ; a timing capacitor C1. One end of the resistor R2 is ~ WO94/008g9 PCT/US93/01946 ~
21156G~ - -~Q~nec~ed to a power supply potential VCC, which i~
typi..ally at +12.0 volt~. The oth~r end of the resistor R2 is connected to one end of the capacitor Cl and to the internal node A. The other end of the capacitor C1 is S - co~ct~d to the ground potential.
'', ~ ;
The comparator circuit 18 includes a bipolar PNP-~: type s~itching transistor Q3, a bipolar NPN-type switch-ing transistor ~Q4, and a voltage divider formed of resist~rs R7: and R8. The transistor Q3 has its emitter connected to the junction of the resistor R2 and the capacitor Cl at~the ~internal node A, its base connected to the collector of the transistor Q4, and its collector connected to the base of the transistor Q4. One end of the resistor R7 is al o connected to~ the power supply potential VCC. The other end of the resistor R7 is connected to ~one end of the resistor R8 and to the co~lector of:the transistor Q4. The other end of the resistor~R8:is~connected to the ~ .,d potential~
A diode:~D2:has its ~no~P r~cted to the emitter of Z0: : ~the transistor~Q4 and its cathode connected to the ohL~u~
erminal 22.: The ou~u- terminal 22 provides an ouL~L
~, ~ignal for energizing the trip solenoid 11.
,: .
-The operation of the microprocessor watch-dog monitoring circuit 10 will now be explained with ., ~: : 25 reference to the waveforms of Figure 2. Under normal : operating conditions, the lsgic high reset pulses on the , '' ' ~wo 94/008g9 2 1 1 ~ ~ 6 ~ PCT/US93/~1946 input terminal 20 will be regularly generated (every 200 ms) by ~he microcomputer 12. The reset pulses are passed th~ou~ll the resi~tor Rl8, the capacitor C3, and the resistor R6 to the gate of the input transistor Ql.
A~ a result, the input transistor Ql will be turned on periodically so as to discharge the capacitor Cl via the resistor Rl and the drain-source junction of the transi~stor Ql. However, if the microcomputer ~2 mal-functions so as to stop ths generation of the periodi~
reset pulses the input transistor Ql will remain in the : non-conductive~ state. It should be noted that this "failed" condition can be simulated by supplying a voltage of +5.0 volts to the base of the second input transistor Q2.
15 : ~ In the "failed" ~on~ition~ as designated at time tl -~ in the waveform 26 in Figur 2, the capacitor Cl will egin to charge up along the waveform 28 in Figure 2. At the time t2 when the voltage defining a turn-on signal on the~capacitor C1 is greater than the reference voltage V~f 20~ ~ on:the ba~e of the transistor Q3 by a V~, the transistor Q3: wil~l be ~u~ on so as to pull up the base of the transistor Q4. ~o~ee~uently, the transistor Q4 will also be rendered conductive. When the transistor Q4 turns on, :th2 o~L~ voltage V~ of ~6.1 on the waveform 30 in : Figure 2 will appear at the output terminal 24 at the : time t3. This high voltage on the output termin~l 24 is used to engage or energize the trip solenoid ll, thereby ~:~ interrupting the o~lent path in the circuit breaker. As - can ~e seen,~ the output voltage will be g nerate~ in approximately 133 ms after the malfunction of the micro~o~uLer 12 or interruption of the reset pulses.
, W094/00899 PCT/US93/01946 ~ ' 211S66~
--lOo For completeness in the disclosure of the above described microprocessor watch-dog monitQring circuit but not for the purposes of limitation, the following repre-sentati~e values and component identifications are submitted. These values and components were employed in a circuit that was constructed and tested and which pro-vides a high quality performance. Those skilled in the art will recognize that many alternative elements and : : values may be~employed in constructing circuits in ac-cor~nce with the present invention.
: . PAR T TYPE or ~IALUE
Rl~ 18 ohms R2 75K ohms R5 ~ : 27K ohms : 15~ R6 : o l o~ms : ; R7 lOK ohms : R8:~ 14K oh~s :R9~ lK ohms ;::Rl8 lO0 ohms 2~ Cl ~22 uf D~ IN4l48 Q2~ : : BS 170 :-25 ~ Q3: 2N3906 l:,Q4 2N3904:
, : - ~ :
:Prom~the~foregoing detai~ed description, it can thus be seen;that~the present invention proYides an improved :; microprocessor~ watch-dog monitor for electronic trip ~ 30 ~ units which in~cludes a co~r~rator circuit formed of a ; : ~ first bipolar transistor of the PNP-type conductivity and : a second bipolar transistor of the NPN-type conductivity.
; ~o 94/0089g ~ 1 1 5 6 6 ~ PCT/US93/01946 ~he watch-dog monitor of the present invention provides for more reliable operation and performance at reduced cost than those traditionally available.
., : While there has been illustrated and described what ~ ~ S is at present considered to be a preferred embodiment of ; the present invention, it will be understood by those skilled in the art that:various changes and modifications m~ay be:made, :and eguivalents may be substituted for elements~thereof:without:departing from~the true scope of ' lO:the invention. In addition, many modifications may b~
made:to~adapt~a~ particular situation or material to the tea~:in~s of~the invention without ~Pr~rting from the central:scope thereof. Therefore, it is intended that this~:invention not be limited'to the particular e~bodi-15~ ment~disclosed as the best mode oontemplated for carrying out the invention, but that the invention will include all~embodiments falling within the scope of the appended ;claims.~
: ~, ~, :
, : :
r~' ~ DESCRIPTION
. .
~ MICROPROCESSOR WATCH-DOG MONITOR
: FOR ELECTRONIC TRIP UNITS
.., . ;;
~ 5 BACKGROUND OF THE lNv~Nl~lON
:
This invention relates general~y to solid-state circuit inte~l~yLers in electrical distrib~tion systems : and more particularly, it relates to an improved micro-processor wat h-dog monitor for electronic trip units - 10 used in circuit inte-lu~Lers so as to maintain the i~-tegrity of the trip unite.
As is generally well-known in the art, circuit bxeakers have been widely used in commercial and industrial applications for protecting electrical con-: 15~ ductors and~apparatus co~~ected thereto from damage dueto~ iv~ current ~low. Circui~ ~rea~ers typically ;:int:luded~ trip :~yste~s.~which w~re d~sign~d to inte~L~
when the ~u~en~ flowing through them ex~e~3 a pre-det~rmined level. Specifically, moslt simpl~ trip y~t~ns 20~ ~:utilized an electromagnet to trip the circuit in response ~to ~rl~nt or voltage fluctuations. The electroma~net provided a magnetic field in response to current flowing through the circuit breaker. When the ~L L en~ level in-crP~ beyond the predetermined lev 1 or trip point, the magnetic field "trips" a mech~n ism~which causes a set of circuit breaker eontacts to release, thereby ~9Opening" or 9'breaking" the circuit path.
:~' i ~'W094/008g9 PCT~US93/01946 ~ ) 211S6G~ ' .:
Gradually, how~ver, there has arisen a n~ed in the .' industry for ~ore sophisticated and ela~orate tripping syste~s as the complexity of electrical distribution ; systems increased. For example, in many commercial and industrial eguipment today it is desired to'have circuit breakers that perform both an instantaneous and delayed tripping (i.e., ti~c current interrupting character istics) so as to provide improved accuracy and flexi-bility on the equipment to be controlled. For this :: 10 reason, many microprocessor-based soiid-state circuit : ~ : interrupters have been also developed in the prior art in an attempt to pro~ide more accurate and reliable control operations on the electrical distribution system on which the circuit inte u~er was being employed. To this end, a micro~ er is provided which is coupled between the ent path: and a ~ trip solenoid conSrolling the mec~ sm for br~A~i ng the current path. ~he micro-:~ computer~stores~ trip points which activate the trip solenoid when the current within the current path exceeds : the trip points.
; Therefore,-in order to ~h~nce system ~çren~hility there~ is generally required a watch-dog circuit for protecting the tripping system in the event of a micro-o~ Ler malfunction. Prior art watch-dog circuits are known to exist ~which include either an operational am-~: plifier or a discrete ~L~yl ammable unijunction transis-tor. While these prior art circuits performed their :~ ~unction adequately, they suffer from the disadvantage of ~: being high in cost and having a low reliability.
, :
.
~ ~ 094/00899 PCT/US93/01946 ' 2 1 1 5 6 6 ~
. J
:~ -3-A~cordingly, the present invention is directed to an impxoved micropro~-Ccor watch-dog monitor which pro~ides for more reliable operation and performance at a reduced , cost. Specifically, the micropro~ccor watc~-dog monitor i 5 of the instant invention includes a comparator circuit : formed of a first bipol~r transistor of the PNP-type con-ductivity and a second bipolar transistor of the NPN-type conductivity.
..
' :~
; ~ SUNMP.RY OF THE INVENTION
~ Accordingly, it~is a general object of the present ; :invention to provide an i~oved microproceC~or watch-dog monitor for ele~LL~I.ic trip units which is relatively simple and economical to manufacture and assemble, but yet overcomes ~he disadvantages of the prior art 15~ circuits.
It is an object of the pr~sent invention to provide :an~ improved microproc~Por watch-dog monitor for ele~LLol~ic trip units which has a high reliability in its : ~ ~ operation.
' :~:
~;~ 20 It is another object of the present in~ention to . provide an improved micropror~Qeor watch-dog monitor for ~: electronic trip units which is formed of omponents with relatively low cost.
:' CA 0211~66~ 1998-05-29 It is still another object of the present invention to provide an i~Lo~ed mi~u~ucessor watch-dog monitor for electronic trip units which may include a comparator circuit formed of a first bipolar transi~tor of the PNP-type conductivity and a ~econd bipoIar transietor of-the NPN-type conductivity.
In accordance with these aims and objectives, the present invention is concerned with the provision of and improved mi~o~,ocessor watch-dog monitor for electronic trip units which includes an input transistor, a timing circuit, and a comparator circuit. The input transistor has its gate coupled to an input terminal and its source connected to a ground potential. A first resistor has its one end connected to the drain of the input transis-lS tor and its other end connected to an internal node. Thetiming circuit is formed of a second resistor and a capacitor. The second resistor has its one end connected to a power supply potential and its other end connected to one end of the capacitor and to the internal node.
The other end of the capacitor is connected to the ground potential.
The comparator circuit is formed of a first switch-ing transistor and a second switching transistor. The first switching transistor has its emitter connected to the internal node. The second switching transistor has its base connected to the collector of the first switch-ing transistor, its collector cG",.e_Led to the base of the first switching transistor, and its emitter coupled ~ - ;
' ~VO 94/00899 PC~r/US93/01946 211~6S~
to an output terminal. A vo~tage divider is formed of third and fourth resistors. The third resistor has its : : one end connected to the power supply potential and its other end connected to the collector o~?~the se~ond switching transistor and to one end of the fourth resistor. The other end of the fourth resistor is con-nected to the ~ou,.d:potential.
BRIEF DESCRIPTION OF THE D~U~WINGS
These and other~ objects and advantages of the :10 ~ ~present invèntion will become more fully apparent from ~,',,,~?',~ ; the ~following~detailed d scription when read in con-junction :with the~accompanying drawings with like reference n ~ erals~ indicating correspon~;~g parts ;throughout, wherein:~
15~rigure~ a~d-~ailed sche~atic circuit diagram of à:~'mi~lo~ Qr~watch-dog- ~onitor, constructed in ao~u..l~noç with-the principles of the present~il,va..~ion;
Figure 2 ~are waveforms at various points in the ; 20~ ~ circuit of:~ Figure 1, useful in understanding~ its operation.
. ~, -:' ~, .~ W0~4/0089~ PCT/US93/Olg46 ~
... ~, .
~ 211~66~
-~ESCRIPTION OF THE PR~ K~ED EMBODIMENT
~ ~Referring now to the drawings, there ~s shown in .:Figure 1 a detailed schematic circuit diagram of an im~Ioved microprccessor watch-dog monitoring circuit 10 ~or use in association with microcomputer-based elec-tronic trip units employed in solid-state circuit inter-rupters. The watch dog monitoring circuit 10 serves to maintain the integrity of the microcomputer-based elec-tronic trip units. In other words, the watch-dog moni-toring circuit protects the trip units in the event of ~:~mi~o~mputer malfunctions. Therefore, the watch-dog monitoring ~circUit 10 is designed to engage a trip solenoid 11~for br~kin~ the ~r:~ent path in the circuit i~te~.u~Ler if the microcomputer 12 fails to reset it 15~ within:a~predetermined time period.
The watch-dog monitoring circuit 10 is comprised of an:input switching circuit 14, a timing circuit 16, and a~comparator circuit:18. ~The input circui~ 14 includes an~N~ nn~ input field-eff ct tran~istor Q1, a ~ ent-2~0:~ 1imiting:colleetor:resistor Rl, a base resistor R6, an :input resistor:R5, and a.diode D1. The transistor Ql has its drain connected to one end of:the current-limiting resistor R1, its gate connected to one end of the ~ase resistor R6,~:and its source connected to a ground poten-25 -~ tial GND. The anode of the diode Dl is also connected to the ~ound potential and to one end of the input resistor R5~, and the cathode of the diode D1 is ~onnected to the : gate of the transistor Ql. The other end of the resistor R5 is connected to the other end of the base resistor R6.
, ~-~: .
r ~
'~WO 94/00899 2 1 1 5 6 6 ~ Pcr~lJS93/01946 The other and of the resistor R~ is c:onnected to ~n ~- intarnal node A.
~he monitoring circuit 10 further include~ an input terminal 20 and an ou~yuL terminal 22. The input Sterminal 20 is coupled to the microcomputer 12 for receiving reset pulses in the form of a pulse train, each pulse ha~ing a pulse width of approximately 200 ms and a period of 500 ms. The amplitude of lthe pul~;es varies between z~ro and +5. 0 volts. The input terminal 20 is 10cormected *o one end of an input resistor R18. The other end of the resistor R18 is connected to one end of a ~oupling capacitor C3. The other end of th~ capac:itor C3 i9 cor~nected to :the junction of the resistors R5 and R6.
A ~oQnd input transistor Q2 ~ay be optionally pro-~; 15vîd~d f or testing ~he watch-dog monitoring ::irc:uit by si~mulating a malfunction of the microcomputer 12 ( i . e ., reset pulses are ~kopped3. As can b~ s~en, the transi~-tor Q2 has its colle~tor conne ::ted to one ~nd of the r~itor C3, its base coupled to a second input terminal 2024 via a current-li~iting resistor R9, a~d its e~itter ~: connected to th~ ylO~IId potential. In order to si~ulate a failure, the ~econd input terminal 20 has applied thereto a voltage o~ +5~0 volts, thereby rendering the tr~nsistor Q1 non-conductive.
' 25The timing circuit 16 is ~ormed of a resistor R2 and ; a timing capacitor C1. One end of the resistor R2 is ~ WO94/008g9 PCT/US93/01946 ~
21156G~ - -~Q~nec~ed to a power supply potential VCC, which i~
typi..ally at +12.0 volt~. The oth~r end of the resistor R2 is connected to one end of the capacitor Cl and to the internal node A. The other end of the capacitor C1 is S - co~ct~d to the ground potential.
'', ~ ;
The comparator circuit 18 includes a bipolar PNP-~: type s~itching transistor Q3, a bipolar NPN-type switch-ing transistor ~Q4, and a voltage divider formed of resist~rs R7: and R8. The transistor Q3 has its emitter connected to the junction of the resistor R2 and the capacitor Cl at~the ~internal node A, its base connected to the collector of the transistor Q4, and its collector connected to the base of the transistor Q4. One end of the resistor R7 is al o connected to~ the power supply potential VCC. The other end of the resistor R7 is connected to ~one end of the resistor R8 and to the co~lector of:the transistor Q4. The other end of the resistor~R8:is~connected to the ~ .,d potential~
A diode:~D2:has its ~no~P r~cted to the emitter of Z0: : ~the transistor~Q4 and its cathode connected to the ohL~u~
erminal 22.: The ou~u- terminal 22 provides an ouL~L
~, ~ignal for energizing the trip solenoid 11.
,: .
-The operation of the microprocessor watch-dog monitoring circuit 10 will now be explained with ., ~: : 25 reference to the waveforms of Figure 2. Under normal : operating conditions, the lsgic high reset pulses on the , '' ' ~wo 94/008g9 2 1 1 ~ ~ 6 ~ PCT/US93/~1946 input terminal 20 will be regularly generated (every 200 ms) by ~he microcomputer 12. The reset pulses are passed th~ou~ll the resi~tor Rl8, the capacitor C3, and the resistor R6 to the gate of the input transistor Ql.
A~ a result, the input transistor Ql will be turned on periodically so as to discharge the capacitor Cl via the resistor Rl and the drain-source junction of the transi~stor Ql. However, if the microcomputer ~2 mal-functions so as to stop ths generation of the periodi~
reset pulses the input transistor Ql will remain in the : non-conductive~ state. It should be noted that this "failed" condition can be simulated by supplying a voltage of +5.0 volts to the base of the second input transistor Q2.
15 : ~ In the "failed" ~on~ition~ as designated at time tl -~ in the waveform 26 in Figur 2, the capacitor Cl will egin to charge up along the waveform 28 in Figure 2. At the time t2 when the voltage defining a turn-on signal on the~capacitor C1 is greater than the reference voltage V~f 20~ ~ on:the ba~e of the transistor Q3 by a V~, the transistor Q3: wil~l be ~u~ on so as to pull up the base of the transistor Q4. ~o~ee~uently, the transistor Q4 will also be rendered conductive. When the transistor Q4 turns on, :th2 o~L~ voltage V~ of ~6.1 on the waveform 30 in : Figure 2 will appear at the output terminal 24 at the : time t3. This high voltage on the output termin~l 24 is used to engage or energize the trip solenoid ll, thereby ~:~ interrupting the o~lent path in the circuit breaker. As - can ~e seen,~ the output voltage will be g nerate~ in approximately 133 ms after the malfunction of the micro~o~uLer 12 or interruption of the reset pulses.
, W094/00899 PCT/US93/01946 ~ ' 211S66~
--lOo For completeness in the disclosure of the above described microprocessor watch-dog monitQring circuit but not for the purposes of limitation, the following repre-sentati~e values and component identifications are submitted. These values and components were employed in a circuit that was constructed and tested and which pro-vides a high quality performance. Those skilled in the art will recognize that many alternative elements and : : values may be~employed in constructing circuits in ac-cor~nce with the present invention.
: . PAR T TYPE or ~IALUE
Rl~ 18 ohms R2 75K ohms R5 ~ : 27K ohms : 15~ R6 : o l o~ms : ; R7 lOK ohms : R8:~ 14K oh~s :R9~ lK ohms ;::Rl8 lO0 ohms 2~ Cl ~22 uf D~ IN4l48 Q2~ : : BS 170 :-25 ~ Q3: 2N3906 l:,Q4 2N3904:
, : - ~ :
:Prom~the~foregoing detai~ed description, it can thus be seen;that~the present invention proYides an improved :; microprocessor~ watch-dog monitor for electronic trip ~ 30 ~ units which in~cludes a co~r~rator circuit formed of a ; : ~ first bipolar transistor of the PNP-type conductivity and : a second bipolar transistor of the NPN-type conductivity.
; ~o 94/0089g ~ 1 1 5 6 6 ~ PCT/US93/01946 ~he watch-dog monitor of the present invention provides for more reliable operation and performance at reduced cost than those traditionally available.
., : While there has been illustrated and described what ~ ~ S is at present considered to be a preferred embodiment of ; the present invention, it will be understood by those skilled in the art that:various changes and modifications m~ay be:made, :and eguivalents may be substituted for elements~thereof:without:departing from~the true scope of ' lO:the invention. In addition, many modifications may b~
made:to~adapt~a~ particular situation or material to the tea~:in~s of~the invention without ~Pr~rting from the central:scope thereof. Therefore, it is intended that this~:invention not be limited'to the particular e~bodi-15~ ment~disclosed as the best mode oontemplated for carrying out the invention, but that the invention will include all~embodiments falling within the scope of the appended ;claims.~
: ~, ~, :
, : :
Claims (15)
1. A microprocessor watch-dog monitor for electronic trip units comprising:
an input transistor having its gate coupled to an input terminal and its source connected to a ground potential;
a first resistor having its one end connected to the drain of said input transistor and its other end connected to an internal node;
a timing circuit of a second resistor and a capacitor, said second resistor having its one end connected to a power supply potential and its other end connected to one end of said capacitor and to said internal node, the other end of said capacitor being connected to the ground potential;
a comparator circuit formed of a first switching transistor and a second switching transistor;
said first switching transistor having its emitter connected to said internal node;
said second switching transistor having its base connected to the collector of said first switching transistor, its collector connected to the base of said first switching transistor, and its emitter coupled to an output terminal; and a voltage divider formed of third and fourth resistors, said third resistor having its one end connected to the power supply potential and its other end connected to the collector of said second switching transistor and to one end of said fourth resistor, the other end of said fourth resistor being connected to the ground potential.
an input transistor having its gate coupled to an input terminal and its source connected to a ground potential;
a first resistor having its one end connected to the drain of said input transistor and its other end connected to an internal node;
a timing circuit of a second resistor and a capacitor, said second resistor having its one end connected to a power supply potential and its other end connected to one end of said capacitor and to said internal node, the other end of said capacitor being connected to the ground potential;
a comparator circuit formed of a first switching transistor and a second switching transistor;
said first switching transistor having its emitter connected to said internal node;
said second switching transistor having its base connected to the collector of said first switching transistor, its collector connected to the base of said first switching transistor, and its emitter coupled to an output terminal; and a voltage divider formed of third and fourth resistors, said third resistor having its one end connected to the power supply potential and its other end connected to the collector of said second switching transistor and to one end of said fourth resistor, the other end of said fourth resistor being connected to the ground potential.
2. A microprocessor watch-dog monitor as claimed in Claim 1, wherein said input transistor is comprised of an N-channel field-effect transistor.
3. A microprocessor watch-dog monitor as claimed in Claim 2, wherein said first switching transistor is a bipolar transistor of the PNP-type conductivity.
4. A microprocessor watch-dog monitor as claimed in Claim 3, wherein said second switching transistor is a bipolar transistor of the NPN-type conductivity.
5. A microprocessor watch-dog monitor as claimed in Claim 1, further comprising a second input transistor having its base coupled to a second input terminal, its collector coupled to the base of said first input transistor, and its emitter connected to the ground potential.
6. A microprocessor watch-dog monitor as claimed in Claim 1, wherein said first input terminal is connected to a microcomputer for receiving reset pulses to render periodically said input transistor to be conductive.
7. A microprocessor watch-dog monitor as claimed in Claim 6, wherein said timing circuit generates a turn-on signal to the emitter of said first switching transistor after the absence of the reset pulses for a predetermined time to render said first and second switching transistors to be conductive thereby producing an output signal at the output terminal.
8. A microprocessor watch-dog monitor as claimed in Claim 7, further comprising a trip solenoid which is energized in response to said output voltage for interrupting a current path in a circuit interrupter.
9. A microprocessor watch-dog monitor as claimed in Claim 1, further comprising a diode having its cathode connected to the base of said input transistor and its anode connected to the ground potential.
10. A microprocessor watch-dog monitor for electronic trip units, comprising:
input transistor means responsive to reset pulses for resetting periodically timing means;
said timing means for generating a turn-on signal after the absence of the reset pulses for a predetermined time at an internal node;
a comparator circuit formed of a first switching transistor and a second switching transistor;
said first switching transistor having its emitter connected to said internal node;
said second switching transistor having its base connected to the collector of said first switching transistor, its collector connected to the base of said first switching transistor, and its emitter coupled to an output terminal;
a voltage divider formed of first and second resistors, said first resistor having its one end connected to a power supply potential and its other end connected to the collector of said second switching transistor and to one end of said second resistor, the other end of said second resistor being connected to a ground potential; and said first and second switching transistors being turned on in response to said turn-on signal to produce an output signal at the output terminal.
input transistor means responsive to reset pulses for resetting periodically timing means;
said timing means for generating a turn-on signal after the absence of the reset pulses for a predetermined time at an internal node;
a comparator circuit formed of a first switching transistor and a second switching transistor;
said first switching transistor having its emitter connected to said internal node;
said second switching transistor having its base connected to the collector of said first switching transistor, its collector connected to the base of said first switching transistor, and its emitter coupled to an output terminal;
a voltage divider formed of first and second resistors, said first resistor having its one end connected to a power supply potential and its other end connected to the collector of said second switching transistor and to one end of said second resistor, the other end of said second resistor being connected to a ground potential; and said first and second switching transistors being turned on in response to said turn-on signal to produce an output signal at the output terminal.
11. A microprocessor watch-dog monitor as claimed in Claim 10, wherein said input transistor is comprised of an N-channel field-effect transistor.
12. A microprocessor watch-dog monitor as claimed in Claim 11, wherein said first switching transistor is a bipolar transistor of the PNP-type conductivity.
13. A microprocessor watch-dog monitor as claimed in Claim 12, wherein said second switching transistor is a bipolar transistor of the NPN-type conductivity.
14. A microprocessor watch-dog monitor as claimed in Claim 10, further comprising second input transistor means coupled to said first input transistor means for testing the operation of said watch-dog monitor.
15. A microprocessor watch-dog monitor as claimed in Claim 10, further comprising a trip solenoid which is energized in response to said output voltage for interrupting a current path in a circuit interrupter.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/901,364 US5214560A (en) | 1992-06-19 | 1992-06-19 | Microprocessor watch-dog monitor for electronic trip units |
| US07/901,364 | 1992-06-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2115665A1 CA2115665A1 (en) | 1994-01-06 |
| CA2115665C true CA2115665C (en) | 1999-01-05 |
Family
ID=25414027
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002115665A Expired - Fee Related CA2115665C (en) | 1992-06-19 | 1993-03-05 | Microprocessor watch-dog monitor for electronic trip units |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5214560A (en) |
| EP (1) | EP0600046B1 (en) |
| CA (1) | CA2115665C (en) |
| DE (1) | DE69307110T2 (en) |
| MX (1) | MX9302426A (en) |
| WO (1) | WO1994000899A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7400477B2 (en) | 1998-08-24 | 2008-07-15 | Leviton Manufacturing Co., Inc. | Method of distribution of a circuit interrupting device with reset lockout and reverse wiring protection |
| US6487057B1 (en) * | 2000-06-13 | 2002-11-26 | Eaton Corporation | Ground fault current interrupter/arc fault current interrupter circuit breaker with fail safe mechanism |
| GB0120748D0 (en) | 2001-08-25 | 2001-10-17 | Lucas Aerospace Power Equip | Generator |
| US7111195B2 (en) * | 2002-02-25 | 2006-09-19 | General Electric Company | Method and system for external clock to obtain multiple synchronized redundant computers |
| US20030212473A1 (en) * | 2002-02-25 | 2003-11-13 | General Electric Company | Processing system for a power distribution system |
| US7532955B2 (en) * | 2002-02-25 | 2009-05-12 | General Electric Company | Distributed protection system for power distribution systems |
| US7058482B2 (en) * | 2002-02-25 | 2006-06-06 | General Electric Company | Data sample and transmission modules for power distribution systems |
| AU2003216397A1 (en) * | 2002-02-25 | 2003-09-09 | General Electric Company | Electrical protection system for reliability improvement based on sensitivity analysis |
| US7747356B2 (en) | 2002-02-25 | 2010-06-29 | General Electric Company | Integrated protection, monitoring, and control system |
| DE10210920B4 (en) * | 2002-03-13 | 2005-02-03 | Moeller Gmbh | Circuit breaker with electronic release |
| US7636616B2 (en) * | 2003-02-25 | 2009-12-22 | General Electric Company | Protection system for power distribution systems |
| US7039822B2 (en) * | 2003-02-27 | 2006-05-02 | Promos Technologies Inc. | Integrated circuit memory architecture with selectively offset data and address delays to minimize skew and provide synchronization of signals at the input/output section |
| GB2401467B (en) * | 2003-05-09 | 2006-01-25 | Autoliv Dev | Improvements in or relating to a movable or removable unit for a motor vehicle |
| DE10322385B3 (en) * | 2003-05-17 | 2004-11-11 | Moeller Gmbh | Method and circuit arrangement for monitoring the function of an electronic-mechanical position switch |
| DE102004015932A1 (en) * | 2004-04-01 | 2005-10-20 | Moeller Gmbh | Method and circuit arrangement for operating a magnetic drive |
| US7372678B2 (en) * | 2005-08-24 | 2008-05-13 | Leviton Manufacturing Co., Inc. | Circuit interrupting device with automatic test |
| US7852606B2 (en) * | 2005-08-24 | 2010-12-14 | Leviton Manufacturing Company, Inc. | Self-testing circuit interrupting device |
| US7554796B2 (en) * | 2006-01-20 | 2009-06-30 | Adc Telecommunications, Inc. | Modular power distribution system and methods |
| US7911746B2 (en) * | 2006-06-01 | 2011-03-22 | Leviton Manufacturing Co., Inc. | GFCI with self-test and remote annunciation capabilities |
| CN101910856B (en) | 2008-01-29 | 2014-06-18 | 立维腾制造有限公司 | Self testing fault circuit interrupter apparatus and method |
| US8183869B2 (en) * | 2008-09-23 | 2012-05-22 | Leviton Manufacturing Co., Inc. | Circuit interrupter with continuous self-testing feature |
| US8116056B2 (en) * | 2008-11-14 | 2012-02-14 | Schneider Electric USA, Inc. | Low voltage startup timer for a microcontroller-based circuit breaker |
| JP5989687B2 (en) * | 2014-01-20 | 2016-09-07 | 中国電力株式会社 | Transmission line relay panel recovery device |
| US9759758B2 (en) | 2014-04-25 | 2017-09-12 | Leviton Manufacturing Co., Inc. | Ground fault detector |
| US9697065B1 (en) | 2016-03-09 | 2017-07-04 | Nxp Usa, Inc. | Systems and methods for managing reset |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5875255A (en) * | 1981-10-29 | 1983-05-06 | Nec Home Electronics Ltd | Runaway detector for microcomputer |
| US5166887A (en) * | 1988-03-31 | 1992-11-24 | Square D Company | Microcomputer-controlled circuit breaker system |
| US5081625A (en) * | 1988-10-05 | 1992-01-14 | Ford Motor Company | Watchdog circuit for use with a microprocessor |
| JPH061860Y2 (en) * | 1988-10-31 | 1994-01-19 | 自動車電機工業株式会社 | Automatic vehicle speed controller |
| US5089928A (en) * | 1989-08-31 | 1992-02-18 | Square D Company | Processor controlled circuit breaker trip system having reliable status display |
| US5017846A (en) * | 1990-04-05 | 1991-05-21 | General Electric Company | Stall protection circuit for an electronically commutated motor |
| US5151854A (en) * | 1990-07-20 | 1992-09-29 | Honeywell Inc. | Integrated low voltage detect and watchdog circuit |
-
1992
- 1992-06-19 US US07/901,364 patent/US5214560A/en not_active Expired - Fee Related
-
1993
- 1993-03-05 DE DE69307110T patent/DE69307110T2/en not_active Expired - Fee Related
- 1993-03-05 WO PCT/US1993/001946 patent/WO1994000899A1/en active IP Right Grant
- 1993-03-05 EP EP93907198A patent/EP0600046B1/en not_active Expired - Lifetime
- 1993-03-05 CA CA002115665A patent/CA2115665C/en not_active Expired - Fee Related
- 1993-04-26 MX MX9302426A patent/MX9302426A/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP0600046A1 (en) | 1994-06-08 |
| EP0600046B1 (en) | 1997-01-02 |
| DE69307110T2 (en) | 1997-07-03 |
| MX9302426A (en) | 1994-01-31 |
| DE69307110D1 (en) | 1997-02-13 |
| US5214560A (en) | 1993-05-25 |
| CA2115665A1 (en) | 1994-01-06 |
| EP0600046A4 (en) | 1994-11-23 |
| WO1994000899A1 (en) | 1994-01-06 |
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