CA2116332A1 - Programme logic cell and array - Google Patents

Programme logic cell and array

Info

Publication number
CA2116332A1
CA2116332A1 CA002116332A CA2116332A CA2116332A1 CA 2116332 A1 CA2116332 A1 CA 2116332A1 CA 002116332 A CA002116332 A CA 002116332A CA 2116332 A CA2116332 A CA 2116332A CA 2116332 A1 CA2116332 A1 CA 2116332A1
Authority
CA
Canada
Prior art keywords
cell
improved
functions
core
nearest neighbors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002116332A
Other languages
French (fr)
Other versions
CA2116332C (en
Inventor
Frederick C. Furtek
Rafael C. Camarota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2116332A1 publication Critical patent/CA2116332A1/en
Application granted granted Critical
Publication of CA2116332C publication Critical patent/CA2116332C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables

Abstract

An improved programmable logic cell (1) for use in a programmable logic array comprising cells which are arranged in two-dimensional matrix of rows and columns and are interconnected by a two-dimensional array of direct connections between a cell (1) and its four nearest neighbors, one to its left (or to the West) (3a, 3b, 7a, 7b) and one to its right (or to the East) (5a, 5b, 9a, 9b), one above it (or to the North) (2a, 2b, 6a, 6b) and one below it (or to the South) (4a, 4b, 8a, 8b). Each cell receives input (s) from each of its nearest neighbors and addition-al inputs) from a bus, pin, or neighbor and may be programmed to generate a variety of logical func-tions at its outputs which connect to the cell's four nearest neighbors. The core of the improved logic cell (fig.2) comprises two upstream gates (21, 23) the outputs of which feed two downstream gates (28, 41), one of which is an exclusive-OR gate (28) which feeds a downstream register (33). Additional programmable connections and other logic aug-ment the cell core to produce cell embodiments which can be configured to efficiently implement various logical functions. Among the functions which may be implemented by the improved cell are a number of two-level combinational functions (such as multiplexing) and sequential functions (such as counting and shifting). A variety of cell embodiments based on the improved cell core are illustrated.
CA002116332A 1991-08-30 1992-08-28 Programme logic cell and array Expired - Fee Related CA2116332C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US752,419 1991-08-30
US07/752,419 US5245227A (en) 1990-11-02 1991-08-30 Versatile programmable logic cell for use in configurable logic arrays
PCT/US1992/007376 WO1993005577A1 (en) 1991-08-30 1992-08-28 Programme logic cell and array

Publications (2)

Publication Number Publication Date
CA2116332A1 true CA2116332A1 (en) 1993-03-18
CA2116332C CA2116332C (en) 2001-12-11

Family

ID=25026251

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002116332A Expired - Fee Related CA2116332C (en) 1991-08-30 1992-08-28 Programme logic cell and array

Country Status (9)

Country Link
US (1) US5245227A (en)
EP (1) EP0601094B1 (en)
JP (2) JP3432220B2 (en)
KR (1) KR100246903B1 (en)
AT (1) ATE203131T1 (en)
CA (1) CA2116332C (en)
DE (1) DE69231933T2 (en)
SG (1) SG49817A1 (en)
WO (1) WO1993005577A1 (en)

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Also Published As

Publication number Publication date
US5245227A (en) 1993-09-14
KR100246903B1 (en) 2000-03-15
JPH06510175A (en) 1994-11-10
JP2003152529A (en) 2003-05-23
SG49817A1 (en) 1998-06-15
JP3474878B2 (en) 2003-12-08
WO1993005577A1 (en) 1993-03-18
ATE203131T1 (en) 2001-07-15
CA2116332C (en) 2001-12-11
EP0601094B1 (en) 2001-07-11
EP0601094A4 (en) 1995-03-15
DE69231933T2 (en) 2002-04-04
JP3432220B2 (en) 2003-08-04
DE69231933D1 (en) 2001-08-16
EP0601094A1 (en) 1994-06-15

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Effective date: 20110829