CA2120347A1 - Failsafe digital bus to analog protocol converter system - Google Patents
Failsafe digital bus to analog protocol converter systemInfo
- Publication number
- CA2120347A1 CA2120347A1 CA002120347A CA2120347A CA2120347A1 CA 2120347 A1 CA2120347 A1 CA 2120347A1 CA 002120347 A CA002120347 A CA 002120347A CA 2120347 A CA2120347 A CA 2120347A CA 2120347 A1 CA2120347 A1 CA 2120347A1
- Authority
- CA
- Canada
- Prior art keywords
- digital
- analog
- flight control
- computer
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
- G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B9/00—Safety arrangements
- G05B9/02—Safety arrangements electric
- G05B9/03—Safety arrangements electric with multiple-channel loop, i.e. redundant control systems
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05D—SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
- G05D1/00—Control of position, course or altitude of land, water, air, or space vehicles, e.g. automatic pilot
- G05D1/0055—Control of position, course or altitude of land, water, air, or space vehicles, e.g. automatic pilot with safety arrangements
- G05D1/0077—Control of position, course or altitude of land, water, air, or space vehicles, e.g. automatic pilot with safety arrangements using redundant signals or controls
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06J—HYBRID COMPUTING ARRANGEMENTS
- G06J1/00—Hybrid computing arrangements
Abstract
A failsafe avionics interface unit (10) serves as a protocol converter system for translating data for control purposes from a digital communication bus (65) to an analog control channel as an upgrade or interface to an existing analog control system. The avionics interface unit (10) includes digital interface bus logic (101), a digital data processor module (102), an analog interface, and a mode selection circuit (104). Data communicated over the digital interface bus (65) is periodically translated into equivalent analog control signals. For safety purposes, the avionics interface unit (10) ensures the integrity of the system by repetitively looping back or wrapping the digital equivalents of the analog output signals and comparing them to commanded digital control values. The protocol converter system additionally monitors communications over the digital data bus for data continuity. If the difference between a wrapped digital equivalent of an analog output signal and an expected value exceeds tolerable limits or if communication fails, the system disconnects its interface from control using redundant software and hardware and returns control to the analog control system (51).
Description
W094/03854 PCT/US93/072~8 ~ircrat have been designed ~or decades which enable pilots to directly control the aircraft by their instincts or their feelings, i.e., "by the seat of their S pants". This may have been satisfactory 80 years ago but, with the advent of highly powered and responsive jet fighters, instincts are no longer enough. Now many jet fighters, :such as the F-16, have sufficient power to attempt a maneuver that is violent enough to damage the aircraft or ~black-out the pilot if inadvertently or , erroneously~requested.~ Also, the demands on the pilot to coordinate flight contro}s increase with the power and : speed of:the~aircraft. A slight error can ~esult in the plane going ~out of control, sometimes irrecoverably.
Additionally,~:with~all of this aeronau~ical capability, more:functionality is demanded for the aircraftO In some ~ ~ :
cases these new~functions may consist of systems, such as : an;autopilot:which reduces the work load of the pilot by automaticàlly~flying~a designated course. It may also be zo:~ :neGessary to provide a highly demandlng pilot work load function,~ such~as terrain-~ollowing, which maintains a ; deslgnated ~altitude~c}ose to the ground.
In~certain high performance aircraft such as the :F-16: fighter~:plane:, these funGtions ~are accomplished by 2~5~ ~ana:log~compùters.~A flight~ control~computer is used to control~movement~of the airplane~control surfaces so as to overcome:~f;lying ~instabilitles that result from the `aircraft~d~sign.~ The flight~control computer may also restrain or limit the commands from the pilot. An ~::: ~ ! :
30~: addltional~analog;computer may:provide a simple function such:as an~ autopilot that maintains a straight and level :course:.:~
. ~
~ 2-: ~ ~
W094~03854 2 ~ 2 ~ 3 ~ 7 PCT/U~3~072~8 An analog computer is a series of hard-wired circuits that cause an output signal to vary continuously in a predefined manner in response to one or more input signals. In contrast, a digital computer operates on discrete numbers to generate a sequence of numbers that can define an output signal. Whereas an analog computer must be special}y designed and wired for each different relationship between its input and output sign~ls, this relationship is defined in a digital computer by a program that can more easily be changed. Not only is ~ digital computer more flexible than an analog computer, but a sp~cial circuit need not be designed and built for each function that is to be performed. It thus becomes practical to~ implement more complex functions with a digital computer.
, For the5e reasons, digital computers have generally replaced analog computers in the new~st aircraft designs. :~Nevertheless, there remains a large base of :operating aircraft that ha~e~ analog ~light control :20~ ~:computers. ~ It ~would ~be~ desirable to provide the flexib~ ity~ ;and ~functionality of digital computers to these :aircra;ft bùt the cost of replacing the analog computers:would be bey~nd the economic constraints of most operators.~
25~ In-~more modern~designs, the aircraft stabil~ty is controlled~by a~ digital flight control co~puter while a mission ;~computer controls multiple complex functions, such as~ terrain-fol~lowing and;~automatic landing systems.
: ;This ~type of d~igital system is designed into many new aircraft~ and~supersedes the old all-analog approach.
Analog: and digital computer systems are inherent:ly~ incompatible wi~h each~ other due to the , "~
:
W094/038~ PCr/VS93/07298 2 1 2~)3'~7 different techniques of communicating information. It is th~s not practical to upgrade the functionality of an older aircraft by simply connecting a modern digital : computer in place of an existîng analog flight control computer. Generally, an upgrade to a digital computer :~ would require major rewiring of an aircraft. Thus, it would be~extremely costly to replace the existing analog computers with digital computers. The large inventory of expensive and potentially highly capable aircraft and the emerging power of avionics ~ystems makes it imperative to find a way to economically bring the capabilities of modern digital a~ionics to existing all-analog aircraft.
This invention~provides the connection between analog and : digital tcchnologies by establishing an interface between new digital~:mission computers and the analog flight control computer. This invention enables the latest : functionality~of a digital flight system to be added to : : existing:~aircraft~ while minimizing the conversion costs and minimizing ~flight requali~ication on the aircraft since~the~analog~ light control system is maintained with this invention. ~
: i :::;: ~: :: : ::: ~
i .
: i: ::
Additionally,~:with~all of this aeronau~ical capability, more:functionality is demanded for the aircraftO In some ~ ~ :
cases these new~functions may consist of systems, such as : an;autopilot:which reduces the work load of the pilot by automaticàlly~flying~a designated course. It may also be zo:~ :neGessary to provide a highly demandlng pilot work load function,~ such~as terrain-~ollowing, which maintains a ; deslgnated ~altitude~c}ose to the ground.
In~certain high performance aircraft such as the :F-16: fighter~:plane:, these funGtions ~are accomplished by 2~5~ ~ana:log~compùters.~A flight~ control~computer is used to control~movement~of the airplane~control surfaces so as to overcome:~f;lying ~instabilitles that result from the `aircraft~d~sign.~ The flight~control computer may also restrain or limit the commands from the pilot. An ~::: ~ ! :
30~: addltional~analog;computer may:provide a simple function such:as an~ autopilot that maintains a straight and level :course:.:~
. ~
~ 2-: ~ ~
W094~03854 2 ~ 2 ~ 3 ~ 7 PCT/U~3~072~8 An analog computer is a series of hard-wired circuits that cause an output signal to vary continuously in a predefined manner in response to one or more input signals. In contrast, a digital computer operates on discrete numbers to generate a sequence of numbers that can define an output signal. Whereas an analog computer must be special}y designed and wired for each different relationship between its input and output sign~ls, this relationship is defined in a digital computer by a program that can more easily be changed. Not only is ~ digital computer more flexible than an analog computer, but a sp~cial circuit need not be designed and built for each function that is to be performed. It thus becomes practical to~ implement more complex functions with a digital computer.
, For the5e reasons, digital computers have generally replaced analog computers in the new~st aircraft designs. :~Nevertheless, there remains a large base of :operating aircraft that ha~e~ analog ~light control :20~ ~:computers. ~ It ~would ~be~ desirable to provide the flexib~ ity~ ;and ~functionality of digital computers to these :aircra;ft bùt the cost of replacing the analog computers:would be bey~nd the economic constraints of most operators.~
25~ In-~more modern~designs, the aircraft stabil~ty is controlled~by a~ digital flight control co~puter while a mission ;~computer controls multiple complex functions, such as~ terrain-fol~lowing and;~automatic landing systems.
: ;This ~type of d~igital system is designed into many new aircraft~ and~supersedes the old all-analog approach.
Analog: and digital computer systems are inherent:ly~ incompatible wi~h each~ other due to the , "~
:
W094/038~ PCr/VS93/07298 2 1 2~)3'~7 different techniques of communicating information. It is th~s not practical to upgrade the functionality of an older aircraft by simply connecting a modern digital : computer in place of an existîng analog flight control computer. Generally, an upgrade to a digital computer :~ would require major rewiring of an aircraft. Thus, it would be~extremely costly to replace the existing analog computers with digital computers. The large inventory of expensive and potentially highly capable aircraft and the emerging power of avionics ~ystems makes it imperative to find a way to economically bring the capabilities of modern digital a~ionics to existing all-analog aircraft.
This invention~provides the connection between analog and : digital tcchnologies by establishing an interface between new digital~:mission computers and the analog flight control computer. This invention enables the latest : functionality~of a digital flight system to be added to : : existing:~aircraft~ while minimizing the conversion costs and minimizing ~flight requali~ication on the aircraft since~the~analog~ light control system is maintained with this invention. ~
: i :::;: ~: :: : ::: ~
i .
: i: ::
: ~
::
W094/03854 2 1 2 ~ 3 ~ 7 P~T/US93f~72g8 8UM~ARY OF ~ INYENTIO~
A failsafe, inexpensive avionics inter~ace unit ~AIU) in accordance with th~ in~ention includes a digital interface circuit coupled to communicate with a digital avionics or mission computer over a system digital data bus, a digital data proce~or module, an interface digital : data bus that provides communications between the digital interfac~ circuit and the digital data processor, an analog interface circuit coupled to genera e analog flight control sig~als ln response to digital commands received : from ~he di~ital: data processor and a mode selection circuit~ The a~aloq signals are coupled to an analog flight control c~mputer which controls the flight control surfaces of ~an aircraft. The digital data processor ; 15 outputs digital commands to the analog interface circuit in response~to comm~nds from the digital mission compu~er.
The AIU extracts pltch, roll, and other ~vionics information from~t~e received digital data and generate~
the~analog~ rlight control signals in response to this ZO ~ information.;~ ~
; System~ reliability can be impro~ed by redundantly~providing multiple system digital data buses and~:proces~sing:~data received ~rom a secondary system digital :data~:bu~ if communication haYe ~ailed on the 25 ~ ~ p~imary system;~digital data bus.
The~mode~selection circuit responds to control signals-generat~d by the digitàl data proc~ssor as defined - by the digitaI~mission computer to select a ource of control;signals~that are to be:eommunica~ed ~o an analog flight control; computer to ultimately control the aircraft. The~mode selection circuit can selec~ either :: :::
~ 5_ :: ~ :
WO9~J~3854 PCT/US93/07298 21~03~7 preexisting sources of command signals or the digita mission comput~r as th~ source of the command signals.
The digital data processor module monitors acti~ity ~n the sy~tem digital data bus to determine if periodic communications are occurring. If communications have failed, the processor ~odule neqates the selection signal coupled to the mode selection circuit and enables only the pitch and roll commands from the analog avionics : computer. Additionally, tha AIU includes a watchdog circuit tha~ is coupled to the digital data processor to monitor periodic activity. If periodic activity from the processor is not found, the watchdog circuit negates the : s~lection signal coupled to the mnde selection circuit, enabling only the analog pitch and roll commands. In certain modes such as terrain-following, lack of periodic activity would cause:the aircraft to roll wings level and to fly up ~for safety.
Additionally, the AIU dete~mines i~ the pitch :and roll analog signals which are output ~rom the analog : : 20 int~r~a~e: circuit under control of the digital data processor ~module:~are representa~i~e of the digital data received using a concept r~erred to as Logical Output Wraparound~ ~LO~). Using L0~, the analog interface circuitry i 5~ connectable to wraparound signals which are 25~ periodically sampled and stor~d by the digital data processor.~ Upon rec~ipt of:a~command over the digital ata~bus:from the mission computer, the ~IU communicates the digital~representation~ o~ the sampled analog wraparound~ signals to the mission computer usin~ the :: 30 digital data ~us. If the mission:co~uter determines that an analog~wraparound signal is out of tolerance, it may :issue a command to negate the selection signal coupled to : thP mode selection circuit and enable only the pitch and ,, ~
:~ :
~:
WO 94/~3854 2 1 2 ~ 3 ~L 7 PCI`/US93/07298 roll commands from the analog avionics computer.
Alternatively, the AIU may internally compare the wraparound signals to commanded digital data and determine : if the analog signal i5 within tol~rance. If the wraparound signal is out of tol~rance, the AIU
communicates this result over the digital data bus to the : mission computer which may issue a command to negate the selection signal couple~ to the mode selection circuit and enable only:the pitch and roll commands from the analog avionics computer.
:
~:
, :~
~::- : :
WO9~/03854 P~l~/US93/0729~8 212 0 3 4 7 B~IEF DE8C~IPT~ON OF T~E D~ ING8 A better understanding of the invention may be had from a co~sideration of the following detailed description, taken in conjunction with the accompanying drawings, in which:
., FIG~ 1 is a blook diagram of an avionics system ~:~ : having an a~ionics interface unit (AIU) in accordance with : the invention;:
: ~ FIG. 2 is a block diagram representation of 1553 interface logic within the AIU that i8 shown in Fig. 1;
FIG. 3 is a block diagram ~epreisentation of an analog interface to a flight control computer that is contained~by the AIU shown in Fig. 1;
FIG.~ 4 is a block dia~ram r~pres~ntation of a 15; ~ proce3sor ~odule within the AIU~that is shown in FigO l;
: FIG. 5 is a flowchart representatiQn of the : program executed by the processor module~ within the AIU
that i5 shown~in Fig. 1;
FIG.~6A;and 6B are flowchart repres~ntations of 20~ ;alt@rnatlv~programs for impl~mentation o~ the logical :output ~rapàround~(LOW)~function~hat i$ executed by the processor~modulé within the AIU that is s~own in Fig. l;
FIG~. ~7~ is a flowchart representation of an 25~ alter~ative~:program execut~d by the proces~or module within the~AIU that is shown in Fig. 1.
:
: : ' ~;:~ :: :
, :
WO 94'03854 2 ~ 2 ~ 3 -1 7 Pcr/u~93/07~98 , .....
DE~ D DE:8CRIPTIO21 Referrîng now to Fig. 1, a failsafe, inexpensive ~: avionics system 10 in accordance with the invention includes a mission computer SO, an analog avionics computer Sl, a flight control computer 52, and an avionics interface unit (AIU) 100 coupling the mission computer SO
and the analog avionics computer S1 to the flight control computer 52. The basic goal of an analog avionics system is to provide a:stabl~ aeronautic response to pilot commands. ::These commands typically include analog pitch commands 74 and roll commands 73 from the pilot stick controller S9. In many aircraft, and specifically on the F-16 fight~r,~ direct coupling of the analog pitch commands 74 and roll commands 73 to control surface actuators wo~ld lS result in~ an~ unstable and unsafe system. These instabi}ities~may~ result from aerodynamic instabilities, the ~bility of~the aircraft to exceed:structural limits dur~inq a maneuver,:and the capability of pilots to command :a~maneuver~::which will exceed their physical limitations 20:~and::result~ in~ a~: black-out. ~ To compensate for these irplane~design~ features, a fly-by-wire system has been incorporated~u~ing~he flight~control computer (FLCC) 52.
In~ a:~fIy-by-wire~ system, the FLCC 5~ is interposed:~between:the pilot co~mands and the airplane 25~ control surfaces.: There is no~direct:connection of pilot commands to~the~control surfaces. ~FLCC 52 compensates for mechanical c~aracterisèics and,~:conseguently, the flight character:istics:of the aerodynami~ system~;by limiting the :: ma~nitude and;rate of change~of analog command signals to 30;:~ the control~;;surfa~es according to signals from G-force sensors.~;;The~FLCC 52~ processes:via analog circuits the : : :pitch commands:74 and roll commands 73 from the pilot s:tick controller 59 and adjusts the oontrol signals 72 ,:; ~ 9--~ - ~
:
::~ :: : : ~ :
W0~4/03854 PCT/U~93/07298 212Q~7 ``:
according to analog values received from the pilot force sen~ors 70 and the air.~raft body rate accel~rations 71.
- The processing of set points by the FLCC 52 results in a stable fly-by-wire system with a limited rata of change for pitch and roll.
An existing extension of this basic avionics : fly-by-wire system i5 the addition of an analog avionics computer 51 (autop~ilot), designated in the F-16 ~s the electronic component ass~mbly (ECA). It is well established in existing art that calculations can be made ~; using various avionics sensors 76 and that the calculations generate the desired adjustments in pitch 62 and ~oll 63 signals which will result in the aircraft achieving and maintaining the de~ired course and altitude.
: ~ 15 Such a ~ystem c~rrently exists whQre the pitch control signal 62 and roll control signal 63 are directly connected to~pitch control input 68 and roll control input : 69 of the:FLCC:52.~
,~
: :
:: The AIU lOQ provides additional capabilities i~
;20~ ~he existing system by allowing this system to interface :to new a~ionics~func~ions whi h are pro~ided by a digital avionics~ omputer, referred to as thQ mission comput~r 50.
mission computer 50 is similar to the analog avionics computer 51~in that the ul~imate function is to provide a 25 : calculation~;for~:the desired pitch and roll parameters as : a:fu~ction of~avionics sensors. However, as opposed to the ~analog aviQnics computer 51, a urrent mission ; computer:50 uses digital technology and i~ based upon a , ` programmable~digital computer with associated advantages 3~0 in cost and flexibility. Using the digital technology of : a mission:compu~e~ 50, the functionality and performance :~ : o~ a mission computer 50 can be enhanced or modified by : :
altering the software. The software in the mission :::
:~
W O 94/03854 2 ~ 2 0 3 ~ 7 P~r/U593/07298 computer 50 may be downloadable ~rom a ground support computer into alterable memory, such as RAM, EEPROM, or NOVRAM. Alternatively, this software may b~ resident in nonvol~tile memory contained therein such as EPROM, EEPROM, NOVR~M, or ROM. Generally, there will only ~e a minimal software impact to existing on-board computers as compared to the prior analog, hardware-intensive approach when changes to the: performance characteristics of the control system are required.
: lOThe addition of AIU lOO enables the advanced functions o:f :a ~ digital mission computer 50 to be : integrated with the FLCC 52 without having to redesign the :: FLCC 52 or~rewire the aircraft. Since redesigning the : analog FLCC:~52, :with its attendant rewiring, would be inordinately expensi~e, the AIU lOO provides access to modern digital technology at a reasonable cost.
T~e:~AIU lOO periodically recei~es digital communication ~ oYer the digital interface buses 60 or 6~.
In a typica1~;~configuration, the digital interface buses 2~0 ~ conform :to~;MIL-STD-1553~. Alternatively, the digital interface~ uses may conform to~ARINC429, l77n~ 1773; or ;other~ digital~interface~protocol. :The 1553 interface is des:cribed for:~illustration. ~The digital communioations are~ received~ y;~ the 1553~inter~ace :logic lOl and 25~ subsequently~:interpreted by the processor m~dule 102. The processor du1e~lO2 then generates co ~ ands to ~he analog interf~ace~10~3~to: output~pitch~ 66 and roll 67 control signa1s in~ response to the~ digital interface commands.
.The proces~sor module 102 may command the mode selection ~ module 104 to~output these pitch 66 and roll 67 commands : to the~FLCC:~52~ which generates~the signals that move the control:surfaces.~ Alternatively, the processor module may ~:
~: :
W~94/038~ PCT/U~93/07298 21~03A7 enable the pi~ch 62 and roll 63 signals generated by the analog avionics computer 51 to be coupled to the FLCC 52.
As previuusly discussed, to use the increased functionality of the mission computer 50 requires the ability to communicate pitch, roll, or raw data generated by the mission computer 50 over digital interface buses 60 and optionally 61~ These digital interfaces are ; : inherently incompatible with existing analog interfaces.
This invention bridges this incompatibility gap by establishing a protocol converter, identified as the avionics interfaca unit (AIU) 100. Additionally, since : thi~ approach retains all of the original flight control : ~ ~ sy~tem, only minimal requalification of the aircraft is required.
$he AIU protocol converter 100 receives ~ommand data from mission:computer 50 over bi-directional digital interfac~ bus A 60 for controlling aircra~t maneuvers such : a~: pitch and ~roll:. The characteristics of the bi-: : direc~ional digital communiGation bus 60 are wall known to 2~0~ one;skilled:~in: the art, as de~ined by MIL-STD-1553B
published;September 21, 1978 and MIL-STD-1553B Notice 2 puhl~ished~Septem~er 8, 1986 which are both incorporated by : :reference.~;~lternatively, a second digital interface bus B~ 61~ exists~ to~;redundantly pro.uide: data from the mission 25~ comput2r~ ~50~:; to the AIU protocol converter 100. In l:his i mplemen~ation the AIU 100 will communicate over the digital interface bus B 61~ in the ev~nt ~hat a communication failure is d~tected on digital interface bus : A 60.
~ ~ .
~ ~ There~ are two levels for the 1553 interface communication~protocol. The basic transfer of data across the digital :interface bus 60 or 61 occurs a~ the lower :~ :
: ~
W094/038~ 2 1 ~ 0 3 ~'1 7 PCT/U~3/07298 protocol level. At this level the da~a is transferred subject to validity checks but the contents are not interpreted or analyzed. Analysis of ~he contents occurs at the higher level.
At the lower protocol level commands are transferred at 1.~ megabit per second as time division multipIexed digikal data across digital interface bus 60 or 61. This da~a is Manchester II bi-phasa level encoded as described in MIL-STD-1553B. This lower protocol level of communication is provided by the 1553 interface logic 101 .
.
Referring now to Fig. 2, 1553 interface logic 101 includes a: 1553 protocol controller 208 and a 1553 XCVR (transceiver)~ 209. The 1553 transceiver 209 is 15 connected ~ to the digital interfaces buses 6û, 61 through transformers 210 and 211 respectively for DC isolation.
The purpose ~of the 1553 transceiver ~09 is to conditior : the ~anGhes~@r II bi-phas4~ level si~nals 60 arld 61 rece!ived on ~e digital interfa e bus inte~ logic level 20 ~ compatibl e signals 87 and 88 for proc~ssing by the 1553 protocol controller ~08. The 1553 transceiver 209 decodes the Manchester II ~i-phase level signal, thxough method~
:: : : well k~ow in the:art and as additionally disclosed in ~IL
STD-I553B, into~; an asynchronous serial by bi~ data stream 25 ~ :o logic level bits. This asynchronous s~rial by bit data stream~ ~5 then outpu~ to the ~53 proto ::ol eonverter 0~ over: seria:l communication paths 87, 88 carrying da~a relating to buses 60, 61 f respectively.
The 15$3 protocol converter 208 extr2~cts a clock 30 from this serial data stream, captures this asynchronous : serial data~ stream and stores the data defined by the data stream as buffered words. The 1553 pro~os::ol converter 20s : -13-:
.
W~94/03854 PCT/US93/072~8 2120347 ~i~
then identifies whether this particular AIU system is a designated destination, decodes the message contents, and the~, if the data is valid, generates a status response according to MIL~STD-1553B to the digital interface bus 60 or 61 via 1553 XCV~ 209. XCVR 209 includes transmitter circuitry that converts the response to a Manche5ter II
bi-phase:level signal that is communicated by buses 60, 61.
. :
: The 1553 protocol controller 208 and a transceiver: 209 can be implemented with conventional components such~as an FC1553921 hybrid circuit fro~ a family of ;transceivers manufactured by STC Components.
The specification for this compon~nt is incorporated by reference. One~skilled in the art can select any of a number of: àvailable chip sets to implement this protocol :: function.
The~ protocol controller 208 and the 1553 transceivèr~ 209~ capture ~ the processed digital communications~ from the buses 60, 61 to AIU 100 and 2~0~ perform~ the~ functions ~of :the l~wer protocol level.
Referring now~to:Fig. l, the~processor-module 102 receives data~from~thé~:1553 buses 60, 61 from the interface logic 1 over~a~ signal communicating path 64. ~ The processor module~lO~Z performs the~functions~of the higher protocol Z5:~ 1ével~ of:interpreting the~data:~recéived by the digital interface~logio~101. The~processor module 102 determines the;pitch,~roll, and diagnostic~contents of each aircraft command message~received:from~m~ission computer 50 or any ; : other~command~source that may~be coupled to buses 60, 61.
: 30 once the procéssor module 102 isolates each new digital :: pitch~ and~rol1 command from the captured data signal receiv~d:over~path 64, it ~outputs this digital data over 14- .
~::
:~ :
WO94/03B54 2 1 2 0 3 ~ 7 PCT/US93/07298 data communication path 65 along with control signals to the analog interface circuit 103.
. Rsferring now to Fig. 3, the analog interface 103 includes a D/A (digital to analog) converter 200 and an A/D ~analog to digital) converter 201. D/A converter 200 converts digital data received over communication path from digital processor 102 to analog form. Mode selection circuit 104 recei~es analog data from D/A
; converter 200 over analog signal paths ~6, 67, and 75 and ;lG selectively couples these analog output control signals to the FLCC 52. A/D converter 201 and analog MUX 204 couple analog wraparound signals 79 from the FLCC ~2 to digital processor 102~
Analog MUX 204 receives a plurality of analog ~::15 wraparound signals from FLCC 5~ over analog data paths 79 and responds to control signal-~ 23 received from digital proce~sor 102 to:sel~ctively communi~a~e a selected signal : : : via analog~signal path 85 to A/~ converter ~01~ A/D
conVerter ~01, in turn, converts~the analog signal to a :digital ~srmat~for communication over bus 65 to digital proces~or 102.;:
; The: analog interface: lO3 isolat~s, converts, and capture~ the:~digital pitch and roll command~3 from data and contrpl buse~s~65 and then output a stable analog pitch 25 signal 66~ ~and~ roll signal: 67. In a similar manner the analog interface 103 may additionally output a yaw signal 75~ wh~n the~ AIU~ is interfaced to a mission computer 50 ; : ~ : :that additionally communicates :a calculatPd yaw signal o~rer thé 155 3 ~us . The analog int~rf ace 103 operates under co~trol of the processor module 102. Upon , : application by the processor module of 102 of I/Q signals on the control and data bus 65, the digital to analog : :
:
.
W094/03854 P~T/US93/~7298 2120~7 ~ `
converter circuit (D/A) 200 commences a conversion ~; a 12-bit digital quantity receiv~d from bus 65 into a converted analog value pitch 66, roll 67 or yaw 68. The selection of output channel, i.e., pitch 66, roll 67 or yaw 7S, is controlled by the I/O control signal 6S to the digital to analog converter circuit 200. The converted analoq values are maintzined as outputs to the FLC~ 52 until next updated by another output command.
The analog interface circuit 103 also samples ~; 10 and stores the analog wraparound siqnals 79 from the FLCC
52. The FLCC 52 pro~ides at least one wraparound signal for each of the control channels. Thus, there will be a minimum of two wraparound signals from the pitch and roll signals.~ ~lternatively, additional wraparound signals may be provided to further detect and isolate a circuit card fàilure :in:the:~F~CC 52. The:wraparound signals 79 are connected~to~ an analog multiplexer circuit 204. This multipl~xer circuit is under control of selection signal 83 from the processor module~102.~ When an analog channel 0 is sel~cted,~an analog value is passed through MUX 204 as the~selected:~analog signal 85 which is con~erted into a 2-bit~digital~representat1on by analog to digital (A/D~
converter~201~upon cor~and~:of a selection signal from the :data~:~and;control bus 65. The 12-bit converted data is 25~ subsequenély~received from~the A/D onverter 201 by the processor module~;I02 using data and control bus 65. The dig:ital~data~is~;stored in~memory in the digital comput~r lOS;until~the:data is requested by ~he mission computer 5 over;the~l553~bus 60 or 61. ~ ~
Alternatively, the processor module 102 compares the captured~ 12-bit~ representation of :the analog : wraparound~si~nal 79 to its internal digital command value which wa~s output to the digital to analog converter 200.
~: -16- ~
~: :
: : :
~, ~
: ~
:` :~ ~ :
W094~038~ 2 ~ 2 Q 3 4 ~ PCT/US93/07298 " . .~.
When the captured 12-bit data is out of tolerance, as compared to the digital command value, this information is made available to the mission computer S0 over the digital data bus S0 or 61. The mission computer 50 may then communicate a command to the AIU 100 over the digital data bus 60 or ~1 to negate the select AIU mode signal 78 to disable the pitch 68 and roll 69 signal from the AIU 100 : and enable the pitch 62 and roll 63 signals from the ; analog avionics computer 51.
;:~
:~ lO ~ The function of the mode selectivn module 104 is to choose between the analog pitch 62 and roll 63 con~rols generated by the analog avionics computer 51 and the pitch 66, roll 67,~and yaw 75 contr~ls which are output from D/A
converter 200.; ~ This selection is done by a select AIU
mode signal~78 which is generated by processor module 102.
The mode:selection circuitry 104 is preferably implemented as a: solid~state switch. Alternatively, mode selection modul~ 1~04 may~be implemented as a ~echanical switch where the~failed~ or:unpowered state of the switch connects the ~analog avionics computer pitch command:62 and roll command 63 to pitch output signal 68 and roll output signal 69, respectively~
, ~ ~
Referring now ~to Fig. 4, the digital data processor~;module 102 includes a digital computer 105, a 25~: watchdog timer~ circuit 206, and a mode selection I/o : circ~it 207~ The:digital computer 105 includes RAM 106, ROM~107,~a:~microprocessor lO~, and such other components : as~may be~n~ecessary to implement a conventional digital : computer.
30. ~ ~Mode:~:selection signal 78 is generated under control of: the digital computer 105. When the digital computer 105 receives: a spe~ified command from the 1553 ~: : :
:: :
-~ , : :
2 ~ ~ O ~us 60 or 61, the digital computer 105 generates a mode select control signal 82 to instruct the mode selection I/o circuit 207 to generate the select AIU mode signal 78.
Howe~er, under special onditions, the select AIU mod~ signal 78 will be negated even though it has previously been activated, thereby defaulting..the syst~m back to being an all-analog system. The analog default serves as a failsafe condition wherein the analog avionics computer 51 connects directly to the FLCC 52. Should digital computer 105 fail to receive periodically updated commands from 1553 bus 60 or 61, the select AIU mode signal 78 will be disabled to a failsafe condition under software control by the digital computer 105 by issuing a command on mode select control signal 82. Further, as a final precaution, a watchdog timer circuit 206 found in processor module 102 disables select AIU mode signal 78 by outputting a clear select signal 81 if periodi~ activity of the digital computer 105 is not detec~ed~ The watchdog timer circuit 206 monitor~ the digita~ co~puter by : 20 watching the alive signal 80 which the digital computer 105 periodic411y outputs when the digital computer 105 is processing instructions.
The~d~igital computer 105 executes instructions contain~d :in~nonvolatile program storage m~mory such as ROM 107 or,~ alternatively, in ~PROM, EEPROM or NOVRAM.
:Alter~latively,~ da~a received over the digital data bus 60 or 61 may be~ use~ to modify.the contents of the program storage memory~ of the digital computer 105 when an : alterable type of program storage memory is used such as -30 RAM~106 or~, alterns~ively, EEPROM or NO~RAM.
Additionally, in an alternative embodiment, the digital computer 105 may perform calculations for flight ;: : : -18-:::
;~ :
W094/03854 2 1 ~ ~ 3 ~ 7 PCT/US~3/07298 control functions, such as those required of an a~topilot, by receiving the raw sensor information from the digital data bus 60 or 61 and performing calculations upon this data under control of instructions stored by program storage memory to generate pitch and roll commands wh~ch are communicated to the analog interface circuit 103.
A flowchart~illustrating the operating digital computer 105 is shown in Fig. 5, to which reference is now made. When~power is applied to the digital computer 105, initialization~of program parameters occurs at step 502.
:
This initialization includes the selection of bus A 60 as the primary~communication bus, clearing erxor ~lags, and initializing:~timers. Once the: in~itialization 502 is complete:, the; digital computer 105~periodically looks for :15 data being received from the 1553 interface logic 101 at :;decision~step~:~504.: If:a message~is received, the d~igital :computer~:~105 is informed by the lSS3 interfa~e logic 101 : if the: data: is:~properly received and if the data was addressed~t~ AIU~100. If yes~ the digital computer 105 Z0~ performs~ the:~ higher level of ;the ~1553 protocol and analyzes the:contents of the::message at analysis step 506.
A~messàge~may~be~a command to~output:pitch, roll, or yaw commands~or;:may:~be a request~of status information. When a:~fligh~:control:command is r~ceived, the digital omputer 25:~ 105~irects~an;~.-output~:co~ and~:~to~the selected channel of D/A~20:0.:~Addi~ionally, the~processor acts a~t step 510 to reset~an~inactiYity timer which monitors the hus 60 or 61 to;determine~if:bus~communicati~ons~hàve terminat~d.
: If a message has not been received, the ~processor deter~ines~at step 512 from the inactivity timer if~the;bus~communications have terminated. If the timeout :period ~has~not been exceeded,~:processing continues by executing~a:~LOW test at step 51~4. However, if a timeout ,, ~
2 ~ o~87 Pcr/lJsg3~072g8 condition occurs, the ~igital computer 105 executes s_ep 516 tv reset the select AIU mode signal 78 with a mode select control signal 82 and relinquish control of the pitch command 68 and roll command 69 to the analog avionics computer Sl.
,:
As illustrated in Fig. 6A, the processor executes the LOW processing step 514 by reading all available~wraparound signals 79 and storing their l2-bit digital:representations in memory. The contents of this 10: memory are then~rommunicated to t~e mission computer 50 in ~: : response to: a: designated status command. In a~
~:~ . alternative mode, as illustrated in Fig. 6B, the wraparound signals ~79 are evaluated by digital computer 05. ~After ~:reading and storing the digital , 15 representations of the wraparound signals 79, the processQr 105~co~pares these values to expected values at step value 608. In~the case of pitch and roll commands, the expec~ed~value ~orresponds to the digital value output to the~D/A 200:.~ :Nowever, other expected values could ~;correspond t~internal test points in the F~CC 52.
Upon:~ completing the LOW proces~ing step, the ;,processor~ 105~ outputs: the alive signal 80 by exec~ting step~;520. ~This~signal does n~t directly effect the operation~of~the:;:program. However, this signal informs 2~5 ' the watchdog;timer :circuit 206 that the di~ital computer , 105 is ~operational.: If :the :alive signal 80 is not generatcd for~ a~designated period of time, the watchdog :timer~ 206 ~(Fig.: 4) ~generate a clear select signal on conductor 81~which causes mode selection I/O circuit 207 to negate signal SELECT AIU MODE on signal path ~8. After generating the~:output: alive ~signal at step 52~, the computer 105~loops back to the data received test at s~ep 504. ~
:::: ::
::~ ;~: ` ~ ;
~ .
wo 94/03854 2 1 2 Q 3 ~ I PCT/US93/07298 Fig. 7 illustrates an a}ternative embodiment of the program executed by computer 105. Instead of the AIU
100 being a slave dependent on commands from a mission computer S0, the AIU 100 operates as a master requesting S raw sensor information from devices interfaced to the same 1553 bus. The program in the digital computer 105 of the ~IU lOO performs avionic functions that are performed in : the mission computer 50 in the embodiment of the program that is illustrated in Fig. 5. By eliminating an addîtional system component, the mission computer 50, and : the associated ~communications, increased economies and pPrformance advantages may be achieved by moving flight : control command functions from mission computer 50 to digital computer 105.
: ; 15Although there ha~e been described above : : specific;arrangements of a digital interface to an analog :: flight control~computer including a protocol converter system in accordance with the invention for the purpose of enabling a:person~of ordinary skill in the art to make and use~ the:~ invention, it will be appreciated that the invention~ is not;~li~ited~thereto. Accordingly, any and all modifications, ~ariations or equi~alent arrangements within~ the ~scope of the attached claims should be considered~to~be;~witbin the scope of the invention.
~- :
~ 21-, :
:: ::
::
W094/03854 2 1 2 ~ 3 ~ 7 P~T/US93f~72g8 8UM~ARY OF ~ INYENTIO~
A failsafe, inexpensive avionics inter~ace unit ~AIU) in accordance with th~ in~ention includes a digital interface circuit coupled to communicate with a digital avionics or mission computer over a system digital data bus, a digital data proce~or module, an interface digital : data bus that provides communications between the digital interfac~ circuit and the digital data processor, an analog interface circuit coupled to genera e analog flight control sig~als ln response to digital commands received : from ~he di~ital: data processor and a mode selection circuit~ The a~aloq signals are coupled to an analog flight control c~mputer which controls the flight control surfaces of ~an aircraft. The digital data processor ; 15 outputs digital commands to the analog interface circuit in response~to comm~nds from the digital mission compu~er.
The AIU extracts pltch, roll, and other ~vionics information from~t~e received digital data and generate~
the~analog~ rlight control signals in response to this ZO ~ information.;~ ~
; System~ reliability can be impro~ed by redundantly~providing multiple system digital data buses and~:proces~sing:~data received ~rom a secondary system digital :data~:bu~ if communication haYe ~ailed on the 25 ~ ~ p~imary system;~digital data bus.
The~mode~selection circuit responds to control signals-generat~d by the digitàl data proc~ssor as defined - by the digitaI~mission computer to select a ource of control;signals~that are to be:eommunica~ed ~o an analog flight control; computer to ultimately control the aircraft. The~mode selection circuit can selec~ either :: :::
~ 5_ :: ~ :
WO9~J~3854 PCT/US93/07298 21~03~7 preexisting sources of command signals or the digita mission comput~r as th~ source of the command signals.
The digital data processor module monitors acti~ity ~n the sy~tem digital data bus to determine if periodic communications are occurring. If communications have failed, the processor ~odule neqates the selection signal coupled to the mode selection circuit and enables only the pitch and roll commands from the analog avionics : computer. Additionally, tha AIU includes a watchdog circuit tha~ is coupled to the digital data processor to monitor periodic activity. If periodic activity from the processor is not found, the watchdog circuit negates the : s~lection signal coupled to the mnde selection circuit, enabling only the analog pitch and roll commands. In certain modes such as terrain-following, lack of periodic activity would cause:the aircraft to roll wings level and to fly up ~for safety.
Additionally, the AIU dete~mines i~ the pitch :and roll analog signals which are output ~rom the analog : : 20 int~r~a~e: circuit under control of the digital data processor ~module:~are representa~i~e of the digital data received using a concept r~erred to as Logical Output Wraparound~ ~LO~). Using L0~, the analog interface circuitry i 5~ connectable to wraparound signals which are 25~ periodically sampled and stor~d by the digital data processor.~ Upon rec~ipt of:a~command over the digital ata~bus:from the mission computer, the ~IU communicates the digital~representation~ o~ the sampled analog wraparound~ signals to the mission computer usin~ the :: 30 digital data ~us. If the mission:co~uter determines that an analog~wraparound signal is out of tolerance, it may :issue a command to negate the selection signal coupled to : thP mode selection circuit and enable only the pitch and ,, ~
:~ :
~:
WO 94/~3854 2 1 2 ~ 3 ~L 7 PCI`/US93/07298 roll commands from the analog avionics computer.
Alternatively, the AIU may internally compare the wraparound signals to commanded digital data and determine : if the analog signal i5 within tol~rance. If the wraparound signal is out of tol~rance, the AIU
communicates this result over the digital data bus to the : mission computer which may issue a command to negate the selection signal couple~ to the mode selection circuit and enable only:the pitch and roll commands from the analog avionics computer.
:
~:
, :~
~::- : :
WO9~/03854 P~l~/US93/0729~8 212 0 3 4 7 B~IEF DE8C~IPT~ON OF T~E D~ ING8 A better understanding of the invention may be had from a co~sideration of the following detailed description, taken in conjunction with the accompanying drawings, in which:
., FIG~ 1 is a blook diagram of an avionics system ~:~ : having an a~ionics interface unit (AIU) in accordance with : the invention;:
: ~ FIG. 2 is a block diagram representation of 1553 interface logic within the AIU that i8 shown in Fig. 1;
FIG. 3 is a block diagram ~epreisentation of an analog interface to a flight control computer that is contained~by the AIU shown in Fig. 1;
FIG.~ 4 is a block dia~ram r~pres~ntation of a 15; ~ proce3sor ~odule within the AIU~that is shown in FigO l;
: FIG. 5 is a flowchart representatiQn of the : program executed by the processor module~ within the AIU
that i5 shown~in Fig. 1;
FIG.~6A;and 6B are flowchart repres~ntations of 20~ ;alt@rnatlv~programs for impl~mentation o~ the logical :output ~rapàround~(LOW)~function~hat i$ executed by the processor~modulé within the AIU that is s~own in Fig. l;
FIG~. ~7~ is a flowchart representation of an 25~ alter~ative~:program execut~d by the proces~or module within the~AIU that is shown in Fig. 1.
:
: : ' ~;:~ :: :
, :
WO 94'03854 2 ~ 2 ~ 3 -1 7 Pcr/u~93/07~98 , .....
DE~ D DE:8CRIPTIO21 Referrîng now to Fig. 1, a failsafe, inexpensive ~: avionics system 10 in accordance with the invention includes a mission computer SO, an analog avionics computer Sl, a flight control computer 52, and an avionics interface unit (AIU) 100 coupling the mission computer SO
and the analog avionics computer S1 to the flight control computer 52. The basic goal of an analog avionics system is to provide a:stabl~ aeronautic response to pilot commands. ::These commands typically include analog pitch commands 74 and roll commands 73 from the pilot stick controller S9. In many aircraft, and specifically on the F-16 fight~r,~ direct coupling of the analog pitch commands 74 and roll commands 73 to control surface actuators wo~ld lS result in~ an~ unstable and unsafe system. These instabi}ities~may~ result from aerodynamic instabilities, the ~bility of~the aircraft to exceed:structural limits dur~inq a maneuver,:and the capability of pilots to command :a~maneuver~::which will exceed their physical limitations 20:~and::result~ in~ a~: black-out. ~ To compensate for these irplane~design~ features, a fly-by-wire system has been incorporated~u~ing~he flight~control computer (FLCC) 52.
In~ a:~fIy-by-wire~ system, the FLCC 5~ is interposed:~between:the pilot co~mands and the airplane 25~ control surfaces.: There is no~direct:connection of pilot commands to~the~control surfaces. ~FLCC 52 compensates for mechanical c~aracterisèics and,~:conseguently, the flight character:istics:of the aerodynami~ system~;by limiting the :: ma~nitude and;rate of change~of analog command signals to 30;:~ the control~;;surfa~es according to signals from G-force sensors.~;;The~FLCC 52~ processes:via analog circuits the : : :pitch commands:74 and roll commands 73 from the pilot s:tick controller 59 and adjusts the oontrol signals 72 ,:; ~ 9--~ - ~
:
::~ :: : : ~ :
W0~4/03854 PCT/U~93/07298 212Q~7 ``:
according to analog values received from the pilot force sen~ors 70 and the air.~raft body rate accel~rations 71.
- The processing of set points by the FLCC 52 results in a stable fly-by-wire system with a limited rata of change for pitch and roll.
An existing extension of this basic avionics : fly-by-wire system i5 the addition of an analog avionics computer 51 (autop~ilot), designated in the F-16 ~s the electronic component ass~mbly (ECA). It is well established in existing art that calculations can be made ~; using various avionics sensors 76 and that the calculations generate the desired adjustments in pitch 62 and ~oll 63 signals which will result in the aircraft achieving and maintaining the de~ired course and altitude.
: ~ 15 Such a ~ystem c~rrently exists whQre the pitch control signal 62 and roll control signal 63 are directly connected to~pitch control input 68 and roll control input : 69 of the:FLCC:52.~
,~
: :
:: The AIU lOQ provides additional capabilities i~
;20~ ~he existing system by allowing this system to interface :to new a~ionics~func~ions whi h are pro~ided by a digital avionics~ omputer, referred to as thQ mission comput~r 50.
mission computer 50 is similar to the analog avionics computer 51~in that the ul~imate function is to provide a 25 : calculation~;for~:the desired pitch and roll parameters as : a:fu~ction of~avionics sensors. However, as opposed to the ~analog aviQnics computer 51, a urrent mission ; computer:50 uses digital technology and i~ based upon a , ` programmable~digital computer with associated advantages 3~0 in cost and flexibility. Using the digital technology of : a mission:compu~e~ 50, the functionality and performance :~ : o~ a mission computer 50 can be enhanced or modified by : :
altering the software. The software in the mission :::
:~
W O 94/03854 2 ~ 2 0 3 ~ 7 P~r/U593/07298 computer 50 may be downloadable ~rom a ground support computer into alterable memory, such as RAM, EEPROM, or NOVRAM. Alternatively, this software may b~ resident in nonvol~tile memory contained therein such as EPROM, EEPROM, NOVR~M, or ROM. Generally, there will only ~e a minimal software impact to existing on-board computers as compared to the prior analog, hardware-intensive approach when changes to the: performance characteristics of the control system are required.
: lOThe addition of AIU lOO enables the advanced functions o:f :a ~ digital mission computer 50 to be : integrated with the FLCC 52 without having to redesign the :: FLCC 52 or~rewire the aircraft. Since redesigning the : analog FLCC:~52, :with its attendant rewiring, would be inordinately expensi~e, the AIU lOO provides access to modern digital technology at a reasonable cost.
T~e:~AIU lOO periodically recei~es digital communication ~ oYer the digital interface buses 60 or 6~.
In a typica1~;~configuration, the digital interface buses 2~0 ~ conform :to~;MIL-STD-1553~. Alternatively, the digital interface~ uses may conform to~ARINC429, l77n~ 1773; or ;other~ digital~interface~protocol. :The 1553 interface is des:cribed for:~illustration. ~The digital communioations are~ received~ y;~ the 1553~inter~ace :logic lOl and 25~ subsequently~:interpreted by the processor m~dule 102. The processor du1e~lO2 then generates co ~ ands to ~he analog interf~ace~10~3~to: output~pitch~ 66 and roll 67 control signa1s in~ response to the~ digital interface commands.
.The proces~sor module 102 may command the mode selection ~ module 104 to~output these pitch 66 and roll 67 commands : to the~FLCC:~52~ which generates~the signals that move the control:surfaces.~ Alternatively, the processor module may ~:
~: :
W~94/038~ PCT/U~93/07298 21~03A7 enable the pi~ch 62 and roll 63 signals generated by the analog avionics computer 51 to be coupled to the FLCC 52.
As previuusly discussed, to use the increased functionality of the mission computer 50 requires the ability to communicate pitch, roll, or raw data generated by the mission computer 50 over digital interface buses 60 and optionally 61~ These digital interfaces are ; : inherently incompatible with existing analog interfaces.
This invention bridges this incompatibility gap by establishing a protocol converter, identified as the avionics interfaca unit (AIU) 100. Additionally, since : thi~ approach retains all of the original flight control : ~ ~ sy~tem, only minimal requalification of the aircraft is required.
$he AIU protocol converter 100 receives ~ommand data from mission:computer 50 over bi-directional digital interfac~ bus A 60 for controlling aircra~t maneuvers such : a~: pitch and ~roll:. The characteristics of the bi-: : direc~ional digital communiGation bus 60 are wall known to 2~0~ one;skilled:~in: the art, as de~ined by MIL-STD-1553B
published;September 21, 1978 and MIL-STD-1553B Notice 2 puhl~ished~Septem~er 8, 1986 which are both incorporated by : :reference.~;~lternatively, a second digital interface bus B~ 61~ exists~ to~;redundantly pro.uide: data from the mission 25~ comput2r~ ~50~:; to the AIU protocol converter 100. In l:his i mplemen~ation the AIU 100 will communicate over the digital interface bus B 61~ in the ev~nt ~hat a communication failure is d~tected on digital interface bus : A 60.
~ ~ .
~ ~ There~ are two levels for the 1553 interface communication~protocol. The basic transfer of data across the digital :interface bus 60 or 61 occurs a~ the lower :~ :
: ~
W094/038~ 2 1 ~ 0 3 ~'1 7 PCT/U~3/07298 protocol level. At this level the da~a is transferred subject to validity checks but the contents are not interpreted or analyzed. Analysis of ~he contents occurs at the higher level.
At the lower protocol level commands are transferred at 1.~ megabit per second as time division multipIexed digikal data across digital interface bus 60 or 61. This da~a is Manchester II bi-phasa level encoded as described in MIL-STD-1553B. This lower protocol level of communication is provided by the 1553 interface logic 101 .
.
Referring now to Fig. 2, 1553 interface logic 101 includes a: 1553 protocol controller 208 and a 1553 XCVR (transceiver)~ 209. The 1553 transceiver 209 is 15 connected ~ to the digital interfaces buses 6û, 61 through transformers 210 and 211 respectively for DC isolation.
The purpose ~of the 1553 transceiver ~09 is to conditior : the ~anGhes~@r II bi-phas4~ level si~nals 60 arld 61 rece!ived on ~e digital interfa e bus inte~ logic level 20 ~ compatibl e signals 87 and 88 for proc~ssing by the 1553 protocol controller ~08. The 1553 transceiver 209 decodes the Manchester II ~i-phase level signal, thxough method~
:: : : well k~ow in the:art and as additionally disclosed in ~IL
STD-I553B, into~; an asynchronous serial by bi~ data stream 25 ~ :o logic level bits. This asynchronous s~rial by bit data stream~ ~5 then outpu~ to the ~53 proto ::ol eonverter 0~ over: seria:l communication paths 87, 88 carrying da~a relating to buses 60, 61 f respectively.
The 15$3 protocol converter 208 extr2~cts a clock 30 from this serial data stream, captures this asynchronous : serial data~ stream and stores the data defined by the data stream as buffered words. The 1553 pro~os::ol converter 20s : -13-:
.
W~94/03854 PCT/US93/072~8 2120347 ~i~
then identifies whether this particular AIU system is a designated destination, decodes the message contents, and the~, if the data is valid, generates a status response according to MIL~STD-1553B to the digital interface bus 60 or 61 via 1553 XCV~ 209. XCVR 209 includes transmitter circuitry that converts the response to a Manche5ter II
bi-phase:level signal that is communicated by buses 60, 61.
. :
: The 1553 protocol controller 208 and a transceiver: 209 can be implemented with conventional components such~as an FC1553921 hybrid circuit fro~ a family of ;transceivers manufactured by STC Components.
The specification for this compon~nt is incorporated by reference. One~skilled in the art can select any of a number of: àvailable chip sets to implement this protocol :: function.
The~ protocol controller 208 and the 1553 transceivèr~ 209~ capture ~ the processed digital communications~ from the buses 60, 61 to AIU 100 and 2~0~ perform~ the~ functions ~of :the l~wer protocol level.
Referring now~to:Fig. l, the~processor-module 102 receives data~from~thé~:1553 buses 60, 61 from the interface logic 1 over~a~ signal communicating path 64. ~ The processor module~lO~Z performs the~functions~of the higher protocol Z5:~ 1ével~ of:interpreting the~data:~recéived by the digital interface~logio~101. The~processor module 102 determines the;pitch,~roll, and diagnostic~contents of each aircraft command message~received:from~m~ission computer 50 or any ; : other~command~source that may~be coupled to buses 60, 61.
: 30 once the procéssor module 102 isolates each new digital :: pitch~ and~rol1 command from the captured data signal receiv~d:over~path 64, it ~outputs this digital data over 14- .
~::
:~ :
WO94/03B54 2 1 2 0 3 ~ 7 PCT/US93/07298 data communication path 65 along with control signals to the analog interface circuit 103.
. Rsferring now to Fig. 3, the analog interface 103 includes a D/A (digital to analog) converter 200 and an A/D ~analog to digital) converter 201. D/A converter 200 converts digital data received over communication path from digital processor 102 to analog form. Mode selection circuit 104 recei~es analog data from D/A
; converter 200 over analog signal paths ~6, 67, and 75 and ;lG selectively couples these analog output control signals to the FLCC 52. A/D converter 201 and analog MUX 204 couple analog wraparound signals 79 from the FLCC ~2 to digital processor 102~
Analog MUX 204 receives a plurality of analog ~::15 wraparound signals from FLCC 5~ over analog data paths 79 and responds to control signal-~ 23 received from digital proce~sor 102 to:sel~ctively communi~a~e a selected signal : : : via analog~signal path 85 to A/~ converter ~01~ A/D
conVerter ~01, in turn, converts~the analog signal to a :digital ~srmat~for communication over bus 65 to digital proces~or 102.;:
; The: analog interface: lO3 isolat~s, converts, and capture~ the:~digital pitch and roll command~3 from data and contrpl buse~s~65 and then output a stable analog pitch 25 signal 66~ ~and~ roll signal: 67. In a similar manner the analog interface 103 may additionally output a yaw signal 75~ wh~n the~ AIU~ is interfaced to a mission computer 50 ; : ~ : :that additionally communicates :a calculatPd yaw signal o~rer thé 155 3 ~us . The analog int~rf ace 103 operates under co~trol of the processor module 102. Upon , : application by the processor module of 102 of I/Q signals on the control and data bus 65, the digital to analog : :
:
.
W094/03854 P~T/US93/~7298 2120~7 ~ `
converter circuit (D/A) 200 commences a conversion ~; a 12-bit digital quantity receiv~d from bus 65 into a converted analog value pitch 66, roll 67 or yaw 68. The selection of output channel, i.e., pitch 66, roll 67 or yaw 7S, is controlled by the I/O control signal 6S to the digital to analog converter circuit 200. The converted analoq values are maintzined as outputs to the FLC~ 52 until next updated by another output command.
The analog interface circuit 103 also samples ~; 10 and stores the analog wraparound siqnals 79 from the FLCC
52. The FLCC 52 pro~ides at least one wraparound signal for each of the control channels. Thus, there will be a minimum of two wraparound signals from the pitch and roll signals.~ ~lternatively, additional wraparound signals may be provided to further detect and isolate a circuit card fàilure :in:the:~F~CC 52. The:wraparound signals 79 are connected~to~ an analog multiplexer circuit 204. This multipl~xer circuit is under control of selection signal 83 from the processor module~102.~ When an analog channel 0 is sel~cted,~an analog value is passed through MUX 204 as the~selected:~analog signal 85 which is con~erted into a 2-bit~digital~representat1on by analog to digital (A/D~
converter~201~upon cor~and~:of a selection signal from the :data~:~and;control bus 65. The 12-bit converted data is 25~ subsequenély~received from~the A/D onverter 201 by the processor module~;I02 using data and control bus 65. The dig:ital~data~is~;stored in~memory in the digital comput~r lOS;until~the:data is requested by ~he mission computer 5 over;the~l553~bus 60 or 61. ~ ~
Alternatively, the processor module 102 compares the captured~ 12-bit~ representation of :the analog : wraparound~si~nal 79 to its internal digital command value which wa~s output to the digital to analog converter 200.
~: -16- ~
~: :
: : :
~, ~
: ~
:` :~ ~ :
W094~038~ 2 ~ 2 Q 3 4 ~ PCT/US93/07298 " . .~.
When the captured 12-bit data is out of tolerance, as compared to the digital command value, this information is made available to the mission computer S0 over the digital data bus S0 or 61. The mission computer 50 may then communicate a command to the AIU 100 over the digital data bus 60 or ~1 to negate the select AIU mode signal 78 to disable the pitch 68 and roll 69 signal from the AIU 100 : and enable the pitch 62 and roll 63 signals from the ; analog avionics computer 51.
;:~
:~ lO ~ The function of the mode selectivn module 104 is to choose between the analog pitch 62 and roll 63 con~rols generated by the analog avionics computer 51 and the pitch 66, roll 67,~and yaw 75 contr~ls which are output from D/A
converter 200.; ~ This selection is done by a select AIU
mode signal~78 which is generated by processor module 102.
The mode:selection circuitry 104 is preferably implemented as a: solid~state switch. Alternatively, mode selection modul~ 1~04 may~be implemented as a ~echanical switch where the~failed~ or:unpowered state of the switch connects the ~analog avionics computer pitch command:62 and roll command 63 to pitch output signal 68 and roll output signal 69, respectively~
, ~ ~
Referring now ~to Fig. 4, the digital data processor~;module 102 includes a digital computer 105, a 25~: watchdog timer~ circuit 206, and a mode selection I/o : circ~it 207~ The:digital computer 105 includes RAM 106, ROM~107,~a:~microprocessor lO~, and such other components : as~may be~n~ecessary to implement a conventional digital : computer.
30. ~ ~Mode:~:selection signal 78 is generated under control of: the digital computer 105. When the digital computer 105 receives: a spe~ified command from the 1553 ~: : :
:: :
-~ , : :
2 ~ ~ O ~us 60 or 61, the digital computer 105 generates a mode select control signal 82 to instruct the mode selection I/o circuit 207 to generate the select AIU mode signal 78.
Howe~er, under special onditions, the select AIU mod~ signal 78 will be negated even though it has previously been activated, thereby defaulting..the syst~m back to being an all-analog system. The analog default serves as a failsafe condition wherein the analog avionics computer 51 connects directly to the FLCC 52. Should digital computer 105 fail to receive periodically updated commands from 1553 bus 60 or 61, the select AIU mode signal 78 will be disabled to a failsafe condition under software control by the digital computer 105 by issuing a command on mode select control signal 82. Further, as a final precaution, a watchdog timer circuit 206 found in processor module 102 disables select AIU mode signal 78 by outputting a clear select signal 81 if periodi~ activity of the digital computer 105 is not detec~ed~ The watchdog timer circuit 206 monitor~ the digita~ co~puter by : 20 watching the alive signal 80 which the digital computer 105 periodic411y outputs when the digital computer 105 is processing instructions.
The~d~igital computer 105 executes instructions contain~d :in~nonvolatile program storage m~mory such as ROM 107 or,~ alternatively, in ~PROM, EEPROM or NOVRAM.
:Alter~latively,~ da~a received over the digital data bus 60 or 61 may be~ use~ to modify.the contents of the program storage memory~ of the digital computer 105 when an : alterable type of program storage memory is used such as -30 RAM~106 or~, alterns~ively, EEPROM or NO~RAM.
Additionally, in an alternative embodiment, the digital computer 105 may perform calculations for flight ;: : : -18-:::
;~ :
W094/03854 2 1 ~ ~ 3 ~ 7 PCT/US~3/07298 control functions, such as those required of an a~topilot, by receiving the raw sensor information from the digital data bus 60 or 61 and performing calculations upon this data under control of instructions stored by program storage memory to generate pitch and roll commands wh~ch are communicated to the analog interface circuit 103.
A flowchart~illustrating the operating digital computer 105 is shown in Fig. 5, to which reference is now made. When~power is applied to the digital computer 105, initialization~of program parameters occurs at step 502.
:
This initialization includes the selection of bus A 60 as the primary~communication bus, clearing erxor ~lags, and initializing:~timers. Once the: in~itialization 502 is complete:, the; digital computer 105~periodically looks for :15 data being received from the 1553 interface logic 101 at :;decision~step~:~504.: If:a message~is received, the d~igital :computer~:~105 is informed by the lSS3 interfa~e logic 101 : if the: data: is:~properly received and if the data was addressed~t~ AIU~100. If yes~ the digital computer 105 Z0~ performs~ the:~ higher level of ;the ~1553 protocol and analyzes the:contents of the::message at analysis step 506.
A~messàge~may~be~a command to~output:pitch, roll, or yaw commands~or;:may:~be a request~of status information. When a:~fligh~:control:command is r~ceived, the digital omputer 25:~ 105~irects~an;~.-output~:co~ and~:~to~the selected channel of D/A~20:0.:~Addi~ionally, the~processor acts a~t step 510 to reset~an~inactiYity timer which monitors the hus 60 or 61 to;determine~if:bus~communicati~ons~hàve terminat~d.
: If a message has not been received, the ~processor deter~ines~at step 512 from the inactivity timer if~the;bus~communications have terminated. If the timeout :period ~has~not been exceeded,~:processing continues by executing~a:~LOW test at step 51~4. However, if a timeout ,, ~
2 ~ o~87 Pcr/lJsg3~072g8 condition occurs, the ~igital computer 105 executes s_ep 516 tv reset the select AIU mode signal 78 with a mode select control signal 82 and relinquish control of the pitch command 68 and roll command 69 to the analog avionics computer Sl.
,:
As illustrated in Fig. 6A, the processor executes the LOW processing step 514 by reading all available~wraparound signals 79 and storing their l2-bit digital:representations in memory. The contents of this 10: memory are then~rommunicated to t~e mission computer 50 in ~: : response to: a: designated status command. In a~
~:~ . alternative mode, as illustrated in Fig. 6B, the wraparound signals ~79 are evaluated by digital computer 05. ~After ~:reading and storing the digital , 15 representations of the wraparound signals 79, the processQr 105~co~pares these values to expected values at step value 608. In~the case of pitch and roll commands, the expec~ed~value ~orresponds to the digital value output to the~D/A 200:.~ :Nowever, other expected values could ~;correspond t~internal test points in the F~CC 52.
Upon:~ completing the LOW proces~ing step, the ;,processor~ 105~ outputs: the alive signal 80 by exec~ting step~;520. ~This~signal does n~t directly effect the operation~of~the:;:program. However, this signal informs 2~5 ' the watchdog;timer :circuit 206 that the di~ital computer , 105 is ~operational.: If :the :alive signal 80 is not generatcd for~ a~designated period of time, the watchdog :timer~ 206 ~(Fig.: 4) ~generate a clear select signal on conductor 81~which causes mode selection I/O circuit 207 to negate signal SELECT AIU MODE on signal path ~8. After generating the~:output: alive ~signal at step 52~, the computer 105~loops back to the data received test at s~ep 504. ~
:::: ::
::~ ;~: ` ~ ;
~ .
wo 94/03854 2 1 2 Q 3 ~ I PCT/US93/07298 Fig. 7 illustrates an a}ternative embodiment of the program executed by computer 105. Instead of the AIU
100 being a slave dependent on commands from a mission computer S0, the AIU 100 operates as a master requesting S raw sensor information from devices interfaced to the same 1553 bus. The program in the digital computer 105 of the ~IU lOO performs avionic functions that are performed in : the mission computer 50 in the embodiment of the program that is illustrated in Fig. 5. By eliminating an addîtional system component, the mission computer 50, and : the associated ~communications, increased economies and pPrformance advantages may be achieved by moving flight : control command functions from mission computer 50 to digital computer 105.
: ; 15Although there ha~e been described above : : specific;arrangements of a digital interface to an analog :: flight control~computer including a protocol converter system in accordance with the invention for the purpose of enabling a:person~of ordinary skill in the art to make and use~ the:~ invention, it will be appreciated that the invention~ is not;~li~ited~thereto. Accordingly, any and all modifications, ~ariations or equi~alent arrangements within~ the ~scope of the attached claims should be considered~to~be;~witbin the scope of the invention.
~- :
~ 21-, :
:: ::
Claims (40)
1. A protocol converter system comprising:
a digital interface circuit which is connectable to a digital data bus to provide communication of flight control information with a digital control computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital control computer, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received flight control information.
a digital interface circuit which is connectable to a digital data bus to provide communication of flight control information with a digital control computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital control computer, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received flight control information.
2. A protocol converter system according to claim 1 wherein:
the digital control computer is an avionics computer that communicates avionics information.
the digital control computer is an avionics computer that communicates avionics information.
3. A protocol converter system according to claim 1 that additionally comprises:
an analog avionics computer deriving at least one analog flight control signal that is capable of being coupled to the analog flight control computer; and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal generated by the analog avionics computer for the analog control source coupled to the analog flight control computer.
an analog avionics computer deriving at least one analog flight control signal that is capable of being coupled to the analog flight control computer; and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal generated by the analog avionics computer for the analog control source coupled to the analog flight control computer.
4. A protocol converter system according to claim 3 that additionally comprises:
a fault detection circuit connectable to the mode selection circuit than can override the selection signal coupled to the processing means and choose an analog control signal generated by the analog avionics computer as an analog control source for the analog flight control computer.
a fault detection circuit connectable to the mode selection circuit than can override the selection signal coupled to the processing means and choose an analog control signal generated by the analog avionics computer as an analog control source for the analog flight control computer.
5. A protocol converter system according to claim 1 that additionally comprises:
at least one additional digital data bus that may communicate redundant information.
at least one additional digital data bus that may communicate redundant information.
6. A protocol converter system according to claim 5 wherein:
the communication on the digital data bus conforms to MIL-STD-1553B.
the communication on the digital data bus conforms to MIL-STD-1553B.
7. A protocol converter system according to claim 1 wherein:
the communication on the digital data bus conforms to MIL-STD-1553B.
the communication on the digital data bus conforms to MIL-STD-1553B.
8. A protocol converter system according to claim a wherein:
the digital data processor executes instructions contained within Read Only Memory.
the digital data processor executes instructions contained within Read Only Memory.
9. A protocol converter system according to claim 1 wherein:
the digital data processor having alterable memory, storing instructions received from the digital data bus in said alterable memory, and executing instructions from said alterable memory.
the digital data processor having alterable memory, storing instructions received from the digital data bus in said alterable memory, and executing instructions from said alterable memory.
10. A protocol converter system according to claim 9 wherein:
the alterable memory retains its contents in the event of a power interruption.
the alterable memory retains its contents in the event of a power interruption.
11. A protocol converter system according to claim 9 wherein:
the alterable memory loses its contents in the event of a power interruption.
the alterable memory loses its contents in the event of a power interruption.
12. A protocol converter system according to claim 1 that additionally comprises:
an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values and communicating the digital values to the digital control computer in response to a request received from the digital data bus.
an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values and communicating the digital values to the digital control computer in response to a request received from the digital data bus.
13. A protocol converter system according to claim 12 that additionally comprises:
an analog avionics computer deriving at least one analog flight control signal that is capable of being connected to the analog flight control computer, and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal from the analog avionics computer for the analog control source coupled to the analog flight control computer.
an analog avionics computer deriving at least one analog flight control signal that is capable of being connected to the analog flight control computer, and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal from the analog avionics computer for the analog control source coupled to the analog flight control computer.
14. A protocol converter system according to claim 12 wherein:
the analog sample circuit converts to and the digital data processor stores 12-bit representations of the coupled analog signals.
the analog sample circuit converts to and the digital data processor stores 12-bit representations of the coupled analog signals.
15. A protocol converter system according to claim 1 wherein:
there are two digital data buses, both communicating in conformance with MIL-STD-1553B, that may communicate redundant information from the digital control computer to the digital interface circuit.
there are two digital data buses, both communicating in conformance with MIL-STD-1553B, that may communicate redundant information from the digital control computer to the digital interface circuit.
16. A protocol converter system according to claim 1 that additionally comprises:
an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values, comparing the stored digital value to a commanded digital value and communicating the result of the comparison to the digital control computer.
an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values, comparing the stored digital value to a commanded digital value and communicating the result of the comparison to the digital control computer.
17. A protocol converter system comprising:
a digital interface circuit which is connectable to a digital data bus to provide communication of flight control information with a digital avionics computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received flight control information.
a digital interface circuit which is connectable to a digital data bus to provide communication of flight control information with a digital avionics computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received flight control information.
18. A protocol converter system according to claim 17 that additionally comprises:
an analog avionics computer deriving at least one analog flight control signal that is capable of being coupled to the analog flight control computer, and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal generated by the analog avionics computer for the analog control source coupled to the analog flight control computer.
an analog avionics computer deriving at least one analog flight control signal that is capable of being coupled to the analog flight control computer, and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal generated by the analog avionics computer for the analog control source coupled to the analog flight control computer.
19. A protocol converter system according to claim 18 that additionally comprises:
a fault detection circuit connectable to the mode selection circuit than can override the selection signal coupled to the processing means and choose an analog control signal generated by the analog avionics computer as an analog control source for the analog flight control computer.
a fault detection circuit connectable to the mode selection circuit than can override the selection signal coupled to the processing means and choose an analog control signal generated by the analog avionics computer as an analog control source for the analog flight control computer.
20. A protocol converter system comprising:
a digital interface circuit which is connectable to at least one digital data bus to provide communication of flight control information with a digital avionics computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received flight control information.
a digital interface circuit which is connectable to at least one digital data bus to provide communication of flight control information with a digital avionics computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received flight control information.
21. A protocol converter system according to claim 20 wherein:
the communication on the digital data bus conforms to MIL-STD-1553B.
the communication on the digital data bus conforms to MIL-STD-1553B.
22. A protocol converter system according to claim 20 wherein:
there are two digital data buses, both communicating in conformance with MIL-STD-1553B, that may communicate redundant information from the digital avionics computer to the digital interface circuit.
there are two digital data buses, both communicating in conformance with MIL-STD-1553B, that may communicate redundant information from the digital avionics computer to the digital interface circuit.
23. A protocol converter system comprising:
a digital interface circuit which is connectable to at least one digital data bus to provide communication of avionics information with a digital avionics computer;
a analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a translation circuit coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the translation circuit providing the analog interface circuit at least one digital flight control signal in response to the received flight control information.
a digital interface circuit which is connectable to at least one digital data bus to provide communication of avionics information with a digital avionics computer;
a analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a translation circuit coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the translation circuit providing the analog interface circuit at least one digital flight control signal in response to the received flight control information.
24. A protocol converter system comprising:
a digital interface circuit which is connectable to at least one digital data bus to provide communication of control and status information with a digital computer;
an analog interface circuit which is connectable to provide at least one analog control signal to a mechanical driver means, each analog control signal being provided in response to a different digital control signal;
and a translation circuit coupled to the digital interface circuit and receiving from the digital interface circuit control information communicated by the digital computer, the translation circuit providing the analog translation circuit at least one digital control signal in response to the received control information.
a digital interface circuit which is connectable to at least one digital data bus to provide communication of control and status information with a digital computer;
an analog interface circuit which is connectable to provide at least one analog control signal to a mechanical driver means, each analog control signal being provided in response to a different digital control signal;
and a translation circuit coupled to the digital interface circuit and receiving from the digital interface circuit control information communicated by the digital computer, the translation circuit providing the analog translation circuit at least one digital control signal in response to the received control information.
25. A protocol converter system for communicating over a digital data bus with an avionics computer, the system comprising:
a digital interface circuit which is connectable to at least one digital data bus to provide communication over the bus of flight control information with a digital avionics computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor, having a nonvolatile memory storing instructions, the digital data processor executing the instructions, being coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing the analog interface circuit at least one digital flight control signal in response to the received flight control information.
a digital interface circuit which is connectable to at least one digital data bus to provide communication over the bus of flight control information with a digital avionics computer;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal; and a digital data processor, having a nonvolatile memory storing instructions, the digital data processor executing the instructions, being coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing the analog interface circuit at least one digital flight control signal in response to the received flight control information.
26. A protocol converter system according to claim 25 wherein:
the digital data processor is additionally comprised of an alterable memory, storing instructions received from the digital data bus in said alterable memory; and executing instructions from said alterable memory.
the digital data processor is additionally comprised of an alterable memory, storing instructions received from the digital data bus in said alterable memory; and executing instructions from said alterable memory.
27. A protocol converter system according to claim 1 wherein:
the digital flight control signal coupled to the analog interface circuit is a 12-bit digital value.
the digital flight control signal coupled to the analog interface circuit is a 12-bit digital value.
28. A protocol converter system comprising:
a digital interface circuit which is connectable to at least one digital data bus to provide communication of avionics information with a digital avionics computer over the digital data bus;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal;
a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing the analog interface circuit at least one digital flight control signal in response to the received flight control information; and an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values and communicating the digital values to the digital avionics computer in response to a request received from the digital data bus.
a digital interface circuit which is connectable to at least one digital data bus to provide communication of avionics information with a digital avionics computer over the digital data bus;
an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal;
a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit flight control information communicated by the digital avionics computer, the digital data processor providing the analog interface circuit at least one digital flight control signal in response to the received flight control information; and an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values and communicating the digital values to the digital avionics computer in response to a request received from the digital data bus.
29. A protocol converter system according to claim 28 additionally comprising:
an analog avionics computer deriving at least one analog flight control signal that is capable of being connected to the analog flight control computer; and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal from the analog avionics computer for the analog control source coupled to the analog flight control computer.
an analog avionics computer deriving at least one analog flight control signal that is capable of being connected to the analog flight control computer; and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal from the analog avionics computer for the analog control source coupled to the analog flight control computer.
30. A protocol converter system according to claim 28 wherein:
the analog sample circuit converts to and the digital data processor stores 12-bit digital representations of the coupled analog signals.
the analog sample circuit converts to and the digital data processor stores 12-bit digital representations of the coupled analog signals.
31. An avionics system comprising:
a digital avionics computer which is connectable to at least one digital interface bus, the digital avionics computer communicating digital flight control information and digital status information over the digital interface bus;
a protocol converter system coupled to at least one digital interface bus that is connectable to a digital avionics computer, the protocol converter system translating the received digital communications into at least one analog flight control signal; and a flight control computer receiving at least one analog control signal from the protocol converter system and in response thereto generating an analog command signal for communicating operations to a mechanical actuator.
a digital avionics computer which is connectable to at least one digital interface bus, the digital avionics computer communicating digital flight control information and digital status information over the digital interface bus;
a protocol converter system coupled to at least one digital interface bus that is connectable to a digital avionics computer, the protocol converter system translating the received digital communications into at least one analog flight control signal; and a flight control computer receiving at least one analog control signal from the protocol converter system and in response thereto generating an analog command signal for communicating operations to a mechanical actuator.
32. An avionics system comprising:
at least one digital interface bus;
a digital avionics computer which is connectable to at least one digital interface bus, the digital avionics computer providing digital flight control information and receiving digital status information which is representative of analog signals in the avionics system;
a protocol converter system that is coupled to at least one digital interface bus, the protocol converter system receiving over the digital data bus digital flight control information provided by the avionics computer and translating the received digital flight control information into at least one analog flight control signal; and an analog flight control computer generating a command signal for a mechanical actuator, the flight control computer receiving at least one analog control signal from the protocol converter system and generating the command signal for a mechanical actuator in response thereto.
at least one digital interface bus;
a digital avionics computer which is connectable to at least one digital interface bus, the digital avionics computer providing digital flight control information and receiving digital status information which is representative of analog signals in the avionics system;
a protocol converter system that is coupled to at least one digital interface bus, the protocol converter system receiving over the digital data bus digital flight control information provided by the avionics computer and translating the received digital flight control information into at least one analog flight control signal; and an analog flight control computer generating a command signal for a mechanical actuator, the flight control computer receiving at least one analog control signal from the protocol converter system and generating the command signal for a mechanical actuator in response thereto.
33. An avionics system comprising:
at least one digital interface bus;
a digital avionics computer which is coupled to at least one digital interface bus, the digital avionics computer providing digital flight control information and receiving digital status information;
a protocol converter system that is coupled to communicate with the digital avionics computer over at least one digital interface bus, the protocol converter system receiving digital communications from the digital avionics computer over the digital data bus and translating the received digital communications into at least one analog flight control signal, the protocol converter system receiving samples of analog control signals, storing digital representations of analog control signals, and communicating the stored digital representations of analog flight control signals to the digital avionics computer; and an analog flight control computer generating command signals for mechanical actuators connectable to an avionics system, the flight control computer receiving at least one analog control system from the protocol converter system and generating the command signals in response thereto.
at least one digital interface bus;
a digital avionics computer which is coupled to at least one digital interface bus, the digital avionics computer providing digital flight control information and receiving digital status information;
a protocol converter system that is coupled to communicate with the digital avionics computer over at least one digital interface bus, the protocol converter system receiving digital communications from the digital avionics computer over the digital data bus and translating the received digital communications into at least one analog flight control signal, the protocol converter system receiving samples of analog control signals, storing digital representations of analog control signals, and communicating the stored digital representations of analog flight control signals to the digital avionics computer; and an analog flight control computer generating command signals for mechanical actuators connectable to an avionics system, the flight control computer receiving at least one analog control system from the protocol converter system and generating the command signals in response thereto.
34. A protocol converter system according to claim 33 wherein:
the sampled analog control signals are sampled and stored as 12-bit digital values.
the sampled analog control signals are sampled and stored as 12-bit digital values.
35. An avionics system comprising:
a digital data bus;
a digital avionics computer coupled for communicating over the digital data bus, the digital avionics computer providing digital flight control information and receiving digital status information which is representative of analog signals in the avionics system;
a protocol converter system that is coupled to communicate with the digital avionics computer using the digital data bus, the protocol converter system receiving digital communications from the avionics computer and translating the received digital communications into at least one analog flight control signal, the protocol converter system sampling and storing digital representations of analog control signals coupled to the analog flight control computer and communicating upon demand by the digital avionics computer these digital representations over the digital data bus; and an analog flight control computer that generates a command signal for a mechanical actuator, the flight control computer receiving at lest one analog control signal from the protocol converter system and generating the analog control signals that are received by the protocol converter system.
a digital data bus;
a digital avionics computer coupled for communicating over the digital data bus, the digital avionics computer providing digital flight control information and receiving digital status information which is representative of analog signals in the avionics system;
a protocol converter system that is coupled to communicate with the digital avionics computer using the digital data bus, the protocol converter system receiving digital communications from the avionics computer and translating the received digital communications into at least one analog flight control signal, the protocol converter system sampling and storing digital representations of analog control signals coupled to the analog flight control computer and communicating upon demand by the digital avionics computer these digital representations over the digital data bus; and an analog flight control computer that generates a command signal for a mechanical actuator, the flight control computer receiving at lest one analog control signal from the protocol converter system and generating the analog control signals that are received by the protocol converter system.
36. A avionics system according to claim 35 wherein:
the sampled analog control signals are sampled and stored as 12-bit digital values.
the sampled analog control signals are sampled and stored as 12-bit digital values.
37. An avionics system according to claim 1 that additionally comprises:
an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values, comparing the stored digital values to commanded digital values and communicating the results of the comparisons to the digital control computer.
an analog sample circuit coupled to at least one analog flight control signal, the analog sample circuit converting the coupled analog signals to digital values, the digital data processor storing the digital values, comparing the stored digital values to commanded digital values and communicating the results of the comparisons to the digital control computer.
38. An avionics system comprising:
a digital interface circuit which is connectable to a digital data bus to provide communication of avionic sensor information with a digital control computer;
a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit avionic sensor information, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received avionic sensor information; and an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal derived by the digital data processor in response to the received avionic sensor information.
a digital interface circuit which is connectable to a digital data bus to provide communication of avionic sensor information with a digital control computer;
a digital data processor coupled to the digital interface circuit and receiving from the digital interface circuit avionic sensor information, the digital data processor providing to the analog interface circuit at least one digital flight control signal in response to the received avionic sensor information; and an analog interface circuit which is connectable to provide at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal derived by the digital data processor in response to the received avionic sensor information.
39. A protocol converter system according to claim 1 wherein the analog interface circuit additionally comprises:
a digital to analog converter coupled to the digital data processor providing at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal.
a digital to analog converter coupled to the digital data processor providing at least one analog flight control signal to an aircraft analog flight control computer, each analog flight control signal being provided in response to a different digital flight control signal.
40. A protocol converter system according to claim 39 that additionally comprises:
an analog avionics computer deriving at least one analog flight control signal that is capable of being coupled to the analog flight control computer; and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal generated by the analog avionics computer for the analog control source coupled to the analog flight control computer.
an analog avionics computer deriving at least one analog flight control signal that is capable of being coupled to the analog flight control computer; and a mode selection circuit that is coupled to a selection signal which is generated by the processing means; the selection signal choosing between at least one analog output signal coupled to the analog interface circuit and at least one analog control signal generated by the analog avionics computer for the analog control source coupled to the analog flight control computer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/923,146 US5377109A (en) | 1992-07-31 | 1992-07-31 | Failsafe digital bus to analog protocol converter system |
| US07/923,146 | 1992-07-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2120347A1 true CA2120347A1 (en) | 1994-02-17 |
Family
ID=25448198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002120347A Abandoned CA2120347A1 (en) | 1992-07-31 | 1993-07-29 | Failsafe digital bus to analog protocol converter system |
Country Status (13)
| Country | Link |
|---|---|
| US (1) | US5377109A (en) |
| EP (1) | EP0606469B1 (en) |
| JP (1) | JPH07503090A (en) |
| AT (1) | ATE198105T1 (en) |
| AU (1) | AU4996693A (en) |
| CA (1) | CA2120347A1 (en) |
| DE (1) | DE69329751T2 (en) |
| DK (1) | DK0606469T3 (en) |
| GR (1) | GR3035461T3 (en) |
| IL (1) | IL106511A (en) |
| NO (1) | NO941141L (en) |
| PT (1) | PT606469E (en) |
| WO (1) | WO1994003854A1 (en) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4336207A1 (en) * | 1993-10-23 | 1995-04-27 | Bodenseewerk Geraetetech | Interface arrangement for data transmission between the carrier aircraft and the missile |
| US5555498A (en) * | 1994-03-18 | 1996-09-10 | Chrysler Corporation | Circuit and method for interfacing vehicle controller and diagnostic test instrument |
| US5548510A (en) * | 1994-10-28 | 1996-08-20 | Mcdonnell Douglas Corporation | Method and apparatus for providing a universal electrical interface between an aircraft and an associated store |
| US5809220A (en) * | 1995-07-20 | 1998-09-15 | Raytheon Company | Fault tolerant distributed control system |
| US6133846A (en) * | 1996-10-01 | 2000-10-17 | Honeywell Inc. | Low cost redundant communications system |
| US5992290A (en) * | 1997-04-09 | 1999-11-30 | Cubic Defense Systems, Inc. | Aircraft interface device and crossover cable kit |
| US6131065A (en) * | 1998-02-25 | 2000-10-10 | Cardinal Communications, Inc. | Electronic flight data strips and method for air traffic control |
| US6275503B1 (en) | 1998-07-24 | 2001-08-14 | Honeywell International Inc. | Method for transmitting large information packets over networks |
| US6360290B1 (en) | 1999-06-23 | 2002-03-19 | United Technologies Corporation | Commercial standard digital bus interface circuit |
| US20020032006A1 (en) * | 2000-05-05 | 2002-03-14 | K. Prasad Nair | Efficient network routing method for air/ground data services |
| US7017861B1 (en) * | 2000-05-22 | 2006-03-28 | Saab Ab | Control system for actuators in an aircraft |
| US6459228B1 (en) | 2001-03-22 | 2002-10-01 | Mpc Products Corporation | Dual input servo coupled control sticks |
| US6718409B2 (en) * | 2001-04-06 | 2004-04-06 | The United States Of America As Represented By The Secretary Of The Navy | National marine electronics association protocol converter |
| US7313474B2 (en) * | 2002-03-07 | 2007-12-25 | Bg Soflex Llc | Simple engine fuel controller |
| US7353090B2 (en) * | 2004-10-04 | 2008-04-01 | The Boeing Company | System, bus monitor assembly and method of monitoring at least one data bus of an aircraft |
| US7676558B2 (en) * | 2004-11-12 | 2010-03-09 | International Business Machines Corporation | Configuring shared devices over a fabric |
| US7487403B2 (en) * | 2004-11-12 | 2009-02-03 | International Business Machines Corporation | Method for handling a device failure |
| ATE440353T1 (en) * | 2005-06-07 | 2009-09-15 | Koninkl Philips Electronics Nv | FAIL-SAFE REMOTE CONTROL |
| US7487015B1 (en) * | 2006-07-31 | 2009-02-03 | The United States Of America As Represented By The Secretary Of The Navy | Emulator for an inertial navigation unit protocol converter |
| US7487014B1 (en) * | 2006-07-31 | 2009-02-03 | The United States Of America As Represented By The Secretary Of The Navy | Inertial navigation unit protocol converter |
| US7684904B2 (en) * | 2007-06-27 | 2010-03-23 | Arinc Incorporated | Systems and methods for communication, navigation, surveillance and sensor system integration in a vehicle |
| US7868276B2 (en) * | 2007-10-24 | 2011-01-11 | Lockheed Martin Corporation | Airborne vehicle emulation system and method |
| US7869385B2 (en) * | 2007-10-31 | 2011-01-11 | The Boeing Company | Interactivity with a bus interface card |
| FR2992122B1 (en) * | 2012-06-15 | 2014-06-27 | Thales Sa | DEVICE FOR SECURE CONVERSION OF DIGITAL CONTROLS IN ANALOGUE POWER SIGNALS FOR AIRCRAFT |
| CN103676640B (en) * | 2012-09-03 | 2016-12-28 | 上海航天测控通信研究所 | It is applied to the data communication equipment of spacecrafts rendezvous |
| US10095646B2 (en) | 2014-04-29 | 2018-10-09 | Harold Ray Bettencourt | Device and method for allowing integration of incompatible devices into a vehicle bus network |
| US10001776B2 (en) * | 2016-03-21 | 2018-06-19 | The Boeing Company | Unmanned aerial vehicle flight control system |
| US20170323239A1 (en) | 2016-05-06 | 2017-11-09 | General Electric Company | Constrained time computing control system to simulate and optimize aircraft operations with dynamic thermodynamic state and asset utilization attainment |
| US10304559B2 (en) * | 2016-12-30 | 2019-05-28 | Western Digital Technologies, Inc. | Memory write verification using temperature compensation |
| US20200023955A1 (en) * | 2018-07-23 | 2020-01-23 | Textron Innovations Inc. | System and Method for Rotorcraft Flight Control |
| WO2020101776A2 (en) | 2018-08-13 | 2020-05-22 | Applied Avionics, Inc. | Command interpreter or command parser based control architecture for aircraft control, interface units and/or illuminated pushbutton switches |
| EP4078322A1 (en) * | 2020-05-04 | 2022-10-26 | Auterion AG | System and method for software-defined drones |
| US11353890B1 (en) | 2021-06-16 | 2022-06-07 | Beta Air, Llc | Electrical vertical take-off and landing aircraft having reversionary flight control and method of use |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3374723D1 (en) * | 1982-02-17 | 1988-01-07 | British Aerospace | Aircraft data instrumentation and acquisition system |
| US4604711A (en) * | 1982-07-23 | 1986-08-05 | Sundstrand Data Control, Inc. | Aircraft flight data display system |
| US4649484A (en) * | 1983-08-01 | 1987-03-10 | The Boeing Company | Avionic control system |
| US4656585A (en) * | 1984-02-03 | 1987-04-07 | Sundstrand Data Control Inc. | Aircraft flight data recorder data acquisition system |
| US4646241A (en) * | 1984-06-21 | 1987-02-24 | United Technologies Corporation | Solid-state flight data recording system |
| US4658359A (en) * | 1984-12-31 | 1987-04-14 | The United States Of America As Represented By The Secretary Of The Navy | Method for managing redundant resources in a complex avionics communication system |
| US4799159A (en) * | 1985-05-30 | 1989-01-17 | Honeywell Inc. | Digital automatic flight control system with disparate function monitoring |
| US5184312A (en) * | 1985-10-13 | 1993-02-02 | The Boeing Company | Distributed built-in test equipment system for digital avionics |
| US5019980A (en) * | 1989-07-14 | 1991-05-28 | The Boeing Company | General purpose avionics display monitor |
| US5003310A (en) * | 1989-09-29 | 1991-03-26 | Westinghouse Electric Corp. | Analog data acquisition circuit with digital logic control |
| US5023791A (en) * | 1990-02-12 | 1991-06-11 | The Boeing Company | Automated test apparatus for aircraft flight controls |
-
1992
- 1992-07-31 US US07/923,146 patent/US5377109A/en not_active Expired - Fee Related
-
1993
- 1993-07-28 IL IL10651193A patent/IL106511A/en not_active IP Right Cessation
- 1993-07-29 CA CA002120347A patent/CA2120347A1/en not_active Abandoned
- 1993-07-29 EP EP93919873A patent/EP0606469B1/en not_active Expired - Lifetime
- 1993-07-29 JP JP6505518A patent/JPH07503090A/en active Pending
- 1993-07-29 AU AU49966/93A patent/AU4996693A/en not_active Abandoned
- 1993-07-29 AT AT93919873T patent/ATE198105T1/en not_active IP Right Cessation
- 1993-07-29 WO PCT/US1993/007298 patent/WO1994003854A1/en active IP Right Grant
- 1993-07-29 DK DK93919873T patent/DK0606469T3/en active
- 1993-07-29 DE DE69329751T patent/DE69329751T2/en not_active Expired - Fee Related
- 1993-07-29 PT PT93919873T patent/PT606469E/en unknown
-
1994
- 1994-03-28 NO NO941141A patent/NO941141L/en unknown
-
2001
- 2001-02-22 GR GR20010400295T patent/GR3035461T3/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| PT606469E (en) | 2001-04-30 |
| DK0606469T3 (en) | 2001-04-17 |
| WO1994003854A1 (en) | 1994-02-17 |
| IL106511A0 (en) | 1993-12-28 |
| GR3035461T3 (en) | 2001-05-31 |
| EP0606469B1 (en) | 2000-12-13 |
| IL106511A (en) | 1996-10-31 |
| NO941141D0 (en) | 1994-03-28 |
| DE69329751T2 (en) | 2001-04-12 |
| EP0606469A1 (en) | 1994-07-20 |
| US5377109A (en) | 1994-12-27 |
| AU4996693A (en) | 1994-03-03 |
| EP0606469A4 (en) | 1997-05-14 |
| NO941141L (en) | 1994-05-20 |
| ATE198105T1 (en) | 2000-12-15 |
| JPH07503090A (en) | 1995-03-30 |
| DE69329751D1 (en) | 2001-01-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2120347A1 (en) | Failsafe digital bus to analog protocol converter system | |
| WO1994003854A9 (en) | Failsafe digital bus to analog protocol converter system | |
| US10850864B2 (en) | Electronic avionics systems and methods | |
| CN106774367B (en) | Redundancy control method of aircraft | |
| US5550731A (en) | Method and apparatus for implementing a databus voter to select the command signals from one of several redundant asynchronous digital processing units | |
| US11097834B2 (en) | Fly-by-wire systems and related operating methods | |
| EP0164341B1 (en) | Automatic fault reporting system | |
| KR101418488B1 (en) | Integrated Flight Control Computer System for an unmanned aerial vehicle and Testing Method for the Same | |
| US9003085B2 (en) | Aircraft communication system comprising an aircraft terminal and a portable resource | |
| US5560570A (en) | Automatic piloting device for aerodynes | |
| EP3738872B1 (en) | Redundant fly-by-wire systems with fault resiliency | |
| WO2023045067A1 (en) | Flight control unit, aircraft control system and method, and aircraft | |
| JP3965243B2 (en) | Control device | |
| CN111443593A (en) | Networked redundant aircraft control system | |
| US8903569B2 (en) | Method for controlling a high-lift device or a flight control surface, system and aircraft or spacecraft | |
| US5510991A (en) | Configurable automatic piloting device for aerodynes | |
| EP0883838B1 (en) | Shared bw architecture for applications with varying levels of integrity requirements | |
| Johnson et al. | Fault tolerant computer system for the A129 helicopter | |
| JPS62121600A (en) | A plurality of wireless communication equipment carried on airplane and centralized controller for wireless navigator | |
| JP3168448B2 (en) | Digital flight control system | |
| EP4177571A1 (en) | Embedded display automatic flight controls distributed architecture | |
| Hiergeist et al. | Fault-tolerant FCC Architecture for future UAV systems based on COTS SoC | |
| CN110187717A (en) | UAV Flight Control System and unmanned plane | |
| CN117891632A (en) | Information security interaction method for aircraft airborne maintenance control device | |
| Broadley | The application of multiplex data transmission standards to medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FZDE | Discontinued |