CA2122868A1 - Process for the Patterned Metallisation of Structured Printed Circuit Boards - Google Patents

Process for the Patterned Metallisation of Structured Printed Circuit Boards

Info

Publication number
CA2122868A1
CA2122868A1 CA2122868A CA2122868A CA2122868A1 CA 2122868 A1 CA2122868 A1 CA 2122868A1 CA 2122868 A CA2122868 A CA 2122868A CA 2122868 A CA2122868 A CA 2122868A CA 2122868 A1 CA2122868 A1 CA 2122868A1
Authority
CA
Canada
Prior art keywords
printed circuit
mask
metallisation
circuit boards
structured printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2122868A
Other languages
French (fr)
Other versions
CA2122868C (en
Inventor
Klaus Horn
Jurgen Lingnau
Gerald Schutze
Werner Hinter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Morton International LLC
Original Assignee
Klaus Horn
Jurgen Lingnau
Gerald Schutze
Werner Hinter
Morton International Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Klaus Horn, Jurgen Lingnau, Gerald Schutze, Werner Hinter, Morton International Inc. filed Critical Klaus Horn
Publication of CA2122868A1 publication Critical patent/CA2122868A1/en
Application granted granted Critical
Publication of CA2122868C publication Critical patent/CA2122868C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0571—Dual purpose resist, e.g. etch resist used as solder resist, solder resist used as plating resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/072—Electroless plating, e.g. finish plating or initial plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Abstract

Described is a process for the patterned metallisation of structured printed circuit boards in which the fully structured printed circuit board is covered with a solder stop mask, with the solder contact locations being left open, the solder stop mask is heated under such conditions that complete hardening does not yet occur and the copper surface of the printed circuit board is practically not oxidised, metal is deposited out of an aqueous bath at the exposed solder contact locations and after the metal deposit operation the mask is heated sufficiently long to a sufficiently high temperature that the mask is completely hardened throughout. The incomplete pre-hardening step prevents the solution infiltrating under the mask in the metallisation operation and thereby loosening the adhesion thereof.
CA002122868A 1993-05-13 1994-05-04 Process for the patterned metallisation of structured printed circuit boards Expired - Fee Related CA2122868C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4316087A DE4316087A1 (en) 1993-05-13 1993-05-13 Process for the imagewise metallization of structured printed circuit boards
DE4316087.5 1993-05-13
US08/242,759 US5484688A (en) 1993-05-13 1994-05-13 Process for the patterned metallisation of structured printed circuit boards

Publications (2)

Publication Number Publication Date
CA2122868A1 true CA2122868A1 (en) 1994-11-14
CA2122868C CA2122868C (en) 1997-05-13

Family

ID=25925893

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002122868A Expired - Fee Related CA2122868C (en) 1993-05-13 1994-05-04 Process for the patterned metallisation of structured printed circuit boards

Country Status (4)

Country Link
US (1) US5484688A (en)
EP (1) EP0625001B1 (en)
CA (1) CA2122868C (en)
DE (1) DE4316087A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10101734C2 (en) * 2001-01-16 2003-04-24 Osram Opto Semiconductors Gmbh Method for forming an etching mask on a substrate
DE102016103585B4 (en) * 2016-02-29 2022-01-13 Infineon Technologies Ag Process for manufacturing a package with solderable electrical contact
EP3310137B1 (en) 2016-10-14 2019-02-27 ATOTECH Deutschland GmbH Method for manufacturing a printed circuit board

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4003877A (en) * 1974-05-24 1977-01-18 Dynachem Corporation Photopolymerizable screen printing inks for permanent coatings prepared from aryloxyalkyl compositions
US4234626A (en) * 1978-02-01 1980-11-18 E. I. Du Pont De Nemours And Company Producing printed circuits by conjoining metal powder images
US4640719A (en) * 1985-07-01 1987-02-03 Petroleum Fermentations N.V. Method for printed circuit board and/or printed wiring board cleaning
JPS6364394A (en) * 1986-09-05 1988-03-22 株式会社日立製作所 Manufacture of printed wiring board
US4946563A (en) * 1988-12-12 1990-08-07 General Electric Company Process for manufacturing a selective plated board for surface mount components
DE3931467A1 (en) * 1989-09-21 1991-04-04 Hoechst Ag POLYMERIZABLE MIXTURE BY RADIATION AND METHOD FOR PRODUCING A SOLDER STOP MASK
US5368884A (en) * 1991-11-06 1994-11-29 Nippon Paint Co., Ltd. Method of forming solder mask
DE4234072A1 (en) * 1992-10-09 1994-04-14 Morton Int Inc Radiation-polymerizable mixture and method for producing a solder mask
US5290608A (en) * 1993-07-26 1994-03-01 Macdermid, Incorporated Method for forming a patterned mask

Also Published As

Publication number Publication date
US5484688A (en) 1996-01-16
EP0625001A3 (en) 1995-11-02
CA2122868C (en) 1997-05-13
EP0625001B1 (en) 2001-11-28
EP0625001A2 (en) 1994-11-17
DE4316087A1 (en) 1994-11-17

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed