CA2124355A1 - Nonvolative random access memory device - Google Patents

Nonvolative random access memory device

Info

Publication number
CA2124355A1
CA2124355A1 CA002124355A CA2124355A CA2124355A1 CA 2124355 A1 CA2124355 A1 CA 2124355A1 CA 002124355 A CA002124355 A CA 002124355A CA 2124355 A CA2124355 A CA 2124355A CA 2124355 A1 CA2124355 A1 CA 2124355A1
Authority
CA
Canada
Prior art keywords
nvram
region
storage device
charge storage
random access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002124355A
Other languages
French (fr)
Other versions
CA2124355C (en
Inventor
James A. Cooper, Jr.
John W. Palmour
Calvin H. Carter, Jr.
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Purdue Research Foundation
Wolfspeed Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2124355A1 publication Critical patent/CA2124355A1/en
Application granted granted Critical
Publication of CA2124355C publication Critical patent/CA2124355C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608Silicon carbide
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/10DRAM devices comprising bipolar components

Abstract

A random access memory (RAM) cell in silicon carbide having storage times when all bias is removed long enough to be considered nonvolatile, The nonvolatile random access memory (NVRAM) cell comprises a bit line, a charge storage device in silicon carbide, and a transistor in silicon carbide connecting the charge storage device to the bit line. The bipolar NVRAM cell has a bipolar transistor with a base region, an emitter region, and a floating collector region, wherein the charge storage device in the bipolar NVRAM is a p-n junction adjacent the floating collector region of the cell. The metal-oxide-semiconductor (MOS) NVRAM has a MOS field effect transistor (MOSFET) with a channel region, a source region, and a drain region, wherein the charge storage device in the MOS NVRAM is a MOS capacitor adjacent the drain region of the MOSFET,
CA002124355A 1991-11-26 1992-11-24 Nonvolative random access memory device Expired - Lifetime CA2124355C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US798,219 1991-11-26
US07/798,219 US5465249A (en) 1991-11-26 1991-11-26 Nonvolatile random access memory device having transistor and capacitor made in silicon carbide substrate
PCT/US1992/010210 WO1993011540A1 (en) 1991-11-26 1992-11-24 Nonvolatile random access memory device

Publications (2)

Publication Number Publication Date
CA2124355A1 true CA2124355A1 (en) 1993-06-10
CA2124355C CA2124355C (en) 2005-01-25

Family

ID=25172832

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002124355A Expired - Lifetime CA2124355C (en) 1991-11-26 1992-11-24 Nonvolative random access memory device

Country Status (10)

Country Link
US (1) US5465249A (en)
EP (1) EP0614567B1 (en)
JP (1) JP3473953B2 (en)
KR (1) KR100304248B1 (en)
AT (1) ATE148581T1 (en)
AU (1) AU3226693A (en)
CA (1) CA2124355C (en)
DE (1) DE69217249T2 (en)
TW (1) TW226487B (en)
WO (1) WO1993011540A1 (en)

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US7538389B2 (en) 2005-06-08 2009-05-26 Micron Technology, Inc. Capacitorless DRAM on bulk silicon
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US8189364B2 (en) 2008-12-17 2012-05-29 Qs Semiconductor Australia Pty Ltd. Charge retention structures and techniques for implementing charge controlled resistors in memory cells and arrays of memory
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US20100238743A1 (en) * 2009-03-23 2010-09-23 James Pan FAST EMBEDDED BiCMOS-THYRISTOR LATCH-UP NONVOLATILE MEMORY
US20110042685A1 (en) * 2009-08-18 2011-02-24 Qs Semiconductor Australia Pty Ltd Substrates and methods of fabricating epitaxial silicon carbide structures with sequential emphasis
US8288795B2 (en) 2010-03-02 2012-10-16 Micron Technology, Inc. Thyristor based memory cells, devices and systems including the same and methods for forming the same
US10340276B2 (en) * 2010-03-02 2019-07-02 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor
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US8513722B2 (en) 2010-03-02 2013-08-20 Micron Technology, Inc. Floating body cell structures, devices including same, and methods for forming same
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Also Published As

Publication number Publication date
KR100304248B1 (en) 2001-11-22
TW226487B (en) 1994-07-11
DE69217249D1 (en) 1997-03-13
ATE148581T1 (en) 1997-02-15
EP0614567A1 (en) 1994-09-14
JP3473953B2 (en) 2003-12-08
AU3226693A (en) 1993-06-28
CA2124355C (en) 2005-01-25
JPH07507657A (en) 1995-08-24
WO1993011540A1 (en) 1993-06-10
EP0614567B1 (en) 1997-01-29
US5465249A (en) 1995-11-07
DE69217249T2 (en) 1997-09-25

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Effective date: 20121124