CA2195836A1 - Semiconductor memory having main word line and subword lines provided correspondingly to the main word line - Google Patents

Semiconductor memory having main word line and subword lines provided correspondingly to the main word line

Info

Publication number
CA2195836A1
CA2195836A1 CA002195836A CA2195836A CA2195836A1 CA 2195836 A1 CA2195836 A1 CA 2195836A1 CA 002195836 A CA002195836 A CA 002195836A CA 2195836 A CA2195836 A CA 2195836A CA 2195836 A1 CA2195836 A1 CA 2195836A1
Authority
CA
Canada
Prior art keywords
word line
main word
semiconductor memory
lines provided
cross portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002195836A
Other languages
French (fr)
Other versions
CA2195836C (en
Inventor
Kyoichi Nagata
Yuji Nakaoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2195836A1 publication Critical patent/CA2195836A1/en
Application granted granted Critical
Publication of CA2195836C publication Critical patent/CA2195836C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Abstract

In a memory in which a memory cell array 200 and a subword drive circuit SWD are alternately arranged in a row direction in addition to an SA array 170 and a cross portion (SWC) alternately arranged, there are arranged an interface circuit 100 between a global I/0 line GIOT/B and a local I/O line LIOT/B in a first cross portion SWD1, nMOSs Q2, Q4, and Q5 of an SA control circuit in a second cross portion SWC2, and pMOSs Q1 and Q3 of the SA control circuit in a third cross portion SWC3.
CA002195836A 1996-01-25 1997-01-23 Semiconductor memory having main word line and subword lines provided correspondingly to the main word line Expired - Fee Related CA2195836C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8010527A JP2757849B2 (en) 1996-01-25 1996-01-25 Semiconductor storage device
JP10527/96 1996-01-25

Publications (2)

Publication Number Publication Date
CA2195836A1 true CA2195836A1 (en) 1997-07-26
CA2195836C CA2195836C (en) 2001-03-20

Family

ID=11752732

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002195836A Expired - Fee Related CA2195836C (en) 1996-01-25 1997-01-23 Semiconductor memory having main word line and subword lines provided correspondingly to the main word line

Country Status (5)

Country Link
US (1) US5793664A (en)
JP (1) JP2757849B2 (en)
KR (1) KR100242906B1 (en)
CA (1) CA2195836C (en)
TW (1) TW340942B (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3209265B2 (en) * 1997-08-01 2001-09-17 日本電気株式会社 Semiconductor circuit
JP2000049307A (en) * 1998-07-29 2000-02-18 Mitsubishi Electric Corp Semiconductor storage
KR100480902B1 (en) * 1998-09-02 2005-06-08 주식회사 하이닉스반도체 Layout of Semiconductor Memory Device
JP4212171B2 (en) 1999-01-28 2009-01-21 株式会社ルネサステクノロジ Memory circuit / logic circuit integrated system
JP4632107B2 (en) 2000-06-29 2011-02-16 エルピーダメモリ株式会社 Semiconductor memory device
KR100403344B1 (en) * 2001-09-13 2003-11-01 주식회사 하이닉스반도체 Semiconductor memory device
DE10339894B4 (en) * 2003-08-29 2006-04-06 Infineon Technologies Ag Sense amplifier Zuschalt / shutoff circuitry
JP4149969B2 (en) * 2004-07-14 2008-09-17 株式会社東芝 Semiconductor device
KR100772700B1 (en) * 2006-06-29 2007-11-02 주식회사 하이닉스반도체 Memory device that have bitline equalizing unit in cell array, and method for locating bitline equalizing unit in cell array
JP5690464B2 (en) * 2007-11-20 2015-03-25 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. Semiconductor memory device
US7701785B2 (en) * 2008-06-23 2010-04-20 Freescale Semiconductor, Inc. Memory with high speed sensing
JP2014149884A (en) * 2013-01-31 2014-08-21 Micron Technology Inc Semiconductor device
KR20160074907A (en) * 2014-12-19 2016-06-29 에스케이하이닉스 주식회사 Wordline driver for semiconductor memory device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2785655B2 (en) * 1993-11-01 1998-08-13 日本電気株式会社 Semiconductor device

Also Published As

Publication number Publication date
CA2195836C (en) 2001-03-20
KR100242906B1 (en) 2000-02-01
TW340942B (en) 1998-09-21
KR970060221A (en) 1997-08-12
US5793664A (en) 1998-08-11
JPH09205182A (en) 1997-08-05
JP2757849B2 (en) 1998-05-25

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