CA2264396A1 - Video signal routing system - Google Patents
Video signal routing system Download PDFInfo
- Publication number
- CA2264396A1 CA2264396A1 CA002264396A CA2264396A CA2264396A1 CA 2264396 A1 CA2264396 A1 CA 2264396A1 CA 002264396 A CA002264396 A CA 002264396A CA 2264396 A CA2264396 A CA 2264396A CA 2264396 A1 CA2264396 A1 CA 2264396A1
- Authority
- CA
- Canada
- Prior art keywords
- loop
- video
- cameras
- multiplexer
- camera
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
- H04N7/181—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources
Abstract
A video signal routing system for video signals which includes a video signal carrying line arranged in a loop beginning and ending at a signal multiplexer (160), a plurality of video cameras (111-114) electrically connected to the line at points spaced therealong, and a video output line connected to receive video signals from the cameras through the multiplexer for display. The system includes a synchronization signal insertion device (121), a code signal insertion device (131), a duplicate synchronization signal insertion device (122), a duplicate code signal insertion device (132), a timing generator and interface (150) for controlling both of the synchronization signal insertion devices and both of the code signal insertion devices and a microcontroller (140) for controlling the timing generator and interface.
Description
CA 02264396 1999-02-25wo 9s/09441 PCTIUS97Il49074-VID G Y TEAQKQBQHHDThe present invention relates to systems for routing5 video signals, and. more particularly, to systems for101520253035routing video signals from a single loop of cable.In a video system such as a video multiplexing systemwhere there are multiple cameras on a single loop of wire,the loop system can lose video from some or all camerasif the loop of coax is broken or somehow disconnected.Therefore, there is a need for a video routing system thatcan prevent the loss of video signals when the loop ofcoax is interrupted.§UMMARY QF THE INVEï¬1IQEIn accordance with the invention, a video signalrouting system for video signals which is adapted toremain operative despite a break in the video signalcarrying line is provided. It includes a video signalcarrying line arranged in a loop beginning and ending ata signal multiplexer and a plurality of video cameraselectrically connected. to said line at points spacedtherealong. It also includes a video output lineconnected to receive video signals from said camerasthrough said multiplexer for display. There is asynchronization signal insertion device in said videosignal carrying line adjacent the beginning of its loopbetween said multiplexer and said cameras and a1 codesignal insertion device in said video signal carrying lineadjacent thebeginning of its loop between saidmultiplexer and said cameras. In addition, there is aduplicate synchronization signal insertion device in saidvideo signal carrying line adjacent the end of its loopbetween said multiplexer and said cameras as well as aduplicate code signal insertion. device in said âvideosignal carrying line adjacent the end of its loop betweenWO 98/09441101520253035CA 02264396 1999-02-25PCT/US97/14907-2-said multiplexer and said cameras. A timing generator andinterface responsive to control signals derived from saidvideo output line is provided for controlling both of saidsynchronization signal insertion devices and both of saidcode signal insertion devices, and a microcontroller isprovided for controlling said timing generator andinterface.B F R I F DThese and other features, aspects and advantages ofthe present invention will become better understood withregard to the following detailed description, appendedclaims, and appending drawings where:Figure 1 is a block diagram of a video multiplexing-system incorporating one embodiment of the presentinvention; andFigure 2 is a block diagram demonstrating themultiplexing system: in Figure 1 with. a break in thecoaxial loop.DETAILED DESQRIPTEQNReferring now to the figures, there is shown amultiplexing system 100 illustrating one embodiment of thepresent invention. The video multiplexing system 10generally comprises a coaxial loop of cable 110 havingvideo cameras 111-114 connected thereto, sync inserters121, 122 for inserting synchronization signals on thecoaxial loop 110, code inserters 131, 132 for insertingcontrol codes on the coaxial loop 110, a loop multiplexer160 for receiving signals from the coaxial loop 110, async detector 170 for detecting synchronization signalson the video from the loop multiplexer 160, a video leveldetector 180 for detecting video levels on the videosignal from the loop multiplexer 160, a video processor190 for processing the video from the loop multiplexer160, and. a timing generator and interface 150 and aWO 98109441101520253035CA 02264396 1999-02-25PCTIU S97! 14907-3-microcontroller 140 for controlling the various componentsof the multiplexing system 100.When the coaxial loop 110 is connected properly, asshown in FIG. 1, the control codes and synchronizationsignals are inserted onto a first end 110a of the coaxialloop 110 by the code inserter 131 and the synchronizationinserter 121, respectively. As the synchronizationsignals and control codes propagate from the first end110a of the coax loop 110 to a second end 110b, thecameras 111-114 receive the synchronization signals andthe camera codes. The cameras 111-114 use thesynchronization signals on the coaxial loop 110 tosynchronize the signals of the cameras 111-114. Thecamera codes on the coax loop 110 provide information tothe cameras 111-114 such as which camera is to insertsignals onto the coaxial loop 110 and at which times tobuild or insert a video signal on the coaxial loop 110.In one embodiment, the multiplexing system 100 uses thesynchronization signals and the control codes to build acomposite video signal onto the coaxial loop 110 in thesame manner as in the co-pending U.S. Patent ApplicationSerial No. 08/501,261, entitled "VIDEO MULTIPLEXER", filedon July 11, 1995, assigned to the assignee of the presentinvention, which is hereby incorporated in its entiretyby reference thereto. The resulting video signals arereceived at the second end 100b of the coaxial loop 110by a first input 160a of the loop multiplexer 160. Duringthe period in which the video signals are being receivedfrom the second end 110b of the coaxial loop 110, thesynchronization inserter 122 and code inserter 132 passvideo from the second end 110b of the coaxial loop to theloop multiplexer 160.When a break 110c in the coaxial loop 110 exists, thevideo signal received at the second end l10b of thecoaxial loop 110 is disrupted. Synchronization signalsfrom the synchronization inserter 121 are received onlyby the cameras 111-112 before the break 110c in theWO 98109441101520253035CA 02264396 1999-02-25PCT /U S97/ 14907-4-The cameras 113-114 of the break 110cin the coaxial loop 110 will not be able to synchronizeto thesynchronization signal from the synchronization insertercoaxial loop 110.system because they do not receive the121. Also, control codes from the code inserter 131 arereceived only by the cameras 111-112 before the break 110cin the coaxial loop 110. The cameras 113-114 will notsense when the respective camera is to build or insertvideo signals onto the coaxial loop 110 because they donot receive the control codes from the control codeinserter 131. Furthermore, although the cameras 111-112before the break 110c in the coaxial loop 110 receive thesynchronization signals and control codes from thesynchronization inserter 121 and the code inserter 131,respectively, any video built or inserted on the coaxialloop 110 by those cameras is not received at the secondend 110b of the coaxial loop 110 by the first input 160aof the multiplexer 160 due to the break 110C in thecoaxial loop 110. AThere are several ways to detect a break in thcoaxial loop 110. In one embodiment, the microcontroller140 determines if a break exists in the coaxial loop 110by using the video level detect 180 to count the numberof cameras 111-114 that are not responding to theircorresponding control data codes inserted on the first end110a of the coaxial loop 110 by the code inserter 131.If none of the cameras 111-114 are responding, then it isassumed that the coaxial loop 110 is broken. In anotherembodiment, the microcontroller 140 determines if a breakexists in the coaxial loop 110 by using the sync detect170 to verify the absence of the synchronization signalinserted onto the first end 110a of the coaxial loop 110by the sync insert 121, at the second end 110b of thecoaxial loop 110. If the coaxial loop 110 is broken, asin FIG. 2, then no synchronization signal is present atthe second end 110b of the coaxial loop 110 for the syncdetect 170 to detect.W0 98/09441101520253035CA 02264396 1999-02-25PCT /U S97/ 14907-5-If it is determined that the coaxial loop 110 isbroken, as in FIG. 2, the synchronization signals andcontrol codes are inserted onto both ends 110a and 110bof the coaxial loop using the sync inserter 121 and theduplicate sync inserter 122, and the code inserter 131 andthe duplicate code inserter 132. The microcontroller 140uses the video level detect 180 to check each end 110a or110b of the coaxial loop 110 for the presence of a videosignal when a camera code for a particular camera iscommanded. The microcontroller 140 keeps track of whichend 110a and 11Gb of the camera loop 110 that video isdetected in response to a particular camera code for aparticular camera. After a configuration period of time,the microcontroller 140, through the timing generator andinterface 150, then selects the appropriate end 110a andllob of the coaxial loop 110 for each of the cameras 111-114 using the multiplexer 160 to receive the videos fromthe corresponding camera, and sends the video from themultiplexer 160 to the video processor 190 for processinginto an output.Video received in a broken loop preferably has aphased-shift correction to correct the phase shift due toreceiving the video on the same end 110a and 110b of thecoaxial loop 110 that the synchronization signal isinserted. The phase error can be corrected using themethod described in the coâpending application filedconcurrently herewith as Attorney Docket No. 27761-00054entitled âPHASE COMPENSATION FOR VIDEO CAMERAS", assignedto the assignee of the present invention, which is herebyincorporated in its entirety herein by reference thereto.The amount of phase compensation will be different foreach camera and will be greater for the furthest camerafrom the loop multiplexer 160, i.e., the cameras closestto the break in the loop 110.After the coaxial loop 110 is broken, the coaxialcable is no longer properly terminated with a terminationresistor. To prevent the termination of the camerasW0 98/0944!101520253035CA 02264396 1999-02-25PCT/U S97/ 14907-5-closest to the break 110c in the coaxial loop 110 frombeing a manual job, a method of automatic termination mustbe used. In the automatic termination, each camera 111-114 must have the ability to receive a "terminate" commandand terminate its input with a termination resistor inresponse thereto. In one embodiment, the cameras 111-114receive the âtermination? command as serial data generatedby the microcontroller 140 through the timing generator150 and inserted by the code insert 121, 122. In thisembodiment, the camera receives the âterminationâ 21command in the vertical blanking interval of the video inthe same manner as the phase up/phase down/phase neutralsignal is received by the camera inâ the coâpendingentitled "PHASE COMPENSATION FOR VIDEOCAMERASQ previously referenced above and incorporated inapplicationits entirety by reference thereto. However, to send atermination command to the proper camera 111-114, themicrocontroller 140 must know which one of the cameras111-114 are closest to the break 110c. In oneembodiment, the microcontroller 140 is preâprogrammed toknow the order of the cameras 111-114 from the first end110a of the coaxial loop 110 to the second end 110b. Byknowing which cameras 111-114 are active on which ends110a and 110b of the coaxial loop 110, the microcontroller140 can send the appropriate terminate commands to thecameras closest to the break 110c. However, this methodrequires that the cameras be installed in a certain order.In another embodiment, the microcontroller 140 keeps trackof which cameras 111-114 require the most phase correctionby the video processor 190. The cameras that are closestto the break 110cthe mostmicrocontroller 140 would send termination signals to thein the coaxial loop 110 will requirephase compensation. Therefore, thecameras 111-114 that require the most phase compensationby the video processor 190.Although a preferred embodiment of the method andapparatus of the present invention has been illustratedCA 02264396 1999-02-25W0 98/09441 PCT/US97/14907-7-in the accompanying Drawings and described in theforegoing Detailed Description, it will be understood thatthe invention is not limited to the embodiment disclosed,but is capable of numerous rearrangements, modifications5 and substitutions without departing from the spirit of theinvention as set forth and defined by the followingclaims.
Claims (2)
1. A video signal routing system for video signals comprising:
a video signal carrying line arranged in a loop beginning and ending at a signal multiplexer;
a plurality of video cameras electrically connected to said line at points spaced therealong;
a video output line connected to receive video signals from said cameras through said multiplexer for display;
a synchronization signal insertion device in said video signal carrying line adjacent the beginning of its loop between said multiplexer and said cameras;
a code signal insertion device in said video signal carrying line adjacent the beginning of its loop between said multiplexer and said cameras;
a duplicate synchronization signal insertion device in said video signal carrying line adjacent the end of its loop between said multiplexer and said cameras;
a duplicate code signal insertion device in said video signal carrying line adjacent the end of its loop between said multiplexer and said cameras;
a timing generator and interface responsive to control signals derived from said video output line for controlling both of said synchronization signal insertion devices and both of said code signal insertion devices;
and a microcontroller for controlling said timing generator and interface.
a video signal carrying line arranged in a loop beginning and ending at a signal multiplexer;
a plurality of video cameras electrically connected to said line at points spaced therealong;
a video output line connected to receive video signals from said cameras through said multiplexer for display;
a synchronization signal insertion device in said video signal carrying line adjacent the beginning of its loop between said multiplexer and said cameras;
a code signal insertion device in said video signal carrying line adjacent the beginning of its loop between said multiplexer and said cameras;
a duplicate synchronization signal insertion device in said video signal carrying line adjacent the end of its loop between said multiplexer and said cameras;
a duplicate code signal insertion device in said video signal carrying line adjacent the end of its loop between said multiplexer and said cameras;
a timing generator and interface responsive to control signals derived from said video output line for controlling both of said synchronization signal insertion devices and both of said code signal insertion devices;
and a microcontroller for controlling said timing generator and interface.
2. A method comprising the steps of:
determining that a break has occurred in a cable loop having a first end, a second end, and at least one camera connected to said cable loop between said first end and said second end;
determining whether said camera is connected to said first end or said second end of said cable loop after the break has occurred to said cable loop;
inserting a synchronization signal for said camera onto the end of said cable loop that said camera is connected to after the break has occurred to said cable loop;
selecting the end of said cable loop that said at least one camera is connected to after the break has occurred to said cable loop, for receiving video signals inserted onto said cable loop by said at least one camera.
determining that a break has occurred in a cable loop having a first end, a second end, and at least one camera connected to said cable loop between said first end and said second end;
determining whether said camera is connected to said first end or said second end of said cable loop after the break has occurred to said cable loop;
inserting a synchronization signal for said camera onto the end of said cable loop that said camera is connected to after the break has occurred to said cable loop;
selecting the end of said cable loop that said at least one camera is connected to after the break has occurred to said cable loop, for receiving video signals inserted onto said cable loop by said at least one camera.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/702,912 | 1996-08-26 | ||
US08/702,912 US5825411A (en) | 1996-08-26 | 1996-08-26 | Video signal routing system |
PCT/US1997/014907 WO1998009441A1 (en) | 1996-08-26 | 1997-08-25 | Video signal routing system |
Publications (1)
Publication Number | Publication Date |
---|---|
CA2264396A1 true CA2264396A1 (en) | 1998-03-05 |
Family
ID=24823121
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002264396A Abandoned CA2264396A1 (en) | 1996-08-26 | 1997-08-25 | Video signal routing system |
Country Status (8)
Country | Link |
---|---|
US (1) | US5825411A (en) |
EP (1) | EP0920779A4 (en) |
JP (1) | JP2001501048A (en) |
KR (1) | KR20000035848A (en) |
AU (1) | AU4086197A (en) |
CA (1) | CA2264396A1 (en) |
TW (1) | TW361047B (en) |
WO (1) | WO1998009441A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3787404B2 (en) * | 1997-02-24 | 2006-06-21 | キヤノン株式会社 | Camera control system and control method thereof |
US6937270B1 (en) | 1999-05-03 | 2005-08-30 | Omnivision Technologies, Inc. | Analog video monitoring system using a plurality of phase locked CMOS image sensors |
US20020162884A1 (en) * | 2001-05-07 | 2002-11-07 | Speas Gary W. | Low-power smart-card module |
US20030101458A1 (en) * | 2001-11-25 | 2003-05-29 | Jacobson Stephen Robert | Audio/video distribution system |
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JPH01129686A (en) * | 1987-11-16 | 1989-05-22 | Erubetsukusu Video Kk | Closed circuit television device |
JP2542870B2 (en) * | 1987-11-16 | 1996-10-09 | エルベックスビデオ 株式会社 | Television camera and closed circuit television apparatus using the same |
JPH01218181A (en) * | 1988-02-25 | 1989-08-31 | Erubetsukusu Video Kk | Closed circuit television equipment |
JPH01220993A (en) * | 1988-02-29 | 1989-09-04 | Erubetsukusu Video Kk | Closed circuit television equipment |
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-
1996
- 1996-08-26 US US08/702,912 patent/US5825411A/en not_active Expired - Lifetime
-
1997
- 1997-08-25 EP EP97938564A patent/EP0920779A4/en not_active Withdrawn
- 1997-08-25 CA CA002264396A patent/CA2264396A1/en not_active Abandoned
- 1997-08-25 KR KR1019997001538A patent/KR20000035848A/en not_active Application Discontinuation
- 1997-08-25 WO PCT/US1997/014907 patent/WO1998009441A1/en not_active Application Discontinuation
- 1997-08-25 JP JP10511781A patent/JP2001501048A/en active Pending
- 1997-08-25 AU AU40861/97A patent/AU4086197A/en not_active Abandoned
- 1997-08-26 TW TW086112264A patent/TW361047B/en active
Also Published As
Publication number | Publication date |
---|---|
WO1998009441A1 (en) | 1998-03-05 |
JP2001501048A (en) | 2001-01-23 |
TW361047B (en) | 1999-06-11 |
US5825411A (en) | 1998-10-20 |
AU4086197A (en) | 1998-03-19 |
KR20000035848A (en) | 2000-06-26 |
EP0920779A4 (en) | 2000-07-12 |
EP0920779A1 (en) | 1999-06-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FZDE | Discontinued | ||
FZDE | Discontinued |
Effective date: 20020826 |