CA2293060A1 - Process for producing epitactic-silicon germanium layers - Google Patents
Process for producing epitactic-silicon germanium layers Download PDFInfo
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- CA2293060A1 CA2293060A1 CA002293060A CA2293060A CA2293060A1 CA 2293060 A1 CA2293060 A1 CA 2293060A1 CA 002293060 A CA002293060 A CA 002293060A CA 2293060 A CA2293060 A CA 2293060A CA 2293060 A1 CA2293060 A1 CA 2293060A1
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
Abstract
A method for producing relaxed epitaxy layers on a semiconductor substrate by an epitaxy process, particularly molecular beam epitaxy, with a hydrogen source, wherein the following steps occur during an in situ process sequence: a hydrogen-containing intermediate layer is deposited on the substrate surface or diffused into the substrate near the surface; a strained epitaxy layer is grown on this intermediate layer; and the epitaxial layer subsequently is relaxed by a temperature treatment. A preferred layer sequence formed according to the above method includes a substrate of silicon with a hydrogen-containing intermediate layer that is deposited thereon or diffused into the substrate surface; a relaxed Si1-x Ge x epitaxial layer with a germanium concentration of x = 0-1 to 0.3 as a first buffer layer; a hydrogen-containing intermediate layer deposited on or diffused into an outer surface of the first buffer layer; a Si1-x Ge x relaxed epitaxy layer with a germanium concentration of x = 0.3 to 0.5 as second buffer layer; and, a Si1-x Ge x component structure. Additional relaxed Si1-x Ge x epitaxy layers with increasing germanium concentrations up to a maximum x = 1 may be disposed between the second buffer layer and the component structure layer.
Description
RCV BY : 900-55 METCALFE _, ~ : 1-~ -.? 1-9g : 4 :43PM : '?0'.2 9E52 8300 ; #
Priority is claimed herein with respect to Application No. 19$ 59 4?9.1 filed in tl,e German patent Office on December 22, 1998, the disclosmc of wlvch is incorporated herein by reference.
B.ACKGROCJN15 OF THE II~TVENTION
The present invention relates to a method for producing lattice-adapted or relaxed silicon germanium layers on a semiconductor substrate by an epitaxy process, particularly the molecular beam epitaxy, with a hydrogen source. The present invention additionally relates to a layer scquen.ce produced according to the method of the invention.
Many high-freduency compoilents that are based on the SiGeiSi rnatcrial system require a substrate, for which the lattice constant can be adapted to be betvvcen that of pure silicon and that of pure germtuuuru. The lattice misfit of this material system is 2.4 % for pure geranium, relative to the Si.. If a mixed crystal layer with the composition Sil.xGeK (wherein x indicates the share of germaniuxzx) is deposited epitaxially and mono-crystalline on a silicon substrate, an elastic strain initially occurs in the growing Sil.xGex layer (see Figure 1 a). After the so-called critical layer thickness has been exceeded, this elastic strain is reduced through the forrs~ation of misfit dislocations, preferably near the 2.0 boundary layer (see Figure lb). The critical layer thickness depends on the germanium concentration x and the growth temperature. The misfit dislocations, which occur parallel tv the bomdary layer, are accvrnpmied by a high number of dislocations, found within the Si,-XGex buffer layer extending from the boundary layer SiGelSi (interface) to RCV SY : 900-55 'NETCALFE -' 1 1. 99 ., 4 : 43P!41 : 202 96'.:2 8:30u-~ : # a the surface of the epitaxial layer (J;igure ?). The thread-type dislocations, wi~ich in the Figlwe 2 extend to llic surface and are referred to in scientific usage as "threadii~.g"
dislocations, interfere with the function of active component layers and should therefore be suppressed if possible.
Such high-quality mono-crystalline, lattice-adapted Site layers are realised as follows in the form of synthetic substrates on a standard silicon substrate by molecular beam epitaxy or by means of precipitation from a reactive gas phase in a chemical vapor deposition method (CVD method), depending on the layer thickness:
a) With thick buffers in the layer tluckness range of more than 1 psn, the genxt.aniurn content increases continu.ou.sly or in stages during the growth, wherein a germanium content increase of, for example, 10°to per p,nz Site layer thickness is used as a basis. As a rule, the growth terrtperature is reduced to suppress the three-dirnensianal growth with increasiirg genuanium.
With this solution, the lattice adaptation between the silicon substrate and the 1~ growing Site layer occurs through strain-driven adaptation dislocations in the growing SiGc layer durxu.g the giowth period (F. Schaffler, Semicond. Sci. Technol.
12_ 1515 (1997) and T. I~ackbarih, H. Kibbcl, M. Glueck, G. Haeck, H.-J. Herzog, Thin Solid Fihn.s, 321 (1998), ? 36-140).
The disadvantage of this method is that the fina.1 germaniuno. concentration rcquir~i for the Site layertllat functions as a buffer layer for electronic components can be achieved only with a particularly high Iayer thickness. As a result of the layer thiclatess, height differences result on a common wafer, e.g., with silicon components, RCV BY : 900-55 V1ETCALFE, , : 1 '?-21-99 :. 4 : 43F'A1 : 20~ 962 8300- : # 6 which are irreconcilable with modern integration technology or at least cause difficulties during the up~integration.
Furthermore, the surface topography of these thick Site buffer layers, which are grown at high temperatures, akeady has disadvantages for the sub5eqt~ently applied stnzetures with thin indivi.dua.l films since the faults in the surface stnzcturc can hai.~e a dimension that is vertically comparable to the active component layers.
b) ror thin buffer layers in the layer tlaiclrness range of less than 1 p,m, a strained non-lattice adapted Site buffer layer verith constant ox oven graded germanium content is deposited epitaxially. This layer is subsequently implanted with b.ydrogen l ~ atoms and is relaxed through a subsequent tempering process with protective gas. The hydrogen dose and energy are selected such that a maximum hydrogen concentration is still located inside the silicon substrate, but relatively close to the boundary layer to the Site buffer layer. The subsequent lenipering process takes place at temperatures in the range of 800° C and leads to a lattice adaptation through adaptation dislocations, which 1 ~ extend primarily in the thin silicon layer between the boundary layer and llae maximum hydrogen concentration (S. Ivlantl, B. Holl~ndcr, R. Liedke: 5. Mesters, H.-J.
tlemog, H.
Kibbel, T _ Hackbarlh, "Thin Solid FiIms," presently in print, published by EiVIRS, Strassburg, 199$).
This solution has disadvantages because it reduires an implantation with relatively ZO high energies that normally occurs outside of the epifiaxy arrangerr~ent -ex situ -in connection with a subsequent tempering process for rela_~cation. The actual component sirucvu-e can be allcwed to grow only alter that on the relaxed Site layer.
The wafer RC.V BY :.900-55 h1ETCALFE -, : 12,-21-~J9 : 4 : 44P~1 : ':02 962 8:300-~ : #
tz-aos.fer that follows the 16' epitaxy stage for implantation and tempering, which implantation and tannpezing takes place outside of the epitaxy arrangement, makes it more difficult to continue the subsequent epitaxy because it requires 3 new pre-preparation of the wafer. Fuitbennare, the impl.ai,tation of hydrogen involves the danger of crystal damage on the surface or in the volume. This damage cannot be healed by th.e relaxation of the Site buffer layer through a thermal treatment because the implanted hydrogen in the process is also thinned through diffusion in the volume and loses its relaxation-sz~pporting property.
If the necessary final germanium concentration additionally cannot be achieved in a sequence of steps involving epitaxy, hI-implantation and tennpering, the aforementioned procedure would have to be carried out in several stages. Owing to the fact that a multiple pre-preparation is necessary, this would hurt the crystal quality.
Furthermore, considerably higher temperatures are needed for relaxation, which, in combination with the hydrogen that is present, can lead to a higher diffusion in already existing component structures. The required implantation arrangement is also very expensive, owing to the complexity of such atxangem.ents.
In addition to the molecular beam epitaxy, a precipitation of epitaxial layers from a chemically reactive gas (CV'17 method) is Standard and is widely used because of its economic advantages. However, the precipitation of layers by beans of CVD
generally doc;s not provide the vax~ability in the process control, ~xrhich would be necessary in the limit regions of kinetically controlled surface reactions in order to achieve an especially _-RCV SY:900-55 V1ETCAC.FE ~1'~~Z1 99 : 4:q~4F'!bi-._ ~.>02 9u_' 830~)~ :# 8 good layer quality. For the most part, This method necessitates operatinb at an undesirable and much higher temperature range.
A xnethad for cleaning the surface of a semiconductor material bar using hydrogen-contairxing plasnra is known .from the references EP 0 746 011 A.~
and ~P 0 493 27S Al.. With this method, a natural oxidation layer on a silicon substrate is rerzroved prior to a depositing process. The silicon surface cleaned in this way is then covered v~~ith an essentially mono-atornie liydrogez~ coatW g. Normally, the temperatures for the cleaning process as well as the subsequent layer deposit are u~ tk~e range of appio:~imately $00 °C, sometimes even in the range of 1000 °C and above. As a result of such high temperatures and the kinetic reaction of the gaseous phase with the substrate surface, a more or less closed hydrogen surface is always replaced in a chemical reaction w ith the layer-forn~ing species during floe layer-depositing stage. The growth then contilrues with the newly forming layer surface.
I-ivwever; given such growth conditions, it appeat~s tv be nearly impossible with respect to process technology to purposely introduce hydrogen to a very limited region of a layer surface.
Therefore, it is tkle obj ect of the present invention to provide a layer sequence, as well as a noatllod of producing this layer sequence, wlaich makes it possibl a to produce thiy lattice-adapted semico>c.ductor layers with low dislocatioxa density on the surface.
SUMMARY Or TIDE; ZNVEI~~T'ION
According to a fast aspect of the invention, there is achieved by a method for producing relaxed epitaxy layers on a semiconductor su~bstratc by an epitaxy process, in RCV BY : 900-55 _!~tETCALFE , .. ~ 1~' '~ 1-99 : 4 : 4~ PJ1 : ~?02 9E~2 83f~0~
: # 9 particular the molecular beam epitaxy, in connection with, a hydrogen source and an in situ process sequence. For this, a hydrogen~containing intercnediace layer either is deposited on the substrate siufacc or a diffusion layer is diffused on or near the substrate surface. A strained epitaxy layer their is grown on the iracern~ediate layer and is subsequently rela~ced with the aid of a tempezature treatment, at a comparably low temperah~rc.
One particular advantagE ofthe invention i.s that the production process according to the invention offers the option of.realizing the complete vertical layer structure in situ, without internzpting the vacuum, thereby ensuring a far-reaching suppression of 14 threading dislocations extending to the surface. A multi-stage sequence of relaxed layers is even possible without problems and without atmospheric transport.
Another special advantage ca,a be .found in the low thermal budget for the tempering;. If applicable, it is even possible to partially position the lattice-adapted Site buffer layers with silicon technology during the processing of component structures that already exist on the substrate- Such compatible process conditions, which arc above all caused by the low temperature budget, do not have negative consequences for the structures already existing on the substrate.
The invention is explained below in further detail with the aid of advantageous exemplary embodiments and by reFerning to the schematic drawings in the Figures.
BRIEF DESC1~TIO1V OF THE ARAWINGS
Fig. la schematically shows an atomic lattice wiili an c~pitaxially precipitated Si1_xGeX layer on mono-crystalline silicon witla elastic strain according to the prior azt;
RCV BY:900.-55 METCALFE -, :12-21-99 : 4:45Pb1 : 20'? 902 8300- - :#10 Fig. lb schematically shows an atomic lattice for an epita.~cially precipitated Sil_,~Ge,~ 'layer on mono-crystalline silicon, with the formation of misfit dislocations near the boundary surface with relaxation of strain according to the prior art;
Fig. 2 is a schematic representation of the formation and course of threading dislocations and misfit dislocations in the caystalline volume according to the prior art;
Fig. 3a shows the deposit. ofhydrogen in the substrate neax the surface;
Fig. 3b shows the deposit of hydrogen through reactive, epitaxial layer precipitation on the substrate surface;
Fig. 3C shows the deposit of hydmge~a on the substrate surface;
Fig. ~a-4g shows a layer sequence, consisting of several soqu.entially precipitated, relaxed epitaxy layers, as well as an additional coating Layer accaxding to the invention;
Fig. 5 shows the concentration progression for inward diffused hydrogen with a maximum value at the substrate surface.
Fig. b shows the Rocking curve far layer sequences, which were processed ac different temperat~~res; measuring of th.e strain reduction through a change in the lattice constant of the epitaxy layer.
DhTAILED DES~RIPTI~~'V OF PREFEREtED EMBODIMENT
As indicated above the initial step ila th.e method is to fortr~ a hydrogen-containing intermediate layer on the outer surface of the substrate on which the epitaxy layers are to be formed. The intermediate gayer can be produced in three different ways.
1. As shown in Fig. 3a, the diffusion layer is diffused into the substrate surface through thermally andlor plasma-supported inward diffusion ofhydrogen, s RCV BY:90t~-55 METCALFE :12-21-99 4,.45Pb1 : 20'? 962 8300- :#11 wherein the concentration of the inward diffused hydrogen at the substrate surface reaches a maximum concentration in the order of magnitude of 1019 to 102' cm 3.
2. As shown in Fig.3b, the intermediate layer is deposited with a thickness between several atomic layers and to 10 nm, through reactive epitaxy at a temperature of a maximum of 500°C by m.i.xing in hydroge~~ in high concentrations. In the process, the hydrogen concentration in the layer reaches the order of magnitude of 10'3 to 101 crn z (or 1019 to 1 Oz' cm-3).
3. 'fhe intermediate layer is produced as a mono-atomic film on the substrate surface with a concentration in tlae ardor of magnitude of 10''' to l Olscm'2 by forming Si-H bonds, as illustrated in Fig. 3c.
'With all three variants, the temperature treatment occurs in the range of 4~0 to 650°C.
'The hydrogen source used for a molecular beam epi.taxy arrangement preferably is low-energy plasma or a 1-L~-Tz molecular beam source.
The semiconductor substrate consists of'cithcr silicon or an optional Site alloy.
The alloy can also be grown on an original silicon substrate and, during the continuEd process sequence, can talce on the function of a new substrate for the subsequent layers.
In this way, several rela-xed epitaxy layers - even 'up to a germanium content of x = 1 -can be precipitated out sequentially during the in situ process sequence. An additional buffer lay4r or a layer needed for the com~,oncnt productiowtlxez~ follows as the top epitaxy layer.
RCV BY:900-55 '19ETG~LFE :12-21-99 : 4:45P'~i : 20'2 982 81300-> :#12 iza a first exemplary cmbadiment according to the invez~ti.on, as shown in Figures 4a-4g, tlae threading dislocations extending to the layer surface are for the most part suppressed far thin buffer layers with a layer thickness below 1 um. This process involves a 2-stage pre-treatment, growltt and an intermedi to treatment, of the Site buffer layer formed on a silicon substrate 1, as an epitaxi.al :aycr. In the process, the surface of substrate l, on which epitaxial gc-owth is later to take place, is expaaed to a hydrogeil source in such. a vvay that the hydrogen is diffused near the surface into the crystal volume as shown in Fig_ 4a. The associated first diffusion profile 11 is shown in Figure 5 wish the example of tlxe concentration course for a plasnva-supported inward diffusion where the maximum v alue is near the subsixate surface. Hydrogen concentrations in the range of lOz° cm'3 can be achieved near the surface.
In a subscpuent process step (Fig. 4b), a first Sit _XGc,E buffer layer 2 with, for exarnplc, x = 0~.2 and x50 nn~ thickness is grown, e.g., at a growth temperature of, for example, 550°C and growth rates of approximately 0.3 rlnls.
Following this, the silicon substrate 1 with. the first Si, .XGex buffer layer 2 is heated in situ to 590°C, causing the SiI.XGex buffer layer 2 to rela.~c by farming primarily misfit dislocations. The dislocations are formed along a first hydrogen-containing boundary surface 111 of the substrate 1 and epitaxial layer 2_ Figure 6 provides an overview of the relaxa~aon pr4cess in tb.e shape of a Rocking curve, in dependence on the temperature ranging from 530 to 590°C. With the measuring curves shown in rigure 6, the strain reduction is detected tluough the change in the grid constant of the epitaxy layer. With this, the first Siy_xGex buffer layer 2 is now thermally stable and the deposited __ RCV BY;900-55 .11F_TCAL.FE~_._.. _.1~~-~~1'3'~ : 4:45Y~~~ : '~0'? 96'? 800-~ _ ;#13 hydrogen is no longer effective after the tempering through diffusion to the surface and thinning of the volume.
In a~a additional process step (Fig. 4d), the existing layer stack I, 1 I x, 2 is again subjected to hydrogen diffusion to pmducc in turn a second diffusion profile 21 in the layer 2, which is shown in Fig~ue 4.
Following this, a second SiI.XGex buffer layer 3 with, fox example, x - 0.4 alld 150 ntt~ thickness is grown (Fig. 4e). The relative increase in the germaz~iwn concentration as compared to the first buffer Iayer 2 in turn is 0.2. This takes place again at a growth temperature of, for example, 550°C with growth rates of approximately 0.3 nmls.
In the subsequent process step (Fig. 4~, the layer stack is again tempered in situ at 590°C to form a thermally stable second buffer layer 3. .~4s before, the deposited hydrogen forming a second hydrogen-containing boundary surface 211 is ineffective following the tempering thmugh diffusion to the surface and the dunning of the voiun,e.
Thus, the preconditions for a subsequent precipitation of a v ertical component structure 4 have been created and the structure layer 4 is precipitated immediately afterwards.
The hydrogen diffusion gracess occ«rs for all process steps in the growth chamber itself or in a preparation chamber that is directly connected to it, fhe invention has been described in detail with respect to preferred embodiments, and it will z~ow'be appar~t from the fomgoizy to those skilled in the art, that changes and modifications may be made without depaning &orn the invention in its broader aspects. The RCS- BY : 900-55 METCALFE _ , ! 12 --21-99 : 4 : 46P111 : ?(>? 9E;? ga;00-~ :
# 14 inveriti.on, therefore, as defined in the appended claims, is ini.ended to cover all such changes and modifications as to fall within the true spzrit ofthe inventarni.
Priority is claimed herein with respect to Application No. 19$ 59 4?9.1 filed in tl,e German patent Office on December 22, 1998, the disclosmc of wlvch is incorporated herein by reference.
B.ACKGROCJN15 OF THE II~TVENTION
The present invention relates to a method for producing lattice-adapted or relaxed silicon germanium layers on a semiconductor substrate by an epitaxy process, particularly the molecular beam epitaxy, with a hydrogen source. The present invention additionally relates to a layer scquen.ce produced according to the method of the invention.
Many high-freduency compoilents that are based on the SiGeiSi rnatcrial system require a substrate, for which the lattice constant can be adapted to be betvvcen that of pure silicon and that of pure germtuuuru. The lattice misfit of this material system is 2.4 % for pure geranium, relative to the Si.. If a mixed crystal layer with the composition Sil.xGeK (wherein x indicates the share of germaniuxzx) is deposited epitaxially and mono-crystalline on a silicon substrate, an elastic strain initially occurs in the growing Sil.xGex layer (see Figure 1 a). After the so-called critical layer thickness has been exceeded, this elastic strain is reduced through the forrs~ation of misfit dislocations, preferably near the 2.0 boundary layer (see Figure lb). The critical layer thickness depends on the germanium concentration x and the growth temperature. The misfit dislocations, which occur parallel tv the bomdary layer, are accvrnpmied by a high number of dislocations, found within the Si,-XGex buffer layer extending from the boundary layer SiGelSi (interface) to RCV SY : 900-55 'NETCALFE -' 1 1. 99 ., 4 : 43P!41 : 202 96'.:2 8:30u-~ : # a the surface of the epitaxial layer (J;igure ?). The thread-type dislocations, wi~ich in the Figlwe 2 extend to llic surface and are referred to in scientific usage as "threadii~.g"
dislocations, interfere with the function of active component layers and should therefore be suppressed if possible.
Such high-quality mono-crystalline, lattice-adapted Site layers are realised as follows in the form of synthetic substrates on a standard silicon substrate by molecular beam epitaxy or by means of precipitation from a reactive gas phase in a chemical vapor deposition method (CVD method), depending on the layer thickness:
a) With thick buffers in the layer tluckness range of more than 1 psn, the genxt.aniurn content increases continu.ou.sly or in stages during the growth, wherein a germanium content increase of, for example, 10°to per p,nz Site layer thickness is used as a basis. As a rule, the growth terrtperature is reduced to suppress the three-dirnensianal growth with increasiirg genuanium.
With this solution, the lattice adaptation between the silicon substrate and the 1~ growing Site layer occurs through strain-driven adaptation dislocations in the growing SiGc layer durxu.g the giowth period (F. Schaffler, Semicond. Sci. Technol.
12_ 1515 (1997) and T. I~ackbarih, H. Kibbcl, M. Glueck, G. Haeck, H.-J. Herzog, Thin Solid Fihn.s, 321 (1998), ? 36-140).
The disadvantage of this method is that the fina.1 germaniuno. concentration rcquir~i for the Site layertllat functions as a buffer layer for electronic components can be achieved only with a particularly high Iayer thickness. As a result of the layer thiclatess, height differences result on a common wafer, e.g., with silicon components, RCV BY : 900-55 V1ETCALFE, , : 1 '?-21-99 :. 4 : 43F'A1 : 20~ 962 8300- : # 6 which are irreconcilable with modern integration technology or at least cause difficulties during the up~integration.
Furthermore, the surface topography of these thick Site buffer layers, which are grown at high temperatures, akeady has disadvantages for the sub5eqt~ently applied stnzetures with thin indivi.dua.l films since the faults in the surface stnzcturc can hai.~e a dimension that is vertically comparable to the active component layers.
b) ror thin buffer layers in the layer tlaiclrness range of less than 1 p,m, a strained non-lattice adapted Site buffer layer verith constant ox oven graded germanium content is deposited epitaxially. This layer is subsequently implanted with b.ydrogen l ~ atoms and is relaxed through a subsequent tempering process with protective gas. The hydrogen dose and energy are selected such that a maximum hydrogen concentration is still located inside the silicon substrate, but relatively close to the boundary layer to the Site buffer layer. The subsequent lenipering process takes place at temperatures in the range of 800° C and leads to a lattice adaptation through adaptation dislocations, which 1 ~ extend primarily in the thin silicon layer between the boundary layer and llae maximum hydrogen concentration (S. Ivlantl, B. Holl~ndcr, R. Liedke: 5. Mesters, H.-J.
tlemog, H.
Kibbel, T _ Hackbarlh, "Thin Solid FiIms," presently in print, published by EiVIRS, Strassburg, 199$).
This solution has disadvantages because it reduires an implantation with relatively ZO high energies that normally occurs outside of the epifiaxy arrangerr~ent -ex situ -in connection with a subsequent tempering process for rela_~cation. The actual component sirucvu-e can be allcwed to grow only alter that on the relaxed Site layer.
The wafer RC.V BY :.900-55 h1ETCALFE -, : 12,-21-~J9 : 4 : 44P~1 : ':02 962 8:300-~ : #
tz-aos.fer that follows the 16' epitaxy stage for implantation and tempering, which implantation and tannpezing takes place outside of the epitaxy arrangement, makes it more difficult to continue the subsequent epitaxy because it requires 3 new pre-preparation of the wafer. Fuitbennare, the impl.ai,tation of hydrogen involves the danger of crystal damage on the surface or in the volume. This damage cannot be healed by th.e relaxation of the Site buffer layer through a thermal treatment because the implanted hydrogen in the process is also thinned through diffusion in the volume and loses its relaxation-sz~pporting property.
If the necessary final germanium concentration additionally cannot be achieved in a sequence of steps involving epitaxy, hI-implantation and tennpering, the aforementioned procedure would have to be carried out in several stages. Owing to the fact that a multiple pre-preparation is necessary, this would hurt the crystal quality.
Furthermore, considerably higher temperatures are needed for relaxation, which, in combination with the hydrogen that is present, can lead to a higher diffusion in already existing component structures. The required implantation arrangement is also very expensive, owing to the complexity of such atxangem.ents.
In addition to the molecular beam epitaxy, a precipitation of epitaxial layers from a chemically reactive gas (CV'17 method) is Standard and is widely used because of its economic advantages. However, the precipitation of layers by beans of CVD
generally doc;s not provide the vax~ability in the process control, ~xrhich would be necessary in the limit regions of kinetically controlled surface reactions in order to achieve an especially _-RCV SY:900-55 V1ETCAC.FE ~1'~~Z1 99 : 4:q~4F'!bi-._ ~.>02 9u_' 830~)~ :# 8 good layer quality. For the most part, This method necessitates operatinb at an undesirable and much higher temperature range.
A xnethad for cleaning the surface of a semiconductor material bar using hydrogen-contairxing plasnra is known .from the references EP 0 746 011 A.~
and ~P 0 493 27S Al.. With this method, a natural oxidation layer on a silicon substrate is rerzroved prior to a depositing process. The silicon surface cleaned in this way is then covered v~~ith an essentially mono-atornie liydrogez~ coatW g. Normally, the temperatures for the cleaning process as well as the subsequent layer deposit are u~ tk~e range of appio:~imately $00 °C, sometimes even in the range of 1000 °C and above. As a result of such high temperatures and the kinetic reaction of the gaseous phase with the substrate surface, a more or less closed hydrogen surface is always replaced in a chemical reaction w ith the layer-forn~ing species during floe layer-depositing stage. The growth then contilrues with the newly forming layer surface.
I-ivwever; given such growth conditions, it appeat~s tv be nearly impossible with respect to process technology to purposely introduce hydrogen to a very limited region of a layer surface.
Therefore, it is tkle obj ect of the present invention to provide a layer sequence, as well as a noatllod of producing this layer sequence, wlaich makes it possibl a to produce thiy lattice-adapted semico>c.ductor layers with low dislocatioxa density on the surface.
SUMMARY Or TIDE; ZNVEI~~T'ION
According to a fast aspect of the invention, there is achieved by a method for producing relaxed epitaxy layers on a semiconductor su~bstratc by an epitaxy process, in RCV BY : 900-55 _!~tETCALFE , .. ~ 1~' '~ 1-99 : 4 : 4~ PJ1 : ~?02 9E~2 83f~0~
: # 9 particular the molecular beam epitaxy, in connection with, a hydrogen source and an in situ process sequence. For this, a hydrogen~containing intercnediace layer either is deposited on the substrate siufacc or a diffusion layer is diffused on or near the substrate surface. A strained epitaxy layer their is grown on the iracern~ediate layer and is subsequently rela~ced with the aid of a tempezature treatment, at a comparably low temperah~rc.
One particular advantagE ofthe invention i.s that the production process according to the invention offers the option of.realizing the complete vertical layer structure in situ, without internzpting the vacuum, thereby ensuring a far-reaching suppression of 14 threading dislocations extending to the surface. A multi-stage sequence of relaxed layers is even possible without problems and without atmospheric transport.
Another special advantage ca,a be .found in the low thermal budget for the tempering;. If applicable, it is even possible to partially position the lattice-adapted Site buffer layers with silicon technology during the processing of component structures that already exist on the substrate- Such compatible process conditions, which arc above all caused by the low temperature budget, do not have negative consequences for the structures already existing on the substrate.
The invention is explained below in further detail with the aid of advantageous exemplary embodiments and by reFerning to the schematic drawings in the Figures.
BRIEF DESC1~TIO1V OF THE ARAWINGS
Fig. la schematically shows an atomic lattice wiili an c~pitaxially precipitated Si1_xGeX layer on mono-crystalline silicon witla elastic strain according to the prior azt;
RCV BY:900.-55 METCALFE -, :12-21-99 : 4:45Pb1 : 20'? 902 8300- - :#10 Fig. lb schematically shows an atomic lattice for an epita.~cially precipitated Sil_,~Ge,~ 'layer on mono-crystalline silicon, with the formation of misfit dislocations near the boundary surface with relaxation of strain according to the prior art;
Fig. 2 is a schematic representation of the formation and course of threading dislocations and misfit dislocations in the caystalline volume according to the prior art;
Fig. 3a shows the deposit. ofhydrogen in the substrate neax the surface;
Fig. 3b shows the deposit of hydrogen through reactive, epitaxial layer precipitation on the substrate surface;
Fig. 3C shows the deposit of hydmge~a on the substrate surface;
Fig. ~a-4g shows a layer sequence, consisting of several soqu.entially precipitated, relaxed epitaxy layers, as well as an additional coating Layer accaxding to the invention;
Fig. 5 shows the concentration progression for inward diffused hydrogen with a maximum value at the substrate surface.
Fig. b shows the Rocking curve far layer sequences, which were processed ac different temperat~~res; measuring of th.e strain reduction through a change in the lattice constant of the epitaxy layer.
DhTAILED DES~RIPTI~~'V OF PREFEREtED EMBODIMENT
As indicated above the initial step ila th.e method is to fortr~ a hydrogen-containing intermediate layer on the outer surface of the substrate on which the epitaxy layers are to be formed. The intermediate gayer can be produced in three different ways.
1. As shown in Fig. 3a, the diffusion layer is diffused into the substrate surface through thermally andlor plasma-supported inward diffusion ofhydrogen, s RCV BY:90t~-55 METCALFE :12-21-99 4,.45Pb1 : 20'? 962 8300- :#11 wherein the concentration of the inward diffused hydrogen at the substrate surface reaches a maximum concentration in the order of magnitude of 1019 to 102' cm 3.
2. As shown in Fig.3b, the intermediate layer is deposited with a thickness between several atomic layers and to 10 nm, through reactive epitaxy at a temperature of a maximum of 500°C by m.i.xing in hydroge~~ in high concentrations. In the process, the hydrogen concentration in the layer reaches the order of magnitude of 10'3 to 101 crn z (or 1019 to 1 Oz' cm-3).
3. 'fhe intermediate layer is produced as a mono-atomic film on the substrate surface with a concentration in tlae ardor of magnitude of 10''' to l Olscm'2 by forming Si-H bonds, as illustrated in Fig. 3c.
'With all three variants, the temperature treatment occurs in the range of 4~0 to 650°C.
'The hydrogen source used for a molecular beam epi.taxy arrangement preferably is low-energy plasma or a 1-L~-Tz molecular beam source.
The semiconductor substrate consists of'cithcr silicon or an optional Site alloy.
The alloy can also be grown on an original silicon substrate and, during the continuEd process sequence, can talce on the function of a new substrate for the subsequent layers.
In this way, several rela-xed epitaxy layers - even 'up to a germanium content of x = 1 -can be precipitated out sequentially during the in situ process sequence. An additional buffer lay4r or a layer needed for the com~,oncnt productiowtlxez~ follows as the top epitaxy layer.
RCV BY:900-55 '19ETG~LFE :12-21-99 : 4:45P'~i : 20'2 982 81300-> :#12 iza a first exemplary cmbadiment according to the invez~ti.on, as shown in Figures 4a-4g, tlae threading dislocations extending to the layer surface are for the most part suppressed far thin buffer layers with a layer thickness below 1 um. This process involves a 2-stage pre-treatment, growltt and an intermedi to treatment, of the Site buffer layer formed on a silicon substrate 1, as an epitaxi.al :aycr. In the process, the surface of substrate l, on which epitaxial gc-owth is later to take place, is expaaed to a hydrogeil source in such. a vvay that the hydrogen is diffused near the surface into the crystal volume as shown in Fig_ 4a. The associated first diffusion profile 11 is shown in Figure 5 wish the example of tlxe concentration course for a plasnva-supported inward diffusion where the maximum v alue is near the subsixate surface. Hydrogen concentrations in the range of lOz° cm'3 can be achieved near the surface.
In a subscpuent process step (Fig. 4b), a first Sit _XGc,E buffer layer 2 with, for exarnplc, x = 0~.2 and x50 nn~ thickness is grown, e.g., at a growth temperature of, for example, 550°C and growth rates of approximately 0.3 rlnls.
Following this, the silicon substrate 1 with. the first Si, .XGex buffer layer 2 is heated in situ to 590°C, causing the SiI.XGex buffer layer 2 to rela.~c by farming primarily misfit dislocations. The dislocations are formed along a first hydrogen-containing boundary surface 111 of the substrate 1 and epitaxial layer 2_ Figure 6 provides an overview of the relaxa~aon pr4cess in tb.e shape of a Rocking curve, in dependence on the temperature ranging from 530 to 590°C. With the measuring curves shown in rigure 6, the strain reduction is detected tluough the change in the grid constant of the epitaxy layer. With this, the first Siy_xGex buffer layer 2 is now thermally stable and the deposited __ RCV BY;900-55 .11F_TCAL.FE~_._.. _.1~~-~~1'3'~ : 4:45Y~~~ : '~0'? 96'? 800-~ _ ;#13 hydrogen is no longer effective after the tempering through diffusion to the surface and thinning of the volume.
In a~a additional process step (Fig. 4d), the existing layer stack I, 1 I x, 2 is again subjected to hydrogen diffusion to pmducc in turn a second diffusion profile 21 in the layer 2, which is shown in Fig~ue 4.
Following this, a second SiI.XGex buffer layer 3 with, fox example, x - 0.4 alld 150 ntt~ thickness is grown (Fig. 4e). The relative increase in the germaz~iwn concentration as compared to the first buffer Iayer 2 in turn is 0.2. This takes place again at a growth temperature of, for example, 550°C with growth rates of approximately 0.3 nmls.
In the subsequent process step (Fig. 4~, the layer stack is again tempered in situ at 590°C to form a thermally stable second buffer layer 3. .~4s before, the deposited hydrogen forming a second hydrogen-containing boundary surface 211 is ineffective following the tempering thmugh diffusion to the surface and the dunning of the voiun,e.
Thus, the preconditions for a subsequent precipitation of a v ertical component structure 4 have been created and the structure layer 4 is precipitated immediately afterwards.
The hydrogen diffusion gracess occ«rs for all process steps in the growth chamber itself or in a preparation chamber that is directly connected to it, fhe invention has been described in detail with respect to preferred embodiments, and it will z~ow'be appar~t from the fomgoizy to those skilled in the art, that changes and modifications may be made without depaning &orn the invention in its broader aspects. The RCS- BY : 900-55 METCALFE _ , ! 12 --21-99 : 4 : 46P111 : ?(>? 9E;? ga;00-~ :
# 14 inveriti.on, therefore, as defined in the appended claims, is ini.ended to cover all such changes and modifications as to fall within the true spzrit ofthe inventarni.
Claims (19)
1. A method for producing relaxed epitaxy layers on a semiconductor substrate by epitaxy process with a hydrogen source, said method comprising the following steps occur during an in situ process sequence:
(a) forming a hydrogen-containing intermediate layer at a substrate surface by one of deposition the intermediate layer on the substrate surface and diffusing the hydrogen into the substrate near the substrate surface;
(b) growing a strained epitaxy layer on the intermediate layer; and (c) subjecting the strained epitaxy layer to a temperature treatment
(a) forming a hydrogen-containing intermediate layer at a substrate surface by one of deposition the intermediate layer on the substrate surface and diffusing the hydrogen into the substrate near the substrate surface;
(b) growing a strained epitaxy layer on the intermediate layer; and (c) subjecting the strained epitaxy layer to a temperature treatment
2. The method according to claim 1, wherein the step of forming comprises diffusing a diffusion layer into the substrate surface through one of thermal and plasma-supported inward diffusion of hydrogen.
3. The method according to claim 2, wherein the concentration of inward diffused hydrogen at the substrate surface reaches a maximum concentration in the order of magnitude of 10 19 to 10 21 cm-3.
4. The method according to claim 1, wherein the step of forming comprise depositing a thin intermediate layer with high hydrogen concentration on the substrate surface through reactive epitaxy and the admixture of hydrogen.
5. The method according to claim 4, wherein the intermediate layer is deposited with a thickness between several atomic layers up to 10 nm.
6. The method according to claim 4, wherein the concentration of hydrogen in the deposited intermediate layer reaches the order of magnitude of 10 13 to 10 14 cm-2 (or 19 to 10 21 cm-3).
7. The method according to claim 1, wherein the step of forming comprises producing the intermediate layer through a mono-atomic film on the substrate surface.
8. The method according to claim 7, wherein the mono-atomic film reaches a concentrate on in the order of magnitude of 10 14 to 10 15 cm-2.
9. The method according to claim 1, wherein the temperature treatment is carried out in the range or 450 to 650°C.
10. The method according to claim 1, wherein one of a low-energy plasma and an H/H2 molecular beam source is used as the hydrogen source for the precipitation of the hydrogen-containing intermediate layer.
11. The method according claim 1, wherein the semiconductor substrate consists of one of silicon and an optional SiGe alloy.
12. The method according to claim 1, further comprising: repeating steps (a), (b) and (c) to successively precipitate several relaxed epitaxy layers, using the last formed relaxed epitaxial layer as the substrate, during the in situ process sequence.
13. The method according to claim 12, further comprising epitaxially growing a component structure layer on the outermost epitaxial layer.
14. The method according to claim 11, further comprising: repeating steps (a), (b) and (c) to successively precipitate several relaxed epitaxy layers, using the last formed relaxed epitaxial layer as the substrate, during the in situ process sequence.
15. The method according to claim 14 wherein the step of forming includes forming the expitaxially grown layers as Si1.x Ge x layers with subsequent layers having an increasing germanium concentration up to x=1.
16. The method according to claim 15 wherein x=0.1 to 0.3 of a first formed of the epitaxial layers and with x = 0.3 to 0.5 for a second formed of the epitaxial layers.
17. The method according to claim 15 further comprising epitaxially growing a component structure layer of Si1-x Ge x on an outer surface of the outermost epitaxial layer.
18. A layer sequence, produced according to the method of claim 1 comprising:
a substrate of silicon having a surface with a first hydrogen-containing intermediate layer that is deposited on the substrate surface or diffused in the substrate surface;
a relaxed Si1-x Ge x epitaxial layer with a germanium. concentration of x =
0.1 to 0.3 as a first buffer layer on the first intermediate layer, with a second hydrogen-containing intermediate layer that is deposited on an outer surface of first buffer layer or is diffused into the outer surface of the first buffer layer;
a further Si1-x Ge x relaxed epitaxy layer with a germanium concentration of x = 0.3 to 0.5 as a second buffer layer on the first intermediate layer; and a Si1-x Ge x component structure layer formed on an outer surface of said second buffer layer.
a substrate of silicon having a surface with a first hydrogen-containing intermediate layer that is deposited on the substrate surface or diffused in the substrate surface;
a relaxed Si1-x Ge x epitaxial layer with a germanium. concentration of x =
0.1 to 0.3 as a first buffer layer on the first intermediate layer, with a second hydrogen-containing intermediate layer that is deposited on an outer surface of first buffer layer or is diffused into the outer surface of the first buffer layer;
a further Si1-x Ge x relaxed epitaxy layer with a germanium concentration of x = 0.3 to 0.5 as a second buffer layer on the first intermediate layer; and a Si1-x Ge x component structure layer formed on an outer surface of said second buffer layer.
19. A layer sequence according to claim 18, further comprising additional relaxed Si1-x Ge x epitaxy layers with increasing germanium concentrations of up to a maximum of x = 1 disposed between sand outer surface of said second buffer layer and said component structure layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19859429.1 | 1998-12-22 | ||
| DE19859429A DE19859429A1 (en) | 1998-12-22 | 1998-12-22 | Process for the production of epitaxial silicon germanium layers |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2293060A1 true CA2293060A1 (en) | 2000-06-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002293060A Abandoned CA2293060A1 (en) | 1998-12-22 | 1999-12-22 | Process for producing epitactic-silicon germanium layers |
Country Status (4)
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| US (1) | US6313016B1 (en) |
| EP (1) | EP1014431A3 (en) |
| CA (1) | CA2293060A1 (en) |
| DE (1) | DE19859429A1 (en) |
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| JP3535527B2 (en) | 1997-06-24 | 2004-06-07 | マサチューセッツ インスティテュート オブ テクノロジー | Controlling threading dislocations in germanium-on-silicon using graded GeSi layer and planarization |
| US6602613B1 (en) | 2000-01-20 | 2003-08-05 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
| US6750130B1 (en) | 2000-01-20 | 2004-06-15 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
| EP1309989B1 (en) * | 2000-08-16 | 2007-01-10 | Massachusetts Institute Of Technology | Process for producing semiconductor article using graded expitaxial growth |
| US6524935B1 (en) * | 2000-09-29 | 2003-02-25 | International Business Machines Corporation | Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique |
| US20020100942A1 (en) * | 2000-12-04 | 2002-08-01 | Fitzgerald Eugene A. | CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
| US6649480B2 (en) | 2000-12-04 | 2003-11-18 | Amberwave Systems Corporation | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
| US6723661B2 (en) | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6830976B2 (en) * | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6724008B2 (en) | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6703688B1 (en) | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6855649B2 (en) * | 2001-06-12 | 2005-02-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
| US6593625B2 (en) * | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
| US6831292B2 (en) | 2001-09-21 | 2004-12-14 | Amberwave Systems Corporation | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same |
| AU2002341803A1 (en) | 2001-09-24 | 2003-04-07 | Amberwave Systems Corporation | Rf circuits including transistors having strained material layers |
| US6583000B1 (en) * | 2002-02-07 | 2003-06-24 | Sharp Laboratories Of America, Inc. | Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation |
| US7202139B2 (en) | 2002-02-07 | 2007-04-10 | Taiwan Semiconductor Manufacturing Company , Ltd. | MOSFET device with a strained channel |
| US6492216B1 (en) | 2002-02-07 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Method of forming a transistor with a strained channel |
| US6793731B2 (en) * | 2002-03-13 | 2004-09-21 | Sharp Laboratories Of America, Inc. | Method for recrystallizing an amorphized silicon germanium film overlying silicon |
| GB0212616D0 (en) * | 2002-05-31 | 2002-07-10 | Univ Warwick | Formation of lattice-tuning semiconductor substrates |
| US20030227057A1 (en) | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
| US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US6982474B2 (en) | 2002-06-25 | 2006-01-03 | Amberwave Systems Corporation | Reacted conductive gate electrodes |
| US6680496B1 (en) * | 2002-07-08 | 2004-01-20 | Amberwave Systems Corp. | Back-biasing to populate strained layer quantum wells |
| US7018910B2 (en) * | 2002-07-09 | 2006-03-28 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Transfer of a thin layer from a wafer comprising a buffer layer |
| US7375385B2 (en) | 2002-08-23 | 2008-05-20 | Amberwave Systems Corporation | Semiconductor heterostructures having reduced dislocation pile-ups |
| US6878610B1 (en) * | 2002-08-27 | 2005-04-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Relaxed silicon germanium substrate with low defect density |
| JP3851950B2 (en) * | 2002-11-19 | 2006-11-29 | 国立大学法人名古屋大学 | Method for producing silicon germanium film, substrate for epitaxial growth, multilayer structure, and heterojunction field effect transistor |
| US20040224469A1 (en) * | 2003-05-08 | 2004-11-11 | The Board Of Trustees Of The University Of Illinois | Method for forming a strained semiconductor substrate |
| US6872641B1 (en) * | 2003-09-23 | 2005-03-29 | International Business Machines Corporation | Strained silicon on relaxed sige film with uniform misfit dislocation density |
| JP3884439B2 (en) * | 2004-03-02 | 2007-02-21 | 株式会社東芝 | Semiconductor device |
| US7202145B2 (en) * | 2004-06-03 | 2007-04-10 | Taiwan Semiconductor Manufacturing Company | Strained Si formed by anneal |
| US7393733B2 (en) | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
| US20060113603A1 (en) * | 2004-12-01 | 2006-06-01 | Amberwave Systems Corporation | Hybrid semiconductor-on-insulator structures and related methods |
| RU2585900C1 (en) * | 2015-03-10 | 2016-06-10 | федеральное государственное автономное образовательное учреждение высшего образования "Нижегородский государственный университет им. Н.И. Лобачевского" | Method of growing silicon-germanium heterostructures |
| EP3387073B1 (en) * | 2015-12-10 | 2020-02-05 | Akzo Nobel Coatings International B.V. | Foamed coating composition and method for coating a substrate with such coating composition |
| GB2552444A (en) * | 2016-03-21 | 2018-01-31 | Univ Warwick | Heterostructure |
| US9922941B1 (en) | 2016-09-21 | 2018-03-20 | International Business Machines Corporation | Thin low defect relaxed silicon germanium layers on bulk silicon substrates |
| US10510871B1 (en) * | 2018-08-16 | 2019-12-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
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|---|---|---|---|---|
| DE3381302D1 (en) * | 1982-12-16 | 1990-04-12 | Fujitsu Ltd | PRODUCTION OF A SEMICONDUCTOR COMPONENT BY MEANS OF MOLECULAR RADIATION EPITAXY. |
| US4529455A (en) * | 1983-10-28 | 1985-07-16 | At&T Bell Laboratories | Method for epitaxially growing Gex Si1-x layers on Si utilizing molecular beam epitaxy |
| US5256550A (en) * | 1988-11-29 | 1993-10-26 | Hewlett-Packard Company | Fabricating a semiconductor device with strained Si1-x Gex layer |
| US5221412A (en) * | 1989-09-26 | 1993-06-22 | Toagosei Chemical Industry Co., Ltd. | Vapor-phase epitaxial growth process by a hydrogen pretreatment step followed by decomposition of disilane to form monocrystalline Si film |
| US5442205A (en) * | 1991-04-24 | 1995-08-15 | At&T Corp. | Semiconductor heterostructure devices with strained semiconductor layers |
| US5273930A (en) * | 1992-09-03 | 1993-12-28 | Motorola, Inc. | Method of forming a non-selective silicon-germanium epitaxial film |
| JP3169114B2 (en) * | 1995-05-29 | 2001-05-21 | 信越半導体株式会社 | Method for manufacturing single crystal thin film |
| US5891769A (en) * | 1997-04-07 | 1999-04-06 | Motorola, Inc. | Method for forming a semiconductor device having a heteroepitaxial layer |
| DE19802977A1 (en) * | 1998-01-27 | 1999-07-29 | Forschungszentrum Juelich Gmbh | Single crystal layer production on a non-lattice-matched single crystal substrate in microelectronic or optoelectronics component manufacture |
-
1998
- 1998-12-22 DE DE19859429A patent/DE19859429A1/en not_active Withdrawn
-
1999
- 1999-12-14 EP EP99124785A patent/EP1014431A3/en not_active Withdrawn
- 1999-12-22 US US09/469,752 patent/US6313016B1/en not_active Expired - Lifetime
- 1999-12-22 CA CA002293060A patent/CA2293060A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
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| US6313016B1 (en) | 2001-11-06 |
| EP1014431A2 (en) | 2000-06-28 |
| EP1014431A3 (en) | 2002-01-23 |
| DE19859429A1 (en) | 2000-06-29 |
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