CA2302694A1 - Chip card with memory for programs which can be reloaded as a function of the application - Google Patents
Chip card with memory for programs which can be reloaded as a function of the application Download PDFInfo
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- CA2302694A1 CA2302694A1 CA002302694A CA2302694A CA2302694A1 CA 2302694 A1 CA2302694 A1 CA 2302694A1 CA 002302694 A CA002302694 A CA 002302694A CA 2302694 A CA2302694 A CA 2302694A CA 2302694 A1 CA2302694 A1 CA 2302694A1
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- chip card
- reloadable
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- 230000015654 memory Effects 0.000 title claims abstract description 145
- 230000006870 function Effects 0.000 title claims description 16
- 230000001419 dependent effect Effects 0.000 abstract description 10
- 230000006978 adaptation Effects 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
Abstract
The invention relates to a chip card (CK) containing a program execution unit (P) and a memory (S) for at least one application dependent reloadable program (P1..Pn), whereby in each reloadable program (P1..Pn) first command statements (OP11..OP1z) with absolute address parameters (adr11..adr1z) which refer to a memory areas (S1) not occupied by the reloadable program (P1..Pn) are separated from second command statements (OP21..OP2x) with absolute address parameters (adr21..adr2x) which refer to the memory area (B1..Bn) occupied by the reloadable program (P1..Pn). One advantage of the invention is that the reloadable program can be reloaded at each random start address (SA..SAn) in the memory (S) in an application dependent manner and can be adapted to said address by the program execution unit (P). Another advantage provided by the invention is that the creation of different reloadable program versions relating to possible application conditional start addresses is no longer necessary.
Description
' CA 02302694 2000-03-07 Description Chip card with memory for programs which can be reloaded as a function of the application Chip cards frequently have a data memory which, for example, is organized in the form of a hierarchical file system and which is provided, in particular, in the form of an -EEPROM memory module. In addition, the data memory of chip cards serves, in particular, also as a memory for programs which can be reloaded as a function of the application. The reloading of programs after the chip card has been manufactured, and in particular after it has been personalized or initialized permits subsequent reloading of, in particular, program routines or files, such as for example encryption algorithms, which only the application provider of the chip card, and not the manufacturer of the chip card, knows. Programs for fault recovery or expansion routines, in particular for the operating system of the chip card, can also be reloaded subsequently. For example, the need to carry out costly reengineering of a ROM memory module with a faulty chip card operating system can thus be dispensed with because program routines for fault correction can be reloaded. For example, application and user programs can also be reloaded as a function of the application.
In the case of chip cards, there is the problem here that only command instructions with absolute address parameters are available for the programs which are as a rule created at the chip card programming code level, in particular at the machine command level.
These are command instructions with an absolute memory address system in which the access address in the memory of the chip card is specified directly and which is independent of the memory address of the corresponding command instruction itself. In the chip card, the command instructions which are as a rule used in PC systems and which have a relative memory r , GR 97 P 3634 P - la -addressing system are not at all available, or available only to a very restricted extent, with the result that in the case of programs for chip cards it is necessary to resort to accessing command instructions with an absolute memory addressing system. Such command instructions in the case of chip cards with absolute address parameters are, in particular, jump instructions, shift instructions or address instructions, for example the so-called 'MOV_DPTR', '#adrs', 'LCALL adrs' or 'LJMP adrs' command instructions.
When a - reloadable program is created with command instructions with absolute address parameters for a chip card it is therefore necessary for the memory area which is provided to be known, in particular for the start address, at which the program is to be reloaded, to be known.
If the program is to be stored at a different location in the memory, it is necessary to adapt specific command instructions with absolute address parameters. There are, in particular, two groups of command instructions with absolute address parameters available for this. A first group of these command instructions is independent of the memory area which the program in the memory occupies, in particular because the address parameters refer to memory areas which are not occupied by the reloadable program, for example to the operating system of the chip card. On the other hand, a second group of these command instructions is dependent on the memory area which the program occupies in the memory, in particular because the address parameters refer to the memory area which is occupied by the reloadable program. If the program is shifted, the address parameters of the second group of command instructions are adapted, while the address parameters of the first group of command instructions must remain unchanged.
A problem here is that command instructions with absolute address parameters of the memory area of the reloadable program in the memory can be either independent or dependent.-The- distinction for command GR 97 P 3634 P - 2a -instructions with absolute address parameters between the first and second group is not dependent on the type of the respective command instruction here. The disadvantageous possibility is known that, during the actual creation of a reloadable program for chip cards, a specific version of the corresponding reloadable program, which takes into account its respective application-dependent arrangement in the memory of the chip card, is created for any foreseeable application which can be provided.
It is pa-rticularly disadvantageous that such an adaptation of the program to its application-dependent memory area assignment in the memory of the chip card can, as a rule, not be performed in particular by the user himself because the user frequently does not know the structure of the reloadable program, or is also not supposed to know it at all. In particular, it is necessary for complicated revision of the program to be performed "manually" or with specific compilers or interpreters by the manufacturer of the reloadable program.
The object of the invention is to specify a chip card with programs which can be reloaded as a function of the application and which permits a more advantageous adaptation of the respective program to its application-dependent memory area assignment in the memory of the chip card.
The object is achieved with the chip card specified in claim 1.
An advantage of the chip card according to the invention is that during the creation of a reloadable program which has command instructions with absolute address parameters, it is only necessary to create a single program version. This basic version of the program can then be reloaded into the memory of the chip card as a function of the application, and in particular can be installed or configured by means of the chip card itself, i.e. can be adapted to the memory area which is occupied as a function of the application.
It is particularly advantageous that the memory area which is occupied by the reloadable program can, according to the invention, have at least a first memory element and a second memory element for separating at least the command instructions with absolute address parameters, which refer to the memory area occupied by the program, and the memory areas which are not occupied by the program. Thus, the necessary adaptation of the reloadable program to the memory area occupied by it, i.e. the necessary adaptation of the program in particular to its application-dependent start address, can advantageously be carried out completely by the program execution unit of the chip card. To reload a program, a user of the chip card thus advantageously requires no detailed knowledge of the program structure, with the result that, in particular, it is possible to reload even programs which relate to the security of the chip card and whose internal structures are not supposed to be known to the user.
Further advantageous embodiments of the invention are specified in the corresponding subclaims.
The invention is furthermore explained further with reference to exemplary embodiments illustrated in the figures which are described briefly below, in which:
FIG. 1 shows a schematic view of the structure of the chip card according to the invention with program execution unit and memory in which programs which can be reloaded as a function of the application are stored, said programs having first and second command instructions with absolute address parameters, and FIG. 2 shows a schematic view of the structure of a reloadable program whose first and second command instructions are separated in the first GR 97 P 3634 P - 4a -and second memory elements of the memory area which is occupied by the reloadable program.
Figure 1 illustrates, by way of example, a schematic view of the structure of the chip card CK
according to the invention with a program execution unit P and a memory S. The memory S has at least one program which can be reloaded as a function of the application, the programs which are designated by the references P1 to Pn and which are reloaded into the memory S as a function of the application being illustrated in Figure 1 by way of example . Each of the reloadable programs P1 to Pn occupies, in the reloaded state in the memory S, a specific memory area B1 to Bn, each of which has, in particular, a start address SA1 to SAn. The invention will be described below, in particular with respect to the example of the reloadable program P1.
The reloadable program P1 has first command instructions, designated by OPl, with absolute address parameters A1 which refer to memory areas which are not occupied by the reloadable program P1 to Pn. For example, for the reloadable program P1 which is illustrated in Figure 1 these are those memory areas of the memory S which are located outside the memory area B1. The absolute addressing reference of the first command instructions OP1 which are requested by means of the address parameters A1 is illustrated in Figure 1, by way of example, with the arrow Jl.
Furthermore, the reloadable program P1 has second command instructions, designated by OP2, with absolute address parameters A2 which refer to the memory area B1 which is occupied by the reloadable program Pl. The absolute addressing reference of the second command instructions OP2, which is requested by means of the address parameter A2, is illustrated in Figure 1, by way of example, with the arrow J2.
In Figure 2, a reloadable program P1 of the chip card CK according to the invention is illustrated by way of example, said program Pl occupying the memory area Bl in the memory S of the chip card CK according to the invention. The first and second command instructions, which have the respective references OP1 and OP2 in Figure 1, have,-by way of example, in Figure GR 97 P 3634 P - 5a -2 the references OP11 to OPlz and OP21 to OP2x, respectively, with the absolute address parameters adrll to adrlz and adr21 to adr2x, respectively. The memory area B1 which is occupied by the reloadable program P1 in the memory S has, according to the invention, a first memory element NLA1 and at least one second memory element LA1. Here, according to the invention, the first command instructions OP11 to OPlz whose absolute address parameters adrll to adrlz refer to memory areas which are not occupied by the reloadable program P1 are arranged in the first memory element NLA1. Addressing references of the first command instructions OP11 and OPly to memory areas which are not occupied by the reloadable program P1 are illustrated in Figure 2, by way of example, with the arrows J4 and J5, respectively. The second command instructions OP21 to OP2x whose absolute address parameters adr21 to adr2x refer to the memory area B1 which is occupied by the reloadable program P1 are, according to the invention, arranged in the second memory element LA1. Addressing references of the second command instructions OP21 and OP2x to the memory area B1 which is occupied by the reloadable program P1 are illustrated in Figure 2 by way of example with the arrows J6 and J7, respectively.
The structure of the reloadable program Pl which is illustrated in Figure 2 in schematic form is, of course, capable of being transferred to the programs P1 to Pn which are illustrated in Figure 1, can be reloaded according to the invention and occupy the memory areas B1 to Bn in the memory S. Said memory areas B1 to Bn have the first and second memory elements NLA1 to NLAn and LA1 to LAn, respectively, which are illustrated in Figure 1.
The invention will be explained in more detail with reference to the example of an embodiment illustrated in Figure 2. Here, according to the invention, the program execution unit P adapts, for example, those address parameters adr21 to adr2x of the second command instructions OP21 to OP2x which are arranged in the second memory element LA1 during the GR 97 P 3634 P - 6a -reloading of the program P1 into the memory area B1 which is occupied as a function of the application. As a result of the advantageous sorting between the first and second command instructions OP11 to OPlz and OP21 to OP2x, respectively, which occurs according to the invention, only those address parameters adr21 to adr2x of the second . command instructions OP21 to OP2x which are arranged in the second memory element LA1 have to be adapted. The adaptation of the second command instructions OP21 to OP2x is carried out, in particular, as a function of the start address SA1 of the memory area B1 which is occupied by the reloaded program P1. On the other hand, the program execution unit P does not perform any adaptation for those address parameters adrll to adrlz of the first command instructions OP11 to OPlz which are arranged in the first memory element NLAl because said address parameters adrll to adrlz refer to memory areas outside the memory area Bl.
For example, before the reloading, the program P1 is initially created in hexadecimal form OOOOh for the start address. After the reloading of the program Pl to the application-dependent start address SA1, the program execution unit P adds the value of the start address SA1 globally to all those address parameters adr21 to adr2x of the second command instructions OP21 to OP2x which are arranged in the second memory element LA1. As a result, the absolute addressing references of the address parameters adr21 to adr2x, and thus the operational capability of the program P1, are maintained.
Owing to the programming relationship, in particular semantic relationship, between command instructions in a program, it may, in particular, be necessary also to be able to access memory areas outside the occupied memory area B1 from the part of the reloadable program Pl which is stored in the second memory element LA1. In one advantageous embodiment of the invention, a programming access is carried out by second command instructions OP21 to OP2x in the second memory element LA1 to memory areas which are not occupied by the reloadable program P1, by means of the first command instructions OP11 to OPlz arranged in the first memory element NLA1.-This is explained below with reference to the example of a second command GR 97 P 3634 P - 7a -instruction OP21 which has the reference OP21. The absolute address parameters adr21 of the second command instruction OP21 which is arranged in the second memory element LA1 refer here to a first command instruction OPly which is arranged in the first memory element NLA1, as is illustrated in Figure 2, by way of example, by the arrow J6. The absolute address parameters adrly of the respective first command instruction OPly refer to the memory areas i.e. in particular to that memory address of the memory S to which the programming access is to be made, as is illustrated in Figure 2, by way of example, by the .arrow J5. In particular, a jump table T
with first command instruction OPly to OPlz is advantageously arranged in the first memory element NLA1, by means of which a programming access of second command instructions OP21 to OP2x which are arranged in the second memory element LA1 can be made to memory areas which are not occupied by the reloadable program Pl, these being, for example, memory areas of the chip card at which operating system routines are stored.
Further advantageous embodiments of the invention are described in more detail below with reference to Figures 1 and 2.
In a further advantageous embodiment of the invention, the memory S of the chip card CK has a first memory subdivision S1 to which the address parameters A1 of the first command instructions OP1 of the reloadable programs P1 to Pn refer. Furthermore, the memory S advantageously has at least one second memory subdivision S2 in which the memory area B1 to Bn occupied by the reloadable programs P1 to Pn is located. In particular, an operating system program BS
of the chip card CK is preferably stored in the first memory subdivision S1 of the memory S. The first memory subdivision S1 and the second memory subdivision S2 are, in particular, physically different memories of the chip card CK, for example a read-only memory in the form of a ROM module or a read/write memory in the form of an EEPROM module. While, for example, the operating system program BS can already be stored in the first memory subdivision S1 of the memory S during the manufacture of the chip card CK, ' CA 02302694 2000-03-07 the programs P1 to Pn can be subsequently reloaded into the second memory subdivision S2 as a function of the application. Independently of the first and second memory subdivision S1 and S2, respectively, the memory S of the chip card CK can advantageously have comprehensive memory addressing a system, for example .. from hexadecimal OOOOh to hexadecimal FFFFh.
In one advantageous embodiment of the invention, at least the magnitude of the first memory elements NLA1 to NLAn of the memory areas B1 to Bn which are occupied by the reloadable programs P1 to Pn are stored in the memory S of the chip card. The magnitude of the first memory element NLA1 to NLAn is advantageously stored in the respective, occupied memory area B1 to Bn, as is illustrated in Figure 2 by way of example for the program P1 with the reference L1. Furthermore, it is, in particular, also possible to store the magnitude of the second memory element LA1 to LAn, as is illustrated in Figure 2 by way of example for the program P1 with the reference L2.
In the case of chip cards, there is the problem here that only command instructions with absolute address parameters are available for the programs which are as a rule created at the chip card programming code level, in particular at the machine command level.
These are command instructions with an absolute memory address system in which the access address in the memory of the chip card is specified directly and which is independent of the memory address of the corresponding command instruction itself. In the chip card, the command instructions which are as a rule used in PC systems and which have a relative memory r , GR 97 P 3634 P - la -addressing system are not at all available, or available only to a very restricted extent, with the result that in the case of programs for chip cards it is necessary to resort to accessing command instructions with an absolute memory addressing system. Such command instructions in the case of chip cards with absolute address parameters are, in particular, jump instructions, shift instructions or address instructions, for example the so-called 'MOV_DPTR', '#adrs', 'LCALL adrs' or 'LJMP adrs' command instructions.
When a - reloadable program is created with command instructions with absolute address parameters for a chip card it is therefore necessary for the memory area which is provided to be known, in particular for the start address, at which the program is to be reloaded, to be known.
If the program is to be stored at a different location in the memory, it is necessary to adapt specific command instructions with absolute address parameters. There are, in particular, two groups of command instructions with absolute address parameters available for this. A first group of these command instructions is independent of the memory area which the program in the memory occupies, in particular because the address parameters refer to memory areas which are not occupied by the reloadable program, for example to the operating system of the chip card. On the other hand, a second group of these command instructions is dependent on the memory area which the program occupies in the memory, in particular because the address parameters refer to the memory area which is occupied by the reloadable program. If the program is shifted, the address parameters of the second group of command instructions are adapted, while the address parameters of the first group of command instructions must remain unchanged.
A problem here is that command instructions with absolute address parameters of the memory area of the reloadable program in the memory can be either independent or dependent.-The- distinction for command GR 97 P 3634 P - 2a -instructions with absolute address parameters between the first and second group is not dependent on the type of the respective command instruction here. The disadvantageous possibility is known that, during the actual creation of a reloadable program for chip cards, a specific version of the corresponding reloadable program, which takes into account its respective application-dependent arrangement in the memory of the chip card, is created for any foreseeable application which can be provided.
It is pa-rticularly disadvantageous that such an adaptation of the program to its application-dependent memory area assignment in the memory of the chip card can, as a rule, not be performed in particular by the user himself because the user frequently does not know the structure of the reloadable program, or is also not supposed to know it at all. In particular, it is necessary for complicated revision of the program to be performed "manually" or with specific compilers or interpreters by the manufacturer of the reloadable program.
The object of the invention is to specify a chip card with programs which can be reloaded as a function of the application and which permits a more advantageous adaptation of the respective program to its application-dependent memory area assignment in the memory of the chip card.
The object is achieved with the chip card specified in claim 1.
An advantage of the chip card according to the invention is that during the creation of a reloadable program which has command instructions with absolute address parameters, it is only necessary to create a single program version. This basic version of the program can then be reloaded into the memory of the chip card as a function of the application, and in particular can be installed or configured by means of the chip card itself, i.e. can be adapted to the memory area which is occupied as a function of the application.
It is particularly advantageous that the memory area which is occupied by the reloadable program can, according to the invention, have at least a first memory element and a second memory element for separating at least the command instructions with absolute address parameters, which refer to the memory area occupied by the program, and the memory areas which are not occupied by the program. Thus, the necessary adaptation of the reloadable program to the memory area occupied by it, i.e. the necessary adaptation of the program in particular to its application-dependent start address, can advantageously be carried out completely by the program execution unit of the chip card. To reload a program, a user of the chip card thus advantageously requires no detailed knowledge of the program structure, with the result that, in particular, it is possible to reload even programs which relate to the security of the chip card and whose internal structures are not supposed to be known to the user.
Further advantageous embodiments of the invention are specified in the corresponding subclaims.
The invention is furthermore explained further with reference to exemplary embodiments illustrated in the figures which are described briefly below, in which:
FIG. 1 shows a schematic view of the structure of the chip card according to the invention with program execution unit and memory in which programs which can be reloaded as a function of the application are stored, said programs having first and second command instructions with absolute address parameters, and FIG. 2 shows a schematic view of the structure of a reloadable program whose first and second command instructions are separated in the first GR 97 P 3634 P - 4a -and second memory elements of the memory area which is occupied by the reloadable program.
Figure 1 illustrates, by way of example, a schematic view of the structure of the chip card CK
according to the invention with a program execution unit P and a memory S. The memory S has at least one program which can be reloaded as a function of the application, the programs which are designated by the references P1 to Pn and which are reloaded into the memory S as a function of the application being illustrated in Figure 1 by way of example . Each of the reloadable programs P1 to Pn occupies, in the reloaded state in the memory S, a specific memory area B1 to Bn, each of which has, in particular, a start address SA1 to SAn. The invention will be described below, in particular with respect to the example of the reloadable program P1.
The reloadable program P1 has first command instructions, designated by OPl, with absolute address parameters A1 which refer to memory areas which are not occupied by the reloadable program P1 to Pn. For example, for the reloadable program P1 which is illustrated in Figure 1 these are those memory areas of the memory S which are located outside the memory area B1. The absolute addressing reference of the first command instructions OP1 which are requested by means of the address parameters A1 is illustrated in Figure 1, by way of example, with the arrow Jl.
Furthermore, the reloadable program P1 has second command instructions, designated by OP2, with absolute address parameters A2 which refer to the memory area B1 which is occupied by the reloadable program Pl. The absolute addressing reference of the second command instructions OP2, which is requested by means of the address parameter A2, is illustrated in Figure 1, by way of example, with the arrow J2.
In Figure 2, a reloadable program P1 of the chip card CK according to the invention is illustrated by way of example, said program Pl occupying the memory area Bl in the memory S of the chip card CK according to the invention. The first and second command instructions, which have the respective references OP1 and OP2 in Figure 1, have,-by way of example, in Figure GR 97 P 3634 P - 5a -2 the references OP11 to OPlz and OP21 to OP2x, respectively, with the absolute address parameters adrll to adrlz and adr21 to adr2x, respectively. The memory area B1 which is occupied by the reloadable program P1 in the memory S has, according to the invention, a first memory element NLA1 and at least one second memory element LA1. Here, according to the invention, the first command instructions OP11 to OPlz whose absolute address parameters adrll to adrlz refer to memory areas which are not occupied by the reloadable program P1 are arranged in the first memory element NLA1. Addressing references of the first command instructions OP11 and OPly to memory areas which are not occupied by the reloadable program P1 are illustrated in Figure 2, by way of example, with the arrows J4 and J5, respectively. The second command instructions OP21 to OP2x whose absolute address parameters adr21 to adr2x refer to the memory area B1 which is occupied by the reloadable program P1 are, according to the invention, arranged in the second memory element LA1. Addressing references of the second command instructions OP21 and OP2x to the memory area B1 which is occupied by the reloadable program P1 are illustrated in Figure 2 by way of example with the arrows J6 and J7, respectively.
The structure of the reloadable program Pl which is illustrated in Figure 2 in schematic form is, of course, capable of being transferred to the programs P1 to Pn which are illustrated in Figure 1, can be reloaded according to the invention and occupy the memory areas B1 to Bn in the memory S. Said memory areas B1 to Bn have the first and second memory elements NLA1 to NLAn and LA1 to LAn, respectively, which are illustrated in Figure 1.
The invention will be explained in more detail with reference to the example of an embodiment illustrated in Figure 2. Here, according to the invention, the program execution unit P adapts, for example, those address parameters adr21 to adr2x of the second command instructions OP21 to OP2x which are arranged in the second memory element LA1 during the GR 97 P 3634 P - 6a -reloading of the program P1 into the memory area B1 which is occupied as a function of the application. As a result of the advantageous sorting between the first and second command instructions OP11 to OPlz and OP21 to OP2x, respectively, which occurs according to the invention, only those address parameters adr21 to adr2x of the second . command instructions OP21 to OP2x which are arranged in the second memory element LA1 have to be adapted. The adaptation of the second command instructions OP21 to OP2x is carried out, in particular, as a function of the start address SA1 of the memory area B1 which is occupied by the reloaded program P1. On the other hand, the program execution unit P does not perform any adaptation for those address parameters adrll to adrlz of the first command instructions OP11 to OPlz which are arranged in the first memory element NLAl because said address parameters adrll to adrlz refer to memory areas outside the memory area Bl.
For example, before the reloading, the program P1 is initially created in hexadecimal form OOOOh for the start address. After the reloading of the program Pl to the application-dependent start address SA1, the program execution unit P adds the value of the start address SA1 globally to all those address parameters adr21 to adr2x of the second command instructions OP21 to OP2x which are arranged in the second memory element LA1. As a result, the absolute addressing references of the address parameters adr21 to adr2x, and thus the operational capability of the program P1, are maintained.
Owing to the programming relationship, in particular semantic relationship, between command instructions in a program, it may, in particular, be necessary also to be able to access memory areas outside the occupied memory area B1 from the part of the reloadable program Pl which is stored in the second memory element LA1. In one advantageous embodiment of the invention, a programming access is carried out by second command instructions OP21 to OP2x in the second memory element LA1 to memory areas which are not occupied by the reloadable program P1, by means of the first command instructions OP11 to OPlz arranged in the first memory element NLA1.-This is explained below with reference to the example of a second command GR 97 P 3634 P - 7a -instruction OP21 which has the reference OP21. The absolute address parameters adr21 of the second command instruction OP21 which is arranged in the second memory element LA1 refer here to a first command instruction OPly which is arranged in the first memory element NLA1, as is illustrated in Figure 2, by way of example, by the arrow J6. The absolute address parameters adrly of the respective first command instruction OPly refer to the memory areas i.e. in particular to that memory address of the memory S to which the programming access is to be made, as is illustrated in Figure 2, by way of example, by the .arrow J5. In particular, a jump table T
with first command instruction OPly to OPlz is advantageously arranged in the first memory element NLA1, by means of which a programming access of second command instructions OP21 to OP2x which are arranged in the second memory element LA1 can be made to memory areas which are not occupied by the reloadable program Pl, these being, for example, memory areas of the chip card at which operating system routines are stored.
Further advantageous embodiments of the invention are described in more detail below with reference to Figures 1 and 2.
In a further advantageous embodiment of the invention, the memory S of the chip card CK has a first memory subdivision S1 to which the address parameters A1 of the first command instructions OP1 of the reloadable programs P1 to Pn refer. Furthermore, the memory S advantageously has at least one second memory subdivision S2 in which the memory area B1 to Bn occupied by the reloadable programs P1 to Pn is located. In particular, an operating system program BS
of the chip card CK is preferably stored in the first memory subdivision S1 of the memory S. The first memory subdivision S1 and the second memory subdivision S2 are, in particular, physically different memories of the chip card CK, for example a read-only memory in the form of a ROM module or a read/write memory in the form of an EEPROM module. While, for example, the operating system program BS can already be stored in the first memory subdivision S1 of the memory S during the manufacture of the chip card CK, ' CA 02302694 2000-03-07 the programs P1 to Pn can be subsequently reloaded into the second memory subdivision S2 as a function of the application. Independently of the first and second memory subdivision S1 and S2, respectively, the memory S of the chip card CK can advantageously have comprehensive memory addressing a system, for example .. from hexadecimal OOOOh to hexadecimal FFFFh.
In one advantageous embodiment of the invention, at least the magnitude of the first memory elements NLA1 to NLAn of the memory areas B1 to Bn which are occupied by the reloadable programs P1 to Pn are stored in the memory S of the chip card. The magnitude of the first memory element NLA1 to NLAn is advantageously stored in the respective, occupied memory area B1 to Bn, as is illustrated in Figure 2 by way of example for the program P1 with the reference L1. Furthermore, it is, in particular, also possible to store the magnitude of the second memory element LA1 to LAn, as is illustrated in Figure 2 by way of example for the program P1 with the reference L2.
Claims (7)
1. A chip card (CK) having a program execution unit (P) and a memory (S) for at least one program (P1..Pn) which can be reloaded as a function of the application, a) in the reloaded state in the memory (S), the reloadable program (P1..Pn) occupying a specific memory area (B1..Bn) and having at least a1) first command instructions (OP1, OP11..OP1z) with absolute address parameters (A1, adr11..adr1z) which refer to memory areas (S1) which are not occupied by the reloadable program (P1..Pn), and a2) second command instructions (OP2, OP21..OP2x) with absolute address parameters (A2, adr21..adr2x) which refer to the memory area (B1..Bn) which is occupied by the reloadable program (P1..Pn), and b) the memory area (B1..Bn) which is occupied by the reloadable program (P1..Pn) in the memory (S) having a first memory element (NLA) and at least one second memory element (LA), b1) the first command instructions (OP1, OP11..OP1z) being arranged in the first memory element (NLA1..NLAn), and b2) the second command instructions (OP2, OP21..OP2x) being arranged in the second memory element (LA1..LAn) and c) the program execution unit (P) adapting those address parameters -(A2, adr21..adr2x) of the second command instructions (OP2, OP21..OP2x) -10a-which are arranged in the second memory element (LA1..LAn) when the program (P1..Pn) is reloaded to the memory area (B1..Bn) which is occupied as a function of the application.
2. The chip card (CK) as claimed in claim 1, the address parameters (A2, adr21..adr2x) of the second command instructions (OP2, OP21..OP2x) being adapted as a function of a start address (SA1..SAn) of the memory area (B1..Bn) which is occupied by the reloaded program (P1..Pn).
3. The chip card (CK) as claimed in claim 1 or 2, a programming access (J5, J6) by second command instructions (OP21) to memory areas (S1) which are not occupied by the reloadable program (P1) being effected by virtue of the fact that a) the absolute address parameters (adr21) of the second command instructions (OP21) arranged in the second memory element (LA) refer (J6) to first command instructions (OPly, T) which are arranged in the first memory element (NLA1), and b) the absolute address parameters (adrly) of the corresponding first command instructions (OP1y, T) which are arranged in the first memory element (NLA1) refer to the memory areas (S1) at which the programming access (J5, J6) is to be effected.
4. The chip card (CK) as claimed in one of the preceding claims, the memory (S) having a) a first memory subdivision (S1) to which the address parameter (A1, adr11..adr1z) of the first command instructions (OP1, OP11..OP1z) of the reloadable program (P1..Pn) refer, and b) at least one second memory subdivision (S2) in which the memory area (B1..Bn) which is occupied by the reloadable program (P1..Pn) is located.
5. The chip card (CK) as claimed in claim 4, an operating system program (BS) of the chip card (CK) being stored in the first memory subdivision (S1).
6. The chip card (CK) as claimed in one of claims 4 or 5, the first memory subdivision (S1) and the second memory subdivision (S2) being physically different memories of the chip card (CK).
7. The chip card (CK) as claimed in one of the preceding claims, at least the magnitude of the first memory element (NLA1..NLAn) of the memory area (B1..Bn) which is occupied by the reloadable program (P1..Pn) being stored (L1) in the memory (S).
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19739545A DE19739545C1 (en) | 1997-09-09 | 1997-09-09 | Chip card with application-specific program |
| DE19739545.7 | 1997-09-09 | ||
| PCT/DE1998/002530 WO1999013430A2 (en) | 1997-09-09 | 1998-08-27 | Chip card with memory for application dependent reloadable programs |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2302694A1 true CA2302694A1 (en) | 1999-03-18 |
Family
ID=7841754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002302694A Abandoned CA2302694A1 (en) | 1997-09-09 | 1998-08-27 | Chip card with memory for programs which can be reloaded as a function of the application |
Country Status (13)
| Country | Link |
|---|---|
| US (1) | US6527190B1 (en) |
| EP (1) | EP1021791B1 (en) |
| CN (1) | CN1143241C (en) |
| AT (1) | ATE217993T1 (en) |
| AU (1) | AU743055B2 (en) |
| CA (1) | CA2302694A1 (en) |
| DE (2) | DE19739545C1 (en) |
| DK (1) | DK1021791T3 (en) |
| ES (1) | ES2178272T3 (en) |
| HU (1) | HUP0003685A3 (en) |
| NO (1) | NO20001214D0 (en) |
| PT (1) | PT1021791E (en) |
| WO (1) | WO1999013430A2 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19926081A1 (en) * | 1999-06-08 | 2000-12-21 | Giesecke & Devrient Gmbh | Chip card with several application programs |
| EP1168259A3 (en) * | 2000-06-28 | 2003-12-17 | Hitachi, Ltd. | Data management method and system for IC card |
| FR2827458B1 (en) * | 2001-07-11 | 2003-12-19 | Gemplus Card Int | METHOD FOR ACCESSING A SPECIFIC SERVICE OFFERED BY A VIRTUAL OPERATOR AND CHIP CARD OF A CORRESPONDING DEVICE |
| JP4393733B2 (en) * | 2001-11-27 | 2010-01-06 | 大日本印刷株式会社 | Portable information recording medium |
| TWI241481B (en) * | 2002-06-25 | 2005-10-11 | Lite On Technology Corp | Repeated burning method of flash memory program |
| DE10234158A1 (en) | 2002-07-26 | 2004-02-05 | Giesecke & Devrient Gmbh | Set up a file system on a disk |
| US20060136652A1 (en) * | 2004-12-21 | 2006-06-22 | Via Technologies, Inc. | Electronic system with remap function and method for generating bank with remap function |
| CN105785967B (en) * | 2014-12-24 | 2018-10-16 | 北京兆易创新科技股份有限公司 | A kind of calibration method and system of MCU |
| CN106302261B (en) * | 2016-08-02 | 2019-09-17 | 青岛海信电器股份有限公司 | A kind of method and apparatus of control command forwarding |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4829169A (en) * | 1985-07-01 | 1989-05-09 | Toppan Moore Company, Inc. | IC card having state marker for record access |
| US4777355A (en) * | 1986-12-24 | 1988-10-11 | Mitsubishi Denki Kabushiki Kaisha | IC card and system for checking the functionality thereof |
| JPH01273136A (en) * | 1988-04-26 | 1989-11-01 | Oki Electric Ind Co Ltd | System for converting operating system to firmware |
| JPH02214994A (en) * | 1989-02-15 | 1990-08-27 | Hitachi Maxell Ltd | Ic card |
| FR2667417B1 (en) * | 1990-10-02 | 1992-11-27 | Gemplus Card Int | MICROPROCESSOR CARD DESIGNED TO RECEIVE MULTIPLE PROGRAMS IN PROGRAMMABLE MEMORY. |
| DE59108956D1 (en) * | 1991-09-30 | 1998-04-23 | Siemens Ag | Method for creating an executable configuration of a system program that can be loaded into a system memory area of a processor system |
| EP0907142B1 (en) * | 1992-04-02 | 2007-06-13 | Kabushiki Kaisha Toshiba | Memory card apparatus |
| EP0583006B2 (en) * | 1992-08-13 | 2006-11-29 | Matsushita Electric Industrial Co., Ltd. | IC card with hierarchical file structure |
| FR2700040B1 (en) * | 1992-12-31 | 1995-02-17 | Gemplus Card Int | Smart card with data and programs protected against aging. |
| DE19508723A1 (en) * | 1995-03-10 | 1996-09-12 | Siemens Ag | Multi-user data processing system with memory protection |
| US5829013A (en) * | 1995-12-26 | 1998-10-27 | Intel Corporation | Memory manager to allow non-volatile memory to be used to supplement main memory |
-
1997
- 1997-09-09 DE DE19739545A patent/DE19739545C1/en not_active Expired - Fee Related
-
1998
- 1998-08-27 AU AU10206/99A patent/AU743055B2/en not_active Ceased
- 1998-08-27 AT AT98952519T patent/ATE217993T1/en not_active IP Right Cessation
- 1998-08-27 CN CNB988089483A patent/CN1143241C/en not_active Expired - Fee Related
- 1998-08-27 PT PT98952519T patent/PT1021791E/en unknown
- 1998-08-27 ES ES98952519T patent/ES2178272T3/en not_active Expired - Lifetime
- 1998-08-27 WO PCT/DE1998/002530 patent/WO1999013430A2/en active IP Right Grant
- 1998-08-27 EP EP98952519A patent/EP1021791B1/en not_active Expired - Lifetime
- 1998-08-27 DK DK98952519T patent/DK1021791T3/en active
- 1998-08-27 US US09/508,287 patent/US6527190B1/en not_active Expired - Lifetime
- 1998-08-27 CA CA002302694A patent/CA2302694A1/en not_active Abandoned
- 1998-08-27 DE DE59804208T patent/DE59804208D1/en not_active Expired - Lifetime
- 1998-08-27 HU HU0003685A patent/HUP0003685A3/en unknown
-
2000
- 2000-03-08 NO NO20001214A patent/NO20001214D0/en not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| CN1269898A (en) | 2000-10-11 |
| WO1999013430A3 (en) | 1999-06-03 |
| DE19739545C1 (en) | 1999-01-07 |
| HUP0003685A3 (en) | 2003-09-29 |
| CN1143241C (en) | 2004-03-24 |
| DK1021791T3 (en) | 2002-09-16 |
| NO20001214L (en) | 2000-03-08 |
| ES2178272T3 (en) | 2002-12-16 |
| US6527190B1 (en) | 2003-03-04 |
| PT1021791E (en) | 2002-09-30 |
| ATE217993T1 (en) | 2002-06-15 |
| AU1020699A (en) | 1999-03-29 |
| NO20001214D0 (en) | 2000-03-08 |
| WO1999013430A2 (en) | 1999-03-18 |
| AU743055B2 (en) | 2002-01-17 |
| EP1021791A2 (en) | 2000-07-26 |
| EP1021791B1 (en) | 2002-05-22 |
| DE59804208D1 (en) | 2002-06-27 |
| HUP0003685A2 (en) | 2001-02-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Discontinued |