CA2393760A1 - Method and apparatus for longest match address lookup - Google Patents
Method and apparatus for longest match address lookup Download PDFInfo
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- CA2393760A1 CA2393760A1 CA 2393760 CA2393760A CA2393760A1 CA 2393760 A1 CA2393760 A1 CA 2393760A1 CA 2393760 CA2393760 CA 2393760 CA 2393760 A CA2393760 A CA 2393760A CA 2393760 A1 CA2393760 A1 CA 2393760A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/742—Route cache; Operation thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/90—Details of database functions independent of the retrieved data types
- G06F16/901—Indexing; Data structures therefor; Storage structures
- G06F16/9017—Indexing; Data structures therefor; Storage structures using directory or table look-up
- G06F16/902—Indexing; Data structures therefor; Storage structures using directory or table look-up using more than one table in sequence, i.e. systems with three or more layers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/02—Topology update or discovery
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/02—Topology update or discovery
- H04L45/04—Interdomain routing, e.g. hierarchical routing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/54—Organization of routing tables
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/745—Address table lookup; Address filtering
- H04L45/7453—Address table lookup; Address filtering using hashing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/745—Address table lookup; Address filtering
- H04L45/74591—Address table lookup; Address filtering using content-addressable memories [CAM]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99931—Database or file accessing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99931—Database or file accessing
- Y10S707/99933—Query processing, i.e. searching
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99943—Generating database or data structure, e.g. via user interface
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- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
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- Software Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Error Detection And Correction (AREA)
- Acyclic And Carbocyclic Compounds In Medicinal Compositions (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
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Abstract
We present a lookup table for providing a longest prefix match for a key provided in a search request. The search key is provided in a single search request issued to the lookup table. The lookup table performs a multi-level search for the result value based on successive portions of the key.
Claims (48)
1. A lookup table comprising:
a first level mapper comprising a plurality of first memory locations indexed by a first portion of a key provided in a search request; and a second level mapper comprising a plurality of second memory locations indexed dependent on a second portion of the key and a first subtree select stored in an indexed one of the first memory locations, the single search request issued to the lookup table resulting in a value corresponding to the key, stored in a location in one of the mappers.
a first level mapper comprising a plurality of first memory locations indexed by a first portion of a key provided in a search request; and a second level mapper comprising a plurality of second memory locations indexed dependent on a second portion of the key and a first subtree select stored in an indexed one of the first memory locations, the single search request issued to the lookup table resulting in a value corresponding to the key, stored in a location in one of the mappers.
2. The lookup table as claimed in Claim 1 wherein the second level mapper further comprises:
a subtree memory storing a subtree descriptor indexed by the first subtree select;
a subtree mapper including the second memory locations; and mapper address logic which provides a mapper index for the subtree mapper dependent on the selected subtree descriptor and the second portion of the key.
a subtree memory storing a subtree descriptor indexed by the first subtree select;
a subtree mapper including the second memory locations; and mapper address logic which provides a mapper index for the subtree mapper dependent on the selected subtree descriptor and the second portion of the key.
3. The lookup table as claimed in Claim 2 wherein the subtree descriptor further comprises:
a default value for a subtree;
a bit map, the bit map including a bit for each possible node in the subtree; and a plurality of block pointers, each block pointer storing a base address of a block of second memory locations for storing the value.
a default value for a subtree;
a bit map, the bit map including a bit for each possible node in the subtree; and a plurality of block pointers, each block pointer storing a base address of a block of second memory locations for storing the value.
4. The lookup table as claimed in Claim 3 wherein a bit in the bit map corresponding to the node set to '0' indicates the node shares a value with the previous node.
5. The lookup table as claimed in Claim 3 wherein the index for the second memory location is dependent on the number of '1's stored in the bit map prior to the bit corresponding to the node.
6. The lookup table as claimed in Claim 5 wherein the number of values stored in the mapper for the subtree is dependent on the number of '1's stored in the bit map.
7. The lookup table as claimed in Claim 3 wherein the block includes 16 second memory locations.
8. The lookup table as claimed in Claim 3 wherein the number of possible nodes is 256.
9. The lookup table as claimed in Claim 1 further comprising:
a third level mapper comprising a plurality of third memory locations indexed dependent on a third portion of the key and a second subtree select stored in one of the second memory locations.
a third level mapper comprising a plurality of third memory locations indexed dependent on a third portion of the key and a second subtree select stored in one of the second memory locations.
10. The lookup table as claimed in Claim 9 further comprising:
a fourth level mapper comprising a plurality of fourth memory locations indexed dependent on a fourth portion of the key and a third subtree select stored in one of the third memory locations.
a fourth level mapper comprising a plurality of fourth memory locations indexed dependent on a fourth portion of the key and a third subtree select stored in one of the third memory locations.
11. The lookup table as claimed in Claim 9 wherein the key is 32 bits, the first portion of the key is 16 bits, the second portion of the key is 8 bits and the third portion of the key is 8 bits.
12. The lookup table as claimed in Claim 10 wherein the key is 40 bits, the first portion of the key is 16 bits, the second portion of the key is 8 bits, the third portion of the key is 8 bits and the fourth portion of the key is 8 bits.
13. A method for providing a longest prefix match for a key comprising the steps of:
selecting a first location in a first level mapper with a first portion of the key provided in a search request; and upon detecting a first subtree select stored in the indexed first location, selecting a second location in a second level mapper dependent on a second portion of the key and the first subtree select; and forwarding the value corresponding to the key stored in a location in one of the mappers in response to a single search request for the key.
selecting a first location in a first level mapper with a first portion of the key provided in a search request; and upon detecting a first subtree select stored in the indexed first location, selecting a second location in a second level mapper dependent on a second portion of the key and the first subtree select; and forwarding the value corresponding to the key stored in a location in one of the mappers in response to a single search request for the key.
14. The method as claimed in Claim 13 wherein the step of selecting a second location further comprises the steps of:
selecting a subtree descriptor indexed by the first subtree select in a subtree memory;
determining a mapper index for a subtree mapper dependent on the selected subtree descriptor and the second portion of the key; and selecting the second memory location in the subtree mapper with the mapper index.
selecting a subtree descriptor indexed by the first subtree select in a subtree memory;
determining a mapper index for a subtree mapper dependent on the selected subtree descriptor and the second portion of the key; and selecting the second memory location in the subtree mapper with the mapper index.
15. The method as claimed in Claim 14 wherein the step of selecting a subtree descriptor comprises the steps of:
providing a default value for a subtree;
providing a bit map, the bit map including a bit for each possible node in the subtree; and providing a plurality of block pointers, each block pointer storing a base address of a block of second memory locations.
providing a default value for a subtree;
providing a bit map, the bit map including a bit for each possible node in the subtree; and providing a plurality of block pointers, each block pointer storing a base address of a block of second memory locations.
16. The method as claimed in Claim 15 wherein a bit in the bit map corresponding to the node set to '0' indicates the node shares a value with the previous node.
17. The method as claimed in Claim 15 wherein the index for the second memory location is dependent on the number of '1's stored in the bit map prior to the bit corresponding to the node.
18. The method as claimed in Claim 17 wherein the number of values stored in the mapper for the subtree is dependent on the number of '1's stored in the bit map.
19. The method as claimed in Claim 15 wherein the block includes 16 second memory locations.
20. The method as claimed in Claim 15 wherein the number of possible nodes is 256.
21. The method as claimed in Claim 13 further comprising the step of:
upon detecting a second subtree select stored in the second location, selecting a third location in a third level mapper dependent on a third portion of the key and the second subtree select.
upon detecting a second subtree select stored in the second location, selecting a third location in a third level mapper dependent on a third portion of the key and the second subtree select.
22. The method as claimed in Claim 21 further comprising the step of:
upon detecting a third subtree select stored in the third location, selecting a fourth location in a fourth level mapper dependent on a fourth portion of the key and the third subtree select
upon detecting a third subtree select stored in the third location, selecting a fourth location in a fourth level mapper dependent on a fourth portion of the key and the third subtree select
23. The method as claimed in Claim 21 wherein the key is 32 bits, the first portion of the key is 16 bits, the second portion of the key is 8 bits and the third portion of the key is 8 bits.
24. The method as claimed in Claim 22 wherein the key is 40 bits, the first portion of the key is 16 bits, the second portion of the key is 8 bits, the third portion of the key is 8 bits and the fourth portion of the key is 8 bits.
25. A lookup table comprising:
a first level mapper comprising a plurality of first memory locations indexed by a first portion of a key provided in a search request; and a second level mapper comprising a plurality of second memory locations indexed dependent on a second portion of the key and a first subtree select stored in an indexed one of the first memory locations; and means for forwarding the value corresponding to the key stored in a location in one of the mappers from the single search request issued to the lookup table.
a first level mapper comprising a plurality of first memory locations indexed by a first portion of a key provided in a search request; and a second level mapper comprising a plurality of second memory locations indexed dependent on a second portion of the key and a first subtree select stored in an indexed one of the first memory locations; and means for forwarding the value corresponding to the key stored in a location in one of the mappers from the single search request issued to the lookup table.
26. The lookup table as claimed in Claim 25 wherein the second level mapper further comprises:
a subtree memory storing a subtree descriptor indexed by the first subtree select;
a subtree mapper including the second memory locations; and means for providing a mapper index for the subtree mapper dependent on the selected subtree descriptor and the second portion of the key
a subtree memory storing a subtree descriptor indexed by the first subtree select;
a subtree mapper including the second memory locations; and means for providing a mapper index for the subtree mapper dependent on the selected subtree descriptor and the second portion of the key
27. The lookup table as claimed in Claim 26 wherein the subtree descriptor further comprises:
a default value for a subtree;
a bit map, the bit map including a bit for each possible node in the subtree; and a plurality of block pointers, each block pointer storing a base address of a block of second memory locations.
a default value for a subtree;
a bit map, the bit map including a bit for each possible node in the subtree; and a plurality of block pointers, each block pointer storing a base address of a block of second memory locations.
28. The lookup table as claimed in Claim 27 wherein a bit in the bit map corresponding to the node set to '0' indicates the node shares a value with the previous node.
29. The lookup table as claimed in Claim 27 wherein the index for the second memory location is dependent on the number of '1's stored in the bit map prior to the bit corresponding to the node.
30. The lookup table as claimed in Claim 29 wherein the number of values stored in the mapper for the subtree is dependent on the number of '1's stored in the bit map.
31. The lookup table as claimed in Claim 27 wherein the block includes 16 second memory locations.
32. The lookup table as claimed in Claim 27 wherein the number of possible nodes is 256.
33. The lookup table as claimed in Claim 25 further comprising:
a third level mapper comprising a plurality of third memory locations indexed dependent on a third portion of the key and a second subtree select stored in one of the second memory locations.
a third level mapper comprising a plurality of third memory locations indexed dependent on a third portion of the key and a second subtree select stored in one of the second memory locations.
34. The lookup table as claimed in Claim 33 further comprising:
a fourth level mapper comprising a plurality of fourth memory locations indexed dependent on a fourth portion of the key and a third subtree select stored in one of the third memory locations.
a fourth level mapper comprising a plurality of fourth memory locations indexed dependent on a fourth portion of the key and a third subtree select stored in one of the third memory locations.
35. The lookup table as claimed in Claim 33 wherein the key is 32 bits, the first portion of the key is 16 bits, the second portion of the key is 8 bits and the third portion of the key is 8 bits.
36. The lookup table as claimed in Claim 35 wherein the key is 40 bits, the first portion of the key is 16 bits, the second portion of the key is 8 bits, the third portion of the key is 8 bits and the fourth portion of the key is 8 bits.
37. A lookup table providing a longest prefix match for an IP address comprising:
a first level mapper comprising a plurality of first memory locations indexed by a first portion of an IP address provided in a search request; and a second level mapper comprising a plurality of second memory locations indexed dependent on a second portion of the IP address and a first subtree select stored in an indexed one of the first memory locations, the single search request issued to the lookup table resulting in the longest prefix match corresponding to the IP address, stored in a location in one of the mappers.
a first level mapper comprising a plurality of first memory locations indexed by a first portion of an IP address provided in a search request; and a second level mapper comprising a plurality of second memory locations indexed dependent on a second portion of the IP address and a first subtree select stored in an indexed one of the first memory locations, the single search request issued to the lookup table resulting in the longest prefix match corresponding to the IP address, stored in a location in one of the mappers.
38. The lookup table as claimed in Claim 37 wherein the second level mapper further comprises:
a subtree memory storing a subtree descriptor indexed by the first subtree select;
a subtree mapper including the second memory locations; and mapper address logic which provides a mapper index for the subtree mapper dependent on the selected subtree descriptor,and the second portion of the IP address.
a subtree memory storing a subtree descriptor indexed by the first subtree select;
a subtree mapper including the second memory locations; and mapper address logic which provides a mapper index for the subtree mapper dependent on the selected subtree descriptor,and the second portion of the IP address.
39. The lookup table as claimed in Claim 38 wherein the subtree descriptor further comprises:
a default value for a subtree;
a bit map, the bit map including a bit for each possible node in the subtree; and a plurality of block pointers, each block pointer storing a base address of a block of second memory locations for storing the longest prefix match.
a default value for a subtree;
a bit map, the bit map including a bit for each possible node in the subtree; and a plurality of block pointers, each block pointer storing a base address of a block of second memory locations for storing the longest prefix match.
40. The lookup table as claimed in Claim 39 wherein a bit in the bit map corresponding to the node set to '0' indicates the node shares the block pointer with the previous node.
41. The lookup table as claimed in Claim 39 wherein the index for the second memory location is dependent on the number of '1's stored in the bit map prior to the bit corresponding to the node.
42. The lookup table as claimed in Claim 41 wherein the number of values stored in the mapper for the subtree is dependent on the number of '1's stored in the bit map.
43. The lookup table as claimed in Claim 39 wherein the block includes 16 second memory locations.
44. The lookup table as claimed in Claim 39 wherein the number of possible nodes is 256.
45. The lookup table as claimed in Claim 37 further comprising:
a third level mapper comprising a plurality of third memory locations indexed dependent on a third portion of the IP address and a second subtree select stored in one of the second memory locations.
a third level mapper comprising a plurality of third memory locations indexed dependent on a third portion of the IP address and a second subtree select stored in one of the second memory locations.
46. The lookup table as claimed in Claim 45 further comprising:
a fourth level mapper comprising a plurality of fourth memory locations indexed dependent on a fourth portion of the IP address and a third subtree select stored in one of the third memory locations.
a fourth level mapper comprising a plurality of fourth memory locations indexed dependent on a fourth portion of the IP address and a third subtree select stored in one of the third memory locations.
47. The lookup table as claimed in Claim 45 wherein the IP address is 32 bits, the first portion of the IP address is 16 bits, the second portion of the IP
address is 8 bits and the third portion of the IP address is 8 bits.
address is 8 bits and the third portion of the IP address is 8 bits.
48. The lookup table as claimed in Claim 46 wherein the IP address is 40 bits, the first portion of the IP address is 16 bits, the second portion of the IP
address is 8 bits, the third portion of the IP address is 8 bits and the fourth portion of the IP address is 8 bits.
address is 8 bits, the third portion of the IP address is 8 bits and the fourth portion of the IP address is 8 bits.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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US17023299P | 1999-12-10 | 1999-12-10 | |
US60/170,232 | 1999-12-10 | ||
US21296600P | 2000-06-21 | 2000-06-21 | |
US60/212,966 | 2000-06-21 | ||
PCT/CA2000/001442 WO2001043370A2 (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
Publications (2)
Publication Number | Publication Date |
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CA2393760A1 true CA2393760A1 (en) | 2001-06-14 |
CA2393760C CA2393760C (en) | 2010-07-13 |
Family
ID=26865861
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Application Number | Title | Priority Date | Filing Date |
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CA 2397608 Expired - Fee Related CA2397608C (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
CA 2393760 Expired - Fee Related CA2393760C (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
CA 2393764 Abandoned CA2393764A1 (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
CA 2395151 Expired - Fee Related CA2395151C (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
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Application Number | Title | Priority Date | Filing Date |
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CA 2397608 Expired - Fee Related CA2397608C (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
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CA 2393764 Abandoned CA2393764A1 (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
CA 2395151 Expired - Fee Related CA2395151C (en) | 1999-12-10 | 2000-12-08 | Method and apparatus for longest match address lookup |
Country Status (10)
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US (5) | US6539369B2 (en) |
EP (4) | EP1250778A2 (en) |
JP (4) | JP2003516666A (en) |
KR (4) | KR20020082465A (en) |
CN (5) | CN100432991C (en) |
AU (4) | AU2133701A (en) |
CA (4) | CA2397608C (en) |
DE (4) | DE10085387T5 (en) |
GB (4) | GB2373084A (en) |
WO (4) | WO2001043345A2 (en) |
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