CA2415934A1 - Electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other - Google Patents
Electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other Download PDFInfo
- Publication number
- CA2415934A1 CA2415934A1 CA002415934A CA2415934A CA2415934A1 CA 2415934 A1 CA2415934 A1 CA 2415934A1 CA 002415934 A CA002415934 A CA 002415934A CA 2415934 A CA2415934 A CA 2415934A CA 2415934 A1 CA2415934 A1 CA 2415934A1
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- Canada
- Prior art keywords
- printed circuit
- face
- circuit board
- mid
- pairs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/114—Pad being close to via, but not surrounding the via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
Abstract
An electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other.
The system includes two connector printed circuit boards, each containing pairs of electrical connections. The connector boards axe mounted on opposite faces of a mid-plane printed circuit board, which contains pairs of overlaying via holes on each of its faces. The via holes are positioned according to one of two schemes. In the first scheme, the via holes are positioned along an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards, and the via holes are equidistant from a point on the axis that bisects the angle of misalignment of the connector boards. In the second scheme, the via holes are positioned along an axis that bisects the angle of misalignment of the connector boards, and the via holes are equidistant from each of the electrical connections. The electrical connections on each of the connector boards are connected through electrical paths. Each electrical path consists of a top electrically conductive surface mount pad connecting the electrical connection on the top connector board to a via hole on the top face of the mid-plane board, a mid-plane electrical trace through the mid-plane board connecting a via hole on the top surface of the mid-plane board to the via hole directly beneath it on the bottom face of the mid-plane board, and a bottom electrically conductive surface mount pad connecting the via hole on the bottom face of the mid-plane board to the electrical connection on the bottom connector board.
The system includes two connector printed circuit boards, each containing pairs of electrical connections. The connector boards axe mounted on opposite faces of a mid-plane printed circuit board, which contains pairs of overlaying via holes on each of its faces. The via holes are positioned according to one of two schemes. In the first scheme, the via holes are positioned along an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards, and the via holes are equidistant from a point on the axis that bisects the angle of misalignment of the connector boards. In the second scheme, the via holes are positioned along an axis that bisects the angle of misalignment of the connector boards, and the via holes are equidistant from each of the electrical connections. The electrical connections on each of the connector boards are connected through electrical paths. Each electrical path consists of a top electrically conductive surface mount pad connecting the electrical connection on the top connector board to a via hole on the top face of the mid-plane board, a mid-plane electrical trace through the mid-plane board connecting a via hole on the top surface of the mid-plane board to the via hole directly beneath it on the bottom face of the mid-plane board, and a bottom electrically conductive surface mount pad connecting the via hole on the bottom face of the mid-plane board to the electrical connection on the bottom connector board.
Description
ELECTRICAL, C~NNECTI~l~T S~'STElYI FO~I~. T'~'~ PRII~TEI~ CIRCUIT
B~AIdDS M~ill~TTED (71~ APP~SITE SIDES f3F A MID-P.LAI'1E PRII~TTED
CIRCUIT I3~ARI) AT A1~1GLES T~ EACH ~TI3ER
DAC;E~GR~Ul~Ti) tJF TIIE II~VEI9~TlON
Field of the Invention The present invention relates to electrical connections of two printed circuit boards surface mounted on opposite sides of a mid-plane printed circuit board at angles to each other. Specifically, the invention is a routing scheme providing a direct S electrical path between electrical connections.
Description of the Prior Art Modern electronic devices such as computers must be able to perform complex functions both quickly and effectively. T llus, it is essential that the internal hardware of these electrical devices is connected in an efficient manner. A
common hardware assembly technique involves two printed circuit boards, commonly referred to as daughter boards, that are connected to opposite sides of a mid-plane printed circuit board, commonly referred to as a mother board. These daughter boards are often corrected at angles to each other. For the electrical device to function as desired, the electrical components on one daughter board must be able to transmit and 1 ~ receive electrical signals to and from the electrical components on the other daughter board.
There are several devices known in the prior art that provide such an electrical connection between two daughtez~ boards. For example, Petit et al. describe in U.S.
Patent No. 4,703,394 a system for interconnecting orthogonally disposed printed circuit boards. This system involves the use of four multiway connectors. Two of the connectors are mounted on respective facing edges of the connector boards, and two of the connectors are mounted on opposite sides of the rnid-plane board. The connectors mounted on the connector boards plug into the connectors mounted on the mid-plane board.
FCI-2630/C2593 2 1?A'FEht'f The interconnection system described in the Petit et al. requires the use of bulky connectors that makes its implementation undesirable in modern electrical devices which require a compact design.
Sample et al. describe in U.S. Patent No. 5,887,158 a switching mid-plane and interconnecting system for interconnecting large numbers of signals. This system contains a mid-plane printed circuit board having a plurality of first connectors oriented in a first direction on one side of the mid-plane for making connections to the plurality of first printed-circuit boards. 'fhe mid-plane printed-circuit board also has a plurality of second connectors oriented in a second direction orthogonal to the plurality of first connectors on the other side of the mid-plane. The connectors are positioned such that connection pins on the plurality of first connectors and plurality of second connectors in regions of intersection are double-ended pins common to both. The remaining connection pins of the plurality of first connectors are single-ended cormection pins which are corrected to the single-ended connection pins of the plurality of second connectors via conductive traces on the mid-plane printed-circuit board.
The interconnection system described in the Sample et al. is subject to two important drawbacks relating to the connection of 'the single ended connection pins.
First, the electrical path connecting the single ended connection pins may vary in length. if the contacts are used fox differential signals, this presents a problem because a longer electrical path may result in signals which are out of phase.
Ad~'itionally, the electrical path connecting the single ended pins may run through the mo li.~er board diagonally rather than straight (at an angle perpendicular to the top and bottom side of the mother board). This diagonal electrical path presents a problem because it results in the entrance and exit of the electrical path into and out of the mother board to be misaligned, thereby creating the need for additional drilling i1a the mother board and further raising the complexity of the design.
Thus, there is a need for a connection system that provides a routing scheme in which the electrical paths between connections in each pair of connections are of edual length. Furthermore, there is a need for a connection system that provides a routing scheme in which the electrical path runs straight through the mother board so FCI-2630ICB5~3 3 PATENT
that the entrance and exit of the electrical path into and out of the mother board directly overlay one another, .Additionally, it is de sired that this connection system is a compact system that does not require the use of bulky connector plug-ins. A
connection system with these and other improve characteristics is desired.
;~UIVYl~fil~'~' ~F TIIE INVENTI~N
S The present invention is an electrical connection system that includes two connector printed circuit boards surface mounted on opposite sides of a mid-plane printed circuit board at angles to each othex. Each. of the connector boards contains pairs of electrical connections. An electrical path connects each electrical connection ' on the first cozmector board to a corresponding electrical connection on the second connector board. This electrical path consists of tree elements. The first element is preferably an electrically conductive surface mount pad connecting each electrical connection on the first connector board t:o a via hole on the first face of the mid-plane board. The second element is preferably a mid-plane electrical trace through two overlaying via holes on each face of the mid-plane board. This correction is straight I S tlwough the mid-plane board at an angle perpendicular to each face of the board. The third element is preferably another electrically conductive suxface mount pad connecting the via holes 011 the second face of the mid-plane board to the corresponding electrical connection on the second connector board, The length of the mid-plane electrical trace is preferably equal to the width of the mid-plane board. However, the length of the surface mount pads may vary provided that the total length of the electrical path connecting the first connections in each pair of electrical connections is equal to the total length of the electrical path connecting the second connections in the pair.
In a preferred embodiment, each via hole in each pair is fixed on an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards, Additionally, each via hole in each pair may be equidistant from a point on an axis that bisects the angle of misalignment of the connector boards. For the electrical paths connecting the first connections in each of the pairs of electrical connections, the first element will be a long surface mount pad and the third element will be a short FCI-2630/C2593 4 PA'I"lElll'TT
surface mount pad. Conversely, for the electrical paths connecting the second connections in each of the pairs of electrical connf°ctions, the fist element will be a short surface mount pad and the third element will be a long surface mount pad.
Thus, the total length of the electrical path connecting the fzrst connections in each pair of electrical connections is equal to the total length of the electrical path connecting the second connections in the pair In a another preferred enzbodiznent, each via. hole in each pair is fixed directly oz1 an axis that bisects the angle of misalignment of the connector boards. In this embodiment, all surface mount pads are equal in length. Thus, the total length of the electrical path conzaecting the first connections in each pair of electrical connections is equal to the total length of the electrical path connecting tile second connections in the pazr.
BRIEF DESCRII'TI~T~I ()F T~IIE DFtA'WII~GS
The present invention will be better understood after reading the following detailed description of the presently preferred embodiments thereof with reference to th.e appended drawings, iz~ which:
Figure 1 illustrates a diagram of a first embodiment of the electrical connection system with the via holes fixed on an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards.
Figure 2 illustrates a diagram of the first embodiment adapted to a solder on surface mount connector where the front and backside daughter boards are orthogonal to each other.
Figure 3 illustrates a diagram of the second embodiment of the electrical cozu~ection system with the via holes fixed on an axis that bisects the angle of znisaligrzment oz the connector boards.
2s Figure 4 illustrates a diagram of the second embodiment adapted to a solder on surface mount connector where the front and backside daughter boards are orthogonal to each other.
Figure ~ illustrates a top view of the top surface of a znother board with two exemplary 5x8 headers on opposite sides of the mother board.
FCI-2630/C2593 ~ P~.TEI~T
Figure 6 illustrates a top view of the bottom surface of a mother board with two exemplary 5x8 headers on opposite sides of the mother board.
Figure 7 illustrates a top view of the top surface and bottom surface of a mother board overlaid with two exemplary 5x8 headers on opposite sides of the mother board.
Figure 8 illustrates a view of the interlayer routing between unmatched pairs of connections of two exemplary 5x8 headers on opposite sides of the mother board.
~ET~ILEI~ ~E~~IaIPTI~~ ~F TIDE
PRESEhdTL'f PREFERRED EIfIB~III1VIEI~TS
A system which meets the above-mentioned objects and provides other benef cial features in accordance with the presently preferred exemplary embodiment of the invention will be described below with. reference to Figures 1-8. Those skilled in the art will readily appreciate That the description given herein. with respect to those figures is for explanatory purposes only and is not intended in any way to Iimit the scope of the invention, Throughout the description, like reference numerals will refer to like elements in the respective figures.
Figure 1 illustrates a diagram of a first embodiment of the electrical connection system with the via holes fixed on an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards. Misalignment angle A
represents the angle of misalignment of top cozmector board IOI and bottom connector board 102. Bisecting axis 103 bisects angle A. Perpendicular axis intersects bisecting axis I03 at intersection point P at an angle perpendicular to bisecting axis I 03. Top surface via holes 1 1. l a and 1 I2a are fixed along perpendicular axis 104 and are equidistant from intersection point P.
Figure 2 illustrates a diagram of the first embodiment adapted to a solder on surface mount connector where the front and backside daughter boards are oz-thogonal 2S (misalignment angle A = 90 degrees). The fzrst column of Figure 2 illustrates a top view of the top surface of the PWB. Top surface mount pads 201a and 202a connect top daughter board connections 21 I a and 212a to via holes 111 and 112. The second column of Figure 2 illustrates a top view of the bottom surface of the PWB.
Bottom surface mount pads 201b and 202b (shown by dashed lines) connect bottom daughter FCC-2630/C2593 b ~'A'T~,I~tT
board connections 2I 1 b and 212b to via holes 11 l and 112. The third column of Figure 2 illustrates a tap view of the top surface and bottom surface of the PWB
overlaid. Top first connection 21 I a is the outside connection on the top connector board, and bottom first connection 2llb is the inside connection on the bottom cormector board. Conversely, 1=op second connection 212a is the inside connection on the top connector board, and bottom second connection 212b is the outside connection on the bottom connector board. Thus, this scheme is ideal for connecting boards oriented in directions such that the electrical signals travel from outside connections to inside connections.
I 0 The electrical path from the first top board connection 21 I a to the first bottom board connection 211b includes long top surface mount pad 201a and short bottom surface mount pad 241b. The electrical path from second top board connection 202a to second bottom board connection 202b includes short top surface mount pad 202a and Iong bottom surface mount pad 202b. As can be seen, both electrical paths consist of one long surface mount pad and one short surface mount pad. Both electrical paths are, therefore, of equal length. This ensures that the electrical signals transferred between electrical connections on each of the connector boards will not be out of phase. As may also be seen, first top surface via hole l l la directly overlays first bottom surface via hole lll.b and second top surface via hole 112a directly overlays second bottom surface via hole II2b. Thus, the electrical connection between via holes is straight through the mid-plane board at an angle perpendicular to faces of the znid-plane board. This allows for a straight through drilling procedure in construction of the mid-plane board.
Figure 3 illustrates a diagram of a second embodiment of the electrical 2S Connection system with the via holes fixed on an axis that bisects the angle of misalignment of the connector bards. Misalignment angle A represents the angle of misalignment of top connector board I01 and bottom connector board I02.
Bisecting axis 103 bisects angle A. Top surface via holes 11 la and 112a are fixed along bisecting axis 103.
FCI-2630/C2~93 7 PATEIvtT
Figure 4 illustrates a diagram of a second embodiemnt adapted to a solder on surface mount connector where the front and backside daughter boards are orthogonal (misalignment angle A = 90 degrees). The first column of Figure 4 illustrates a top view of the top surface of the PWB. Top surface mount pads 201a and 202a connect top daughter board conzlections 21 la and 212a to via holes 111 and 112. The second column of Figure 4 illustrates a top view of the bottom surface of the PG;TB.
Bottom surface mount pads 201b and 202b (shown by dashed lines) connect bottom daughter board connections 211b and 212b to via holes 111 and 112. The third column of Figure 4 illustrates a top view of the top surface and bottom surface of the PWB
overlaid. In this scheme, both first connections 2:11 a,b are the outside cozirzections, and both second connections 212a,b are the inside cozmections. Thus, this scheme is ideal for connecting boards oriented in directions such that the electrical signals travel from outside connections to outside connections and inside connections to inside connections.
The electrical path. from the first top board connection 211a to the first bottom board connection 211b includes top surface mount pad 20Ia and bottom surface mount pad 201b. The electrical path from second top board connection 212a to second bottom board connection 212b includes top surface mount pad 202a and bottom surface mount pad 202b. 1z1 this scheme, the length of all surface mount pads are equal because the distance from each via hole to each electrical connector is equal.
AlI electrical paths are, therefore, of equal length.
Figures 5-8 illustrate how the first routing scheme discussed generally in Figures 1 and 2 would be specifically implemented to the connection of two exemplary Sx8 headers on opposite sides of the mother board. This illustration is for exemplary purposes only and is no way intended to limit the scope of this invention.
Figure 5 illustrates a top vie~~° of the top surface of a mother board with two exemplary 5:~8 headers on opposite sides of the mother board. Figure 6 illustrates a top view of the bottom surface of the mother board. Figure 7 illustrates a top view of the top surface and bottom surface of the mother board overlaid. There is a total of 40 pairs of connections. However. as is apparent from an examination of Figures 5-7, the routing scheme of this invention can only be applied to 33 of the 40 total pairs.
FCI-2630/C2593 ~ PATENT
Th.e pattern in this case is a combination of two 4x4 patterns for a subtotal of 32 pairs.
The 33'd pair is the one of a kind pair in the top right corner of the diagrams. The 7 remaining pairs of the top most row and the right most column must be connected using the interlayer routing scheme shown in Figure 8. While the invention has beer described and illustrated with reference to specific embodiments, those skilled in the art will recognize that modification and variations may be made without departing from the principles of the invention as described above and set forth in the following claims. For example, while the invention has been described as being used to connect orthogonal first and second printed circuit boards, the invention may be used to connect printed circuit boards at any angle of misalignment. Furthermore, first and second printed circuit boards rnay contain any size pattern of connections and is not intended to be limited to a five by eight pattern of connections. Accordingly, reference should be made to the appended claims as indicating the scope of the invention.
B~AIdDS M~ill~TTED (71~ APP~SITE SIDES f3F A MID-P.LAI'1E PRII~TTED
CIRCUIT I3~ARI) AT A1~1GLES T~ EACH ~TI3ER
DAC;E~GR~Ul~Ti) tJF TIIE II~VEI9~TlON
Field of the Invention The present invention relates to electrical connections of two printed circuit boards surface mounted on opposite sides of a mid-plane printed circuit board at angles to each other. Specifically, the invention is a routing scheme providing a direct S electrical path between electrical connections.
Description of the Prior Art Modern electronic devices such as computers must be able to perform complex functions both quickly and effectively. T llus, it is essential that the internal hardware of these electrical devices is connected in an efficient manner. A
common hardware assembly technique involves two printed circuit boards, commonly referred to as daughter boards, that are connected to opposite sides of a mid-plane printed circuit board, commonly referred to as a mother board. These daughter boards are often corrected at angles to each other. For the electrical device to function as desired, the electrical components on one daughter board must be able to transmit and 1 ~ receive electrical signals to and from the electrical components on the other daughter board.
There are several devices known in the prior art that provide such an electrical connection between two daughtez~ boards. For example, Petit et al. describe in U.S.
Patent No. 4,703,394 a system for interconnecting orthogonally disposed printed circuit boards. This system involves the use of four multiway connectors. Two of the connectors are mounted on respective facing edges of the connector boards, and two of the connectors are mounted on opposite sides of the rnid-plane board. The connectors mounted on the connector boards plug into the connectors mounted on the mid-plane board.
FCI-2630/C2593 2 1?A'FEht'f The interconnection system described in the Petit et al. requires the use of bulky connectors that makes its implementation undesirable in modern electrical devices which require a compact design.
Sample et al. describe in U.S. Patent No. 5,887,158 a switching mid-plane and interconnecting system for interconnecting large numbers of signals. This system contains a mid-plane printed circuit board having a plurality of first connectors oriented in a first direction on one side of the mid-plane for making connections to the plurality of first printed-circuit boards. 'fhe mid-plane printed-circuit board also has a plurality of second connectors oriented in a second direction orthogonal to the plurality of first connectors on the other side of the mid-plane. The connectors are positioned such that connection pins on the plurality of first connectors and plurality of second connectors in regions of intersection are double-ended pins common to both. The remaining connection pins of the plurality of first connectors are single-ended cormection pins which are corrected to the single-ended connection pins of the plurality of second connectors via conductive traces on the mid-plane printed-circuit board.
The interconnection system described in the Sample et al. is subject to two important drawbacks relating to the connection of 'the single ended connection pins.
First, the electrical path connecting the single ended connection pins may vary in length. if the contacts are used fox differential signals, this presents a problem because a longer electrical path may result in signals which are out of phase.
Ad~'itionally, the electrical path connecting the single ended pins may run through the mo li.~er board diagonally rather than straight (at an angle perpendicular to the top and bottom side of the mother board). This diagonal electrical path presents a problem because it results in the entrance and exit of the electrical path into and out of the mother board to be misaligned, thereby creating the need for additional drilling i1a the mother board and further raising the complexity of the design.
Thus, there is a need for a connection system that provides a routing scheme in which the electrical paths between connections in each pair of connections are of edual length. Furthermore, there is a need for a connection system that provides a routing scheme in which the electrical path runs straight through the mother board so FCI-2630ICB5~3 3 PATENT
that the entrance and exit of the electrical path into and out of the mother board directly overlay one another, .Additionally, it is de sired that this connection system is a compact system that does not require the use of bulky connector plug-ins. A
connection system with these and other improve characteristics is desired.
;~UIVYl~fil~'~' ~F TIIE INVENTI~N
S The present invention is an electrical connection system that includes two connector printed circuit boards surface mounted on opposite sides of a mid-plane printed circuit board at angles to each othex. Each. of the connector boards contains pairs of electrical connections. An electrical path connects each electrical connection ' on the first cozmector board to a corresponding electrical connection on the second connector board. This electrical path consists of tree elements. The first element is preferably an electrically conductive surface mount pad connecting each electrical connection on the first connector board t:o a via hole on the first face of the mid-plane board. The second element is preferably a mid-plane electrical trace through two overlaying via holes on each face of the mid-plane board. This correction is straight I S tlwough the mid-plane board at an angle perpendicular to each face of the board. The third element is preferably another electrically conductive suxface mount pad connecting the via holes 011 the second face of the mid-plane board to the corresponding electrical connection on the second connector board, The length of the mid-plane electrical trace is preferably equal to the width of the mid-plane board. However, the length of the surface mount pads may vary provided that the total length of the electrical path connecting the first connections in each pair of electrical connections is equal to the total length of the electrical path connecting the second connections in the pair.
In a preferred embodiment, each via hole in each pair is fixed on an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards, Additionally, each via hole in each pair may be equidistant from a point on an axis that bisects the angle of misalignment of the connector boards. For the electrical paths connecting the first connections in each of the pairs of electrical connections, the first element will be a long surface mount pad and the third element will be a short FCI-2630/C2593 4 PA'I"lElll'TT
surface mount pad. Conversely, for the electrical paths connecting the second connections in each of the pairs of electrical connf°ctions, the fist element will be a short surface mount pad and the third element will be a long surface mount pad.
Thus, the total length of the electrical path connecting the fzrst connections in each pair of electrical connections is equal to the total length of the electrical path connecting the second connections in the pair In a another preferred enzbodiznent, each via. hole in each pair is fixed directly oz1 an axis that bisects the angle of misalignment of the connector boards. In this embodiment, all surface mount pads are equal in length. Thus, the total length of the electrical path conzaecting the first connections in each pair of electrical connections is equal to the total length of the electrical path connecting tile second connections in the pazr.
BRIEF DESCRII'TI~T~I ()F T~IIE DFtA'WII~GS
The present invention will be better understood after reading the following detailed description of the presently preferred embodiments thereof with reference to th.e appended drawings, iz~ which:
Figure 1 illustrates a diagram of a first embodiment of the electrical connection system with the via holes fixed on an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards.
Figure 2 illustrates a diagram of the first embodiment adapted to a solder on surface mount connector where the front and backside daughter boards are orthogonal to each other.
Figure 3 illustrates a diagram of the second embodiment of the electrical cozu~ection system with the via holes fixed on an axis that bisects the angle of znisaligrzment oz the connector boards.
2s Figure 4 illustrates a diagram of the second embodiment adapted to a solder on surface mount connector where the front and backside daughter boards are orthogonal to each other.
Figure ~ illustrates a top view of the top surface of a znother board with two exemplary 5x8 headers on opposite sides of the mother board.
FCI-2630/C2593 ~ P~.TEI~T
Figure 6 illustrates a top view of the bottom surface of a mother board with two exemplary 5x8 headers on opposite sides of the mother board.
Figure 7 illustrates a top view of the top surface and bottom surface of a mother board overlaid with two exemplary 5x8 headers on opposite sides of the mother board.
Figure 8 illustrates a view of the interlayer routing between unmatched pairs of connections of two exemplary 5x8 headers on opposite sides of the mother board.
~ET~ILEI~ ~E~~IaIPTI~~ ~F TIDE
PRESEhdTL'f PREFERRED EIfIB~III1VIEI~TS
A system which meets the above-mentioned objects and provides other benef cial features in accordance with the presently preferred exemplary embodiment of the invention will be described below with. reference to Figures 1-8. Those skilled in the art will readily appreciate That the description given herein. with respect to those figures is for explanatory purposes only and is not intended in any way to Iimit the scope of the invention, Throughout the description, like reference numerals will refer to like elements in the respective figures.
Figure 1 illustrates a diagram of a first embodiment of the electrical connection system with the via holes fixed on an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards. Misalignment angle A
represents the angle of misalignment of top cozmector board IOI and bottom connector board 102. Bisecting axis 103 bisects angle A. Perpendicular axis intersects bisecting axis I03 at intersection point P at an angle perpendicular to bisecting axis I 03. Top surface via holes 1 1. l a and 1 I2a are fixed along perpendicular axis 104 and are equidistant from intersection point P.
Figure 2 illustrates a diagram of the first embodiment adapted to a solder on surface mount connector where the front and backside daughter boards are oz-thogonal 2S (misalignment angle A = 90 degrees). The fzrst column of Figure 2 illustrates a top view of the top surface of the PWB. Top surface mount pads 201a and 202a connect top daughter board connections 21 I a and 212a to via holes 111 and 112. The second column of Figure 2 illustrates a top view of the bottom surface of the PWB.
Bottom surface mount pads 201b and 202b (shown by dashed lines) connect bottom daughter FCC-2630/C2593 b ~'A'T~,I~tT
board connections 2I 1 b and 212b to via holes 11 l and 112. The third column of Figure 2 illustrates a tap view of the top surface and bottom surface of the PWB
overlaid. Top first connection 21 I a is the outside connection on the top connector board, and bottom first connection 2llb is the inside connection on the bottom cormector board. Conversely, 1=op second connection 212a is the inside connection on the top connector board, and bottom second connection 212b is the outside connection on the bottom connector board. Thus, this scheme is ideal for connecting boards oriented in directions such that the electrical signals travel from outside connections to inside connections.
I 0 The electrical path from the first top board connection 21 I a to the first bottom board connection 211b includes long top surface mount pad 201a and short bottom surface mount pad 241b. The electrical path from second top board connection 202a to second bottom board connection 202b includes short top surface mount pad 202a and Iong bottom surface mount pad 202b. As can be seen, both electrical paths consist of one long surface mount pad and one short surface mount pad. Both electrical paths are, therefore, of equal length. This ensures that the electrical signals transferred between electrical connections on each of the connector boards will not be out of phase. As may also be seen, first top surface via hole l l la directly overlays first bottom surface via hole lll.b and second top surface via hole 112a directly overlays second bottom surface via hole II2b. Thus, the electrical connection between via holes is straight through the mid-plane board at an angle perpendicular to faces of the znid-plane board. This allows for a straight through drilling procedure in construction of the mid-plane board.
Figure 3 illustrates a diagram of a second embodiment of the electrical 2S Connection system with the via holes fixed on an axis that bisects the angle of misalignment of the connector bards. Misalignment angle A represents the angle of misalignment of top connector board I01 and bottom connector board I02.
Bisecting axis 103 bisects angle A. Top surface via holes 11 la and 112a are fixed along bisecting axis 103.
FCI-2630/C2~93 7 PATEIvtT
Figure 4 illustrates a diagram of a second embodiemnt adapted to a solder on surface mount connector where the front and backside daughter boards are orthogonal (misalignment angle A = 90 degrees). The first column of Figure 4 illustrates a top view of the top surface of the PWB. Top surface mount pads 201a and 202a connect top daughter board conzlections 21 la and 212a to via holes 111 and 112. The second column of Figure 4 illustrates a top view of the bottom surface of the PG;TB.
Bottom surface mount pads 201b and 202b (shown by dashed lines) connect bottom daughter board connections 211b and 212b to via holes 111 and 112. The third column of Figure 4 illustrates a top view of the top surface and bottom surface of the PWB
overlaid. In this scheme, both first connections 2:11 a,b are the outside cozirzections, and both second connections 212a,b are the inside cozmections. Thus, this scheme is ideal for connecting boards oriented in directions such that the electrical signals travel from outside connections to outside connections and inside connections to inside connections.
The electrical path. from the first top board connection 211a to the first bottom board connection 211b includes top surface mount pad 20Ia and bottom surface mount pad 201b. The electrical path from second top board connection 212a to second bottom board connection 212b includes top surface mount pad 202a and bottom surface mount pad 202b. 1z1 this scheme, the length of all surface mount pads are equal because the distance from each via hole to each electrical connector is equal.
AlI electrical paths are, therefore, of equal length.
Figures 5-8 illustrate how the first routing scheme discussed generally in Figures 1 and 2 would be specifically implemented to the connection of two exemplary Sx8 headers on opposite sides of the mother board. This illustration is for exemplary purposes only and is no way intended to limit the scope of this invention.
Figure 5 illustrates a top vie~~° of the top surface of a mother board with two exemplary 5:~8 headers on opposite sides of the mother board. Figure 6 illustrates a top view of the bottom surface of the mother board. Figure 7 illustrates a top view of the top surface and bottom surface of the mother board overlaid. There is a total of 40 pairs of connections. However. as is apparent from an examination of Figures 5-7, the routing scheme of this invention can only be applied to 33 of the 40 total pairs.
FCI-2630/C2593 ~ PATENT
Th.e pattern in this case is a combination of two 4x4 patterns for a subtotal of 32 pairs.
The 33'd pair is the one of a kind pair in the top right corner of the diagrams. The 7 remaining pairs of the top most row and the right most column must be connected using the interlayer routing scheme shown in Figure 8. While the invention has beer described and illustrated with reference to specific embodiments, those skilled in the art will recognize that modification and variations may be made without departing from the principles of the invention as described above and set forth in the following claims. For example, while the invention has been described as being used to connect orthogonal first and second printed circuit boards, the invention may be used to connect printed circuit boards at any angle of misalignment. Furthermore, first and second printed circuit boards rnay contain any size pattern of connections and is not intended to be limited to a five by eight pattern of connections. Accordingly, reference should be made to the appended claims as indicating the scope of the invention.
Claims (20)
1. A routing system far interconnecting two surface mounted printed circuit boards comprising:
a mid-plane printed circuit board including a first face and a second face, said second face parallel to said first face;
a first printed circuit board surface mounted an said first face of said mid-plane printed circuit board, said first printed circuit board containing pairs of electrical connections;
a second printed circuit board surface mounted on said second face of said mid-plane printed circuit board, said second printed circuit board containing pairs of electrical connections, said second printed circuit boards mounted at an angle to said first printed circuit boards;
a plurality of pairs of via holes on said first and second faces of said mid-plane printed circuit board positioned with respect to the angle of misalignment of said first and second printed circuit boards, said pairs of via holes on said first face of said mid-plane printed circuit board directly overlaying said pairs of via holes on said second face of said mid-plane printed circuit board; and an plurality of electrical paths through said overlaying pairs of via holes connecting said pairs of electrical connections on said first printed circuit board to said electrical connections on said second printed circuit board.
a mid-plane printed circuit board including a first face and a second face, said second face parallel to said first face;
a first printed circuit board surface mounted an said first face of said mid-plane printed circuit board, said first printed circuit board containing pairs of electrical connections;
a second printed circuit board surface mounted on said second face of said mid-plane printed circuit board, said second printed circuit board containing pairs of electrical connections, said second printed circuit boards mounted at an angle to said first printed circuit boards;
a plurality of pairs of via holes on said first and second faces of said mid-plane printed circuit board positioned with respect to the angle of misalignment of said first and second printed circuit boards, said pairs of via holes on said first face of said mid-plane printed circuit board directly overlaying said pairs of via holes on said second face of said mid-plane printed circuit board; and an plurality of electrical paths through said overlaying pairs of via holes connecting said pairs of electrical connections on said first printed circuit board to said electrical connections on said second printed circuit board.
2. A system as in claim 1, wherein said pairs of via holes are positioned such that:
A. each via hole in each of said pairs of via holes is fixed on an axis perpendicular to an axis that bisects the angle of misalignment of said first and second printed circuit boards;
and B. both via holes in each of said pairs of via holes are equidistant from a point on an axis that bisects the angle of misalignment of said first and second printed circuit boards.
A. each via hole in each of said pairs of via holes is fixed on an axis perpendicular to an axis that bisects the angle of misalignment of said first and second printed circuit boards;
and B. both via holes in each of said pairs of via holes are equidistant from a point on an axis that bisects the angle of misalignment of said first and second printed circuit boards.
3. A system as in claim 1, wherein said pairs of via holes are positioned such that:
A. each via hole in each of said pairs of via holes is fixed on an axis that bisects the angle of misalignment of said first and second printed circuit boards; and B. The distance between the first via hole in each of said pairs of via holes and the first electrical connection in one of said pairs of electrical connections is equal to the distance between the second via hole in each of said pairs of via holes and the second electrical connection in one of said pairs of electrical connections.
A. each via hole in each of said pairs of via holes is fixed on an axis that bisects the angle of misalignment of said first and second printed circuit boards; and B. The distance between the first via hole in each of said pairs of via holes and the first electrical connection in one of said pairs of electrical connections is equal to the distance between the second via hole in each of said pairs of via holes and the second electrical connection in one of said pairs of electrical connections.
4. A system as in claim 1, wherein said electrical paths are substantially equal in length.
5. A system as in claim 1, wherein said electrical paths consist of:
a first face electrically conductive surface mount pad mounted on said first face of said mid-plane printed circuit board connecting one of said electrical connections on said first printed circuit board to one of said via holes on said first face of said mid-plane printed circuit board;
an electrically conductive trace connecting each of said via holes on said second face of said mid-plane printed circuit board with the directly overlaying via hole on said first face of said mid-plane printed circuit board; and a second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board connecting one of said electrical connections on said second printed circuit board to one of said via holes on said second face of said mid-plane printed circuit board.
a first face electrically conductive surface mount pad mounted on said first face of said mid-plane printed circuit board connecting one of said electrical connections on said first printed circuit board to one of said via holes on said first face of said mid-plane printed circuit board;
an electrically conductive trace connecting each of said via holes on said second face of said mid-plane printed circuit board with the directly overlaying via hole on said first face of said mid-plane printed circuit board; and a second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board connecting one of said electrical connections on said second printed circuit board to one of said via holes on said second face of said mid-plane printed circuit board.
6. A system as in claim 5, wherein said electrically conductive traces pass straight through said mid-plane printed circuit board at an angle perpendicular to said mid-plane printed circuit board.
7. A system as in claim 5, wherein said electrically conductive traces axe substantially equal in length.
8. A system as in claim 5, wherein said first face electrically conductive surface mount pads are substantially equal in length.
9. A system as in claim 5, wherein said second face electrically conductive surface mount pads are substantially equal in length.
10. A system as in claim 5, wherein said first face electrically conductive surface mount pads are substantially equal in length to said second face electrically conductive surface mount pads.
11. A system as in. claim 5, wherein each of said first face surface mount pads connecting the first electrical connection in each of said pairs of electrical connections is a long surface mount pad and each of said first face surface mount pads connecting the second electrical connection in each of said pairs of electrical connections is a short surface mount pad,
12. A system as in claim 11, wherein each of said long surface mount pads is substantially equal in length.
13. A system as in claim 11, wherein each of said short surface mount pads is substantially equal in length.
14. A system as in claim 5, wherein each of said second face surface mount pads connecting the first electrical connection in each of said pairs of electrical connections is a short surface mount pad and each of said second face surface mount pads connecting the second electrical connection in each of said pairs of electrical connections is a long surface mount pad.
15. A system as in claim 14, wherein each of said long surface mount pads is substantially equal in length.
16. A system as in claim 14, wherein each of said short surface mount pads is substantially equal in length.
17. A system as in claim 1, wherein said first and second printed circuit boards are orthogonal.
18. A system as in claim 1, wherein said first and second printed circuit boards are five by eight headers.
19: A system for interconnecting two surface mounted printed circuit boards comprising:
a mid-plane printed circuit board including a first face and a second face, said second face parallel to said first face;
a first printed circuit board surface mounted on said first face of said mid-plane printed circuit board, said first printed circuit board containing pairs of electrical connections;
a second printed circuit board surface mounted on said second face of said mid-plane printed circuit board, said second printed circuit board containing pairs of electrical connections; said second printed circuit boards mounted at an angle to said first printed circuit boards;
a plurality of pairs of via holes on said first and second faces of said mid-plane printed circuit board positioned such that:
A. Each via hole in each of said pairs of via holes is fixed on an axis perpendicular to an axis that bisects the angle of misalignment of said first and second printed circuit boards;
B. Both via holes in each of said pairs of via holes is equidistant from a point on an axis that bisects the angle of misalignment of said first and second printed circuit boards; and C. Each of said pairs of via holes on said first face of said mid-plane printed circuit board is directly overlaying one of said pairs of via holes on said second face of said mid-plane printed circuit board;
a plurality of electrically conductive traces connecting each of said via holes in said pairs of via hole on said second face of said mid-plane printed circuit board one of said directly overlaying via holes in said pairs of via holes on said first face of said mid-plane printed circuit board, said electrically conductive traces being substantially equal in length;
a plurality of long first face electrically conductive surface mount pads mounted on said first face of said mid-plane printed circuit board, said long first face electrically conductive surface mount pads connecting the first connection in each of said pairs of electrical connections on said first printed circuit board to the first via hole in each of said pairs via holes on said first face of said mid-plane printed circuit board, said long first face electrically conductive surface mount pads being substantially equal in length;
a plurality of short first face electrically conductive surface mount pads mounted on said first face of said mid-plane printed circuit board, said short first face electrically conductive surface mount pads connecting the second connection in each of said pairs of electrical connections on said first printed circuit board to the second via hole in each of said pairs via holes on said first face of said mid-plane printed circuit board, said short first face electrically conductive surface mount pads being substantially equal in length;
a plurality of short second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board, said short second face electrically conductive surface mount pads connecting the first connection in each of said pairs of electrical connections on said second printed circuit board to the first via hole in each of said pairs via holes on said second face of said mid-plane printed circuit board, said short second face electrically conductive surface mount pads being substantially equal in length; and a plurality of long second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board, each of said long second face electrically conductive surface mount pads connecting the second connection in each of said pairs of electrical connections on said second printed circuit board to the second via hole in each of said pairs via holes on said second face of said mid-plane printed circuit board, said long second face electrically conductive surface mount pads being substantially equal in length.
a mid-plane printed circuit board including a first face and a second face, said second face parallel to said first face;
a first printed circuit board surface mounted on said first face of said mid-plane printed circuit board, said first printed circuit board containing pairs of electrical connections;
a second printed circuit board surface mounted on said second face of said mid-plane printed circuit board, said second printed circuit board containing pairs of electrical connections; said second printed circuit boards mounted at an angle to said first printed circuit boards;
a plurality of pairs of via holes on said first and second faces of said mid-plane printed circuit board positioned such that:
A. Each via hole in each of said pairs of via holes is fixed on an axis perpendicular to an axis that bisects the angle of misalignment of said first and second printed circuit boards;
B. Both via holes in each of said pairs of via holes is equidistant from a point on an axis that bisects the angle of misalignment of said first and second printed circuit boards; and C. Each of said pairs of via holes on said first face of said mid-plane printed circuit board is directly overlaying one of said pairs of via holes on said second face of said mid-plane printed circuit board;
a plurality of electrically conductive traces connecting each of said via holes in said pairs of via hole on said second face of said mid-plane printed circuit board one of said directly overlaying via holes in said pairs of via holes on said first face of said mid-plane printed circuit board, said electrically conductive traces being substantially equal in length;
a plurality of long first face electrically conductive surface mount pads mounted on said first face of said mid-plane printed circuit board, said long first face electrically conductive surface mount pads connecting the first connection in each of said pairs of electrical connections on said first printed circuit board to the first via hole in each of said pairs via holes on said first face of said mid-plane printed circuit board, said long first face electrically conductive surface mount pads being substantially equal in length;
a plurality of short first face electrically conductive surface mount pads mounted on said first face of said mid-plane printed circuit board, said short first face electrically conductive surface mount pads connecting the second connection in each of said pairs of electrical connections on said first printed circuit board to the second via hole in each of said pairs via holes on said first face of said mid-plane printed circuit board, said short first face electrically conductive surface mount pads being substantially equal in length;
a plurality of short second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board, said short second face electrically conductive surface mount pads connecting the first connection in each of said pairs of electrical connections on said second printed circuit board to the first via hole in each of said pairs via holes on said second face of said mid-plane printed circuit board, said short second face electrically conductive surface mount pads being substantially equal in length; and a plurality of long second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board, each of said long second face electrically conductive surface mount pads connecting the second connection in each of said pairs of electrical connections on said second printed circuit board to the second via hole in each of said pairs via holes on said second face of said mid-plane printed circuit board, said long second face electrically conductive surface mount pads being substantially equal in length.
20. A system for interconnecting two surface mounted printed circuit boards comprising:
a mid-plane printed circuit board including a first face and a second. face, said second face parallel to said first face;
a first printed circuit board surface mounted on said first face of said mid-plane printed circuit board, said first printed circuit board containing pairs of electrical connections;
a second printed circuit board surface mounted on said second face of said mid-plane printed circuit board, said second printed circuit board containing pairs of electrical connections, said second printed circuit boards mounted at an angle to said first printed circuit boards;
a plurality of pairs of via holes on said first and second faces of said mid-plane printed circuit board positioned such that:
A. each via hole in each of said second face pairs of via holes is fixed on an axis that bisects the angle of misalignment of said first and second printed circuit boards;
B. The distance between the first via hole in each of said second face pairs of via holes and the first electrical connection in one of said pairs of electrical connections an said second printed circuit board is equal to the distance between the second via hole in each of said second face pairs of via holes and the second electrical connection in one of said pairs of electrical connections on said second printed circuit board; and C. each of said pairs of via holes on said first face of said mid-plane printed circuit board is directly overlaying one of said pairs of via holes on said second face of said mid-plane printed circuit board;
a plurality of electrically conductive traces connecting each of said via holes in said pairs of via hole on said second face of said mid-plane printed circuit board one of said directly overlaying via holes in said pairs of via holes on said first face of said mid-plane printed circuit board, said electrically conductive traces being substantially equal in length;
a plurality of first face electrically conductive surface mount pads mounted on said first face of said mid-plane printed circuit board, each of said first face electrically conductive surface mount pads connecting one of said electrical connections on said first printed circuit board to one of said via holes on said first face of said mid-plane printed circuit board, said first face electrically conductive traces being substantially equal in length; and a plurality of second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board, each of said second face electrically conductive surface mount pads connecting one of said electrical connections on said second printed circuit board to one of said via holes on said second face of said mid-plane printed circuit board, said second face electrically conductive traces being substantially equal in length to said first face electrically conductive traces.
a mid-plane printed circuit board including a first face and a second. face, said second face parallel to said first face;
a first printed circuit board surface mounted on said first face of said mid-plane printed circuit board, said first printed circuit board containing pairs of electrical connections;
a second printed circuit board surface mounted on said second face of said mid-plane printed circuit board, said second printed circuit board containing pairs of electrical connections, said second printed circuit boards mounted at an angle to said first printed circuit boards;
a plurality of pairs of via holes on said first and second faces of said mid-plane printed circuit board positioned such that:
A. each via hole in each of said second face pairs of via holes is fixed on an axis that bisects the angle of misalignment of said first and second printed circuit boards;
B. The distance between the first via hole in each of said second face pairs of via holes and the first electrical connection in one of said pairs of electrical connections an said second printed circuit board is equal to the distance between the second via hole in each of said second face pairs of via holes and the second electrical connection in one of said pairs of electrical connections on said second printed circuit board; and C. each of said pairs of via holes on said first face of said mid-plane printed circuit board is directly overlaying one of said pairs of via holes on said second face of said mid-plane printed circuit board;
a plurality of electrically conductive traces connecting each of said via holes in said pairs of via hole on said second face of said mid-plane printed circuit board one of said directly overlaying via holes in said pairs of via holes on said first face of said mid-plane printed circuit board, said electrically conductive traces being substantially equal in length;
a plurality of first face electrically conductive surface mount pads mounted on said first face of said mid-plane printed circuit board, each of said first face electrically conductive surface mount pads connecting one of said electrical connections on said first printed circuit board to one of said via holes on said first face of said mid-plane printed circuit board, said first face electrically conductive traces being substantially equal in length; and a plurality of second face electrically conductive surface mount pads mounted on said second face of said mid-plane printed circuit board, each of said second face electrically conductive surface mount pads connecting one of said electrical connections on said second printed circuit board to one of said via holes on said second face of said mid-plane printed circuit board, said second face electrically conductive traces being substantially equal in length to said first face electrically conductive traces.
Applications Claiming Priority (2)
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US10/051,703 | 2002-01-18 | ||
US10/051,703 US6717825B2 (en) | 2002-01-18 | 2002-01-18 | Electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other |
Publications (1)
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CA2415934A1 true CA2415934A1 (en) | 2003-07-18 |
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CA002415934A Abandoned CA2415934A1 (en) | 2002-01-18 | 2003-01-08 | Electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other |
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EP (1) | EP1330145A3 (en) |
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US5352123A (en) | 1992-06-08 | 1994-10-04 | Quickturn Systems, Incorporated | Switching midplane and interconnection system for interconnecting large numbers of signals |
CA2124773C (en) | 1994-05-31 | 1998-11-03 | Raymond Bruce Wallace | Backplane and shelf |
US5926378A (en) | 1995-09-29 | 1999-07-20 | International Business Machines Corporation | Low profile riser card assembly using paired back-to-back peripheral card connectors mounted on universal footprints supporting different bus form factors |
US5815374A (en) * | 1996-09-30 | 1998-09-29 | International Business Machines Corporation | Method and apparatus for redirecting certain input/output connections of integrated circuit chip configurations |
US6163462A (en) * | 1997-12-08 | 2000-12-19 | Analog Devices, Inc. | Stress relief substrate for solder ball grid array mounted circuits and method of packaging |
US6528737B1 (en) * | 2000-08-16 | 2003-03-04 | Nortel Networks Limited | Midplane configuration featuring surface contact connectors |
US6538899B1 (en) * | 2001-01-02 | 2003-03-25 | Juniper Networks, Inc. | Traceless midplane |
-
2002
- 2002-01-18 US US10/051,703 patent/US6717825B2/en not_active Expired - Lifetime
-
2003
- 2003-01-08 CA CA002415934A patent/CA2415934A1/en not_active Abandoned
- 2003-01-17 KR KR10-2003-0003172A patent/KR20030063170A/en not_active Application Discontinuation
- 2003-01-17 EP EP03000693A patent/EP1330145A3/en not_active Withdrawn
- 2003-01-17 JP JP2003009541A patent/JP2003243793A/en not_active Withdrawn
- 2003-01-17 CN CNB03101710XA patent/CN1284427C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1284427C (en) | 2006-11-08 |
US6717825B2 (en) | 2004-04-06 |
JP2003243793A (en) | 2003-08-29 |
KR20030063170A (en) | 2003-07-28 |
US20030137817A1 (en) | 2003-07-24 |
CN1433254A (en) | 2003-07-30 |
EP1330145A3 (en) | 2005-08-10 |
EP1330145A2 (en) | 2003-07-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
FZDE | Discontinued |