CA2438195A1 - Optimized scalabale network switch - Google Patents

Optimized scalabale network switch Download PDF

Info

Publication number
CA2438195A1
CA2438195A1 CA002438195A CA2438195A CA2438195A1 CA 2438195 A1 CA2438195 A1 CA 2438195A1 CA 002438195 A CA002438195 A CA 002438195A CA 2438195 A CA2438195 A CA 2438195A CA 2438195 A1 CA2438195 A1 CA 2438195A1
Authority
CA
Canada
Prior art keywords
downstream
nodes
compact
preferred direction
scalabale
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002438195A
Other languages
French (fr)
Other versions
CA2438195C (en
Inventor
Matthias A. Blumrich
Dong Chen
Paul W. Coteus
Alan G. Gara
Mark E. Giampapa
Philip Heidelberger
Burkhard D. Steinmacher-Burow
Todd E. Takken
Pavlos M. Vranas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2438195A1 publication Critical patent/CA2438195A1/en
Application granted granted Critical
Publication of CA2438195C publication Critical patent/CA2438195C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F04—POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
    • F04D—NON-POSITIVE-DISPLACEMENT PUMPS
    • F04D25/00—Pumping installations or systems
    • F04D25/16—Combinations of two or more pumps ; Producing two or more separate gas flows
    • F04D25/166—Combinations of two or more pumps ; Producing two or more separate gas flows using fans
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H05K7/20709—Modifications to facilitate cooling, ventilating, or heating for server racks or cabinets; for data centers, e.g. 19-inch computer racks
    • H05K7/20836—Thermal management, e.g. server temperature control
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F04—POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
    • F04D—NON-POSITIVE-DISPLACEMENT PUMPS
    • F04D27/00—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids
    • F04D27/004—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids by varying driving speed
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G06F15/17368—Indirect interconnection networks non hierarchical topologies
    • G06F15/17381—Two dimensional, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G06F15/17368—Indirect interconnection networks non hierarchical topologies
    • G06F15/17387—Three dimensional, e.g. hypercubes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G09G5/008—Clock recovery
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F24—HEATING; RANGES; VENTILATING
    • F24F—AIR-CONDITIONING; AIR-HUMIDIFICATION; VENTILATION; USE OF AIR CURRENTS FOR SCREENING
    • F24F11/00—Control or safety arrangements
    • F24F11/70—Control systems characterised by their outputs; Constructional details thereof
    • F24F11/72—Control systems characterised by their outputs; Constructional details thereof for controlling the supply of treated air, e.g. its pressure
    • F24F11/74—Control systems characterised by their outputs; Constructional details thereof for controlling the supply of treated air, e.g. its pressure for controlling air flow rate or air velocity
    • F24F11/77—Control systems characterised by their outputs; Constructional details thereof for controlling the supply of treated air, e.g. its pressure for controlling air flow rate or air velocity by controlling the speed of ventilators
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B30/00—Energy efficient heating, ventilation or air conditioning [HVAC]
    • Y02B30/70—Efficient control or regulation technologies, e.g. for control of refrigerant flow, motor or heating

Abstract

In a massively parallel computing system having a plurality of nodes configured in m multi-dimensions, each node including a computing device, a method for routing packets towards their destination nodes is provided which includes generating at least one of a 2m plurality of compact bit vectors (115, 154) containing information derived from downstream nodes. A multileve l arbitration process (116, 155) in which downstream information stored in the compact vectors, such as link status information and fullness of downstream buffers (130, 140), is used to determine a preferred direction and virtual channel for packet transmission. Preferred direction ranges are encoded and virtual channels are selected by examining the plurality of compact bit vectors (115, 154). This dynamic routing method eliminates the necessity of routing tables, thus enhancing scalability of the switch.
CA002438195A 2001-02-24 2002-02-25 Optimized scalabale network switch Expired - Fee Related CA2438195C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US27112401P 2001-02-24 2001-02-24
US60/271,124 2001-02-24
PCT/US2002/005569 WO2002084508A1 (en) 2001-02-24 2002-02-25 Optimized scalabale network switch

Publications (2)

Publication Number Publication Date
CA2438195A1 true CA2438195A1 (en) 2002-10-24
CA2438195C CA2438195C (en) 2009-02-03

Family

ID=68499837

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002438195A Expired - Fee Related CA2438195C (en) 2001-02-24 2002-02-25 Optimized scalabale network switch

Country Status (8)

Country Link
US (2) US7305487B2 (en)
EP (1) EP1370967A4 (en)
JP (1) JP3871327B2 (en)
KR (1) KR100620835B1 (en)
CN (1) CN1269053C (en)
CA (1) CA2438195C (en)
IL (1) IL157515A0 (en)
WO (1) WO2002084508A1 (en)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0517304D0 (en) * 2005-08-23 2005-10-05 Netronome Systems Inc A system and method for processing and forwarding transmitted information
US7773617B2 (en) * 2006-11-08 2010-08-10 Sicortex, Inc. System and method for arbitration for virtual channels to prevent livelock in a richly-connected multi-processor computer system
US7773616B2 (en) * 2006-11-08 2010-08-10 Sicortex, Inc. System and method for communicating on a richly connected multi-processor computer system using a pool of buffers for dynamic association with a virtual channel
US9053072B2 (en) * 2007-01-25 2015-06-09 Hewlett-Packard Development Company, L.P. End node transactions at threshold-partial fullness of storage space
CN101311917B (en) * 2007-05-24 2011-04-06 中国科学院过程工程研究所 Particle model faced multi-tier direct-connection cluster paralleling computing system
US7970872B2 (en) * 2007-10-01 2011-06-28 Accenture Global Services Limited Infrastructure for parallel programming of clusters of machines
JP2009104300A (en) * 2007-10-22 2009-05-14 Denso Corp Data processing apparatus and program
US20090109996A1 (en) * 2007-10-29 2009-04-30 Hoover Russell D Network on Chip
US20090125706A1 (en) * 2007-11-08 2009-05-14 Hoover Russell D Software Pipelining on a Network on Chip
US20090125703A1 (en) * 2007-11-09 2009-05-14 Mejdrich Eric O Context Switching on a Network On Chip
US8261025B2 (en) 2007-11-12 2012-09-04 International Business Machines Corporation Software pipelining on a network on chip
US8656442B1 (en) 2007-11-21 2014-02-18 BitGravity, Inc. Efficient video delivery
US8223650B2 (en) 2008-04-02 2012-07-17 Intel Corporation Express virtual channels in a packet switched on-chip interconnection network
US20090260013A1 (en) * 2008-04-14 2009-10-15 International Business Machines Corporation Computer Processors With Plural, Pipelined Hardware Threads Of Execution
US8423715B2 (en) 2008-05-01 2013-04-16 International Business Machines Corporation Memory management among levels of cache in a memory hierarchy
US20090282419A1 (en) * 2008-05-09 2009-11-12 International Business Machines Corporation Ordered And Unordered Network-Addressed Message Control With Embedded DMA Commands For A Network On Chip
US8154989B1 (en) * 2008-05-16 2012-04-10 Xilinx, Inc. Recovering a shared channel within a network from a deadlock state
US8311174B1 (en) 2008-05-16 2012-11-13 Xilinx, Inc. Persistent synchronization within a media oriented systems transport network
US8438578B2 (en) 2008-06-09 2013-05-07 International Business Machines Corporation Network on chip with an I/O accelerator
US8194543B2 (en) * 2008-12-18 2012-06-05 Intel Mobile Communications GmbH Methods of data traffic shaping, apparatus and wireless device
KR101250666B1 (en) * 2009-01-30 2013-04-03 후지쯔 가부시끼가이샤 Information processing system, information processing device, control method for information processing device, and computer-readable recording medium
US8612711B1 (en) * 2009-09-21 2013-12-17 Tilera Corporation Memory-mapped data transfers
US8429377B2 (en) * 2010-01-08 2013-04-23 International Business Machines Corporation Optimizing TLB entries for mixed page size storage in contiguous memory
US9565094B2 (en) * 2009-11-13 2017-02-07 International Business Machines Corporation I/O routing in a multidimensional torus network
US8571834B2 (en) * 2010-01-08 2013-10-29 International Business Machines Corporation Opcode counting for performance measurement
US8359404B2 (en) * 2010-01-08 2013-01-22 International Business Machines Corporation Zone routing in a torus network
US9081501B2 (en) * 2010-01-08 2015-07-14 International Business Machines Corporation Multi-petascale highly efficient parallel supercomputer
US9954760B2 (en) 2010-01-29 2018-04-24 International Business Machines Corporation I/O routing in a multidimensional torus network
US8325723B1 (en) * 2010-02-25 2012-12-04 Integrated Device Technology, Inc. Method and apparatus for dynamic traffic management with packet classification
US8359417B2 (en) * 2010-07-16 2013-01-22 Miranda Technologies Inc. Audio/video router
US8560885B1 (en) * 2010-09-16 2013-10-15 The Boeing Company Dynamic redundancy management
US9077616B2 (en) 2012-08-08 2015-07-07 International Business Machines Corporation T-star interconnection network topology
WO2017069771A1 (en) 2015-10-23 2017-04-27 Hewlett-Packard Enterprise Printed circuit board for receiving a switch chip and transceiver modules
US10311542B2 (en) * 2017-03-06 2019-06-04 Thinci, Inc. Node topology employing recirculating ring command and data buffers for executing thread scheduling
US10579428B2 (en) 2017-12-01 2020-03-03 International Business Machines Corporation Data token management in distributed arbitration systems
WO2020236275A1 (en) 2019-05-23 2020-11-26 Cray Inc. System and method for facilitating dynamic command management in a network interface controller (nic)
CN115550293B (en) * 2022-11-30 2023-03-10 苏州浪潮智能科技有限公司 FSI main controller and port routing device and method thereof

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4891751A (en) * 1987-03-27 1990-01-02 Floating Point Systems, Inc. Massively parallel vector processing computer
US5347450A (en) * 1989-01-18 1994-09-13 Intel Corporation Message routing in a multiprocessor computer system
US5689647A (en) * 1989-03-14 1997-11-18 Sanyo Electric Co., Ltd. Parallel computing system with processing element number setting mode and shortest route determination with matrix size information
US5181017A (en) * 1989-07-27 1993-01-19 Ibm Corporation Adaptive routing in a parallel computing system
US5280474A (en) * 1990-01-05 1994-01-18 Maspar Computer Corporation Scalable processor to processor and processor-to-I/O interconnection network and method for parallel processing arrays
EP0485690B1 (en) * 1990-11-13 1999-05-26 International Business Machines Corporation Parallel associative processor system
US5175733A (en) * 1990-12-27 1992-12-29 Intel Corporation Adaptive message routing for multi-dimensional networks
JPH05181816A (en) * 1992-01-07 1993-07-23 Hitachi Ltd Parallel data processor and microprocessor
US5511070A (en) * 1992-05-20 1996-04-23 Xerox Corporation Reservation ring mechanism for controlling contention in a broadband ISDN fast packet switch suitable for use in a local area network
US6157967A (en) * 1992-12-17 2000-12-05 Tandem Computer Incorporated Method of data communication flow control in a data processing system using busy/ready commands
US5583990A (en) * 1993-12-10 1996-12-10 Cray Research, Inc. System for allocating messages between virtual channels to avoid deadlock and to optimize the amount of message traffic on each type of virtual channel
JPH08185380A (en) * 1994-12-28 1996-07-16 Hitachi Ltd Parallel computer
JPH08251196A (en) 1995-03-15 1996-09-27 Toshiba Corp Parallel computer
CA2181206C (en) * 1995-07-24 2001-03-13 Anwar Elwalid A method for admission control and routing by allocating network resources in network nodes
JPH1040223A (en) * 1996-06-17 1998-02-13 Internatl Business Mach Corp <Ibm> Optimization method for recognition of set communication in distributed parallel system
JP3532037B2 (en) * 1996-07-31 2004-05-31 富士通株式会社 Parallel computer
JP3980488B2 (en) 2001-02-24 2007-09-26 インターナショナル・ビジネス・マシーンズ・コーポレーション Massively parallel computer system

Also Published As

Publication number Publication date
JP2004527176A (en) 2004-09-02
US7668970B2 (en) 2010-02-23
JP3871327B2 (en) 2007-01-24
EP1370967A1 (en) 2003-12-17
EP1370967A4 (en) 2009-10-21
WO2002084508A1 (en) 2002-10-24
US20080091842A1 (en) 2008-04-17
US7305487B2 (en) 2007-12-04
KR20040004532A (en) 2004-01-13
CN1269053C (en) 2006-08-09
US20040078482A1 (en) 2004-04-22
CN1493038A (en) 2004-04-28
IL157515A0 (en) 2004-03-28
KR100620835B1 (en) 2006-09-13
CA2438195C (en) 2009-02-03

Similar Documents

Publication Publication Date Title
CA2438195A1 (en) Optimized scalabale network switch
TW429708B (en) Quality of service improvement of internet real-time media transmission by transmitting redundant voice/media frames
FI944277A (en) A method for grouping links in a packet switch
WO2002041663A3 (en) Non-blocking, scalable optical router architecture and method
KR930024352A (en) Improved Data Stream Transmission Method and Data Stream Transmission Data Processing System
WO2006012284A3 (en) An apparatus and method for packet coalescing within interconnection network routers
AU2652688A (en) A packet switching network
CA2225321A1 (en) Method of transferring internet protocol packets by the use of fast atm cell transport and network for performing the method
MY112850A (en) Adaptive and dynamic message routing system for multinode wormhole networks
EP0744850A3 (en) Digital network including early packet discard mechanism with adjustable threshold
AU8904898A (en) Router with virtual channel allocation
CA2410739A1 (en) Process for implementation of a redundant switched full-duplex ethernet type communication network
US6266333B1 (en) Network-independent routing of communication signals
EP0829153A4 (en) Virtual path-based static routing
CA2255385A1 (en) Method and apparatus for management of bandwidth in a data communication network
US6925092B1 (en) Communications system and communication method for data multiplexing
WO2002037784A3 (en) Parallel network data transmission of segments of data stream
WO2001093598A3 (en) Efficient packet transmission over atm
CA2414357A1 (en) Packet routing
JP2008211567A (en) Traffic route changing method and system
CA2173948A1 (en) Synchronizing circuit arrangement
JP3158230B2 (en) Asynchronous information communication control method
US7042845B1 (en) System and method for time division multiplexed switching of data using a high-speed packet switch
JP3283601B2 (en) Self-routing method, apparatus and packet structure
KR20000055431A (en) Multicasting Network In ATM Switching System

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed
MKLA Lapsed

Effective date: 20110225