CA2442929A1 - Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment - Google Patents

Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment Download PDF

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Publication number
CA2442929A1
CA2442929A1 CA002442929A CA2442929A CA2442929A1 CA 2442929 A1 CA2442929 A1 CA 2442929A1 CA 002442929 A CA002442929 A CA 002442929A CA 2442929 A CA2442929 A CA 2442929A CA 2442929 A1 CA2442929 A1 CA 2442929A1
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Prior art keywords
oxide layer
annealing
oxide
layer
silicon carbide
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CA002442929A
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CA2442929C (en
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Lori A. Lipkin
Mrinal Kanti Das
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Wolfspeed Inc
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Priority claimed from US09/834,283 external-priority patent/US6610366B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
    • H01L21/02326—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen into a nitride layer, e.g. changing SiN to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7827—Vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7838—Field effect transistors with field effect produced by an insulated gate without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs

Abstract

Silicon carbide structures are fabricated by fabricating a nitrided oxide layer on a layer of silicon carbide and annealing the nitrided oxide layer in an environment containing hydrogen. Such a fabrication of the nitrided oxide layer may be provided by forming the oxide layer in at least one of nitric oxide and nitrous oxide and/or annealing an oxide layer in at least one of nitric oxide and nitrous oxide. Alternatively, the nitrided oxide layer may be provided by fabricating an oxide layer and fabricating a nitride layer on the oxide layer so as to provide the nitrided oxide layer on which the nitride layer is fabricated. Furthermore, annealing the oxide layer may be provided as a separate step and/or substantially concurrently with another step such as fabricating the nitride layer or performing a contact anneal. The hydrogen environment may be pure hydrogen, hydrogen combined with other gases and/or result from a hydrogen precursor. Anneal temperatures of 400 ~C or greater are preferred.

Claims (20)

1. A method of forming an insulator in a silicon carbide electr~~~ device, comprising:

fabricating a nitrided oxide layer on a layer of silicon carbide; and annealing the nitrided oxide layer in an environment containing at least one of H2 and NH3.
2. The method according to Claim 1, wherein the silicon carbide layer comprises 4H polytype silicon carbide.
3. The method according to Claim 1, wherein the silicon carbide layer comprises a silicon carbide layer on a non-silicon carbide substrate.
4. The method according to Claim 1, wherein the silicon carbide layer comprises a portion of a silicon carbide substrate.
5. The method of Claim 1, wherein the step of fabricating a nitrided oxide layer comprises at least one of forming the oxide layer in at least one of nitric oxide and nitrous oxide and annealing an existing oxide layer in at least one of nitric oxide and nitrous oxide.
6. The method of Claim 1, wherein the step of fabricating a nitrided oxide layer comprises the steps of:

fabricating an oxide layer; and fabricating a nitride layer on the oxide layer so as to nitridate the oxide layer on which the nitride layer is fabricated.
7. The method of Claim 6, wherein the step of annealing the oxide layer in an environment containing hydrogen is provided substantially concurrently with the step of fabricating the nitride layer so that the step of fabricating a nitride layer on the oxide layer comprises fabricating a nitride layer on the oxide layer so as to nitridate and hydrogenate the oxide layer on which the nitride layer is fabricated.
8. The method of Claim 1, wherein the step of annealing the oxide layer comprises heating the oxide layer to a temperature of greater than about 400 °C in a hydrogen containing environment as part of another processing step.
9. The method of Claim 1, wherein the step of annealing the oxide layer comprises annealing the oxide layer at a temperature of greater than about 400 °C in a hydrogen containing environment.
10. The method of Claim 1, wherein the step of annealing the oxide layer comprises annealing the oxide layer at a temperature of less than about 900 °C in a hydrogen containing environment.
11. The method of Claim 1, wherein the step of annealing the oxide layer comprises annealing the oxide layer at a temperature of between about 400 °C and about 1000 °C in a hydrogen containing environment.
12. The method of Claim 1, wherein the step of annealing the oxide layer comprises annealing the oxide layer at a temperature of between about 400 °C and about 800 °C in a hydrogen containing environment.
13. The method of Claim 1, further comprising the step of performing subsequent high temperature processing steps in a hydrogen containing environment.
14. The method of Claim 1, wherein the step of annealing is preceded by the step of forming metallization for a semiconductor device associated with the oxide layer.
15. The method of Claim 14, wherein the step of annealing the oxide layer comprises annealing the oxide layer at a temperature of less than about 900 °C in a hydrogen containing environment.
16. The method of Claim 15, wherein the step of annealing the oxide layer comprises a contact anneal.
17. The method of Claim 1, wherein the step of annealing comprises annealing the oxide layer in forming gas having about 4% hydrogen and 96% inert gases.
18. The method of Claim 1 further comprising forming a silicon carbide metal oxide semiconductor device having the oxide layer as a gate oxide of the metal oxide semiconductor device.
19. The method of Claim 1, wherein the step of annealing the oxide layer is carried out for at least about 2 minutes.
20. A method of fabricating an oxide layer on a silicon carbide layer, comprising:

nitriding the oxide layer on the silicon carbide layer with at least one of nitric oxide and nitrous oxide; and annealing the nitrided oxide layer at a temperature of between about 400 °C about 900 °C in an environment containing at least one of H2 and NH3 for at least about 2 minutes.
CA2442929A 2001-04-12 2002-04-12 Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment Expired - Lifetime CA2442929C (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US09/834,283 2001-04-12
US09/834,283 US6610366B2 (en) 2000-10-03 2001-04-12 Method of N2O annealing an oxide layer on a silicon carbide layer
US29430701P 2001-05-30 2001-05-30
US60/294,307 2001-05-30
US10/045,542 US7067176B2 (en) 2000-10-03 2001-10-26 Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment
US10/045,542 2001-10-26
PCT/US2002/011691 WO2002084727A2 (en) 2001-04-12 2002-04-12 Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment

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CA2442929A1 true CA2442929A1 (en) 2002-10-24
CA2442929C CA2442929C (en) 2012-06-26

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US (1) US7067176B2 (en)
EP (3) EP1378006B1 (en)
JP (1) JP4781610B2 (en)
KR (1) KR100855388B1 (en)
CN (1) CN100517607C (en)
AT (1) ATE407449T1 (en)
CA (1) CA2442929C (en)
DE (1) DE60228695D1 (en)
WO (1) WO2002084727A2 (en)

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