CA2460530A1 - Method, apparatus and computer program for the decapsulation and encapsulation of packets with multiple headers - Google Patents

Method, apparatus and computer program for the decapsulation and encapsulation of packets with multiple headers Download PDF

Info

Publication number
CA2460530A1
CA2460530A1 CA002460530A CA2460530A CA2460530A1 CA 2460530 A1 CA2460530 A1 CA 2460530A1 CA 002460530 A CA002460530 A CA 002460530A CA 2460530 A CA2460530 A CA 2460530A CA 2460530 A1 CA2460530 A1 CA 2460530A1
Authority
CA
Canada
Prior art keywords
decapsulation
encapsulation
packets
computer program
multiple headers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002460530A
Other languages
French (fr)
Other versions
CA2460530C (en
Inventor
Donald F. Hooper
Stephanie Hirnak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corporation
Donald F. Hooper
Stephanie Hirnak
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation, Donald F. Hooper, Stephanie Hirnak filed Critical Intel Corporation
Publication of CA2460530A1 publication Critical patent/CA2460530A1/en
Application granted granted Critical
Publication of CA2460530C publication Critical patent/CA2460530C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/60—Software-defined switches
    • H04L49/602—Multilayer or multiprotocol switching, e.g. IP switching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/52—Multiprotocol routers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H04L45/742—Route cache; Operation thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9036—Common buffer combined with individual queues
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9042—Separate storage for different parts of the packet, e.g. header and payload
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9057—Arrangements for supporting packet reassembly or resequencing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3009—Header conversion, routing tables or routing tags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3018—Input queuing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3027—Output queuing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/12—Protocol engines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/18—Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers

Abstract

A method of forwarding a network packet is described. The method includes reading a table (114) containing a plurality of flags to determine which of the plurality of flags is set or cleared (116, 130, 132) and performing an operation on the packet to decapsulate (118, 120) or encapsulate (134) the packet in accordance with values of the flags.
CA002460530A 2001-09-28 2002-09-12 Method, apparatus and computer program for the decapsulation and encapsulation of packets with multiple headers Expired - Fee Related CA2460530C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/966,349 2001-09-28
US09/966,349 US7126952B2 (en) 2001-09-28 2001-09-28 Multiprotocol decapsulation/encapsulation control structure and packet protocol conversion method
PCT/US2002/029074 WO2003030461A1 (en) 2001-09-28 2002-09-12 Method, apparatus and computer program for the decapsulation and encapsulation of packets with multiple headers

Publications (2)

Publication Number Publication Date
CA2460530A1 true CA2460530A1 (en) 2003-04-10
CA2460530C CA2460530C (en) 2008-06-17

Family

ID=25511271

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002460530A Expired - Fee Related CA2460530C (en) 2001-09-28 2002-09-12 Method, apparatus and computer program for the decapsulation and encapsulation of packets with multiple headers

Country Status (10)

Country Link
US (1) US7126952B2 (en)
EP (1) EP1430658B1 (en)
KR (1) KR100647949B1 (en)
CN (1) CN1593041B (en)
AT (1) ATE366494T1 (en)
CA (1) CA2460530C (en)
DE (1) DE60221030T2 (en)
HK (1) HK1067821A1 (en)
TW (1) TWI239164B (en)
WO (1) WO2003030461A1 (en)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6983350B1 (en) 1999-08-31 2006-01-03 Intel Corporation SDRAM controller for parallel processor architecture
US6532509B1 (en) * 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6661794B1 (en) 1999-12-29 2003-12-09 Intel Corporation Method and apparatus for gigabit packet assignment for multithreaded packet processing
US7124166B2 (en) 2001-04-30 2006-10-17 Aol Llc Duplicating digital streams for digital conferencing using switching technologies
US7237033B2 (en) 2001-04-30 2007-06-26 Aol Llc Duplicating switch for streaming data units to a terminal
US8572278B2 (en) * 2001-04-30 2013-10-29 Facebook, Inc. Generating multiple data streams from a single data source
US7149218B2 (en) * 2001-12-05 2006-12-12 International Business Machines Corporation Cache line cut through of limited life data in a data processing system
US7529242B1 (en) * 2002-02-15 2009-05-05 Symantec Corporation Routing network packets for multi-processor network flow analysis
TW561740B (en) * 2002-06-06 2003-11-11 Via Tech Inc Network connecting device and data packet transferring method
US8028092B2 (en) 2002-06-28 2011-09-27 Aol Inc. Inserting advertising content
US7136393B2 (en) * 2002-07-19 2006-11-14 Northrop Grumman Coporation Information transmission system and method of data transmission
US7181742B2 (en) * 2002-11-19 2007-02-20 Intel Corporation Allocation of packets and threads
US7346058B1 (en) * 2002-11-27 2008-03-18 Cisco Technology, Inc. Multiprotocol encapsulation system and method
US7042885B2 (en) * 2002-12-05 2006-05-09 Nokia Inc. System and method for implementing a distributed service platform using a system-wide switchtag definition
US7355974B2 (en) * 2003-01-27 2008-04-08 International Business Machines Corporation Method for forwarding data packets by a router
US20040196843A1 (en) * 2003-02-20 2004-10-07 Alcatel Protection of network infrastructure and secure communication of control information thereto
US7644177B2 (en) * 2003-02-28 2010-01-05 Cisco Technology, Inc. Multicast-routing-protocol-independent realization of IP multicast forwarding
US7386010B2 (en) * 2003-06-13 2008-06-10 Corrigent Systems Ltd Multiprotocol media conversion
KR100560761B1 (en) * 2003-07-08 2006-03-13 삼성전자주식회사 Interface conversion system and interface conversion method
US7447203B2 (en) * 2003-07-29 2008-11-04 At&T Intellectual Property I, L.P. Broadband access for virtual private networks
US8019841B2 (en) * 2003-09-30 2011-09-13 Nortel Networks Limited Zoning for distance pricing and network engineering in connectionless and connection-oriented networks
EP1692595A2 (en) * 2003-11-04 2006-08-23 Nexthop Technologies, Inc. Secure, standards-based communications across a wide-area network
US8804728B2 (en) * 2004-01-20 2014-08-12 Rockstar Consortium Us Lp Ethernet differentiated services conditioning
US7417995B2 (en) * 2004-01-20 2008-08-26 Nortel Networks Limited Method and system for frame relay and ethernet service interworking
US7333508B2 (en) * 2004-01-20 2008-02-19 Nortel Networks Limited Method and system for Ethernet and frame relay network interworking
US7505466B2 (en) * 2004-01-20 2009-03-17 Nortel Networks Limited Method and system for ethernet and ATM network interworking
US7406088B2 (en) * 2004-01-20 2008-07-29 Nortel Networks Limited Method and system for ethernet and ATM service interworking
KR100604835B1 (en) * 2004-02-24 2006-07-26 삼성전자주식회사 Protocol conversion and arbitration circuit, System having the same, and method for converting and arbitrating signals
CN1934837A (en) 2004-04-20 2007-03-21 北电网络有限公司 Method and system for quality of service support for Ethernet multiservice interworking over multiprotocol label switching
US20060072595A1 (en) * 2004-10-05 2006-04-06 Cisco Technology, Inc. System and method for service tagging for enhanced packet processing in a network environment
US20060215648A1 (en) * 2005-03-22 2006-09-28 Teng-Yi Jen System and method for hardware based protocol conversion between audio-visual stream and ip network
US7599364B2 (en) * 2005-09-13 2009-10-06 Agere Systems Inc. Configurable network connection address forming hardware
US8218770B2 (en) * 2005-09-13 2012-07-10 Agere Systems Inc. Method and apparatus for secure key management and protection
US8521955B2 (en) 2005-09-13 2013-08-27 Lsi Corporation Aligned data storage for network attached media streaming systems
JP2007206955A (en) * 2006-02-01 2007-08-16 Sony Corp Apparatus and method for information processing, program, and recording medium
JP2007235211A (en) * 2006-02-27 2007-09-13 Fujitsu Ltd Data transmitter-receiver, data transmission reception method, and data transmission reception program
JP4146886B2 (en) * 2006-05-23 2008-09-10 フリービット株式会社 Communication module and application program including this communication module
US7583674B2 (en) * 2006-11-20 2009-09-01 Alcatel Lucent Switch and method for supporting internet protocol (IP) network tunnels
CN101471817B (en) * 2007-12-27 2011-11-30 华为技术有限公司 Method, system and equipment for monitoring flux of connectionless IP network
CN103067199B (en) * 2012-12-19 2015-11-25 华为技术有限公司 Depth message detection result diffusion method and device
US9871666B2 (en) 2015-06-25 2018-01-16 AvaLAN Wireless Systems, Inc. Intermediate unicast network and method for multicast data networks
CN114008601B (en) * 2019-06-19 2023-11-10 三菱电机株式会社 Command conversion device, method and recording medium
TWI820977B (en) * 2022-10-21 2023-11-01 中原大學 Packet sorting and reassembly circuit module

Family Cites Families (165)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3373408A (en) 1965-04-16 1968-03-12 Rca Corp Computer capable of switching between programs without storage and retrieval of the contents of operation registers
US3478322A (en) 1967-05-23 1969-11-11 Ibm Data processor employing electronically changeable control storage
US3736566A (en) 1971-08-18 1973-05-29 Ibm Central processing unit with hardware controlled checkpoint and retry facilities
BE795789A (en) 1972-03-08 1973-06-18 Burroughs Corp MICROPROGRAM CONTAINING A MICRO-RECOVERY INSTRUCTION
IT986411B (en) 1973-06-05 1975-01-30 Olivetti E C Spa SYSTEM TO TRANSFER THE CONTROL OF PROCESSING FROM A FIRST PRIORITY LEVEL TO A SECOND PRIORITY LEVEL
US4016548A (en) 1975-04-11 1977-04-05 Sperry Rand Corporation Communication multiplexer module
CH584488A5 (en) 1975-05-05 1977-01-31 Ibm
US4075691A (en) 1975-11-06 1978-02-21 Bunker Ramo Corporation Communication control unit
US4130890A (en) 1977-06-08 1978-12-19 Itt Industries, Inc. Integrated DDC memory with bitwise erase
JPS56164464A (en) 1980-05-21 1981-12-17 Tatsuo Nogi Parallel processing computer
US4400770A (en) 1980-11-10 1983-08-23 International Business Machines Corporation Cache synonym detection and handling means
CA1179069A (en) 1981-04-10 1984-12-04 Yasushi Fukunaga Data transmission apparatus for a multiprocessor system
US4831358A (en) 1982-12-21 1989-05-16 Texas Instruments Incorporated Communications system employing control line minimization
US4890222A (en) 1984-12-17 1989-12-26 Honeywell Inc. Apparatus for substantially syncronizing the timing subsystems of the physical modules of a local area network
US4709347A (en) 1984-12-17 1987-11-24 Honeywell Inc. Method and apparatus for synchronizing the timing subsystems of the physical modules of a local area network
US4745544A (en) 1985-12-12 1988-05-17 Texas Instruments Incorporated Master/slave sequencing processor with forced I/O
US4788640A (en) 1986-01-17 1988-11-29 Intel Corporation Priority logic system
US5297260A (en) 1986-03-12 1994-03-22 Hitachi, Ltd. Processor having a plurality of CPUS with one CPU being normally connected to common bus
US4890218A (en) 1986-07-02 1989-12-26 Raytheon Company Variable length instruction decoding apparatus having cross coupled first and second microengines
US5142683A (en) 1987-03-09 1992-08-25 Unisys Corporation Intercomputer communication control apparatus and method
US4866664A (en) 1987-03-09 1989-09-12 Unisys Corporation Intercomputer communication control apparatus & method
US5115507A (en) 1987-12-23 1992-05-19 U.S. Philips Corp. System for management of the priorities of access to a memory and its application
FR2625340B1 (en) 1987-12-23 1990-05-04 Labo Electronique Physique GRAPHIC SYSTEM WITH GRAPHIC CONTROLLER AND DRAM CONTROLLER
DE68913629T2 (en) 1988-03-14 1994-06-16 Unisys Corp BLOCK LOCKING PROCESSOR FOR MULTIPLE PROCESSING DATA SYSTEM.
US5155854A (en) 1989-02-03 1992-10-13 Digital Equipment Corporation System for arbitrating communication requests using multi-pass control unit based on availability of system resources
US5155831A (en) 1989-04-24 1992-10-13 International Business Machines Corporation Data processing system with fast queue store interposed between store-through caches and a main memory
US5168555A (en) 1989-09-06 1992-12-01 Unisys Corporation Initial program load control
US5263169A (en) 1989-11-03 1993-11-16 Zoran Corporation Bus arbitration and resource management for concurrent vector signal processor architecture
DE3942977A1 (en) 1989-12-23 1991-06-27 Standard Elektrik Lorenz Ag METHOD FOR RESTORING THE CORRECT SEQUENCE OF CELLS, ESPECIALLY IN AN ATM SWITCHING CENTER, AND OUTPUT UNIT THEREFOR
US5179702A (en) * 1989-12-29 1993-01-12 Supercomputer Systems Limited Partnership System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
EP0446721B1 (en) 1990-03-16 2000-12-20 Texas Instruments Incorporated Distributed processing memory
US5390329A (en) 1990-06-11 1995-02-14 Cray Research, Inc. Responding to service requests using minimal system-side context in a multiprocessor environment
US5432918A (en) 1990-06-29 1995-07-11 Digital Equipment Corporation Method and apparatus for ordering read and write operations using conflict bits in a write queue
US5347648A (en) 1990-06-29 1994-09-13 Digital Equipment Corporation Ensuring write ordering under writeback cache error conditions
US5404482A (en) 1990-06-29 1995-04-04 Digital Equipment Corporation Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills
US5251205A (en) 1990-09-04 1993-10-05 Digital Equipment Corporation Multiple protocol routing
US5367678A (en) 1990-12-06 1994-11-22 The Regents Of The University Of California Multiprocessor system having statically determining resource allocation schedule at compile time and the using of static schedule with processor signals to control the execution time dynamically
KR960001273B1 (en) * 1991-04-30 1996-01-25 가부시키가이샤 도시바 Single chip microcomputer
US5255239A (en) 1991-08-13 1993-10-19 Cypress Semiconductor Corporation Bidirectional first-in-first-out memory device with transparent and user-testable capabilities
US5623489A (en) 1991-09-26 1997-04-22 Ipc Information Systems, Inc. Channel allocation system for distributed digital switching network
US5392412A (en) 1991-10-03 1995-02-21 Standard Microsystems Corporation Data communication controller for use with a single-port data packet buffer
GB2260429B (en) 1991-10-11 1995-05-24 Intel Corp Versatile cache memory
US5392391A (en) 1991-10-18 1995-02-21 Lsi Logic Corporation High performance graphics applications controller
DE69231957T2 (en) 1991-10-21 2002-04-04 Toshiba Kawasaki Kk High speed processor capable of handling multiple interruptions
US5452437A (en) 1991-11-18 1995-09-19 Motorola, Inc. Methods of debugging multiprocessor system
EP0544083A3 (en) 1991-11-26 1994-09-14 Ibm Interleaved risc-type parallel processor and processing methods
US5442797A (en) 1991-12-04 1995-08-15 Casavant; Thomas L. Latency tolerant risc-based multiple processor with event driven locality managers resulting from variable tagging
JP2823767B2 (en) 1992-02-03 1998-11-11 松下電器産業株式会社 Register file
US5404469A (en) 1992-02-25 1995-04-04 Industrial Technology Research Institute Multi-threaded microprocessor architecture utilizing static interleaving
US5742760A (en) * 1992-05-12 1998-04-21 Compaq Computer Corporation Network packet switch using shared memory for repeating and bridging packets at media rate
US5459842A (en) 1992-06-26 1995-10-17 International Business Machines Corporation System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory
DE4223600C2 (en) 1992-07-17 1994-10-13 Ibm Multiprocessor computer system and method for transmitting control information and data information between at least two processor units of a computer system
US5404484A (en) 1992-09-16 1995-04-04 Hewlett-Packard Company Cache system for reducing memory latency times
KR100313261B1 (en) 1992-12-23 2002-02-28 앙드래베이너,조엘브르리아드 Low Power Multi-task Controller (Name Correction)
US5404464A (en) 1993-02-11 1995-04-04 Ast Research, Inc. Bus control system and method that selectively generate an early address strobe
US5448702A (en) 1993-03-02 1995-09-05 International Business Machines Corporation Adapters with descriptor queue management capability
US5522069A (en) 1993-04-30 1996-05-28 Zenith Data Systems Corporation Symmetric multiprocessing system with unified environment and distributed system functions
CA2122182A1 (en) 1993-05-20 1994-11-21 Rene Leblanc Method for rapid prototyping of programming problems
JPH0740746A (en) 1993-07-29 1995-02-10 Aisin Seiki Co Ltd Checking mechanism of sunshine roof device for vehicle
CA2107299C (en) 1993-09-29 1997-02-25 Mehrad Yasrebi High performance machine for switched communications in a heterogenous data processing network gateway
US5446736A (en) 1993-10-07 1995-08-29 Ast Research, Inc. Method and apparatus for connecting a node to a wireless network using a standard protocol
US5450351A (en) 1993-11-19 1995-09-12 International Business Machines Corporation Content addressable memory implementation with random access memory
US5809237A (en) 1993-11-24 1998-09-15 Intel Corporation Registration of computer-based conferencing system
US5515296A (en) 1993-11-24 1996-05-07 Intel Corporation Scan path for encoding and decoding two-dimensional signals
US5740402A (en) 1993-12-15 1998-04-14 Silicon Graphics, Inc. Conflict resolution in interleaved memory systems with multiple parallel accesses
US5485455A (en) 1994-01-28 1996-01-16 Cabletron Systems, Inc. Network having secure fast packet switching and guaranteed quality of service
US5754764A (en) * 1994-02-22 1998-05-19 National Semiconductor Corp. Combination of input output circuitry and local area network systems
US5490204A (en) 1994-03-01 1996-02-06 Safco Corporation Automated quality assessment system for cellular networks
JP3547482B2 (en) 1994-04-15 2004-07-28 株式会社日立製作所 Information processing equipment
US5542088A (en) 1994-04-29 1996-07-30 Intergraph Corporation Method and apparatus for enabling control of task execution
US5721870A (en) 1994-05-25 1998-02-24 Nec Corporation Lock control for a shared main storage data processing system
US5544236A (en) 1994-06-10 1996-08-06 At&T Corp. Access to unsubscribed features
US5574922A (en) 1994-06-17 1996-11-12 Apple Computer, Inc. Processor with sequences of processor instructions for locked memory updates
US5781774A (en) 1994-06-29 1998-07-14 Intel Corporation Processor having operating modes for an upgradeable multiprocessor computer system
JP3810449B2 (en) * 1994-07-20 2006-08-16 富士通株式会社 Queue device
US5781551A (en) 1994-09-15 1998-07-14 Texas Instruments Incorporated Computer communications system with tree architecture and communications method
US5568476A (en) 1994-10-26 1996-10-22 3Com Corporation Method and apparatus for avoiding packet loss on a CSMA/CD-type local area network using receive-sense-based jam signal
JP3169779B2 (en) 1994-12-19 2001-05-28 日本電気株式会社 Multi-thread processor
US5550816A (en) 1994-12-29 1996-08-27 Storage Technology Corporation Method and apparatus for virtual switching
US5784712A (en) 1995-03-01 1998-07-21 Unisys Corporation Method and apparatus for locally generating addressing information for a memory access
US5701434A (en) 1995-03-16 1997-12-23 Hitachi, Ltd. Interleave memory controller with a common access queue
US5649157A (en) 1995-03-30 1997-07-15 Hewlett-Packard Co. Memory controller with priority queues
US5581729A (en) 1995-03-31 1996-12-03 Sun Microsystems, Inc. Parallelized coherent read and writeback transaction processing system for use in a packet switched cache coherent multiprocessor system
US5886992A (en) * 1995-04-14 1999-03-23 Valtion Teknillinen Tutkimuskeskus Frame synchronized ring system and method
US5758184A (en) * 1995-04-24 1998-05-26 Microsoft Corporation System for performing asynchronous file operations requested by runnable threads by processing completion messages with different queue thread and checking for completion by runnable threads
US5592622A (en) 1995-05-10 1997-01-07 3Com Corporation Network intermediate system with message passing architecture
JPH08320797A (en) 1995-05-24 1996-12-03 Fuji Xerox Co Ltd Program control system
US5828746A (en) 1995-06-07 1998-10-27 Lucent Technologies Inc. Telecommunications network
US5828863A (en) 1995-06-09 1998-10-27 Canon Information Systems, Inc. Interface device connected between a LAN and a printer for outputting formatted debug information about the printer to the printer
US5651002A (en) 1995-07-12 1997-07-22 3Com Corporation Internetworking device with enhanced packet header translation and memory
US5613071A (en) 1995-07-14 1997-03-18 Intel Corporation Method and apparatus for providing remote memory access in a distributed memory multiprocessor system
US5680641A (en) 1995-08-16 1997-10-21 Sharp Microelectronics Technology, Inc. Multiple register bank system for concurrent I/O operation in a CPU datapath
US5689566A (en) 1995-10-24 1997-11-18 Nguyen; Minhtam C. Network with secure communications sessions
US5809530A (en) 1995-11-13 1998-09-15 Motorola, Inc. Method and apparatus for processing multiple cache misses using reload folding and store merging
KR0150072B1 (en) 1995-11-30 1998-10-15 양승택 Device for controlling memory data path in parallel processing computer system
US5796413A (en) 1995-12-06 1998-08-18 Compaq Computer Corporation Graphics controller utilizing video memory to provide macro command capability and enhanched command buffering
US5898701A (en) * 1995-12-21 1999-04-27 Cypress Semiconductor Corporation Method and apparatus for testing a device
US5699537A (en) 1995-12-22 1997-12-16 Intel Corporation Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions
AU714679B2 (en) * 1995-12-29 2000-01-06 Tixi.Com Gmbh Telecommunication Systems Process and microcomputer system for automatic, secure and direct data transfer
US6201807B1 (en) * 1996-02-27 2001-03-13 Lucent Technologies Real-time hardware method and apparatus for reducing queue processing
US5761507A (en) 1996-03-05 1998-06-02 International Business Machines Corporation Client/server architecture supporting concurrent servers within a server with a transaction manager providing server/connection decoupling
US5809235A (en) 1996-03-08 1998-09-15 International Business Machines Corporation Object oriented network event management framework
US5764915A (en) 1996-03-08 1998-06-09 International Business Machines Corporation Object-oriented communication interface for network protocol access using the selected newly created protocol interface object and newly created protocol layer objects in the protocol stack
US5784649A (en) 1996-03-13 1998-07-21 Diamond Multimedia Systems, Inc. Multi-threaded FIFO pool buffer and bus transfer control system
US5797043A (en) 1996-03-13 1998-08-18 Diamond Multimedia Systems, Inc. System for managing the transfer of data between FIFOs within pool memory and peripherals being programmable with identifications of the FIFOs
US6199133B1 (en) * 1996-03-29 2001-03-06 Compaq Computer Corporation Management communication bus for networking devices
KR100219597B1 (en) * 1996-03-30 1999-09-01 윤종용 Queuing control method in cd-rom drive
US5768528A (en) 1996-05-24 1998-06-16 V-Cast, Inc. Client-server system for delivery of online information
JP3541335B2 (en) * 1996-06-28 2004-07-07 富士通株式会社 Information processing apparatus and distributed processing control method
US6023742A (en) * 1996-07-18 2000-02-08 University Of Washington Reconfigurable computing architecture for providing pipelined data paths
US5745913A (en) 1996-08-05 1998-04-28 Exponential Technology, Inc. Multi-processor DRAM controller that prioritizes row-miss requests to stale banks
US5812868A (en) 1996-09-16 1998-09-22 Motorola Inc. Method and apparatus for selecting a register file in a data processing system
CA2278447A1 (en) * 1996-11-08 1998-05-14 Pmc-Sierra (Maryland), Inc. Method and apparatus to translate data streams among multiple parties
US5860158A (en) * 1996-11-15 1999-01-12 Samsung Electronics Company, Ltd. Cache control unit with a cache request transaction-oriented protocol
US5905876A (en) * 1996-12-16 1999-05-18 Intel Corporation Queue ordering for memory and I/O transactions in a multiple concurrent transaction computer system
US6212542B1 (en) * 1996-12-16 2001-04-03 International Business Machines Corporation Method and system for executing a program within a multiscalar processor by processing linked thread descriptors
US6256115B1 (en) * 1997-02-21 2001-07-03 Worldquest Network, Inc. Facsimile network
US5742587A (en) 1997-02-28 1998-04-21 Lanart Corporation Load balancing port switching hub
US5905889A (en) * 1997-03-20 1999-05-18 International Business Machines Corporation Resource management system using next available integer from an integer pool and returning the integer thereto as the next available integer upon completion of use
US6535878B1 (en) * 1997-05-02 2003-03-18 Roxio, Inc. Method and system for providing on-line interactivity over a server-client network
US6182177B1 (en) * 1997-06-13 2001-01-30 Intel Corporation Method and apparatus for maintaining one or more queues of elements such as commands using one or more token queues
US6067585A (en) * 1997-06-23 2000-05-23 Compaq Computer Corporation Adaptive interface controller that can operate with segments of different protocol and transmission rates in a single integrated device
US6393483B1 (en) * 1997-06-30 2002-05-21 Adaptec, Inc. Method and apparatus for network interface card load balancing and port aggregation
US5887134A (en) * 1997-06-30 1999-03-23 Sun Microsystems System and method for preserving message order while employing both programmed I/O and DMA operations
US6170051B1 (en) * 1997-08-01 2001-01-02 Micron Technology, Inc. Apparatus and method for program level parallelism in a VLIW processor
US6014729A (en) * 1997-09-29 2000-01-11 Firstpass, Inc. Shared memory arbitration apparatus and method
US6032190A (en) * 1997-10-03 2000-02-29 Ascend Communications, Inc. System and method for processing data packets
US6061710A (en) * 1997-10-29 2000-05-09 International Business Machines Corporation Multithreaded processor incorporating a thread latch register for interrupt service new pending threads
DE69822591T2 (en) * 1997-11-19 2005-03-24 Imec Vzw System and method for context switching over predetermined breakpoints
US6360262B1 (en) * 1997-11-24 2002-03-19 International Business Machines Corporation Mapping web server objects to TCP/IP ports
US6070231A (en) * 1997-12-02 2000-05-30 Intel Corporation Method and apparatus for processing memory requests that require coherency transactions
JPH11203860A (en) * 1998-01-07 1999-07-30 Nec Corp Semiconductor memory device
US6223238B1 (en) * 1998-03-31 2001-04-24 Micron Electronics, Inc. Method of peer-to-peer mastering over a computer bus
KR100280460B1 (en) * 1998-04-08 2001-02-01 김영환 Data processing device and its multiple thread processing method
US6570850B1 (en) * 1998-04-23 2003-05-27 Giganet, Inc. System and method for regulating message flow in a digital data network
FR2778809B1 (en) * 1998-05-18 2000-07-28 Inst Nat Rech Inf Automat INSTALLATION FOR TRANSMITTING MESSAGES WITH IMPROVED STATIONS, AND CORRESPONDING METHOD
US6067300A (en) * 1998-06-11 2000-05-23 Cabletron Systems, Inc. Method and apparatus for optimizing the transfer of data packets between local area networks
US6157955A (en) * 1998-06-15 2000-12-05 Intel Corporation Packet processing system including a policy engine having a classification unit
US6373848B1 (en) * 1998-07-28 2002-04-16 International Business Machines Corporation Architecture for a multi-port adapter with a single media access control (MAC)
US6393026B1 (en) * 1998-09-17 2002-05-21 Nortel Networks Limited Data packet processing system and method for a router
US6526451B2 (en) * 1998-09-30 2003-02-25 Stmicroelectronics, Inc. Method and network device for creating circular queue structures in shared memory
DE19846274A1 (en) * 1998-10-08 2000-04-20 Alcatel Sa Method for carrying out cooperative multitasking in a communications network and network element therefor
US6347344B1 (en) * 1998-10-14 2002-02-12 Hitachi, Ltd. Integrated multimedia system with local processor, data transfer switch, processing modules, fixed functional unit, data streamer, interface unit and multiplexer, all integrated on multimedia processor
US6366998B1 (en) * 1998-10-14 2002-04-02 Conexant Systems, Inc. Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model
US6212611B1 (en) * 1998-11-03 2001-04-03 Intel Corporation Method and apparatus for providing a pipelined memory controller
US6389449B1 (en) * 1998-12-16 2002-05-14 Clearwater Networks, Inc. Interstream control and communications for multi-streaming digital processors
US6338078B1 (en) * 1998-12-17 2002-01-08 International Business Machines Corporation System and method for sequencing packets for multiprocessor parallelization in a computer network system
US6356692B1 (en) * 1999-02-04 2002-03-12 Hitachi, Ltd. Optical module, transmitter, receiver, optical switch, optical communication unit, add-and-drop multiplexing unit, and method for manufacturing the optical module
US6404752B1 (en) * 1999-08-27 2002-06-11 International Business Machines Corporation Network switch using network processor and methods
US6606704B1 (en) * 1999-08-31 2003-08-12 Intel Corporation Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode
US6668317B1 (en) * 1999-08-31 2003-12-23 Intel Corporation Microengine for parallel processor architecture
US6983350B1 (en) * 1999-08-31 2006-01-03 Intel Corporation SDRAM controller for parallel processor architecture
EP1188294B1 (en) * 1999-10-14 2008-03-26 Bluearc UK Limited Apparatus and method for hardware implementation or acceleration of operating system functions
US6529983B1 (en) * 1999-11-03 2003-03-04 Cisco Technology, Inc. Group and virtual locking mechanism for inter processor synchronization
US6532509B1 (en) * 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) * 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6324624B1 (en) * 1999-12-28 2001-11-27 Intel Corporation Read lock miss control and queue management
US6631430B1 (en) * 1999-12-28 2003-10-07 Intel Corporation Optimizations to receive packet status from fifo bus
US6560667B1 (en) * 1999-12-28 2003-05-06 Intel Corporation Handling contiguous memory references in a multi-queue system
US6307789B1 (en) * 1999-12-28 2001-10-23 Intel Corporation Scratchpad memory
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
US6661794B1 (en) * 1999-12-29 2003-12-09 Intel Corporation Method and apparatus for gigabit packet assignment for multithreaded packet processing
US6631462B1 (en) * 2000-01-05 2003-10-07 Intel Corporation Memory shared between processing threads
US6678746B1 (en) * 2000-08-01 2004-01-13 Hewlett-Packard Development Company, L.P. Processing network packets
US6553406B1 (en) * 2000-08-03 2003-04-22 Prelude Systems, Inc. Process thread system receiving request packet from server thread, initiating process thread in response to request packet, synchronizing thread process between clients-servers.

Also Published As

Publication number Publication date
TWI239164B (en) 2005-09-01
DE60221030D1 (en) 2007-08-16
CA2460530C (en) 2008-06-17
KR100647949B1 (en) 2006-11-17
EP1430658B1 (en) 2007-07-04
CN1593041B (en) 2011-06-29
HK1067821A1 (en) 2005-04-15
ATE366494T1 (en) 2007-07-15
DE60221030T2 (en) 2008-03-20
US20030067934A1 (en) 2003-04-10
KR20040019037A (en) 2004-03-04
CN1593041A (en) 2005-03-09
EP1430658A1 (en) 2004-06-23
US7126952B2 (en) 2006-10-24
WO2003030461A1 (en) 2003-04-10

Similar Documents

Publication Publication Date Title
CA2460530A1 (en) Method, apparatus and computer program for the decapsulation and encapsulation of packets with multiple headers
EP1049298A3 (en) Method for classifying data acording to quality of service
WO2002079949A3 (en) Internet security system
AU2001237852A1 (en) Method and apparatus for mapping an ip address to an msisdn number within a wireless application processing network
WO2004092924A3 (en) Method and system for locating a wireless access device in a wireless network
CA2110653A1 (en) Packet Network Interface
CA2380319A1 (en) Parsing a packet header
CA2451661A1 (en) Method and apparatus for obtaining data information
CA2426609A1 (en) Method for geolocating logical network addresses
DE60044671D1 (en) NETWORK STACK SWITCHING ARRANGEMENT
AU2002328419A1 (en) Semiconductor circuit device, packet processing method, management system, management method, and packet processing method
WO2005046178A3 (en) Method and apparatus for providing network security using security labeling
WO2006073740A3 (en) Interpreting an application message at a network element using sampling and heuristics
WO2000052896A3 (en) Method and apparatus for managing a network flow in a high performance network interface
AU2003259554A1 (en) Network terminal device, address management server, communication system, and network communication method using mac addresses to determine the ip target addresses
WO2004030276A3 (en) Dynamic network configuration
CA2287721A1 (en) Router device and label switched path control method using upstream initiated aggregation
EP1161028A3 (en) A multicast routing method and an apparatus
WO2002076063A8 (en) Method, apparatus, article and system for network communications
GB9921208D0 (en) Modification of tag field in ethernet data packets
CA2385339A1 (en) Method and system for frame and protocol classification
WO2002028048A3 (en) Virtual ip framework and interfacing method
WO2002043332A3 (en) Sequencing of user data packets segmented into aal2 packets transported over internet protocol (ip)
WO2004010655A3 (en) Method for assigning a back-off interval
TW200625871A (en) Method, system and program for automatically detecting distributed port scans in computer networks

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed

Effective date: 20140912