CA2519672A1 - High-speed silicon-based electro-optic modulator - Google Patents

High-speed silicon-based electro-optic modulator Download PDF

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Publication number
CA2519672A1
CA2519672A1 CA002519672A CA2519672A CA2519672A1 CA 2519672 A1 CA2519672 A1 CA 2519672A1 CA 002519672 A CA002519672 A CA 002519672A CA 2519672 A CA2519672 A CA 2519672A CA 2519672 A1 CA2519672 A1 CA 2519672A1
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silicon
optic device
based electro
electro
region
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CA2519672C (en
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Robert Keith Montgomery
Margaret Ghiron
Prakash Gothoskar
Vipulkumar Patel
Kalpendu Shastri
Soham Pathak
Katherine A. Yanushefski
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Lightwire LLC
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
    • G02F1/025—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction in an optical waveguide structure
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/21—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  by interference
    • G02F1/225—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  by interference in an optical waveguide structure
    • G02F1/2257—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  by interference in an optical waveguide structure the optical waveguides being made of semiconducting material
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12142—Modulator
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12159—Interferometer

Abstract

A silicon-based electro-optic modulator (30) is based on forming a gate region of a first conductivity to partially overly a body region of a second conductivity type, with a relatively thin dielectric layer (10) interposed between the contiguous portions of the gate and body regions (12, 10). The modulator may be formed on an SOI platform, with the body region formed in the relatively thin silicon surface layer of the SOI structure and the gate region formed of a relatively thin silicon layer (10) overlying the SOI structure.
The doping in the gate and body regions is controlled to form lightly doped regions above and below the dielectric, thus defining the active region (16) of the device. Advantageously, the optical electric field essentially coincides with the free carrier concentration area in this active device region. The application of a modulation signal thus causes the simultaneous accumulation, depletion or inversion of free carriers on both sides of the dielectric at the same time, resulting in high speed operation.

Claims (134)

1. A silicon-based electro-optic device comprising:

a relatively thin silicon body region doped to exhibit a first conductivity type;
a relatively thin silicon gate region doped to exhibit a second conductivity type, the silicon gate region disposed at least in part over the silicon body region to define a contiguous area between said silicon body and gate regions;
a relatively thin dielectric layer disposed in the contiguous area between said silicon body and gate regions, the combination of said silicon body and gate regions with the interposed relatively thin dielectric layer defining the active region of the electro-optic device;
a first electrical contact coupled to said silicon gate region; and a second electrical contact coupled to said silicon body region, wherein upon application of an electrical signal to the first and second electrical contacts, free carriers accumulate, deplete or invert within the silicon body and gate regions on both sides of the relatively thin dielectric layer at the same time, such that the optical electric field of said optical signal substantially overlaps with the free carrier concentration modulation area in the active region of said electro-optic device.
2. A silicon-based electro-optic device as defined in claim 1 wherein the relative placement of the silicon gate region with respect to the silicon body region is controlled, in combination with the doping concentrations and thickness of said silicon gate and body regions and the thickness of the dielectric layer, such that upon the application of an electrical signal to the first and second electrical contacts, the position of the free carrier concentration modulation peak near the dielectric layer substantially coincides with the position of the peak of the optical electric field.
3. A silicon-based electro-optic device as defined in claim 1 wherein the peak of the optical electric field is within one fourth of the total thickness of the silicon gate region as defined from the relatively thin dielectric layer and within one fourth of the total thickness of the silicon body region as defined from said relatively thin dielectric layer.
4. A silicon-based electro-optic device as defined in claim 3 wherein the peak of the optical electric field is within one eighth of the total thickness of the silicon gate region as defined from the relatively thin dielectric layer and within one eighth of the total thickness of the silicon body region as defined from said relatively thin dielectric layer.
5. A silicon-based electro-optic device as defined in claim 1 wherein the percentage of the optical electric field in the silicon gate region is substantially equal to the percentage of the optical electric field in the silicon body region.
6. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin silicon gate region is defined as comprising a first portion associated with the active region and a second portion associated with the location of a first electrical contact region.
7. A silicon-based electro-optic device as defined in claim 6 wherein the second portion of the silicon gate region includes first and second separated areas disposed on either side of the first portion, with the first electrical contact region disposed in the first separated area and a third electrical contact region disposed in the second separated area.
8. A silicon-based electro-optic device as defined in claim 6 wherein the first portion of the silicon gate region is more lightly doped than the second portion of the silicon gate region to reduce optical loss in the first portion, the second portion being more heavily doped to provide a relatively low series resistance between the active region and the first electrical contact region.
9. A silicon-based electro-optic device as defined in claim 8 wherein the relatively low series resistance allows for high speed operation when driven by an electrical signal source having a relatively low output drive impedance.
10. A silicon-based electro-optic device as defined in claim 8 wherein the silicon gate region exhibits a graded dopant concentration increasing from the first portion to the second portion.
11. A silicon-based electro-optic device as defined in claim 6 wherein the silicon gate region exhibits a third portion disposed above the first portion, the third portion being more lightly doped than the first portion to reduce optical loss within the active portion.
12. A silicon-based electro-optic device as defined in claim 11 wherein the silicon gate region exhibits a graded dopant concentration decreasing from the first portion to the third portion.
13. A silicon-based electro-optic device as defined in claim 6 wherein the first portion of the silicon gate region exhibits a dopant concentration on the order of 17 cm -3 and the second portion of the silicon gate region exhibits a dopant concentration on the order of 10 19 cm -3.
14. A silicon-based electro-optic device as defined in claim 1 wherein the thickness of the relatively thin silicon gate region is controlled to maintain the peak of the optical electric field at substantially the location of the relatively thin dielectric layer.
15. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin silicon gate region comprises a thickness less than one-half micron.
16. A silicon-based electro-optic device as defined in claim 15 wherein the relatively thin silicon gate region comprises a thickness less than 0.2 µm.
17. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin silicon gate region comprises one or more forms of silicon chosen from the group consisting of: polysilicon, amorphous silicon, grain-size-enhanced polysilicon, grain-boundary-passivated polysilicon, grain-aligned polysilicon, strained silicon, substantially single crystal silicon, Si X Ge 1-X and single crystal silicon.
18. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises a single layer of one form of silicon selected from the identified group.
19. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises multiple layers of silicon, selected from one or more of the forms of silicon in the identified group.
20. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises polysilicon.
21. A silicon-based electro-optic device as defined in claim 20 wherein the polysilicon comprises grain-size-enhanced polysilicon.
22. A silicon-based electro-optic device as defined in claim 21 wherein the grain-size-enhanced polysilicon is formed using a seed catalyst technique.
23. A silicon-based electro-optic device as defined in claim 21 wherein the grain-size-enhanced polysilicon is formed using a silicon implantation and anneal process.
24. A silicon-based electro-optic device as defined in claim 20 wherein the polysilicon comprises grain-boundary-passivated polysilicon.
25. A silicon-based electro-optic device as defined in claim 24 wherein the grain-boundary-passivated polysilicon is formed using a hydrogen anneal process.
26. A silicon-based electro-optic device as defined in claim 20 wherein the polysilicon comprises grain-aligned polysilicon.
27. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises amorphous silicon.
28. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises strained silicon.
29. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises substantially single crystal silicon.
30. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises Si X Ge1-X.
31. A silicon-based electro-optic device as defined in claim 17 wherein the relatively thin silicon gate region comprises single crystal silicon.
32. A silicon-based electro-optic device as defined in claim 6 wherein the first electrical contact region comprises a silicide formed within the second portion of the silicon gate region.
33. A silicon-based electro-optic device as defined in claim 32 wherein the silicide is chosen from the group consisting of tantalum silicide, cobalt silicide, titanium silicide, molybdenum silicide, tungsten silicide and nickel silicide.
34. A silicon-based electro-optic device as defined in claim 6 wherein the first electrical contact region comprises a plurality of separate contact areas disposed at different locations along the second portion of the silicon gate region to reduce optical signal loss while providing low series resistance.
35. A silicon-based electro-optic device as defined in claim 7 wherein the first and third electrical contact regions each comprise a silicide formed within the first and second areas of the second portion of the silicon gate region.
36. A silicon-based electro-optic device as defined in claim 35 wherein the silicide is chosen from the group consisting of tantalum silicide, cobalt silicide, titanium silicide, molybdenum silicide, tungsten silicide and nickel silicide.
37. A silicon-based electro-optic device as defined in claim 36 wherein the silicide is titanium silicide.
38. A silicon-based electro-optic device as defined in claim 7 wherein the first and third electrical contact regions each comprise a plurality of separate contact areas disposed at different locations along the first and second areas, respectively, of the second portion of the silicon gate region to reduce optical loss while providing low series resistance.
39. A silicon-based electro-optic device as defined in claim 1 wherein the silicon gate region exhibits one or more rounded corner edges in the active device region to reduce optical signal loss.
40. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin silicon body region is defined as comprising a first portion associated with the active region and a second portion associated with the location of a second electrical contact region.
41. A silicon-based electro-optic device as defined in claim 40 wherein the second portion of the silicon body region includes first and second separated areas disposed on either side of the first portion, with the second electrical contact region disposed in the first separated area and a fourth electrical contact region disposed in the second separated area.
42. A silicon-based electro-optic device as defined in claim 40 wherein the first portion of the silicon body region is more lightly doped than the second portion of the silicon body region to reduce optical signal loss in the first portion, the second portion being more heavily doped to provide a relatively low series resistance between the active region and the second electrical contact region.
43. A silicon-based electro-optic device as defined in claim 42 wherein the relatively low series resistance allows for higher speed operation when driven by an electrical signal source having a relatively low output drive impedance.
44. A silicon-based electro-optic device as defined in claim 42 wherein the silicon body region exhibits a graded dopant concentration increasing from the first portion to the second portion.
45. A silicon-based electro-optic device as defined in claim 40 wherein the silicon body region exhibits a third portion disposed below the first portion, the third portion being more lightly doped than the first portion to reduce optical loss within the active region.
46. A silicon-based electro-optic device as defined in claim 45 wherein the silicon body region exhibits a graded dopant concentration decreasing from the first portion to the third portion.
47. A silicon-based electro-optic device as defined in claim 40 wherein the first portion of the silicon body region exhibits a dopant concentration on the order of 10 17cm -3 and the second portion of the silicon body region exhibits a dopant concentration on the order of 10 19cm-3.
48. A silicon-based electro-optic device as defined in claim 1 wherein the thickness of the relatively thin silicon body region is controlled to maintain the peak of the optical electric field at substantially the location of the relatively thin dielectric layer.
49. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin silicon body region comprises a thickness of less than one-half micron.
50. A silicon-based electro-optic device as defined in claim 49 wherein the relatively thin silicon body region comprises a thickness of less than 0.2 µm.
51. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin silicon body region comprises one or more forms of silicon chosen from the group consisting of: partially-depleted silicon, fully-depleted silicon, strained silicon, substantially single crystal silicon, Si X Ge1-X and single crystal silicon.
52. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises a single layer of one form of silicon selected from the identified group.
53. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises multiple layers of silicon, selected from one or more of the forms of silicon in the identified group.
54. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises partially-depleted silicon.
55. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises fully-depleted silicon.
56. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises strained silicon.
57. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises substantially single crystal silicon.
58. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises Si X Ge1-X.
59. A silicon-based electro-optic device as defined in claim 51 wherein the relatively thin silicon body region comprises single crystal silicon.
60. A silicon-based electro-optic device as defined in claim 40 wherein the second electrical contact region comprises a silicide formed within the second portion of the silicon body region.
61. A silicon-based electro-optic device as defined in claim 60 wherein the silicide is chosen from the group consisting of tantalum silicide, cobalt silicide, titanium silicide, molybdenum silicide, tungsten silicide and nickel silicide.
62. A silicon-based electro-optic device as defined in claim 40 wherein the second electrical contact region comprises a plurality of separate contact areas disposed at different locations along the second portion of the silicon body region to reduce optical signal loss while providing low series resistance.
63. A silicon-based electro-optic device as defined in claim 41 wherein the second and fourth electrical contact regions each comprise a silicide formed within the first and second areas of the second portion of the silicon body region.
64. A silicon-based electro-optic device as defined in claim 63 wherein the silicide is chosen from the group consisting of tantalum silicide, cobalt silicide, titanium silicide, molybdenum silicide, tungsten silicide and nickel silicide.
65. A silicon-based electro-optic device as defined in claim 41 wherein the second and fourth electrical contact regions each comprise a plurality of separate contact areas disposed at different locations along the first and second areas, respectively, of the second portion of the silicon body region to reduce optical loss while providing low series resistance.
66. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region exhibits one or more rounded corner edges in the active device region to reduce optical signal loss.
67. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region exhibits p-type conductivity and the silicon gate region exhibits n-type conductivity.
68. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region exhibits n-type conductivity and the silicon gate region exhibits p-type conductivity.
69. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region exhibits both n-type and p-type conductivity, with the concentration of the electrons being greater than the concentration of the holes, and the silicon gate region exhibits both n-type and p-type conductivity, with the concentration of the holes being greater than the concentration of electrons, the differences in concentration sufficient to provide for free carrier movement upon application of an electrical signal.
70. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region exhibits both n-type and p-type conductivity, with the concentration of the holes being greater than the concentration of the electrons, and the silicon gate region exhibits both n-type and p-type conductivity, with the concentration of electrons being greater than the concentration of holes, the differences in concentration sufficient to provide for free carrier movement upon application of an electrical signal.
71. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin dielectric layer comprises a material exhibiting rapid charge and discharge of free carriers within the silicon gate and body regions on both sides of said relatively thin dielectric layer.
72. A silicon-based electro-optic device as defined in claim 71 wherein the relatively thin dielectric layer comprises a single layer formed of one material.
73. A silicon-based electro-optic device as defined in claim 71 wherein the relatively thin dielectric layer comprises a plurality of sub-layers comprising at least one material.
74. A silicon-based electro-optic device as defined in claim 71 wherein the dielectric is chosen from the group consisting of: silicon dioxide, silicon nitride, oxynitride, bismuth oxide, hafnium oxide, and any combination thereof.
75. A silicon-based electro-optic device as defined in claim 1 wherein the relatively thin dielectric layer comprises a thickness of no more than 1000.ANG..
76. A silicon-based electro-optic device as defined in claim 75 wherein the relatively thin dielectric layer comprises a thickness of no more than 200 .ANG..
77. A silicon-based electro-optic device as defined in claim 1 wherein the device further comprises a surrounding region exhibiting a lower effective refractive index than the active region, the surrounding region disposed such that the effective refractive index decreases away from the active region to provide substantial vertical and horizontal optical signal confinement within the electro-optic device.
78. A silicon-based electro-optic device as defined in claim 77 wherein the surrounding region comprises one or more materials chosen from the group consisting of silicon dioxide, silicon nitride or silicon.
79. A silicon-based electro-optic device as defined in claim 1 wherein the device comprises an electro-optic phase modulator, with an electrical modulating signal applied to the first and second electrical contacts, the modulator drawing substantially zero DC power during operation.
80. A silicon-based electro-optic device as defined in claim 79 wherein the device is a low power device, drawing substantially zero DC power during operation and drawing AC power essentially only during the transitions between optical "1" and optical "0" phase conditions.
81. A silicon-based electro-optic device as defined in claim 79 wherein the device is a defined as a low voltage device, operating with an electrical modulating signal input voltage of a value less than or equal to a supply voltage consistent with the integral CMOS transistor technology.
82. A silicon-based electro-optic device as defined in claim 79 wherein the device is a defined as a low voltage device, operating with an electrical modulating signal input voltage of a value less than 2V.
83. A silicon-based electro-optic device as defined in claim 79 wherein the device comprises an active length along the optical propagation direction of no more than 2 millimeters.
84. A silicon-based electro-optic device as defined in claim 1 wherein the device comprises a plurality of electro-optic phase modulators, with at least one electrical modulating signal applied as an input to at least one of the first and second electrical contacts.
85. A silicon-based electro-optic device as defined in claim 84 wherein the plurality of electro-optic phase modulators comprises a parallel array of electro-optic phase modulators.
86. A silicon-based electro-optic device as defined in claim 84 wherein the plurality of electro-optic phase modulators comprises a serial connection of electro-optic phase modulators.
87. A silicon-based electro-optic device as defined in claim 1 wherein the electro-optic device is formed as part of a silicon-on-insulator (SOI) arrangement including a silicon substrate, a buried dielectric layer and a relatively thin surface silicon layer, with the silicon body region of said electro-optic device formed within the relatively thin surface silicon layer.
88. A silicon-based electro-optic device as defined in claim 87 wherein the buried dielectric layer comprises a material with a lower refractive index than silicon and provides for optical confinement within the relatively thin silicon body region formed in the SOI surface silicon layer.
89. A silicon-based electro-optic device as defined in claim 87 wherein the buried dielectric layer comprises a thickness associated with achieving substantially low optical loss.
90. A silicon-based electro-optic device as defined in claim 89 wherein the buried dielectric layer comprises a thickness of at least 0.2 microns.
91. A silicon-based electro-optic device as defined in claim 87 wherein the relatively thin surface silicon layer comprises a thickness no greater than one-half micron.
92. A silicon-based electro-optic device as defined in claim 91 wherein the relatively thin surface silicon layer comprises a thickness no greater than 0.2 µm.
93. A silicon-based electro-optic device as defined in claim 1 wherein the silicon gate region comprises a shape including an input, increasing taper along a portion of the device where an optical signal is coupled into the active region, the input taper to minimize optical signal reflections at the input of the electro-optic device.
94. A silicon-based electro-optic device as defined in claim 93 wherein the input, increasing taper is essentially undoped.
95. A silicon-based electro-optic device as defined in claim 93 wherein the input taper is a one-dimensional taper in same direction as the optical signal propagation direction.
96. A silicon-based electro-optic device as defined in claim 93 wherein the input taper is a two-dimensional taper including a first dimension taper in the same direction as the optical signal propagation and a second dimension taper in a direction perpendicular to the optical signal propagation direction.
97. A silicon-based electro-optic device as defined in claim 93 wherein the device further comprises an angled silicon body region, the angled silicon body region having a shape such that an overlap between the angled silicon body region and the tapered silicon gate region reduces corner reflections and provides optical mode matching at the input of the electro-optic device.
98. A silicon-based electro-optic device as defined in claim 97 wherein the angled silicon body region is patterned to angle in opposition to the input and output tapers of the silicon gate region such that the overlap between the opposing directions of the body and gate regions is used to control and define the width of the active device region.
99. A silicon-based electro-optic device as defined in claim 1 wherein the silicon gate region comprises a shape including an output, decreasing taper along a portion of the device where an optical signal is coupled out of the active region, the output taper to minimize optical signal reflections at the output of the electro-optic device.
100. A silicon-based electro-optic device as defined in claim 99 wherein the output, decreasing taper is essentially undoped.
101. A silicon-based electro-optic device as defined in claim 99 wherein the output taper is a one-dimensional taper in same direction as the optical signal propagation direction.
102. A silicon-based electro-optic device as defined in claim 99 wherein the output taper is a two-dimensional taper including a first dimension taper in the same direction as the optical signal propagation and a second dimension taper in a direction perpendicular to the optical signal propagation direction.
103. A silicon-based electro-optic device as defined in claim 99 wherein the device further comprises an angled silicon body region, the angled silicon body region having a shape such that an overlap between the angled silicon body region and the tapered silicon gate region reduces corner reflections and provides optical mode matching at the output of the electro-optic device.
104. A silicon-based electro-optic device as defined in claim 103 wherein the angled silicon body region is patterned to angle in opposition to the input and output tapers of the silicon gate region such that the overlap between the opposing directions of the body and gate regions is used to control and define the width of the active device region.
105. A silicon-based electro-optic device as defined in claim 104 wherein the overlap may be defined to comprise a width less than the individual layer minimum design width rules used to form the electro-optic device.
106. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region comprises a shape including an input, decreasing taper along a portion of the device where an optical signal is coupled into the active region to provide optical mode matching into the electro-optic device.
107. A silicon-based electro-optic device as defined in claim 106 wherein the input, decreasing taper is essentially undoped.
108. A silicon-based electro-optic device as defined in claim 106 wherein the input taper is a one-dimensional taper in the same direction as the optical signal propagation direction.
109. A silicon-based electro-optic device as defined in claim 1 wherein the silicon body region comprises a shape including an output, increasing taper along a portion of the device where an optical signal is coupled out of the active region to provide optical mode matching out of the electro-optic device.
110. A silicon-based electro-optic device as defined in claim 109 wherein the output, increase taper is essentially undoped.
111. A silicon-based electro-optic device as defined in claim 109 wherein the output taper of the silicon body region is a one-dimensional taper in the same direction as the optical signal propagation direction.
112. A silicon-based electro-optic device as defined in claim 7 wherein the silicon gate region is patterned to include a central longitudinal extent disposed to essentially cover the active device region, and at least two contact arms disposed orthogonal to said central longitudinal extent, each contact arm providing electric contact to the first and third electrical contact regions in the first and second areas of the second gate portion.
113. A silicon-based electro-optic device as defined in claim a wherein the silicon gate region is patterned to include a relatively wide longitudinal extent disposed to cover an extended central portion of the device extending beyond the active device region, the silicon gate region further patterned to form a plurality of contacts to the first and third electrical contact regions in the first and second areas of the second gate portion, and a plurality of openings to expose a plurality of contacts to the second and fourth electrical contact regions of the first and second areas of the second body portion.
114. A Mach-Zehnder interferometer comprising an input optical waveguide sputter, defined as comprising an input waveguide section optically coupled to both a first arm and a second arm, said first and second arms disposed in parallel; and an output optical waveguide combiner, defined as comprising an output waveguide section optically coupled to the input optical waveguide splitter first and second arms, wherein the first arm includes a first electro-optic phase modulator comprising:
a relatively thin silicon body region doped to exhibit a first conductivity type;
a relatively thin silicon gate region doped to exhibit a second conductivity type, the silicon gate region disposed at least in part over the silicon body region to define a contiguous area between said silicon body and gate regions;
a relatively thin dielectric layer disposed in the contiguous area between said silicon body and gate regions, the combination of said silicon body and gate regions with the interposed relatively thin dielectric layer defining the active region of the electro-optic device;
a first electrical contact coupled to said silicon gate region; and a second electrical contact coupled to said silicon body region, wherein upon application of an electrical signal to the first and second electrical contacts, free carriers accumulate, deplete or invert within the silicon body and gate regions on both sides of the relatively thin dielectric layer at the same time, such that the optical electric field of said optical signal substantially overlaps with the free carrier concentration modulation area in the active region of said first electro-optic phase modulator device.
115. A Mach-Zehnder interferometer as defined in claim 114 wherein, the interferometer further comprises a second electro-optic modulator disposed along the second arm, said second electro-optic modulator comprising a relatively thin silicon body region doped to exhibit a first conductivity type;
a relatively thin silicon gate region doped to exhibit a second conductivity type, the silicon gate region disposed at least in part over the silicon body region to define a contiguous area between said silicon body and gate regions;
a relatively thin dielectric layer disposed in the contiguous area between said silicon body and gate regions, the combination of said silicon body and gate regions with the interposed relatively thin dielectric layer defining the active region of the electro-optic device;
a first electrical contact coupled to said silicon gate region; and a second electrical contact coupled to said silicon body region, wherein upon application of an electrical signal to-the first and second electrical contacts, free carriers accumulate, deplete or invert within the silicon body and gate regions on both sides of the relatively thin dielectric layer at the same time, such that the optical electric field of said optical signal substantially overlaps with the free carrier concentration modulation area in the active region of said second electro-optic modulator.
116. A Mach-Zehnder interferometer as defined in claim 114 wherein the input and output optical waveguides are formed in the relatively thin silicon layer used to form the body region.
117. A Mach-Zehnder interferometer as defined in claim 114 wherein the relatively thin silicon gate region comprises a form of silicon capable of supporting optical transmission and the input and output optical waveguides are formed at least in part in said relatively thin silicon gate region.
118. A Mach-Zehnder interferometer as defined in claim 114 wherein the input and output optical waveguides are formed by a combination of the silicon gate region, the relatively thin gate dielectric layer and the silicon body region, the combination as defined by the active device region.
119. A Mach-Zehnder interferometer as defined in claim 115 wherein the first arm operates in depletion mode and the second arm operates in accumulation mode.
120. A Mach-Zehnder interferometer as defined in claim 115 wherein the first arm operates in accumulation mode and the second arm operates in depletion mode.
121. A Mach-Zehnder interferometer as defined in claim 115 wherein both the first and second arms operate in depletion mode.
122. A Mach-Zehnder interferometer as defined in claim 115 wherein both the first and second arms operate in accumulation mode.
123. A Mach-Zehnder interferometer as defined in claim 115 wherein both the first and second arms operate in inversion mode.
124. A Mach-Zehnder interferometer as defined in claim 115 wherein the Mach-Zehnder interferometer is balanced and symmetric such that the active length along the optical propagation direction of the first arm is essentially equal to the active length along the optical propagation direction of the second arm.
125. A Mach-Zehnder interferometer as defined in claim 115 wherein the Mach-Zehnder interferometer comprises an asymmetric construction between the first and second arms.
126. A Mach-Zehnder interferometer as defined in claim 125 wherein the active length along the optical propagation direction of the first arm is unequal to the active length along the optical propagation direction of the second arm.
127. A Mach-Zehnder interferometer as defined in claim 125 wherein the first arm comprises a plurality of N separate electro-optic modulators and the second arm comprises a plurality of M separate electro-optic modulators, where N .noteq.
M.
128. A Mach-Zehnder interferometer as defined in claim 125 wherein the first arm comprises a plurality of N separate electro-optic modulators and the second arm comprises a plurality of M separate electro-optic modulators, where N = M.
129. A Mach-Zehnder interferometer as defined in claim 125 wherein the dopant concentration in the first arm is different than the dopant concentration in the second arm.
130. A Mach-Zehnder interferometer as defined in claim 125 wherein the input optical waveguide sputter presents a ratio of input optical signal power other than 50:50 to the first and second arms.
131. A Mach-Zehnder interferometer as defined in claim 114 wherein the Mach-Zehnder interferometer comprises a plurality of separate interferometers disposed in a predetermined combination.
132. A Mach-Zehnder interferometer as defined in claim 131 wherein the plurality of Mach-Zehnder interferometers are disposed in a parallel configuration.
133. A Mach-Zehnder interferometer as defined in claim 131 wherein the plurality of Mach-Zehnder interferometers are disposed in a serial configuration.
134. A Mach-Zehnder interferometer as defined in claim 115 wherein the first electro-optic modulator disposed along the first arm is formed such that the silicon gate region is located on the exterior of the first arm optical waveguide and the silicon body region is located on the interior of said first arm optical waveguide; and the second electro-optic modulator disposed along the second arm is formed such that the silicon body region is located on the exterior of the first arm optical waveguide and the silicon gate region is located on the interior of said second arm optical waveguide.
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KR100808305B1 (en) 2008-02-27
JP4820649B2 (en) 2011-11-24
EP1613991A2 (en) 2006-01-11
WO2004088394A3 (en) 2005-03-31
CN100359367C (en) 2008-01-02
US20040208454A1 (en) 2004-10-21
WO2004088394A2 (en) 2004-10-14
EP1613991B1 (en) 2013-07-24
US6845198B2 (en) 2005-01-18
KR20050114696A (en) 2005-12-06
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CA2519672C (en) 2012-11-13
CN1764863A (en) 2006-04-26

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