CA2695715A1 - Self-aligned nanotube field effect transistor and method of fabricating same - Google Patents

Self-aligned nanotube field effect transistor and method of fabricating same Download PDF

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Publication number
CA2695715A1
CA2695715A1 CA2695715A CA2695715A CA2695715A1 CA 2695715 A1 CA2695715 A1 CA 2695715A1 CA 2695715 A CA2695715 A CA 2695715A CA 2695715 A CA2695715 A CA 2695715A CA 2695715 A1 CA2695715 A1 CA 2695715A1
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Prior art keywords
nanotube
forming
depositing
over
metal contact
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CA2695715A
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French (fr)
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CA2695715C (en
Inventor
Joerg Appenzeller
Phaedon Avouris
Kevin K. Chan
Philip G. Collins
Richard Martel
Hon-Sum Philip Wong
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International Business Machines Corp
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Individual
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0673—Nanowires or nanotubes oriented parallel to a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0676—Nanowires or nanotubes oriented perpendicular or at an angle to a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/20—Carbon compounds, e.g. carbon nanotubes or fullerenes
    • H10K85/221—Carbon nanotubes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60—Organic compounds having low molecular weight
    • H10K85/615—Polycyclic condensed aromatic hydrocarbons, e.g. anthracene
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/84—Manufacture, treatment, or detection of nanostructure
    • Y10S977/842—Manufacture, treatment, or detection of nanostructure for carbon nanotubes or fullerenes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/936—Specified use of nanostructure for electronic or optoelectronic application in a transistor or 3-terminal device
    • Y10S977/938—Field effect transistors, FETS, with nanowire- or nanotube-channel region
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/94—Specified use of nanostructure for electronic or optoelectronic application in a logic circuit

Abstract

A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube [104] deposited on a substrate [102], a source and a drain [106-107] formed at a first end and a second end of the carbon-nanotube [104], respectively, and a gate [112] formed substantially over a portion of the carbon-nanotube [104], separated from the carbon-nanotube by a dielectric film [111].

Claims (8)

1. A method for forming a self-aligned carbon-nanotube field effect transistor semiconductor device comprising the steps of:
depositing a nanotube on a thermal oxide substrate, wherein the substrate includes an alignment mark;
forming a metal contact at each end of the nanotube, wherein a first metal contact is a source and a second metal contact is a drain;
depositing an amorphous silicon layer over the device;
forming nitride spacers on opposing sides of each metal contact;
depositing a high k dielectric film over the device;
oxidizing the amorphous silicon; and forming a gate substantially between the source and the drain, and over the nanotube.
2. The method of claim 1, further comprising the step of depositing a passivation dielectric over the device.
3. The method of claim 1, wherein the nanotube is a single-walled nanotube.
4. The method of claim 1, wherein the metal contacts are formed using a photoresist.
5. A method for forming a self-aligned carbon-nanotube field effect transistor semiconductor device comprising the steps of:
depositing a nanotube on a thermal oxide substrate, wherein the substrate includes an alignment mark;
forming a metal contact by reactive ion etch at each end of the nanotube, wherein a first metal contact is a source and a second metal contact is a drain;

forming nitride spacers on opposing sides of each metal contact;
depositing a high k dielectric film over the device; and forming a gate substantially between the source and the drain and over the nanotube.
6. The method of claim 5, further comprising the step of depositing a passivation dielectric over the device.
7. A method for forming a self-aligned carbon-nanotube field effect transistor semiconductor device comprising the steps of:
depositing a nanotube on a thermal oxide substrate, wherein the substrate includes an alignment mark;
forming an amorphous silicon pillar over each end of the nanotube;
isolating the amorphous silicon pillars with a layer of oxide;
forming a gate dielectric layer between amorphous silicon pillars;
forming a gate substantially between the amorphous silicon pillars and over the nanotube;
forming a nitride layer over the gate;
forming oxide spacers on each side of the gate;
replacing the amorphous silicon with metal contacts, wherein a first metal contact is a source and a second metal contact is a drain; and depositing a passivation dielectric over the device.
8. A method for forming a self-aligned carbon-nanotube field effect transistor semiconductor device comprising the steps of:
depositing a metal catalyst on a thermal oxide substrate;
depositing a low temperature oxide layer over the device;
etching a trench through the oxide, the metal catalyst and into a thermal oxide underlying the metal catalyst;
etching the low temperature oxide layer to form oxide islands;

stripping exposed metal catalyst;
growing a nanotube between metal catalyst beneath the oxide islands;
wrapping the nanotube in a gate dielectric;
forming nitride spacers on the opposing surfaces of the oxide islands;
forming a gate substantially between the oxide islands by chemical vapor deposition and over the nanotube; and depositing a passivation dielectric over the device.
CA2695715A 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same Expired - Fee Related CA2695715C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/102,365 US6891227B2 (en) 2002-03-20 2002-03-20 Self-aligned nanotube field effect transistor and method of fabricating same
US10/102,365 2002-03-20
CA2659479A CA2659479C (en) 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CA2659479A Division CA2659479C (en) 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same

Publications (2)

Publication Number Publication Date
CA2695715A1 true CA2695715A1 (en) 2003-10-02
CA2695715C CA2695715C (en) 2011-06-07

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CA2695715A Expired - Fee Related CA2695715C (en) 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same
CA2479024A Expired - Fee Related CA2479024C (en) 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same
CA2659479A Expired - Fee Related CA2659479C (en) 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same

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CA2659479A Expired - Fee Related CA2659479C (en) 2002-03-20 2003-02-19 Self-aligned nanotube field effect transistor and method of fabricating same

Country Status (14)

Country Link
US (6) US6891227B2 (en)
EP (2) EP1748503B1 (en)
JP (1) JP4493344B2 (en)
KR (1) KR100714932B1 (en)
CN (2) CN1669160B (en)
AT (2) ATE551734T1 (en)
AU (1) AU2003224668A1 (en)
BR (1) BR0308569A (en)
CA (3) CA2695715C (en)
IL (2) IL164066A0 (en)
MX (1) MXPA04008984A (en)
PL (1) PL373571A1 (en)
TW (1) TW586165B (en)
WO (1) WO2003081687A2 (en)

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