CA956034A - Monolithic memory system with bi-level powering for reduced power consumption - Google Patents

Monolithic memory system with bi-level powering for reduced power consumption

Info

Publication number
CA956034A
CA956034A CA122,499A CA122499A CA956034A CA 956034 A CA956034 A CA 956034A CA 122499 A CA122499 A CA 122499A CA 956034 A CA956034 A CA 956034A
Authority
CA
Canada
Prior art keywords
power consumption
memory system
reduced power
monolithic memory
level powering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA122,499A
Other versions
CA122499S (en
Inventor
John K. Ayling
Richard D. Moore
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA956034A publication Critical patent/CA956034A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415Address circuits
CA122,499A 1970-09-22 1971-09-10 Monolithic memory system with bi-level powering for reduced power consumption Expired CA956034A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7443270A 1970-09-22 1970-09-22

Publications (1)

Publication Number Publication Date
CA956034A true CA956034A (en) 1974-10-08

Family

ID=22119533

Family Applications (1)

Application Number Title Priority Date Filing Date
CA122,499A Expired CA956034A (en) 1970-09-22 1971-09-10 Monolithic memory system with bi-level powering for reduced power consumption

Country Status (11)

Country Link
US (1) US3688280A (en)
JP (1) JPS521829B1 (en)
BE (1) BE771198A (en)
CA (1) CA956034A (en)
CH (1) CH536014A (en)
DE (1) DE2146905C3 (en)
ES (1) ES395249A1 (en)
FR (1) FR2107851B1 (en)
GB (1) GB1334307A (en)
NL (1) NL178368C (en)
SE (1) SE379255B (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3750116A (en) * 1972-06-30 1973-07-31 Ibm Half good chip with low power dissipation
US3855577A (en) * 1973-06-11 1974-12-17 Texas Instruments Inc Power saving circuit for calculator system
US3969708A (en) * 1975-06-30 1976-07-13 International Business Machines Corporation Static four device memory cell
DE2713648A1 (en) * 1976-03-26 1977-10-06 Tokyo Shibaura Electric Co POWER SUPPLY CONTROL DEVICE FOR STORAGE DEVICES
US4095265A (en) * 1976-06-07 1978-06-13 International Business Machines Corporation Memory control structure for a pipelined mini-processor system
US4174541A (en) * 1976-12-01 1979-11-13 Raytheon Company Bipolar monolithic integrated circuit memory with standby power enable
FR2443118A1 (en) * 1978-11-30 1980-06-27 Ibm France DEVICE FOR POWERING MONOLITHIC MEMORIES
US4422162A (en) * 1980-10-01 1983-12-20 Motorola, Inc. Non-dissipative memory system
US4413191A (en) * 1981-05-05 1983-11-01 International Business Machines Corporation Array word line driver system
US4445205A (en) * 1981-12-28 1984-04-24 National Semiconductor Corporation Semiconductor memory core programming circuit
JPS59124092A (en) * 1982-12-29 1984-07-18 Fujitsu Ltd Memory device
JPH03231320A (en) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp Microcomputer system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3292008A (en) * 1963-12-03 1966-12-13 Rca Corp Switching circuit having low standby power dissipation
US3423737A (en) * 1965-06-21 1969-01-21 Ibm Nondestructive read transistor memory cell
DE1524873B2 (en) * 1967-10-05 1970-12-23 Ibm Deutschland Monolithic integrated storage cell with low quiescent power
US3618046A (en) * 1970-03-09 1971-11-02 Cogar Corp Bilevel semiconductor memory circuit with high-speed word driver

Also Published As

Publication number Publication date
BE771198A (en) 1971-12-16
SE379255B (en) 1975-09-29
AU3279071A (en) 1973-03-01
FR2107851A1 (en) 1972-05-12
NL7111999A (en) 1972-03-24
DE2146905C3 (en) 1975-02-13
NL178368B (en) 1985-10-01
US3688280A (en) 1972-08-29
FR2107851B1 (en) 1974-05-31
NL178368C (en) 1986-03-03
JPS521829B1 (en) 1977-01-18
DE2146905A1 (en) 1972-04-27
GB1334307A (en) 1973-10-17
DE2146905B2 (en) 1974-06-27
CH536014A (en) 1973-04-15
ES395249A1 (en) 1973-11-16

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