CN100382298C - 电子器件及其制造方法 - Google Patents

电子器件及其制造方法 Download PDF

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CN100382298C
CN100382298C CNB2003801064782A CN200380106478A CN100382298C CN 100382298 C CN100382298 C CN 100382298C CN B2003801064782 A CNB2003801064782 A CN B2003801064782A CN 200380106478 A CN200380106478 A CN 200380106478A CN 100382298 C CN100382298 C CN 100382298C
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chip
substrate
conductive interconnection
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heat sink
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CN1726591A (zh
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H·P·霍奇斯坦巴奇
A·H·M·范埃克
R·范德穆伦
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NXP BV
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Abstract

电子器件(100)为位于引线框(10)上的芯片在芯片上的构造,该引线框包含封装(80)中的热沉(13)。第一芯片(20)和第二芯片(30)通过第一导电互连(24)被互相连接,且第一芯片(20)通过第二导电互连(27)连接到引线框(10),该第二导电互连优选具有低于第一导电互连(24)的回流温度。通过加热器件(100),导电胶层(25)将首先收缩,引起应力,该应力通过回流第二导电互连(27)而得到弛豫。

Description

电子器件及其制造方法
技术领域
本发明涉及电子器件,其包括:
第一芯片,具有有源侧和背侧,第一芯片在该有源侧上具有第一和第二导电互连;
第二芯片,具有有源侧和背侧,第二芯片在该有源侧上具有第一导电互连,第一和第二芯片的有源侧互相面对,这些芯片的第一导电互连以导电方式通过第一金属互连被相互连接;
衬底,具有面向第一芯片有源侧的第一侧,该衬底包括通过第二金属互连导电地连接到第一芯片的第二导电互连的导电互连。
本发明还涉及该电子器件的制造方法,其中第一芯片和第二芯片的单元安装在衬底的第一侧上,同时通过第二金属互连在衬底上的导电互连和第一芯片上第二导电互连之间形成电接触。
背景技术
由美国专利US-B1-6,225,699已知该器件和该方法。第一和第二芯片尤其为处理器芯片和存储器芯片。据观察,在本申请的上下文中,芯片包含安装在衬底上的元件电路。在已知的器件中,显然该衬底为具有平整表面的任意衬底,例如载体、衬底或者第三芯片。已知器件中的金属互连为金属球或者焊料球、焊料柱、电镀铜柱、微型velcro互连、聚合物金属互连或所谓的C4(受控塌陷芯片连接(controlled collapsechip connection))。第二金属互连在此尤其为具有高熔点(也称为回流温度)的部分以及回流温度低于第一金属互连的部分。通过这种方式可以实现,第二金属互连的高度至少和第二芯片与第一金属互连的高度之和相同。
然而,该已知器件具有各种缺点。当衬底为载体时,例如印刷电路板,其缺点为第二芯片几乎未受保护或者根本没有得到保护。此外,由用户实现的在载体上装配该器件,对所使用温度的偏差非常敏感。在太高的温度下,第一金属互连将垮掉,而在太低的温度下,无法实现载体上导电互连和第一芯片上导电互连之间适当的接触。
当该衬底为第三芯片或者具有平整表面的衬底时-即被用作插入衬底的陶瓷材料衬底-该器件具有其它缺点。例如,整个器件的高度相当高,而在许多应用中证明插入衬底过于昂贵。
发明内容
因此本发明的第一目标是提供开篇段落中所定义的类型的器件,其可以安装在载体上而无需用户采取任何特殊措施,并且还满足半导体器件的通常要求。
如下实现该第一目标:
该衬底包含通过导电胶连接到第二芯片背面的热沉,并包含可以接触在衬底第二侧上的接触表面;以及
存在钝化材料制成的封装,该封装基本上在任何情况下封装第一和第二芯片且衬底被粘附到该封装。
根据本发明的器件表现为具有接触表面的衬底,在该衬底上存在内部有许多元件的封装。该封装不仅是用于防止灰尘、水气和类似影响的防护层。该封装同样地尤其是提供器件机械稳定性的材料。如果在进一步焊接或者热处理期间,温度升高超过一个或多个金属互连或其部分的回流温度,该器件由于封装而不会解体。该封装于是提供了衬底和器件其余部分之间的适当的粘接。优选通过在衬底中的开口以实现这一点,使得衬底嵌入并固定在封装中。
封装的机械功能另外使得可以很大程度上忽略衬底,即将衬底限制为用于必要的互连和外部接触的一个或多个导电层。这减小了器件的尺寸,尤其是厚度。然而,即使带有衬底,该器件也已经比具有陶瓷衬底或第三芯片的已知器件更加紧凑。在该器件中,在衬底第二侧上具有接触表面。这意味着接触表面在第一芯片有源侧上的垂直投影大部分位于第一芯片内。在已知技术中,具有另一个芯片或者具有插入衬底,不存在穿过该衬底到达第二侧的互连。接触表面位于第一侧上,在第一芯片之外。
然而,封装的存在确实使第一芯片的散热变得复杂。为了解决这个附带问题,该器件包含通过导电胶连接到第一芯片背面的热沉。为此目的,该背面优选包含导电层。据观察,如果需要,该热沉也可以或者甚至主要用作地线。
在一个优选实施例中,第二金属互连至少部分地具有比第一金属互连低的回流温度。更具体地,在这方面利用了金属球。令人吃惊地,已经发现该金属球并不流动,尽管其回流温度低。未封装器件经过回流炉十次的实验表明,尽管温度低,第二金属互连并未损坏。优选的材料为,特别是锡、银、和铜的焊料,亦称为SAC焊料,其中含有至少95%的锡、3-5%的银和0.1%的铜,以及共熔的PbSn。应该观察到,金属互连也可以由不同部分形成,例如由铜柱和顶部上的小焊料球制成。
此外,已经发现,应用该低熔点的第二金属互连,在衬底中可以消除第二芯片、第一金属互连、导电胶层以及特定元件的厚度不准确。由于第二金属互连的回流,所述元件部分和层的厚度和高度偏差引起的应力得到弛豫。其结果为,热沉的接触表面和器件中导电互连的接触表面具有共面位置。而且,可以通过不同方式实现该弛豫效应,例如通过在第一和第二芯片之间应用底层填料(underfill)并为此目的而使用通常的高熔点焊料。然而,该不同的方式使得要进行附加的步骤,而在回流时需要更高的温度。
此外,第一金属互连使用金球,例如Au/Au、Au/NiAu、或者Au/Al,似乎是有利的。可以通过实际中具有优势的热压缩固定该金属互连。
在另一个优选实施例中,衬底为具有开口的引线框,在该开口中存在封装的钝化材料。通过衬底内的开口使衬底嵌入在封装中。引线框的另外优势在于它可以非常薄。实际上,它是单个导电层或多个导电层的堆叠。已知一种非常有利的引线框为HVQFN((High Voltage Quad FlatNon-leaded)高压四平无铅)。更加优选的引线框实际上包含沉积在牺牲层上的一个或多个层。进行封装之后除去该牺牲层。未公开申请EP02079544.9(PHNL021100)描述了这样的例子。
在又一个优选实施例中,导电胶层厚小于50μm,更具体地为10~25μm。已经看到,层厚度减小时,衬底和第二芯片背面之间距离的展宽变小。该展宽得到限制是重要的,因为已经存在许多其它的展宽因素。然而,当导电胶层变得太薄时,键合可能不充分且需要施加的力不成比例地增加。太大的力导致金属球损坏的风险加大。
第二芯片优选在平行于有源侧的平面内具有比第一芯片更小的表面。虽然第二芯片也可以相对第一芯片移动,出于机械稳定性,优选第二芯片只覆盖第一芯片有源侧的一部分。
该芯片上芯片的构造是有吸引力的,例如,用于结合微处理器和存储器芯片,用于结合功能芯片和识别芯片。然而,当第一芯片包含基本上为无源元件的集成电路,而第二芯片包含基本上为有源元件的集成电路时,这尤为有利。然而,在这方面,据观察,第一芯片可包含许多有源元件,而第二芯片也可包含许多有源元件。随后在半导体衬底上制造第一芯片,导电互连至其背面。在制造之后可以部分地除去该半导体衬底,特别是采用技术人员所熟知的蚀刻与/或抛光。可以在例如硅的半导体衬底上制造第二芯片,但也可以在诸如玻璃、Al2O3、或陶瓷材料的电绝缘衬底上制造第二芯片。可能存在的无源元件包含线圈、电阻器和电容器,还包括谐振器、微机电系统(MEMS)元件、天线、微波传输带和传感器。
第一无源芯片和第二有源芯片的结合是尤其有利的,因为无源元件的尺寸通常大于有源元件的尺寸,而同时对无源元件分辨率的要求较少。同样优选第一和第二芯片具有电阻不同的衬底。特别对于高频应用,优选第一无源芯片和第二有源芯片相互靠近。在这方面,高频性能规定不希望键合导线和互连起线圈的作用。这在本实施例中得到大幅限制。
在特别的实施例中,第一芯片为掺杂半导体材料的衬底,并包含沿基本上垂直于平行有源侧的平面的方向延伸的孔,其中在该孔中有电容器。该电容器具有大的电容并因此非常适合用作退耦电容器。使用该电容器的优点在于电容器需要的表面区域小。其结果为,例如可以容易满足设计条件,即它们投影到衬底上时第一导电互连基本上落在热沉内。
在另一个实施例中,存在具有有源侧和背面的第三芯片。其有源侧包含导电互连。正如第二芯片那样,第三芯片的有源侧面向第一芯片的有源侧,第三芯片的导电互连通过金属互连和第一芯片另外的导电互连互相导电连接。随后衬底具有第二热沉,该热沉通过导电胶连接到第三芯片的背面。在本实施例中,第一芯片为第二和第三芯片的载体。这样,通过独立的热沉保证两个芯片的散热。如果在应用中这样要求,可将热沉连接到不同的电压。
对于器件中第三芯片的存在,有着各种应用。第一应用为第二和第三芯片为分别用于某一频带的放大器。第二应用为第二芯片为收发器芯片,而第三芯片为电压控制振荡器。第三应用为第一芯片包含传感器,而第二芯片驱动该传感器且第三芯片提供对第一芯片测量的数据的处理。在这方面上,优选第一芯片包含无源元件集成电路,但这并不是必需的。
本发明的第二目标是提供可以制造根据本发明的器件使其具有可靠结果的方法。该方法包含如下步骤,由此实现该目标:
提供第一芯片和第二芯片的整体,每个芯片都具有有源侧和背面,包含第一导电互连的有源侧互相面对,且通过第一金属互连将第一导电互连互相导电连接,第一芯片的有源侧包含第二导电互连;
提供具有第一和相对的第二侧面衬底,该衬底包含热沉、导电互连、和用于外部接触的接触表面;
将第一和第二芯片的整体放置于衬底的第一侧上,同时具有第二金属互连的导电互连与第一芯片的第二导电互连导电连接,且热沉通过导电胶连接到第二芯片的背面;
固化导电胶;
考虑到由于导电胶层固化时收缩引起应力的弛豫,重新熔化第二金属互连的至少一部分,;以及
围绕第一和第二芯片并围绕金属互连应用钝化材料的封装,该材料被键合到衬底。
当安装该整体后,用产生键合的力将第二芯片压到导电胶层内。当固化该导电胶时,该键合仍然保持完整且导电胶收缩。其结果为,热沉随导电胶升高。这产生应力,该应力通过重新熔化第二金属互连的至少一部分得到弛豫。重新熔化期间,衬底的其余部分也上升。通过施加钝化材料的封装则可保持由此获得的平衡的或者甚至大部分无应力的情形,其中该钝化材料可以通过例如热处理的常规方式进行固化或者被固化。
在一个优选实施例中,衬底内的导电互连位于弹性层上,使得当在衬底上沉积该整体时,导电互连可以可逆地弯曲到某一程度。更具体地,该弹性层为空气层且该衬底为双层或多层引线框,其导电互连只在一个端部得到支撑。由于该弯曲,衬底上存在额外的应力,该应力加大了沿第一芯片方向的移位。此外,双层引线框可以以此方式使得所有的接触表面,也就是说,热沉和导电互连的所有表面以共面的方式排列。
在另一个实施例中,第二金属互连包含回流温度低于第一金属互连回流温度的焊料。这是防止在弛豫过程中由于回流导致第一金属互连损坏的简单方法。而且,优选第二金属互连包含可以彻底熔化的焊料。因为这样可以使得第二金属互连大幅收缩。这样的目的为高度等于导电胶层、第二芯片和第一金属互连的总高度。如果将要收缩的距离为约10微米,可以采用50微米的焊料球而非10微米的焊料球来实现。
焊料应用的技术各种各样。例如,可以将焊料球放置在衬底上同时用金层覆盖第二导电互连。或者,可以将焊料球粘附到第一芯片的第二导电互连,而在该应用时进行酸性焊剂处理,或者在衬底上已经存在焊剂层。然而,优选将焊料球粘附到第二导电互连,同时在衬底上沉积焊料颗粒和酸的比例为50比50的焊料点。
在又一个实施例中,所涂敷的导电胶层厚度小于50μm。当在衬底上安装芯片的整体时,第二芯片被压到导电胶层内。使用特定的力完成该步骤。现在如果导电胶层厚,与预定力的轻微偏离将容易导致最终获得的导电胶层厚度的巨大偏差。如果导电胶层的厚度减小,即使力出现偏差的情况下,该厚度偏差减小。
参照下文描述的实施例,本发明的这些和其它方面将得到阐述且变得明显。
附图说明
在附图中:
图1A至1D示出了该方法中不同阶段的界面视图;
图2示出了获得的器件的截面图;
图3示出了该器件第二实施例的截面图。
具体实施方式
附图并未按比例绘制,为了清楚,将几个部分放大。相同的参考数字在不同的图中表示相同或可比的部件。这些实施例纯粹作为示例,而不应理解成限制保护范围。
图1A示出了该方法中的第一步骤,其中提供了衬底10和第一芯片20与第二芯片30的组合50。第一芯片20和第二芯片30分别具有有源侧21、31及背侧2、32。在有源侧上确定了元件,即第一芯片20内的无源元件集成电路和第二芯片30内的有源元件集成电路。在该实例中,第二芯片30包含硅衬底,但也可以含有由例如III-V族材料形成的衬底。第一芯片20和第二芯片30在其有源侧21、31上具有第一导电互连,为了清楚未示出该导电互连。第一导电互连被互相连接到第一金属互连24,第一金属互连24在该情形下包含金属球金。第一金属互连24是这样制成的:将金涂敷到第一芯片20和第二芯片30上并随后对它们进行热压处理。第一金属互连24可以嵌入在底层填料层(underfill layer)内,该层本身是已知的。第一芯片20进一步包含具有焊料球23的第二导电互连(也没有示出)。应观察到,第一和第二导电互连形成球栅阵列,其中第一金属互连24的间距和第一金属互连24的高度小于第二导电互连的间距和焊料球23的高度。导电互连被成形为铜或铝层,并且如果要求,具有本身已知的导电胶层。第一芯片20上第一和第二导电互连经由或者不经由在第一芯片内确定的元件互相电连接。
这种情况下衬底10为引线框,并包含第一侧11和相对侧12。该衬底包含铜的第一和第二导电层。采用半刻蚀的技术巧妙地对其蚀刻以形成引线框10,首先从第一侧11进行蚀刻然后从第二侧12进行蚀刻,或者从相反方向进行蚀刻。由此得到热沉13、导电互连14、15和接触表面16、17,同时热沉也是接触表面。热沉13通常通过四个导线连接到引线框10的其余部分。在导电互连14、15下存在空地18。在引线框10的第一侧面11上涂敷导电胶25,即含有玻璃环氧粘合剂的银。例如通过丝网印刷,在第一侧面11上进一步沉积焊料点26。
通过这个方式,已经提供了将被粘附的构造。然后第二芯片30加上第一金属互连24的厚度为150±15μm。引线框10的各层厚度为70±20μ,而在相对于导电互连14、15的热沉13的位置中存在约20μm的间隙。因此最大的展宽约为55μm。该展宽可以通过重新熔化焊料球23和焊料点26消除,以及在导电胶层25中略微消除,然而层25选择得薄,例如其厚度为约20μm。
图1B示出了第一芯片20和第二芯片30的组合50已经贴附到衬底第一侧11的情形。第二芯片30的背面32随后被压到导电胶层25内,而焊料点和焊料球被互相连接成金属互连27。本领域技术人员将了解到,直到热处理之后金属互连27才是固体。焊料在这里为低熔点SAC焊料,其包含超过96%的锡、3%的银和约0.5%的铜。并未示出如下事实:粘附组合50时,导电互连14、15被轻微和可逆地弯曲。这是可能的,因为导电互连14、15下方存在一个弹性层,该弹性层在这里为空气层。该弯曲在导电互连14、15上提供向上的压力。
图1C示出了固化导电胶之后的情形。由于100至150℃的热处理,才出现该情形。随后当导电胶层25收缩时,引线框的热沉13被拔起。其结果为向下的压力。
图1D示出了金属互连27超过其回流温度并能够变形后的情形。没有连接衬底10或者与第一芯片20的连接被断开的情况下,金属互连27变平。其结果为,导电互连14、15和热沉13中的应力得到弛豫。
图2示出了一旦应用了封装80之后的最终器件100。该封装包含本身已知的钝化材料,例如填充玻璃的环氧树脂、聚酰亚胺、或者由技术人员选择的具有期望膨胀系数的另外的树脂。衬底10在此嵌入在封装80中,同时开口18也被填充且可达到第二侧12上的接触表面以用于外部接触。这里可以应用同样是无铅类型的焊料球,此后该器件作为整体准备好置于诸如印刷电路板的载体上。从外部观察,器件100与任何其它半导体器件没有不同。
图3示出了器件100的第二实施例的截面图。在该实施例中,除了第二芯片30之外还存在第三芯片40。芯片30、40的有源侧31、41均面向第一芯片20的有源侧21。第一和第三金属互连24、28随后提供电接触。经由导电胶层25、29,芯片30、40的背面32、42分别连接到第一热沉13和第二热沉19。热沉13、19并未互相导电连接,且可由不同电压驱动,例如+5伏特或-5伏特。第二和第三芯片30、40在这种情况下为用于各种频带的放大器。第一芯片20在此为所谓的无源芯片,并包含其中确定了垂直电容器的高欧姆硅衬底。而且,第一侧21具有在其上确定的电阻器、电容小于垂直电容器的平面电容器、线圈和导电互连。

Claims (11)

1.电子器件,包括:
第一芯片,具有有源侧和背面,第一芯片在该有源侧上具有第一和第二导电互连;
第二芯片,具有有源侧和背面,第二芯片在该有源侧上具有第一导电互连,第一和第二芯片的有源侧互相面对,这些芯片的第一导电互连以导电方式通过第一金属互连被相互连接;
衬底,具有第一侧和相对的第二侧,其第一侧面向第一芯片的有源侧,该衬底包括热沉、导电互连和用于外部接触的接触表面,该热沉通过导电胶和第二芯片的背面连接,且所述导电互连通过第二金属互连导电连接到第一芯片的第二导电互连,且所述接触表面接触在衬底第二侧面上;以及
钝化材料的封装,该封装在任何情况下封装第一和第二芯片以及金属互连,且衬底被粘附到该封装。
2.权利要求1中所述的电子器件,其特征在于,第二金属互连至少部分地具有比第一金属互连低的回流温度。
3.权利要求1中所述的电子器件,其特征在于,衬底包含具有开口的引线框,在该开口内存在封装的钝化材料。
4.权利要求1中所述的电子器件,其特征在于,在平行于有源侧的平面内的第二芯片的表面区域小于第一芯片。
5.权利要求4中所述的电予器件,其特征在于,第一芯片包含基本上为无源元件的集成电路,而第二芯片包含基本上为有源元件的集成电路。
6.权利要求5中所述的电子器件,其特征在于,第一芯片包含具有孔的掺杂半导体材料,该孔沿垂直于平行于有源侧的平面的方向延伸,并且在所述孔里有电容器。
7.权利要求1中所述的电子器件,其特征在于,存在具有有源侧和背面的第三芯片,该有源侧包含导电互连的第三芯片,第三芯片的有源侧面向第一芯片的有源侧,第三芯片的导电互连通过金属导线和第一芯片另外的导电互连互相导电连接,衬底包含第二热沉,该热沉通过导电胶连接到第三芯片的背面。
8.制造电予器件的方法,包含如下步骤:
提供第一芯片和第二芯片的整体,每个芯片都具有有源侧和背面,包含第一导电互连的所述有源侧互相面对,且通过第一金属互连将第一导电互连互相导电连接,第一芯片的有源侧包含第二导电互连;
提供具有第一和相对的第二侧的衬底,该衬底包含热沉、导电互连、和用于外部接触的接触表面;
将第一和第二芯片的整体放置于衬底的第一侧上,同时具有第二金属互连的导电互连与第一芯片的第二导电互连导电连接,且热沉通过导电胶连接到第二芯片的背面;
固化导电胶;
考虑到由于导电胶层固化时收缩引起应力的弛豫,重新熔化第二金属互连的至少一部分;以及
围绕第一和第二芯片并围绕金属互连应用钝化材料的封装,该材料被键合到衬底。
9.权利要求8中所述的方法,其特征在于,衬底内的导电互连位于弹性层上,使得当在衬底上安装该整体时,导电互连可以可逆地弯曲到某一程度。
10.权利要求8中所述的方法,其特征在于,第二金属互连包含回流温度低于第一金属互连的回流温度的焊料。
11.权利要求7中所述器件的使用,其中使用导电胶固定热沉,使用该器件时,对第一热沉施加的电压不同于第二热沉。
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AU2003285638A1 (en) 2004-07-14
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US20060099742A1 (en) 2006-05-11

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