CN100413386C - 向印刷布线基板安装晶片的方法 - Google Patents
向印刷布线基板安装晶片的方法 Download PDFInfo
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- CN100413386C CN100413386C CNB2004100803162A CN200410080316A CN100413386C CN 100413386 C CN100413386 C CN 100413386C CN B2004100803162 A CNB2004100803162 A CN B2004100803162A CN 200410080316 A CN200410080316 A CN 200410080316A CN 100413386 C CN100413386 C CN 100413386C
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Abstract
本发明的目的在于能够利用晶片的两面,在晶片(1)上设置上下面贯通的通孔(2),同时,在该通孔(2)的内面上形成绝缘层(14),在该晶片(1)的上下两面上形成再布线电路(3、4),同时,通过在所述通孔(2)内在绝缘层(14)上所施加的电镀(9)来连接该再布线电路(3、4),另外,在所述再布线电路(3、4)上形成由焊料等导电材料构成的热应力缓和柱(5、6),同时,在该热应力缓和柱(5、6)上形成焊料块(7、8),而且,将晶片(1)的焊料块(7)或者(8)与印刷布线基板(11)的布线电路(12)粘合。
Description
技术领域
本发明涉及一种向印刷布线基板安装晶片的方法。
背景技术
现有技术的向印刷布线基板上安装IC等晶片的方法,如图7所示那样。其是在印刷布线基板100上,在上面形成布线电路101,在一个晶片102上,在其上面或者侧面设置电极103、103,首先,如图7(1)所示,在印刷布线基板100上载置晶片102,其次如图7(2)所示,将带有导线104、104的晶片102的电极103、103连接到印刷布线基板100的布线电路101上,最后如图7(3)所示,通过树脂封闭105导线104、104部分。
但是,在根据现有方法的情况下,只能利用晶片的一侧面。
另外,作为与上述不同的安装方法,如图8所示,在晶片106的一面上形成再布线电路107的同时,在该再布线电路上形成焊料块108,使得该焊料块108与印刷布线基板100的布线电路101粘合,是这样的安装方法。而且,在图中省略了热应力缓和柱。
在这样的安装方法的情况下,与上述安装方法不同,能够重叠安装多个晶片。换言之,能够利用上下两面。而且,在这样的安装方法的情况下,在与印刷布线基板100直接粘合的最下级的晶片106的上面,如图9所示附着印刷布线片109,在它们的上层晶片110中,在粘合在再布线电路111上形成的焊料块112的同时,利用导线113连接所述印刷布线片109和印刷布线基板100的布线电路101。
但是,如按照这样的安装方法,就必须与晶片不同地形成印刷布线片109,额外地费工和费时。另外,在晶片上附着该印刷布线片109时,需要协调两者的位置来附着,可操作性差。此外,由导线113一个一个地连接也费工。
发明内容
本发明是鉴于上述问题作出的,提供一种向印刷布线基板安装晶片的方法,其在晶片上设置上下面贯通的通孔,在该晶片的上下两面形成再布线电路的同时,通过在所述通孔内施加电镀来连接该再布线电路,使得能够利用晶片的两面。
而且,本发明将下面的安装方法作为其宗旨。
(1)一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔,在上下两面上,分别由电镀形成再布线电路的同时,在该再布线电路上形成由导电材料构成的热应力缓和柱,此外,在所述热应力缓和柱上形成焊料块的同时,通过在所述通孔内施加的电镀连接所述上下面的再布线电路,将所述晶片的焊料块与印刷布线基板的布线电路粘合。
(2)一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔的同时,在上下两面上分别形成由电镀形成的再布线电路,在上侧的该再布线电路上形成由导电材料构成的热应力缓和柱的同时,在该热应力缓和柱上形成焊料块,另一方面,在下侧的该再布线电路上形成输出端子,通过在所述通孔内施加的电镀连接所述上下各个面的再布线电路,将所述晶片的输出端子与印刷布线基板的布线电路粘合。
(3)一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔的同时,在该通孔的内面上形成绝缘层,在上下两面上分别形成由电镀形成的再布线电路的同时,在该再布线电路上形成由导电材料构成的热应力缓和柱,此外,在所述热应力缓和柱上形成焊料块的同时,通过在所述通孔内在绝缘层上施加的电镀来连接所述上下各个面的再布线电路,将所述晶片的焊料块与印刷布线基板的布线电路粘合。
(4)一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔的同时,在该通孔的内面上形成绝缘层,在上下两面上分别形成由电镀形成的再布线电路,在上面侧的该再布线电路上形成由导电材料构成的热应力缓和柱,同时,在该热应力缓和柱上形成焊料块,另外,在下面侧的该再布线电路上形成输出端子,通过在所述通孔内在绝缘层上施加的电镀来连接所述上下各个面的再布线电路,将所述晶片的输出端子与印刷布线基板的布线电路粘合。
另外,在上述(1)~(4)的向印刷布线基板安装晶片的方法中,也可以这样,在一个晶片上纵横格子状地设置通孔,同时,在由通孔所包围的各个部分上形成再布线电路,在通孔的位置切断。在这种情况下,能够一次制造多个晶片。
由于本发明中,在晶片上设置上下面贯通的通孔,在该晶片的上下两面上形成再布线电路,同时,通过在所述通孔内施加的电镀来连接该再布线电路,所以,能够利用晶片的两面。通过这样,例如能够在晶片上重叠地安装晶片,也能够增加安装的晶片的个数。此外,也可将在晶片上形成的上面的再布线电路作为输入侧,将下面的再布线电路作为输出侧来使用。
另外,在如图8所示的现有的安装方法中,在重叠多个晶片进行安装的情况下,不需要必须的印刷布线片,能够降低成本,同时,能够省略将其附着到晶片上时的工时。另外,也不需要利用导线来一个一个连接的工时。
另外,在一个晶片上纵横格子状地设置通孔,同时,在由通孔所包围的各个部分形成再布线电路,在通孔的位置进行切断,在这样的情况下,能够一次制造多个晶片。
附图说明
图1是本发明的实施例1的说明图。
图2是本发明的实施例2的说明图。
图3是本发明的实施例3的说明图。
图4是省略了再布线电路等所表示的切断成芯片状的各个晶片的一个的斜视图。
图5是本发明的实施例3的主要部分的斜视图。
图6是本发明的实施例4的说明图。
图7是现有技术的安装方法的工序说明图。
图8是现有技术的其它安装方法的说明图。
图9是图8所示的安装方法所使用的印刷布线片的平面图。
符号说明:1晶片;2通孔;3、4再布线电路;5、6热应力缓和柱;7、8焊料块;9电镀;11印刷布线基板;12布线电路;13输出端子;14绝缘层。
具体实施方式
用于实施本发明的最佳方式是这样的,在晶片上设置上下面贯通的通孔,在上下两面上,分别形成由电镀形成的再布线电路,同时,在该再布线电路上形成由焊料等导电材料构成的热应力缓和柱,此外,在所述热应力缓和柱上形成焊料块,同时,通过在所述通孔内施加的电镀来连接所述上下各个面的再布线电路,将所述晶片的焊料块与印刷布线基板的布线电路进行粘合。
实施例
下面,参照附图来说明本发明的实施例。
图1是本发明的实施例1的说明图。
图中,1是晶片,在需要的位置设置上下面贯通的通孔2。
3、4是在所述晶片1的上下两面通过电镀形成的再布线电路。5、6是所述再布线电路3、4的各个上所形成的由焊料等导电材料构成的热应力缓和柱,在本实施例中,通过丝网印刷来形成。7、8是在所述热应力缓和柱5、6的各个上所形成的焊料块。而且,所述再布线电路3、4通过在所述通孔2内施加的电镀9来连接。
10是在所述晶片1的上下两面所形成的绝缘层,11是印刷布线基板,在该布线电路12上也连接所述晶片1的焊料块7或者8。
实施例2
下面,说明图2所示的本发明实施例2。
本实施例与所述实施例1的不同之处在于,在本实施例中,在下侧的再布线电路4中形成输出端子13来代替焊料块。而且,其它构成与所述实施例1相同,所以,相同的部件赋予相同的符号,省略了其详细说明。
实施例3
下面,说明图3所示的本发明的实施例3。
本实施例与所述实施例1的不同之处在于,在本实施例中,在通孔2内面上形成绝缘层14,通过在通孔2内的绝缘层14上施加的电镀9来连接晶片1的上下两面的再布线电路3、4。而且,其它构成与所述实施例1相同,对相同的部件赋予相同的符号,省略了其详细说明。
实施例4
下面,说明图6所示的本发明的实施例4。
本实施例与所述实施例1的不同之处在于,在本实施例中,在通孔2的内面形成绝缘层14,通过在通孔2内的绝缘层14上所施加的电镀9来连接晶片1的上下两面的再布线电路3、4,在下侧的再布线电路4上形成输出端子13来代替焊料块。而且,其它构成与所述实施例1相同,对相同的部件赋予相同的符号,省略了其详细说明。
另外,在上述实施例1~4中,在一个晶片1上纵横格子状地设置通孔2,同时,在由通孔2所包围的各个部分形成再布线电路,在图中X-X所示的通孔2的位置进行切断。而且,另外图4表示了这样切断成芯片状的各个晶片的一个。而且,在图4中省略了再布线电路等。
Claims (8)
1. 一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔,在上下两面上,分别由电镀形成再布线电路的同时,在该再布线电路上形成由导电材料构成的热应力缓和柱,此外,在所述热应力缓和柱上形成焊料块的同时,通过在所述通孔内施加的电镀连接所述上下面的再布线电路,将所述晶片的焊料块与印刷布线基板的布线电路粘合。
2. 根据权利要求1所述的向印刷布线基板安装晶片的方法,其特征在于,
在一个晶片上纵横格子状地设置通孔,同时,在由通孔所包围的各个部分上形成再布线电路,在通孔的位置切断晶片。
3. 一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔的同时,在上下两面上分别形成由电镀形成的再布线电路,在上侧的该再布线电路上形成由导电材料构成的热应力缓和柱的同时,在该热应力缓和柱上形成焊料块,另一方面,在下侧的该再布线电路上形成输出端子,通过在所述通孔内施加的电镀连接所述上下各个面的再布线电路,将所述晶片的输出端子与印刷布线基板的布线电路粘合。
4. 根据权利要求3所述的向印刷布线基板安装晶片的方法,其特征在于,
在一个晶片上纵横格子状地设置通孔,同时,在由通孔所包围的各个部分上形成再布线电路,在通孔的位置切断晶片。
5. 一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔的同时,在该通孔的内面上形成绝缘层,在上下两面上分别形成由电镀形成的再布线电路的同时,在该再布线电路上形成由导电材料构成的热应力缓和柱,此外,在所述热应力缓和柱上形成焊料块的同时,通过在所述通孔内在绝缘层上施加的电镀来连接所述上下各个面的再布线电路,将所述晶片的焊料块与印刷布线基板的布线电路粘合。
6. 根据权利要求5所述的向印刷布线基板安装晶片的方法,其特征在于,
在一个晶片上纵横格子状地设置通孔,同时,在由通孔所包围的各个部分上形成再布线电路,在通孔的位置切断晶片。
7. 一种向印刷布线基板安装晶片的方法,其特征在于,在晶片上设置上下面贯通的通孔的同时,在该通孔的内面上形成绝缘层,在上下两面上分别形成由电镀形成的再布线电路,在上面侧的该再布线电路上形成由导电材料构成的热应力缓和柱,同时,在该热应力缓和柱上形成焊料块,另外,在下面侧的该再布线电路上形成输出端子,通过在所述通孔内在绝缘层上施加的电镀来连接所述上下各个面的再布线电路,将所述晶片的输出端子与印刷布线基板的布线电路粘合。
8. 根据权利要求7所述的向印刷布线基板安装晶片的方法,其特征在于,
在一个晶片上纵横格子状地设置通孔,同时,在由通孔所包围的各个部分上形成再布线电路,在通孔的位置切断晶片。
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JP2004187764A JP2005123569A (ja) | 2003-09-25 | 2004-06-25 | ウエハの印刷配線基板への実装方法 |
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KR100787892B1 (ko) * | 2006-10-31 | 2007-12-27 | 삼성전자주식회사 | 반도체 패키지 및 그의 제조 방법 |
KR100959605B1 (ko) * | 2008-03-12 | 2010-05-27 | 주식회사 하이닉스반도체 | 스택 패키지 및 그의 제조 방법 |
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- 2004-09-14 US US10/939,493 patent/US7141453B2/en not_active Expired - Fee Related
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- 2004-09-20 KR KR1020040075085A patent/KR20050030553A/ko not_active Application Discontinuation
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CN1602144A (zh) | 2005-03-30 |
JP2005123569A (ja) | 2005-05-12 |
US20050070050A1 (en) | 2005-03-31 |
KR20050030553A (ko) | 2005-03-30 |
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US7141453B2 (en) | 2006-11-28 |
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