CN100444133C

CN100444133C - Method of computer access expansion memory

Info

Publication number: CN100444133C
Application number: CNB2006100611570A
Authority: CN
Inventors: 刘志永
Original assignee: SHENZHEN EVOC INTELLIGENT TECHNOLOGY Co Ltd
Current assignee: Beijing Evoc Intelligent Technology Co ltd; EVOC Intelligent Technology Co Ltd
Priority date: 2006-06-13
Filing date: 2006-06-13
Publication date: 2008-12-17
Anticipated expiration: 2026-06-13
Also published as: CN101089828A

Abstract

A method for expanding internal memory of computer access includes carrying out paging on internal memory by FPGA chip, sending internal memory page number to be called to FPGA chip by central processor, selecting assigned internal memory page by FPGA chip, sending request to write/read internal memory unit of certain address on internal memory page number to be called to FPGA chip by central processor, selecting assigned internal memory unit then writing and reading assigned internal memory unit by central processor.

Description

The method of computer access expansion memory

[technical field]

The present invention relates to computing machine, relate in particular to a kind of method of computer access expansion memory.

[background technology]

Along with science and technology development, computing machine has been widely used in people's routine work, study, various fields in life, becomes one of indispensable instrument of modern humans society.

Calculator memory is one of basic composition unit of computing machine, is used for storage computation machine program and data, guarantees the correct and operation efficiently of computing machine, and memory size is big more in the computer system, and its operational efficiency is just high more.Therefore the increasing demand of using memory size gets more and more.Yet the internal memory overwhelming majority of present existing computer system is 32 bit address addressing spaces, and its maximum theoretical value can only be supported the 4GB internal memory, once can only visit the internal memory of 4GB size, so can't visit after the Extended RAM.

[summary of the invention]

Technical matters to be solved by this invention is, a kind of method of computer access expansion memory is provided, the addressable internal memory bigger than theoretical value.

The technical solution adopted in the present invention is: a kind of method of computer access expansion memory, and computing machine Extended RAM device comprises central processing unit, fpga chip, memory slot and electric power management circuit,

The method of described computer access expansion memory may further comprise the steps:

Step 1: central processing unit sends the internal memory page number that will visit to fpga chip, and described fpga chip is selected the specified memory page or leaf;

Step 2: the request that central processing unit sends the internal storage location of certain address of reading and writing the internal memory page number that will visit to fpga chip, described fpga chip is chosen the specified memory unit.

More specifically, before the described central processing unit visit Extended RAM, fpga chip internally deposits into earlier capable pagination.

More specifically, select in the step of specified memory page or leaf at described fpga chip, fpga chip is converted to high-order address signal on the memory slot with the internal memory page number of receiving and is transferred to internal memory and selects.

More specifically, choose in the step of specified memory unit at described fpga chip, it is low address signal on the memory slot that fpga chip will deduct address translation in the page or leaf that PCI internal memory base address obtains by the internal storage location address of receiving.

More specifically, write the interface logic of pci bus standard in the described fpga chip, be connected with described central processing unit by pci bus.

More specifically, write the steering logic of DDR memory standard, the steering logic of DDRII memory standard or the steering logic of sdram memory standard in the described fpga chip.

More specifically, described fpga chip is connected with described internal memory by the memory slot of DDR memory standard interface, DDRII memory standard interface or sdram memory standard interface.

The present invention compared with prior art, beneficial effect is: the method for computer access expansion memory of the present invention, calculator memory is carried out paging, call the internal memory of corresponding number of pages when needing visit, realize the internal memory of central processing unit visit greater than 4GB, the theoretical value that has solved the maximum of internal memory can only be supported the difficult problem of 4GB.

[description of drawings]

Fig. 1 is a computing machine Extended RAM schematic representation of apparatus of the present invention.

Fig. 2 is the method synoptic diagram of central processing unit access memory of the present invention.

[embodiment]

See also Fig. 1, computing machine Extended RAM device of the present invention comprises central processing unit 101, FPGA (Programmable Gate Array, field programmable gate array) chip 102, memory slot 103 and electric power management circuit 104.Described fpga chip 102 is connected with described central processing unit 101 by pci bus, described fpga chip 102 is connected with internal memory by memory slot 103, described electric power management circuit 104 is connected with pci bus, fpga chip 102 and memory slot 103, gives fpga chip 102 and memory slot 103 power supplies.

Write the steering logic of pci bus interface logic, DDR memory standard, the steering logic of DDR II memory standard or the steering logic of sdram memory standard in the described fpga chip 102.Described fpga chip 102 is connected with described central processing unit 101 by pci bus, and the method for central processing unit access memory is provided.

Described memory slot 103 can be selected DDR standard interface, DDR II memory standard interface or sdram memory standard interface for use.

See also Fig. 2, the method for the internal memory on the described central processing unit 101 access memory grooves 103, follow following steps:

Deposit into capable pagination in 102 pairs of the step 1:FPGA chips, fpga chip 102 is numbered Extended RAM and original internal memory according to the memory size that calculates the function support, as, computing machine saves as 4GB in can supporting, save as 4GB in original, Extended RAM is 8GB, and computing machine is numbered 0 with original internal memory, and the internal memory of every 4GB size of Extended RAM is numbered 1,2;

Step 2: described central processing unit 101 sends the internal memory page number that will visit to described fpga chip 102 earlier;

Step 3: described fpga chip 102 is converted to high-order address signal on the memory slot 103 with the internal memory page number of receiving, chooses the specified memory page or leaf;

Step 4: described central processing unit 101 sends the request of the internal storage location of certain address of reading and writing this page to fpga chip 102;

Step 4: described fpga chip 102 deducts PCI internal memory base address with the internal storage location address of receiving and obtains a page interior address, and described fpga chip 102 is a low address signal on the memory slot 103 with address translation in the page or leaf, chooses the specified memory unit;

Step 5: described central processing unit 101 read-write specified memory unit.

Claims

1, a kind of method of computer access expansion memory, computing machine Extended RAM device comprises central processing unit, on-site programmable gate array FPGA chip, memory slot and electric power management circuit, it is characterized in that:

2, the method for computer access expansion memory as claimed in claim 1 is characterized in that: before the described central processing unit visit Extended RAM, fpga chip internally deposits into earlier capable pagination.

3, the method for computer access expansion memory as claimed in claim 1, it is characterized in that: select in the step of specified memory page or leaf at described fpga chip, fpga chip is converted to high-order address signal on the memory slot with the internal memory page number of receiving and is transferred to internal memory and selects.

4, the method for computer access expansion memory as claimed in claim 1, it is characterized in that: choose in the step of specified memory unit at described fpga chip, it is low address signal on the memory slot that fpga chip will deduct address translation in the page or leaf that PCI internal memory base address obtains by the internal storage location address of receiving.

5, the method for computer access expansion memory as claimed in claim 1 is characterized in that: write the interface logic of pci bus standard in the described fpga chip, be connected with described central processing unit by pci bus.

6, the method for computer access expansion memory as claimed in claim 1 is characterized in that: write the steering logic of DDR memory standard, the steering logic of DDRII memory standard or the steering logic of sdram memory standard in the described fpga chip.

7, the method for computer access expansion memory as claimed in claim 1 is characterized in that: described fpga chip is connected with described internal memory by the memory slot of DDR memory standard interface, DDRII memory standard interface or sdram memory standard interface.