CN100492147C - Liquid crystal display device and manufacturing method thereof - Google Patents

Liquid crystal display device and manufacturing method thereof Download PDF

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Publication number
CN100492147C
CN100492147C CNB2007101073673A CN200710107367A CN100492147C CN 100492147 C CN100492147 C CN 100492147C CN B2007101073673 A CNB2007101073673 A CN B2007101073673A CN 200710107367 A CN200710107367 A CN 200710107367A CN 100492147 C CN100492147 C CN 100492147C
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dielectric film
electrode
auxiliary capacitor
terminal
liquid crystal
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CN101082749A (en
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野村慎一郎
加藤隆幸
新谷隆夫
杉山裕纪
森田聪
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Japan Display Inc
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Sanyo Epson Imaging Devices Corp
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Abstract

An auxiliary capacitance line and a terminal portion of a liquid crystal display device are made of an Al or Al alloy layer and an Mo layer. The edge portions of a lower auxiliary capacitance electrode and the terminal portion are sequentially coated with a first insulating film, a second insulating film that is thinner than the first insulating film, and a third insulating film. The lower auxiliary capacitance electrode is coated with the second insulating film, and an upper auxiliary capacitance electrode is laid on the surface of the second insulating film on the lower auxiliary capacitance electrode.

Description

Liquid crystal disply device and its preparation method
Technical field
The present invention relates to a kind of Liquid crystal disply device and its preparation method, particularly relate to a kind of can the minimizing and form regional short circuit at auxiliary capacitor, and under the situation that does not reduce each aperture ratio of pixels and increase auxiliary capacitor, thereby be suitable for smaller elemental area or the high Liquid crystal disply device and its preparation method that becomes more meticulous.
Background technology
In recent years, not only at information communication device, even in general electrical equipment, also use liquid crystal indicator mostly.Liquid crystal indicator by substrate and between this a pair of substrate formed liquid crystal layer form, wherein substrate is made up of a pair of glass that has formed electrode etc. on the surface etc.And, by on the electrode of substrate, applying voltage, rearrange liquid crystal molecule and change the transmittance of light, to show various images.
Such liquid crystal indicator, on a spr substrate surface with rectangular formation sweep trace and signal wire.And, be formed with on this array base palte as liquid crystal drive with the thin film transistor (TFT) (Thin FilmTransistor:TFT) of on-off element, to the show electrode of liquid crystal applied voltages and the auxiliary capacitance line that is formed for the auxiliary capacitor of holding signal being constituted array base palte by this two wirings institute area surrounded.And constitute base plate of color light filter on other side group plate surface, be formed with the chromatic filter of red (R), green (G), blue (B) etc. and common electrode etc. on this base plate of color light filter.Then, encapsulated liquid crystals and constitute liquid crystal indicator between two substrates.
Formed auxiliary capacitance line on the array base palte is to keep certain hour in order to form a kind of auxiliary capacitor with the electric charge with the signal that signal wire was provided.Usually this auxiliary capacitor be by with the part of auxiliary capacitor as an electrode, the part of the drain electrode of TFT or pixel electrode as another electrode, is formed capacitor with the gate insulating film that covers the gate electrode of TFT as dielectric.In addition, this auxiliary capacitor is formed by light-proofness conductive materials such as aluminium, molybdenum or chromium usually.
Yet from preventing the viewpoint of crosstalking or glimmering of liquid crystal indicator, the capacity of auxiliary capacitor is bigger, and good.But along with technical renovation in recent years, by the miniaturization of liquid crystal indicator, the development that height becomes more meticulous, the size of each pixel diminishes, and therefore obtaining auxiliary capacitor in a large number is difficult in reality.
As the technology that addresses the above problem, the known spy that has shows disclosed liquid crystal indicator in the 2005-506575 communique.Utilize Fig. 8 A and Fig. 8 B that the array base palte 70 of this liquid crystal indicator is described.Wherein, Fig. 8 A is the vertical view of array base palte, and Fig. 8 B is the X-X cut-open view of Fig. 8 A.
Array base palte 70 is formed with sweep trace 72, auxiliary capacitance line 73, auxiliary capacitor figure 74, gate insulating film 75, semiconductor figure 76, signal wire 77, auxiliary capacitor conductive pattern 78, pixel electrode 79, protection dielectric film 80, contact hole 81, opening 82 on insulated substrate 71.In addition, form thin film transistor (TFT) TFT by each pixel with gate electrode G, source electrode S, drain electrode D.
Auxiliary capacitor is by forming gate insulating film 75 between auxiliary capacitor figure 74 and auxiliary capacitor are with conductive pattern 78.At this moment, the situation that forms auxiliary capacitor with auxiliary capacitor figure 74 with pixel electrode 79 coincidences is compared, and can guarantee bigger electrostatic capacitance under the situation of same overlapping area.
Show in the array base palte 70 of disclosed liquid crystal indicator in the 2005-506575 communique this spy, with dielectric as gate insulating film 75.At this moment in array base palte 70, can make auxiliary capacitor become big by thickness attenuation with gate insulating film 75.But,, guarantee that then gate electrode G and the electrical insulating property between sweep trace 72 and the miscellaneous part that gate insulating film 75 is covered will become difficult if the thickness of gate insulating film 75 is become thinner.
No. 2584290 disclosed liquid crystal indicator 90 of communique of patent solved the problems referred to above point.Utilize Fig. 9 and Figure 10 A~G that the array base palte of this liquid crystal indicator 90 is described.Wherein, Fig. 9 is the vertical view of several pixel parts of No. 2584290 disclosed array base palte of communique of special permission, and Figure 10 A~Figure 10 G is the partial sectional view that the manufacturing process with the array base palte of Fig. 9 represents in order.
At first, on the insulativity substrate of being made up of glass plate 91, figure forms the auxiliary capacitance line of being made up of ITO (IndiumTin Oxide) 92.Then, form grid metal film 93 and carry out graphical (Figure 10 A).
Have again, by plasma CVD etc., form the dielectric film 94 formed by SiNx or Si0x continuously, as the noncrystalline semiconductor film of for example forming by a-Si 95 of active layer and the Ohmic contact usefulness semiconductor film of for example forming 96 (Figure 10 B) that has mixed impurity by the n+a-Si film.At this moment, for the short circuit between drain/gate, the source/grid not taking place, the thickness of dielectric film 94
Figure C200710107367D0008134510QIETU
Set very thickly, for example be set at X=4000
Figure C200710107367D0008134514QIETU
Then, with identical resist Ohmic contact is etched into figure (Figure 10 C) with semiconductor film 96 and noncrystalline semiconductor film 95.And, reserve back painting erosion resistant agent (Figure 10 A~G not shown) with transparency electrode 97 superposed part as opening figure (dotted portion of Fig. 9) with auxiliary capacitance line 92 with in the demonstration that the back operation forms, and carry out etching (Figure 10 D) by the etchant of dielectric film 94 usefulness, make to be thinned to desirable thickness Y=2000 with dielectric film as auxiliary capacitor
Then, will form figure (Figure 10 E) with transparency electrode 97 by the demonstration that ITO forms.To drain again and source electrode carries out figure with metal film 98 and forms (Figure 10 F), and after the Ohmic contact that will remain in the channel portion of TFT carries out etching and remove with semiconductor film 96, finish liquid crystal display usefulness array base palte (Figure 10 G).The array base palte that will obtain by such formation is configured on the common electrode substrate in opposite directions across liquid crystal material, thereby obtains liquid crystal indicator 90.
In such prior art, the auxiliary capacitance electrode portion of auxiliary capacitance line 92 and pixel electrode 97 are equivalent to the electrode of capacitor.And the dielectric film 94 that exists between the auxiliary capacitance electrode portion of auxiliary capacitance line 92 and the pixel electrode 97 is equivalent to the dielectric of capacitor.At this moment, with respect to thickness X=4000 of the dielectric film on the gate electrode 93 94
Figure C200710107367D0009134543QIETU
, the thickness Y=2000 of the dielectric film on the auxiliary capacitance line 92
Figure C200710107367D0009134553QIETU
So, reach following effect, i.e. short circuit between drain/gate, the source/grid is difficult to take place, even and the area that does not enlarge auxiliary capacitance line 92 also can guarantee necessary auxiliary capacitor.
In the array base palte of No. 2584290 disclosed liquid crystal indicator 90 of communique of described patent, by etching only with the thickness attenuation of the gate insulating film on the auxiliary capacitance electrode portion surface of auxiliary capacitance line 92 some.And by like this, when keeping, auxiliary capacitor is increased by gate electrode that gate insulating film covered and the electrical insulating property between sweep trace and other parts.
But, only make the thickness attenuation of the gate insulating film on auxiliary capacitance line surface, under a lot of situations, be short-circuited between the lateral electrode on auxiliary capacitance electrode and the auxiliary capacitor in opposite directions.
The reason of the short circuit on that the present inventor produces when forming auxiliary capacitor by the dielectric film that forms by the local attenuation of thickness with the dielectric film on above-mentioned auxiliary capacitance electrode portion surface, auxiliary capacitance electrode portion and the auxiliary capacitor between the lateral electrode has been carried out various investigations.Its result, as the reason of this short circuit, we find, its with in order to import the portion of terminal that is arranged on signal wire and the sweep trace etc. from the drive signal of outside etc. relation is arranged.
In other words, in manufacturing process, be provided with the dielectric film that comprises passivating film above the lateral electrode on the auxiliary capacitor and above the portion of terminal.And by in thereafter operation with this dielectric film etching and remove, thereby lateral electrode and portion of terminal are exposed.
With respect to the thickness of the dielectric film that at this moment exists on lateral electrode on the auxiliary capacitor, the thickness of the dielectric film on the portion of terminal is thickening significantly.This is owing to as the dielectric film on the portion of terminal, not only have to be present in the dielectric film on the lateral electrode on the auxiliary capacitor, also has the cause of gate insulating film.
Therefore, even the etching of the dielectric film on the auxiliary capacitor on the lateral electrode is through with, the etching that is present in the dielectric film of portion of terminal does not also finish.And during before the etching of arriving the dielectric film of portion of terminal finishes, lateral electrode continues to expose to the open air in etched atmosphere on the auxiliary capacitor that exposes.Therefore sustain damage at the dielectric film that exists between the lateral electrode on auxiliary capacitance electrode portion and the auxiliary capacitor.
Here, if,, problem is arranged seldom also even lateral electrode sustains damage on the auxiliary capacitor there being dielectric film on auxiliary capacitance electrode portion and the auxiliary capacitor between the lateral electrode with abundant thickness.
But, in order to increase auxiliary capacitor, and make on auxiliary capacitance electrode portion and the auxiliary capacitor interval between the lateral electrode extremely narrow and small, in such formation, because the damage of lateral electrode on the auxiliary capacitor, the part of lateral electrode staves the thin dielectric membrane under it on the auxiliary capacitor, thereby is short-circuited with auxiliary capacitance electrode portion.
Therefore, the present inventor changes the formation of dielectric film on the routine electrode on the auxiliary capacitor and the dielectric film on the portion of terminal, simultaneously by readjusting manufacturing process, realization can reduce the short circuit between auxiliary capacitance electrode portion and the auxiliary capacitor upside electrode part significantly, thereby finishes the present invention.
Summary of the invention
The purpose of this invention is to provide a kind of Liquid crystal disply device and its preparation method, promptly, for in order not reduce each aperture ratio of pixels, even small pixel area or the high pixel that becomes more meticulous also can be guaranteed big auxiliary capacitor, thereby make the liquid crystal indicator of the dielectric film attenuation in the zone that forms auxiliary capacitor, can suppress the short circuit between the lateral electrode on auxiliary capacitance electrode portion and the auxiliary capacitor.
In order to reach above-mentioned purpose of the present invention, liquid crystal indicator of the present invention comprises: many signal line and multi-strip scanning line are configured on the transparency carrier with rectangular; Pixel region is made up of the zone that described signal wire and described sweep trace are distinguished; Many auxiliary capacitance lines be arranged in parallel with described sweep trace, have auxiliary capacitance electrode portion at each described pixel region; Lateral electrode on the auxiliary capacitor, corresponding described auxiliary capacitance electrode portion and being provided with; Thin film transistor (TFT) is arranged on each described pixel region; The drain electrode of pixel electrode and described thin film transistor (TFT) forms and is electrically connected; Portion of terminal is arranged on the described transparency carrier, and input is from the signal of outside; The 1st dielectric film, the 2nd dielectric film, the 3rd dielectric film, be formed on the described transparency carrier, it is characterized in that, in described auxiliary capacitance electrode portion, described the 1st dielectric film has window portion, described the 2nd dielectric film covers described window portion and is overlayed on the surface of described the 1st dielectric film, lateral electrode is arranged on the surface of the 2nd dielectric film on the described auxiliary capacitor, the surface of lateral electrode is formed with described the 3rd dielectric film on described auxiliary capacitor, be formed with the auxiliary capacitor contact hole at described the 3rd dielectric film, with contact hole lateral electrode on the described auxiliary capacitor and described pixel electrode formed electrical connection by described auxiliary capacitor; In described portion of terminal, on by described the 1st dielectric film of lamination, described the 2nd dielectric film and described the 3rd dielectric film, form the portion of terminal contact hole, at described portion of terminal contact hole place, described the 2nd dielectric film is with the edges cover of the peristome of described the 1st dielectric film.
In addition, the manufacture method of liquid crystal indicator of the present invention, described liquid crystal indicator comprises: many signal line and multi-strip scanning line are configured on the transparency carrier with rectangular; Pixel region is made up of the zone of distinguishing by described signal wire and described sweep trace; Many auxiliary capacitance lines be arranged in parallel with described sweep trace, have auxiliary capacitance electrode portion at each described pixel region; Thin film transistor (TFT) is arranged on each described pixel region; The drain electrode of pixel electrode and described thin film transistor (TFT) forms and is electrically connected; Portion of terminal, be arranged on the outer part of described transparency carrier, the signal that input is outside, this manufacture method is characterized in that, comprise following operation: behind the whole formation in the surface of described transparency carrier conductive metal layer, the described conductive metal layer of etching, and form the operation of the gate electrode of described thin film transistor (TFT), described sweep trace, described auxiliary capacitance line, described portion of terminal respectively; Form for the surface that covers described transparency carrier is whole after the 1st dielectric film, to being present on the described auxiliary capacitance electrode portion and described the 1st dielectric film on the described portion of terminal carries out etched operation; Form the operation of the 2nd dielectric film for the surface that covers described transparency carrier is whole; Form the operation of semiconductor layer on the top of the gate electrode that covers described thin film transistor (TFT) on the surface of described the 2nd dielectric film; The surface of described the 2nd dielectric film form described signal wire, described thin film transistor (TFT) source electrode and drain electrode, be positioned at described auxiliary capacitance electrode portion above auxiliary capacitor on the operation of lateral electrode; After the whole covering in the surface of described transparency carrier the 3rd dielectric film, described the 2nd dielectric film and the 3rd dielectric film on the 3rd dielectric film on the described auxiliary capacitor of etching on the lateral electrode, the described portion of terminal, and form the operation of the contact hole that contact hole that auxiliary capacitor uses and portion of terminal use; The contact hole of using by described auxiliary capacitor, the operation that lateral electrode on described pixel electrode and the described auxiliary capacitor is electrically connected.
The present invention is by having above-mentioned formation, and reaches following outstanding effect.Promptly, according to liquid crystal indicator of the present invention, because the 2nd dielectric film forms the dielectric layer of auxiliary capacitor, therefore in the thickness of the 1st dielectric film of guaranteeing to bring into play function and the 2nd dielectric film as gate insulating film, and need not to enlarge the area that auxiliary capacitor forms the zone and also can guarantee big auxiliary capacitor, thereby can obtain a kind ofly can improving aperture opening ratio, suppress to crosstalk and flicker etc. shows bad liquid crystal indicator.In addition, in portion of terminal, it constitutes the edge that the 2nd dielectric film covers the peristome of the 1st dielectric film, so when the 1st dielectric film does not form the contact hole of portion of terminal in this position, can shorten the time of the etching end of the dielectric film (the 2nd dielectric film and the 3rd dielectric film) on the portion of terminal.Therefore, the time that lateral electrode exposes to the open air in the etching atmosphere on the auxiliary capacitor shortens, to the damage reduction of lateral electrode on the auxiliary capacitor and the 2nd dielectric film under it.
In addition, according to liquid crystal indicator of the present invention, at the contact hole place that portion of terminal is used, the peristome of the 1st dielectric film forms when forming the window portion of the 1st dielectric film of auxiliary capacitance electrode portion, so when forming the contact hole of portion of terminal, can shorten the time of the etching end of the dielectric film (the 2nd dielectric film and the 3rd dielectric film) on the portion of terminal.Therefore, the time that lateral electrode exposes to the open air in the etching atmosphere on the auxiliary capacitor shortens, to the damage reduction of lateral electrode on the auxiliary capacitor and the 2nd dielectric film under it.
In addition, according to liquid crystal indicator of the present invention, since comprise be present on the auxiliary capacitance electrode portion and portion of terminal on the 1st dielectric film carry out etched operation, so operation in the back, promptly, described the 2nd dielectric film and the 3rd dielectric film on the 3rd dielectric film on the etching auxiliary capacitor on the lateral electrode, the portion of terminal, and form in the operation of the contact hole that contact hole that auxiliary capacitor uses and portion of terminal use, the time that lateral electrode exposes to the open air in the etching atmosphere on the auxiliary capacitor shortens, and therefore the damage to lateral electrode on the auxiliary capacitor and the 2nd dielectric film under it reduces.
Description of drawings
Fig. 1 is the expansion vertical view of a pixel of the base plate of color light filter of liquid crystal indicator of perspective embodiment and the array base palte represented.
Fig. 2 is the A-A cut-open view of Fig. 1.
Fig. 3 is the monnolithic case vertical view of liquid crystal indicator.
Fig. 4 A~Fig. 4 F is in the array base palte manufacturing process of presentation graphs 1, the cut-open view of each operation before when lateral electrode forms to auxiliary capacitor.
Fig. 5 A~Fig. 5 D is in the array base palte manufacturing process of presentation graphs 1 cut-open view of each operation after lateral electrode forms on the auxiliary capacitor.
Fig. 6 A is the figure of each thickness before the contact hole of explanation embodiment forms.
Fig. 6 B is the figure of each thickness before the contact hole of explanation comparative example forms.
Fig. 7 A is the skeleton diagram that expression utilizes the etching state that the RIE method carries out.
Fig. 7 B is the skeleton diagram that expression utilizes the etching state that the PE method carries out.
Fig. 8 A is the vertical view of the array base palte of prior art.
Fig. 8 B is the cut-open view along the X-X line shown in Fig. 8 A.
Fig. 9 is the vertical view of the array base palte of another prior art.
Figure 10 A~Figure 10 G is the cut-open view of each manufacturing process of expression array base palte shown in Figure 9.
Embodiment
Below, with reference to description of drawings preferred forms of the present invention.But embodiment shown below is that illustration is used for the Liquid crystal disply device and its preparation method that technological thought of the present invention is specific.Therefore, be not specific to this Liquid crystal disply device and its preparation method, in other embodiments that yet are applicable in the claim to be comprised with the present invention.
Fig. 1 is the base plate of color light filter of the liquid crystal indicator of perspective embodiments of the invention, and the expansion vertical view of a pixel portion that is equivalent to array base palte of expression.Fig. 2 is the cut-open view of the A-A of Fig. 1.Fig. 3 is the summary overall diagram of liquid crystal indicator that is used to illustrate the configuration of sweep trace, signal wire and portion of terminal.Fig. 4 A~Fig. 4 F is in the array base palte manufacturing process of presentation graphs 1, the cut-open view of each operation before when lateral electrode forms to auxiliary capacitor.What Fig. 5 A~Fig. 5 D was identical is the cut-open view that lateral electrode forms each operation afterwards on the expression auxiliary capacitor.In addition, Fig. 4 A~Fig. 4 F and Fig. 5 A~Fig. 5 D are that expression has comprised the position of A-A section of corresponding diagram 1 and the state of portion of terminal.
The liquid crystal indicator 10 of present embodiment is made up of a pair of substrate and liquid crystal layer 15 that array base palte 13 and base plate of color light filter 14 are formed.Array base palte 13 is to be formed with various wirings etc. on the transparency carrier of being made up of glass etc. 11.Base plate of color light filter 14 is to be formed with chromatic filter etc. on transparency carrier 12.Liquid crystal layer 15, the surface periphery portion with array base palte 13 and base plate of color light filter 14 fits by encapsulant (omitting diagram), and is sealed to its inside.
Array base palte 13 is provided with sweep trace 16, signal wire 17, auxiliary capacitance line 18, TFT and pixel electrode 20.Multi-strip scanning line 16 and signal wire 17 form rectangular.Auxiliary capacitance line 18 between adjacent sweep trace 16 and sweep trace 16 be provided with abreast.TFT is made up of source electrode S, gate electrode G, drain electrode D and semiconductor layer 19.Pixel electrode 20 is set to cover the pixel region that is surrounded by sweep trace 16 and signal wire 17.This pixel electrode 20 uses the transparent conductive material of being made up of ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) etc. to be provided with.In addition,, use amorphous silicon (a-Si) usually, but the situation of use polysilicon (p-Si) is also arranged as the semiconductor layer 19 of TFT.
Base plate of color light filter 14 is provided with black matrix 21, chromatic filter 22, common electrode 23.Black matrix 21 cooperates the pixel region of array base palte 13 to be rectangular setting.Chromatic filter 22 is formed by being arranged on by red (R), green (G) on 21 area surrounded of this black matrix, blue color materials such as (B).Common electrode 23 is set to cover chromatic filter 22.But the present invention is not limited only to this.Under the situation of transverse electric field mode, there is not common electrode.In addition.If white and black displays does not have chromatic filter.Have again, if the situation that the colour of complementary color type shows is not with three primary colors, but constitutes chromatic filter with a greater variety of colors.
The manufacturing process of the array base palte 13 of described liquid crystal indicator 10 is described below with reference to Fig. 4 A~4F and Fig. 5 A~5D.At first, shown in Fig. 4 A, on transparency carrier 11, the Al alloy-layer 24-1 by specific thickness is carried out film forming with the conductive layer 24 that the multiple layer structure of stipulating thick Mo layer 24-2 formed.Wherein, as Al alloy-layer 24-1, Al-Nd and Al-Ta etc. are arranged.Particularly Al-Nd and Al-Ta are difficult to produce and are called as the small projection of hillock (hillock), so can use these as the Al alloy-layer.At this moment, though Mo layer 24-2 is optional, if be Al alloy-layer 24-1, following problem taking place easily, as easy oxidation, and forms the small hole that is called as pin hole easily.But, owing to be provided with Mo layer 24-2 in advance, so be difficult to take place such problem.
As shown in Figure 4, form figure with photoetching process (photolithography) method of knowing.Form by this figure, the part of conductive layer 24 is carried out etching and remove.And between the multi-strip scanning line 16 of horizontal expansion, the gate electrode G that links to each other with this sweep trace 16 and these multi-strip scanning lines 16, form auxiliary capacitance line 18 respectively.In addition as shown in Figure 3, the peripheral edge portion at array base palte 13 forms portion of terminal 41.This portion of terminal 41 is when the IC that installation of driver is used, and is provided with for the drive signal with the outside is input to wiring.As shown in Figure 3, if small-sized liquid crystal indicator, mostly in a plurality of portion of terminal 41 that form side by side of a side.
In addition, in Fig. 4 B, show from sweep trace 16 extended gate electrode G, auxiliary capacitor downside electrode 18a and portion of terminal 41 at 1 pixel region, wherein, the multiple layer structure of Al alloy-layer 18a1 that auxiliary capacitor downside electrode 18a is formed by a part of widening auxiliary capacitance line 18 and Mo layer 18a2 formed, and portion of terminal 41 is made up of Al alloy-layer 41-1 and Mo layer 41-2.This auxiliary capacitor downside electrode 18a becomes formed auxiliary capacitance electrode portion on auxiliary capacitance line 18.
Below, shown in Fig. 4 C, to form the transparency carrier 11 of sweep trace 16 and auxiliary capacitance line 18 by above-mentioned operation, in vacuum plant, carry out for example 250 ℃~350 ℃ high temperature heating, according to universal method, by plasma CVD (Plasma Chemical VaporDeposition) method etc., form from the teeth outwards by specific thickness (for example 3000
Figure C200710107367D0017134731QIETU
) the 1st dielectric film 25 formed of silicon nitride.
Then, shown in Fig. 4 D, the 1st dielectric film 25 that plasma etching (PlasmaEtching:PE) method by one of dry-etching method will exist on the auxiliary capacitor downside electrode 18a of separately each pixel region and portion of terminal 41 is removed.Form window portion 27 by the 1st dielectric film of removing on the auxiliary capacitor downside electrode 18a 25, form peristome 42 by the 1st dielectric film of removing on the portion of terminal 41 25.This PE method is isotropic dry etch (IsotropicDry Etching) method, and etching condition is stable.Therefore, can keep the Mo layer 18a2 and the 41-2 of the window portion 27 that is present in, peristome 42 and carry out etching.At this moment, if adopt reactive ion etching (the Reactive Ion Etching:RIE) method of one of dry-etching method, the sputter that is undertaken by ion and the chemical reaction of etching gas produce simultaneously, and the Mo layer 18a2 and the 41-2 that are present in window portion 27, peristome 42 also are removed.Therefore preferably adopt the PE method.Like this, when forming the 1st dielectric film 25 on regional 18a and the portion of terminal 41 and remove and form window portion 27 and peristome 42, adopts auxiliary capacitor the PE method will being present in, can when removing the 1st dielectric film 25, keep Mo layer 18a2 and 41-2, form on the regional 18a and the minimizing of the thermal load of Al alloy-layer 18a1 on the portion of terminal 41 or 41-1 with respect to auxiliary capacitor so can make.
Afterwards, shown in Fig. 4 E, form the 2nd dielectric film 26 in the surface of transparency carrier 11 integral body by plasma CVD method.The 2nd dielectric film 26 is by the specific thickness thinner than the 1st dielectric film (for example 1000
Figure C200710107367D0018134801QIETU
) silicon nitride form.At this moment, in pixel field separately, except auxiliary capacitor downside electrode 18a and portion of terminal 41, all covered by the two-layer dielectric film of forming by the 1st dielectric film 25 and the 2nd dielectric film 26.And at auxiliary capacitor downside electrode 18a, window portion 27 is covered by the 2nd dielectric film 16.In addition,, be coated with the 2nd dielectric film 26, to cover the peristome 42 that forms on the 1st dielectric film 25 in the zone of portion of terminal 41.Therefore, the edge that constitutes the peristome 42 of the 1st dielectric film 25 is covered by the 2nd dielectric film 26.In addition, wherein the 1st dielectric film 25 and the 2nd dielectric film 26 the two all bring into play function as gate insulating film, and the 2nd dielectric film 26 on the auxiliary capacitor downside electrode 18a forms as auxiliary capacitor and brings into play function with dielectric.
In addition, partly produce for fear of the gate electrode G at TFT and to be caused insulation breakdown by static, thickness settings that can both merge with the 1st dielectric film 25 and the 2nd dielectric film 26 be 2500~5500 of current common employing In addition, in the limit that does not cause short circuit, the thickness of the 2nd dielectric film 26 is preferably thin, can be 500~1500
Figure C200710107367D0018134817QIETU
Thickness discontented 500 when the 2nd dielectric film 26
Figure C200710107367D0018134822QIETU
The time, the short circuit meeting on auxiliary capacitor downside electrode 18a and the auxiliary capacitor between the lateral electrode 18b becomes frequently, thereby not preferred.In addition, the thickness when the 2nd dielectric film 26 surpasses 1500
Figure C200710107367D0018134827QIETU
The time, auxiliary capacitor can diminish thereby be also not preferred.
Have, (for example the a-Si layer 1300 for whole thickness with regulation on the surface of the 2nd dielectric film 26 again And n+a-Si layer 300
Figure C200710107367D0018134848QIETU
) form the semiconductor film of forming by for example a-Si layer and n+a-Si layer.And, by the RIE method semiconductor film is removed afterwards, thereby is made the remained on surface of the 2nd dielectric film 26 on the gate electrode G of TFT that semiconductor layer 19 be arranged.
Then, on transparency carrier 11, will carry out film forming by the conductive layer of the multiple layer contexture of AI alloy-layer and Mo layer.Wherein, though the Mo layer is optional, because the cohesive of the transparent conductive material of Al alloy-layer and ITO etc. is not so good, so be preferably formed as the Mo layer.And shown in Fig. 1 and Fig. 4 F, lateral electrode 18b on signal wire 17, source electrode S, drain electrode D, the auxiliary capacitor is formed figure.Many signal line 17 are extended to the direction vertical with sweep trace 16.Source electrode S extends setting from signal wire 17 and also is connected with semiconductor layer 19.Lateral electrode 18b is positioned at the surface of the 2nd dielectric film 26 on the auxiliary capacitor downside electrode 18a on the auxiliary capacitor.The end of drain electrode D is connected with semiconductor layer 19.Like this, near the cross part of the sweep trace 16 of transparency carrier 11 and signal wire 17, be formed with the TFT that becomes on-off element.Wherein, here illustration with lateral electrode 18b on the auxiliary capacitor and the integrally formed example of drain electrode D.But lateral electrode 18b and drain electrode D on the auxiliary capacitor can be set respectively also.
Have again, shown in Fig. 5 A,, on transparency carrier 11, will carry out film forming as the 3rd dielectric film 28 of passivating film in order to cover these various wirings.The 3rd dielectric film 28 is provided with for the stabilization on surface, is made up of inorganic insulation material (for example silicon nitride).
Then, shown in Fig. 5 B,, form interlayer insulating film 29 for flattening surface with array base palte 13.And in ensuing operation, because at the interlayer dielectric on the lateral electrode 18b on the auxiliary capacitor be positioned at and form contact hole 30, contact hole 43 on the interlayer dielectric on the portion of terminal 41, the interlayer dielectric 29 that therefore forms contact hole 30, contact hole 43 places is removed.This interlayer dielectric 29 is made up of organic insulations such as polyimide.
Afterwards, shown in Fig. 5 C, form contact hole 30 on the dielectric film on the lateral electrode 18b being positioned on the auxiliary capacitor, and on the dielectric film that is positioned on the portion of terminal 41, form contact hole 43.
Forming contact hole 30 and at 43 o'clock, the surface of lateral electrode 18b is only covered by the 3rd dielectric film 28 on the auxiliary capacitor.On the other hand, the surface of portion of terminal 41 is covered (with reference to Fig. 5 B) by the two membranes of the 2nd dielectric film 26 and the 3rd dielectric film 28.Therefore, as shown in Figure 6A, the thickness d 1 of the dielectric film on the auxiliary capacitor on the lateral electrode 18b equals the thickness 2500 of the 3rd dielectric film 28
Figure C200710107367D0020134919QIETU
, and the thickness d 2 of the dielectric film on the portion of terminal 41 equals the thickness (1000 of the 2nd dielectric film 26
Figure C200710107367D0020134925QIETU
) and the thickness (2500 of the 3rd dielectric film 28
Figure C200710107367D0020134930QIETU
) sum 3500 In addition, the purpose of Fig. 6 A is that insulator film thickness d1 on the lateral electrode 18b on the auxiliary capacitor of this moment and relation and the comparative example described later between the insulator film thickness d2 on the portion of terminal 41 are compared.
Here, when the etching of the 3rd dielectric film 28 on being positioned at auxiliary capacitor on the lateral electrode 18b finished, lateral electrode 18b was exposed (with reference to Fig. 5 C) on the auxiliary capacitor.On the other hand, at this moment, at portion of terminal 41 places, though the etching of the 3rd dielectric film 28 on the portion of terminal is through with also residual the 2nd dielectric film 26 on the portion of terminal 41.If continue like this 2nd dielectric film 26 that remains on the portion of terminal 41 is carried out etched words, therebetween, lateral electrode 18b will continue to be exposed to the open air in etched atmosphere on the auxiliary capacitor.
But, owing to existing as gate insulating film bring into play function the layer thickness compare, the thickness of the 2nd dielectric film 26 is extremely thin, so its exposure duration shortens.Therefore lateral electrode 18b and to be positioned at the damage that the 2nd dielectric film 26 of its underpart is subjected to just few on the auxiliary capacitor.
And, after the etching of the 2nd dielectric film 26 on portion of terminal 41 surfaces finishes, shown in Fig. 5 C, on lateral electrode 18b on the auxiliary capacitor, be formed with contact hole 30, on portion of terminal 41, be formed with contact hole 43.At this moment, at portion of terminal 41 places, the edge of formed peristome 42 becomes the shape that is covered by the 2nd dielectric film 26 on the 1st dielectric film 25.And the section that is positioned at contact hole 43 of the 2nd dielectric film 26 and the 3rd dielectric film 28 becomes a face.Like this, at contact hole 43 places, because the end of the 2nd dielectric film 26 and the 3rd dielectric film 28 becomes the section shape of a face, so when transparent conductive material described later is coated, be difficult to take place situations such as broken string.
In addition, the engraving method during as these contact hole 30 contact holes 43 of formation, the most handy PE method is carried out.Usually, in order to form contact hole 30, when etching is positioned on the auxiliary capacitor the 3rd dielectric film 28 on the lateral electrode 18b, use the RIE method.This is because the RIE method has strong anisotropy.When etching the 3rd dielectric film 28, resist it on little by little reamed and on one side carry out etching on one side.Therefore, the tapering shown in Fig. 7 A is formed on the 3rd dielectric film 28.If have the upper surface of the 3rd dielectric film 28 and the angle of side (with dashed lines circle round angle) to become the tapering at obtuse angle like this, when on contact hole 30, becoming the transparent electrode material of pixel electrode, just be difficult to produce the otch of transparent electrode material in the angle of the upper surface of the 3rd dielectric film 28 and side.But, if adopt the RIE method, will be shown in Fig. 7 A like that, also lateral electrode 18b etc. on the etching auxiliary capacitor produces damage to lateral electrode 18b on the auxiliary capacitor.At this moment, if the insulation thickness of lateral electrode 18b bottom is just no problem on the auxiliary capacitor.
But, in the formation that is arranged in the embodiment that the 2nd dielectric film 26 of lateral electrode 18b bottom becomes extremely thin on the auxiliary capacitor, because the damage of lateral electrode 18b might be short-circuited between the lateral electrode 18b on auxiliary capacitor downside electrode 18a and the auxiliary capacitor on the auxiliary capacitor.Therefore, replace the RIE method in this embodiment and use the PE method.According to having isotropic PE method, shown in Fig. 7 B, the upper surface of the 2nd dielectric film 28 and the angle of side (with dashed lines circle round angle) though be almost vertical state, but the damage that can lower lateral electrode 18b on the auxiliary capacitor.
Then, in transparency carrier integral body, form the transparent electrode material of forming by for example ITO.And shown in Fig. 5 D, form pixel electrode 20 by being etched in per 1 pixel region.And, on portion of terminal 41, also be formed for the outside electric conductivity terminal 44 that connects.In addition, pixel electrode 20, in order to prevent light leak, a part that preferably is set to pixel electrode 20 is positioned at the top of sweep trace 16 and signal wire 17, and is notconnect state between the pixel adjacent electrode 20.Make the array base palte 13 of embodiment by above operation.
The auxiliary capacitor of the array base palte 13 that forms by above-mentioned manufacture method, auxiliary capacitor downside electrode 18a is equivalent to the electrode as a side of capacitor, and lateral electrode 18b is equivalent to electrode as the opposing party of capacitor on the auxiliary capacitor.In addition, the dielectric that is equivalent to capacitor at the 2nd dielectric film 26 that disposes between the lateral electrode 18b on auxiliary capacitor downside electrode 18a and the auxiliary capacitor.
Dielectric thickness of being made up of the 2nd dielectric film 26 can be 500~1500 , than the thickness 2500~4500 of the gate insulating film of present use
Figure C200710107367D0022135011QIETU
Approach a lot, also can not increase auxiliary capacitor significantly even therefore do not enlarge the area of auxiliary capacitor downside electrode 18a.In addition and since gate electrode G and sweep trace 16 formed by the layered product of the 1st dielectric film 25 and the 2nd dielectric film 26 gate insulating film covered, so can fully guarantee insulativity and anti-insulation breakdown.
In addition, in this embodiment, when etching is present in the 1st dielectric film 25 on the auxiliary capacitor downside electrode 18a, also etching simultaneously and remove the 1st dielectric film 25 that is present on the portion of terminal 41.Therefore, when forming the 3rd dielectric film 28 on the whole on the surface of transparency carrier 11, the dielectric film on the portion of terminal 41 becomes the two-layer structure (with reference to Fig. 5 A) of the 2nd dielectric film 26 and the 3rd dielectric film 28.At this moment, if the thinner thickness of the 2nd dielectric film 26, when the 3rd dielectric film 28 on the lateral electrode 18b on the etching auxiliary capacitor, even remove the 2nd dielectric film 26 and the 3rd dielectric film 28 on the portion of terminal 41, the time that lateral electrode 18b exposes to the open air under the etching atmosphere on the auxiliary capacitor also can shorten.Like this, the 2nd dielectric film 26 suffered damages of lateral electrode 18b and its underpart can reduce on the auxiliary capacitor.And the short circuit on auxiliary capacitor downside electrode 18a and the auxiliary capacitor between the lateral electrode 18b is suppressed, so can obtain the high liquid crystal indicator of reliability 10.
Comparative example:
Represented following example in an embodiment, promptly when etching is arranged on the 1st dielectric film 25 on auxiliary capacitor downside electrode 18a surface, also etching simultaneously be arranged on the 1st dielectric film 25 (with reference to Fig. 4 D) on portion of terminal 41 surfaces.In order to confirm the effect of embodiment clearly, as a comparative example, to have listed when etching is arranged on auxiliary capacitor and forms the 1st dielectric film 25 on regional 18a surface, not etching is arranged on the example of the 1st dielectric film 25 on portion of terminal 41 surfaces.In addition, except that this point, other the operation with embodiment has been made array base palte 13 equally.
Formation and Fig. 6 A of at this moment comparative example are presented among Fig. 6 B side by side, and wherein Fig. 6 A is the figure of Fig. 5 B of corresponding embodiment.Formation shown in formation shown in Fig. 6 A and Fig. 6 B is compared and can know clearly, and in the comparative example of Fig. 6 B, the surface of portion of terminal 41 is covered by the trilamellar membrane of the 1st dielectric film the 25, the 2nd dielectric film 26 and the 3rd dielectric film 28.For this, in the embodiment of Fig. 6 A, the surface of portion of terminal 41 is covered by the two membranes of the 2nd dielectric film 26 and the 3rd dielectric film 28.
Therefore, under the situation of the comparative example of Fig. 6 B, the gross thickness d3 of the dielectric film on the portion of terminal 41 is 6500
Figure C200710107367D0023135059QIETU
, be the 1st dielectric film 25 (thickness 3000
Figure C200710107367D0023135108QIETU
), the 2nd dielectric film 26 (thickness 1000
Figure C200710107367D0023135104QIETU
) and the 3rd dielectric film 28 (thickness 2500
Figure C200710107367D0023135115QIETU
) summation.And the thickness d 1 of the dielectric film on the auxiliary capacitor on the lateral electrode 18b is identical with the situation of embodiment, is 2500
Figure C200710107367D0023135119QIETU
So, in comparative example, when forming contact hole 30 and contact hole 43 simultaneously, and on the auxiliary capacitor dielectric film on the lateral electrode 18b (thickness is 2500 The 3rd dielectric film 28) all etched and when exposing on the auxiliary capacitor lateral electrode 18b, (thickness is 3000 to also residual the 1st dielectric film 25 on the portion of terminal 41
Figure C200710107367D0023135135QIETU
) and the 2nd dielectric film 26 (thickness is 1000
Figure C200710107367D0023135129QIETU
) totally two dielectric films (thickness is 4000
Figure C200710107367D0023135139QIETU
).
On the other hand, in an embodiment, (thickness is 2500 to the dielectric film on lateral electrode 18b on the auxiliary capacitor
Figure C200710107367D0023135146QIETU
The 3rd dielectric film 28) during by whole etchings, only residual on portion of terminal 41 have the 2nd dielectric film (thickness be 1000
Figure C200710107367D0024135157QIETU
).Therefore, in embodiment and comparative example, if on after lateral electrode 18b exposes on the auxiliary capacitor, also continuing to portion of terminal 41 residual dielectric film carry out etched words, compared with embodiment, comparative example is in the longer time, and lateral electrode 18b exposes to the open air in etched atmosphere on the auxiliary capacitor.Therefore, the damage that lateral electrode 18b and the 2nd dielectric film 26 under it are subjected on the auxiliary capacitor is accumulated, and causes the increase of the short circuit between the lateral electrode 18b on auxiliary capacitor downside electrode 18a and the auxiliary capacitor.
In addition, in described embodiment, represented following example, promptly, sweep trace 16 and gate electrode G or the auxiliary capacitance line 18 formed by Al layer 18a1 and Mo layer 18a2 have been used, but be not limited in this, also Mo layer 18a2 can be set, further, as AI layer 18a1, also can use normally used Al layer and other Al alloy-layer as sweep trace and auxiliary capacitance line.
In addition, in described embodiment, to the 1st dielectric film the 25, the 2nd dielectric film 26 and the 3rd dielectric film 28 illustrations the example of forming by silicon nitride, but it is made of monox or aluminium oxide.But if from insulativity, the 2nd dielectric film 26 and the 3rd dielectric film 28 preferably are made up of silicon nitride.
As previously discussed,, can suppress to form the short circuit between the lateral electrode 18b on the auxiliary capacitor downside electrode 18a of auxiliary capacitor and the auxiliary capacitor, can also increase auxiliary capacitor according to liquid crystal indicator of the present invention, thus can reduce show bad.
In addition, in the present invention, if between pixel electrode 20 and interlayer insulating film 29 or the surface of pixel electrode 20 reflecting plate of being made up of light reflecting material is set, then also can be used as the liquid crystal indicator of Semitransmissive or reflection-type.Promptly, when as the liquid crystal indicator of Semitransmissive, reflecting plate can be arranged on reflecting plate and TFT and auxiliary capacitor downside electrode 18a overlapping areas when overlooking, in addition, when as the liquid crystal indicator of reflection-type, expelling plate can be arranged on and the pixel electrode overlapping areas.At this moment, if form trickle concavo-convexly on the surface of the interlayer insulating film 29 that reflecting plate is set, the visual angle of reflecting part can broaden, thereby preferred.

Claims (8)

1, a kind of liquid crystal indicator comprises: many signal line and multi-strip scanning line are configured on the transparency carrier with rectangular; Pixel region is made up of the zone that described signal wire and described sweep trace are distinguished; Many auxiliary capacitance lines be arranged in parallel with described sweep trace, have auxiliary capacitance electrode portion at each described pixel region; Lateral electrode on the auxiliary capacitor, corresponding described auxiliary capacitance electrode portion and being provided with; Thin film transistor (TFT) is arranged on each described pixel region; The drain electrode of pixel electrode and described thin film transistor (TFT) forms and is electrically connected; Portion of terminal is arranged on the described transparency carrier, and input is from the signal of outside; The 1st dielectric film, the 2nd dielectric film, the 3rd dielectric film are formed on the described transparency carrier, and described liquid crystal indicator is characterized in that,
Described the 2nd dielectric film is that described the 1st dielectric film of its Film Thickness Ratio is thin;
In described auxiliary capacitance electrode portion, described the 1st dielectric film has window portion, described the 2nd dielectric film covers described window portion and is overlayed on the surface of described the 1st dielectric film, lateral electrode is arranged on the surface of described the 2nd dielectric film on the described auxiliary capacitor, the surface of lateral electrode is formed with described the 3rd dielectric film on described auxiliary capacitor, be formed with the auxiliary capacitor contact hole on described the 3rd dielectric film, lateral electrode and described pixel electrode form with contact hole by described auxiliary capacitor and are electrically connected on the described auxiliary capacitor;
In described portion of terminal, on by described the 1st dielectric film of lamination, described the 2nd dielectric film and described the 3rd dielectric film, be formed with the portion of terminal contact hole, at described portion of terminal contact hole place, described the 2nd dielectric film covers the edge of the peristome of described the 1st dielectric film.
2, liquid crystal indicator as claimed in claim 1 is characterized in that, the aggregate thickness of described the 1st dielectric film and the 2nd dielectric film is
Figure C200710107367C00021
The thickness of described the 2nd dielectric film is
Figure C200710107367C00022
3, liquid crystal indicator as claimed in claim 1 is characterized in that, lateral electrode is to form by described drain electrode is extended on described the 2nd dielectric film of described auxiliary capacitance electrode portion on the described auxiliary capacitor.
4, a kind of liquid crystal indicator comprises: many signal line and multi-strip scanning line are configured on the transparency carrier with rectangular; Pixel region is made up of the zone that described signal wire and described sweep trace are distinguished; Many auxiliary capacitance lines be arranged in parallel with described sweep trace, have auxiliary capacitance electrode portion at each described pixel region; Lateral electrode on the auxiliary capacitor, corresponding described auxiliary capacitance electrode portion and being provided with; Thin film transistor (TFT) is arranged on each described pixel region; The drain electrode of pixel electrode and described thin film transistor (TFT) forms and is electrically connected; Portion of terminal is arranged on the described transparency carrier, and input is from the signal of outside; The 1st dielectric film, the 2nd dielectric film, the 3rd dielectric film are formed on the described transparency carrier, and described liquid crystal indicator is characterized in that,
Described the 2nd dielectric film is that described the 1st dielectric film of its Film Thickness Ratio is thin;
In described auxiliary capacitance electrode portion, described the 1st dielectric film has window portion, described the 2nd dielectric film covers described window portion and is overlayed on the surface of described the 1st dielectric film, lateral electrode is arranged on the surface of the 2nd dielectric film on the described auxiliary capacitor, the surface of lateral electrode is formed with described the 3rd dielectric film on described auxiliary capacitor, be formed with the auxiliary capacitor contact hole on described the 3rd dielectric film, lateral electrode and described pixel electrode form with contact hole by described auxiliary capacitor and are electrically connected on the described auxiliary capacitor;
In described portion of terminal, on by described the 1st dielectric film of lamination, described the 2nd dielectric film and described the 3rd dielectric film, be formed with the portion of terminal contact hole, at described portion of terminal contact hole place, the peristome of described the 1st dielectric film is that the described window portion with described the 1st dielectric film of described auxiliary capacitance electrode portion forms simultaneously.
5, a kind of manufacture method of liquid crystal indicator, this liquid crystal indicator comprises: many signal line and multi-strip scanning line are configured on the transparency carrier with rectangular; Pixel region is made up of the zone that described signal wire and described sweep trace are distinguished; Many auxiliary capacitance lines be arranged in parallel with described sweep trace, have auxiliary capacitance electrode portion at each described pixel region; Thin film transistor (TFT) is arranged on each described pixel region; The drain electrode of pixel electrode and described thin film transistor (TFT) forms and is electrically connected; Portion of terminal is arranged on the outer part of described transparency carrier, and input is from the signal of outside, and the manufacture method of described liquid crystal indicator is characterized in that, comprises following operation:
The surface of described transparency carrier is whole form the conductive metal layer after, the described conductive metal layer of etching, and form the operation of the gate electrode of described thin film transistor (TFT), described sweep trace, described auxiliary capacitance line, described portion of terminal respectively;
Form the 1st dielectric film with after the surperficial integral body that covers described transparency carrier, will be present on the described auxiliary capacitance electrode portion and described the 1st dielectric film on the described portion of terminal carries out etched operation;
Formation than thin the 2nd dielectric film of described the 1st dielectric film to cover the whole operation in surface of described transparency carrier;
Form the operation of the semiconductor layer on the top that covers described thin film transistor (TFT) gate electrode on the surface of described the 2nd dielectric film;
The surface of described the 2nd dielectric film form described signal wire, described thin film transistor (TFT) source electrode and drain electrode, be positioned at described auxiliary capacitance electrode portion above auxiliary capacitor on the operation of lateral electrode;
After the whole covering in the surface of described transparency carrier the 3rd dielectric film, described the 2nd dielectric film and the 3rd dielectric film on the 3rd dielectric film on the described auxiliary capacitor of etching on the lateral electrode, the described portion of terminal, and form the operation of the contact hole that contact hole that auxiliary capacitor uses and portion of terminal use;
The contact hole of using by described auxiliary capacitor, the operation that lateral electrode on described pixel electrode and the described auxiliary capacitor is electrically connected.
6, the manufacture method of liquid crystal indicator as claimed in claim 5 is characterized in that, the aggregate thickness of described the 1st dielectric film and the 2nd dielectric film is
Figure C200710107367C00051
The thickness of described the 2nd dielectric film is
7, the manufacture method of liquid crystal indicator as claimed in claim 5 is characterized in that, the drain electrode by making described thin film transistor (TFT) extends on described the 2nd dielectric film of described auxiliary capacitance electrode portion, thereby forms lateral electrode on the described auxiliary capacitor.
8, the manufacture method of liquid crystal indicator as claimed in claim 5 is characterized in that, forms the etching in the operation of the contact hole that contact hole that described auxiliary capacitor uses and described portion of terminal use, and is undertaken by plasma etching method.
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