CN100492656C - Semiconductor device with a field shaping region - Google Patents

Abstract

A semiconductor device, for example a diode (200), having a pn junction (101) has an insulating material field shaping region (201) adjacent, and possibly bridging, the pn junction. The field shaping region (201) preferably has a high dielectric constant and is coupled via capacitive voltage coupling regions (204,205) to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction (101) and the device is non-conducting, a capacitive electric field, is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region (201), the electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region (208,209) and an increased reverse breakdown voltage of the device.

Description

Semiconductor device with field shaping region

Technical field

The present invention relates to a kind of semiconductor device that comprises semiconductor regions, this semiconductor regions has the field shaping region of pn knot and adjacent reverse breakdown voltage in order to enhance device with this pn knot.

Background technology

Figure 1A of accompanying drawing shows a kind of structure of known simple semiconductor pn junction diode device 100.Rectifying junction 101 forms between p type district 102 and n type district 103, and the more highly doped p of identical conduction type is passed through in zone 102 and 103 respectively ⁺And n ⁺District 106,107 links to each other with 105 with device metal electrode 104.The reverse breakdown voltage of diode and the maximum field of permission (being approximately 0.2MV/cm for semiconductor silicon) relation are very big.Therefore puncture voltage depends on depletion region edge 108,109 to pn and ties in 101 any sides, i.e. the density of the interior equipotential lines of depletion region scope (it depends on the doped level of pn knot both sides).

The doped level of the simple diode shown in Figure 1A and the direct relation of puncture voltage can be avoided by multiple known structure, and these structures are all used famous RESURF mechanism.

An example of the document of open RFSURF mechanism structure is US-A-4,754,310 (our reference number PHB32740), and its content is quoted as a reference herein.The power device that comprises rectifier diode, field-effect transistor and bipolar transistor is disclosed in this United States Patent (USP).In the situation of simple rectifier diode, the structural equivalents that has Figure 1B of a kind of structure and accompanying drawing to schematically show.In the 100B of diode shown in Figure 1B structure, it has alternately p type and n type zone, and under identical reverse voltage, edge 108B, the 109B of electric field and depletion region ties any side bigger distance that is stretched at pn.This causes higher puncture voltage.In the situation of field-effect transistor, trade-off relation between ON resistance and the transistorized puncture voltage solves by the following method, the zone that the second area that promptly provides first area by first conduction type to be inserted into films of opposite conductivity forms is as drain-drift region, and is similar with the p type that replaces and the n type district of the diode of the Figure 1B shown in the accompanying drawing.The subject matter of these layouts is that P and N type mix and must have good balance in p type that replaces and n type zone.

International patent application with the WO-A-01/59847 announcement, the compromise another kind of method of improving under vertical High-Voltage Insulation gate field-effect device situation between puncture voltage and the ON resistance is provided, and its content is quoted as a reference (our reference number PHNL000066) herein.Field shaping region passes drain-drift region from the body region of device and extends to the drain region.These field shaping regions are semi-insulating district or resistive region, when applying voltage on not conducting of device and the main electrode at device, these field shaping regions provide the electric current leakage path from the source region, so that the depletion region in the drain-drift region is to the reverse breakdown voltage of drain region expansion with the increase device.Little leakage current along resistive paths causes along the potential drop of the linearity of these paths.Therefore along these paths and correspondingly produce substantially invariable vertical electric field in adjacent drain-drift region, this causes puncture voltage big than under inhomogeneous field (occurring in the situation that the lacks the field shaping region territory) situation.Like this, for US-A-4,754,310 invention for the required puncture voltage of given device, might increase the doping content of drain-drift region, thereby compare the ON resistance that has reduced device with commonplace components.

International patent application with the WO-A-03/015178 announcement, its content is quoted as a reference (our reference number PHNL010570) herein, a kind of bipolar transistor structure is disclosed, comprise: collector electrode, it comprises the higher collector area of doping content of the first conductive type semiconductor material that is doped to first concentration; The emitter region of the first conductive type semiconductor material; Between emitter region and collector electrode, with the base region of the second conductive type semiconductor material of first conductivity type opposite; Collector electrode further is included in the more low-doped drift region of extending between the collector area of higher-doped and the base region, and this drift region is first conduction type and is doped to second concentration that is lower than first concentration; Extend near the groove in drift region; With the grid of separated drift regions, being used to control the drift region is carrier depletion when the voltage blocking mode of operation in groove.The doping content of the drift region in the collector electrode is lower than the doping content of the higher doped regions of collector electrode, makes that the charge carrier of drift region is depleted.Use the grid in the groove, drift region even still can exhaust when having higher-doped in the drift region.This allows the product of cut-off frequency and puncture voltage to compare increase with the prior art structure.Easily, this structure can be the vertical stratification that forms on first and second the relative semiconductor body having.Emitter region can link to each other with first, and collector area links to each other with second.Groove passes emitter and base region perpendicularly with first face basically and extends to the drift region.In alternative, transversary can be provided, for example, use insulated buried layer as grid.This grid can be a semi insulating material, this structure may further include with drift region and base region between the first grid at adjacent gate terminal place, border be connected, and the second grid of boundary that is positioned at the collector area of drift region and higher-doped is connected.This permission applies uniform electric field along grid, and then provides uniform electric field to be minimized in the risk that punctures under the low-voltage in the drift region.Need not in the drift region, to have complicated dopant profiles just can obtain uniform electric field.

The international patent application of announcing with WO-A-03/043089 relates to a kind of invention, its content is quoted as a reference (our reference PHNL020937) herein, this invention provides a kind of source region that comprises, the field effect transistor semiconductor device of drain region and drain-drift region, the friendship device has the field shaping region adjacent with the drift region, this field shaping region is to be provided with like this: in the use, when between source electrode and drain region, applying reverse voltage and not conducting of device, at field shaping region and correspondingly in drift region adjacent, produce substantially invariable electric field, it is characterized in that a shaping.The district is configured to as the capacitor dielectric region between first electrode for capacitors zone and the second electrode for capacitors zone, and the respective end of this first and second capacitor electrode regions and this electricity dielectric region is adjacent, and has different electronics energy barriers.

The substantially constant electric field means, under given voltage field shaping region and therefore the maximum field in the adjacent drift region compare with the situation of no field shaping region and reduce, consequently the puncture voltage of device is higher relatively.

In the device according to WO-A-03/043089, the different electronics energy barrier of first and second capacitor electrode regions has guaranteed just, in use, when between source region and drain region, applying voltage and not conducting of device, field shaping region is as capacitor dielectric region territory rather than resistive region, in field shaping region, there is not space charge substantially, in the drift region, there is charge balance between the space charge in the space charge in first capacitor electrode regions and the drain-drift region and second capacitor electrode regions.That is to say that the electric charge in the drain-drift region adds the electric charge in charge compensation second capacitor electrode regions in first capacitor electrode regions.Be that the voltage that is applied capacitively produces the substantially constant electric field in this invention in field shaping region, rather than the leakage current of the field shaping region of flowing through that in WO-A-01/059847, provides in the disclosed layout.And US-A-4 does not exist providing between two kinds of opposite conductivity type regions in the layout of problem at WO-A-03/043089 of accurate charge balance along drift region length in 754,310 the layout.

Field shaping region is described as intrinsic material in WO-A-03/043089, or mixes the extrinsic semiconductor material lower than the drift region, or semi insulating material, for example, comprises one of polysilicon of oxygen-doped polysilicon or nitrating.First capacitor electrode regions can be the semiconductor regions of first conduction type, and second capacitor electrode regions is the conduction type semiconductor regions opposite with first capacitor electrode regions.The different electronics energy barriers of first and second capacitor electrode regions are provided by the different work functions of two kinds of semiconductor conductivity types in this case.Perhaps, first capacitor electrode regions can be a semiconductor regions, and the second capacitance electrode district is the Schottky barrier zone.The work function of the first electrode for capacitors semiconductor regions is the electronics energy barrier that is different from the Schottky electronics energy barrier in the second electrode for capacitors Schottky barrier district in this situation.In two kinds of situations of explanation just now, the first capacitor electrode regions semiconductor regions is identical with the conduction type in drain region.This transistor can be an isolated-gate field effect transistor (IGFET).This can be to be the transistorized vertical transistor of trench-gate.

Summary of the invention

According to the present invention, a kind of semiconductor device is provided, comprise semiconductor regions, this semiconductor regions has p N-type semiconductor N zone and the n N-type semiconductor N zone that forms the pn knot and adjoins only one the field shaping region in order to the reverse breakdown voltage of raising device in p N-type semiconductor N zone and the n N-type semiconductor N zone, wherein, field shaping region is insulating material and extends to the second capacitive voltage coupling district from the first capacitive voltage coupling district, the essentially identical voltage of voltage that provides these two capacitive voltage coupling districts to tie in use to apply and to be applied to pn, the material of field shaping region and capacitive couplings make: when tying at pn when applying reverse voltage and not conducting of device, in the part of field shaping region, there is capacitive electric field, this capacitive electric field extends beyond the border of pn knot depletion region, described border exists when this field shaping region not, the electric field of the broadening of the pn knot depletion region of the corresponding broadening of this electric field induction rising limit in semiconductor regions in this field shaping region.

The meaning of " the capacitive voltage coupling district is set as in use to provide with pn and ties the identical voltage of voltage that is applied " above the present invention in the definition will be below example explanation and set forth in obtain understanding.Yet,, should be noted that field shaping region can only be directly coupled to identical p type and the n N-type semiconductor N zone that forms the pn knot simply herein by simple explanation; Perhaps field shaping region can be coupled to the regional adjacent p+ zone of p and/or at opposite side in a side and be coupled to and adjacent n+ zone, n zone; Perhaps field shaping region can be coupled to p+ and p type zone simultaneously and/or be coupled to n+ and n type zone simultaneously at opposite side in a side; Perhaps field shaping region can be coupled to conductive region electrode (for example metal or highly doped polysilicon) in one or both sides, and described conductive region electrode can provide for this purpose, maybe can be the main electrode or the control electrode of semiconductor device; Perhaps the field shaping region territory can be coupled with the combination in top these zones of just having mentioned.

In device of the present invention, the field shaping region adjacent with semiconductor pn knot can bridge joint pn knot or it can only adjoin the p type side or the n type side of this pn knot.Field shaping region is can be only adjacent or all adjacent with its both sides with a side of the lateral extent of pn knot.Field shaping region can directly adjoin the semiconductor regions with pn knot, perhaps can have the insulating regions (SiO for example of an insertion ₂) as the passivation liner.This p type zone and n type zone can have constant doping or non-uniform doping (for example gradient doping); If it is as the conducting state drift region, non-uniform doping all is preferred in arbitrary zone.

In the example of the present invention that describes below, to be different from US-A-4,754,310 and obtain the increase of device reverse breakdown voltage in the disclosed mode among International Patent Application WO-A-01/59847, WO-A-03/015178 and the WO-A-03/043089 announced of above-mentioned discussion.

Description of drawings

Provide the more detailed description and the explanation of example of the present invention with reference to accompanying drawing, in the accompanying drawing:

Figure 1A and 1B show the schematic cross sectional view of known semiconductor diode component described above respectively;

Fig. 2 shows the schematic cross sectional view according to semiconductor diode device of the present invention;

Fig. 3 A and 3B be set forth respectively among Fig. 2 and Figure 1A shown in the figure of the equipotential lines of diode component when puncturing;

Fig. 4 shows the graph of simulation results of the diode of Fig. 2;

Fig. 5 shows the silicon on insulated substrate that has according to of the present invention shaping layer;

Fig. 6 and 6A show the summary section of the vertically insulated grid field effect transistor semiconductor device of a planar gate according to the present invention part respectively;

Fig. 7 and 7A show the summary section according to vertical trench of the present invention-gate insulated gate field effect transistor semiconductor device part respectively;

Fig. 8 A and 8B show respectively according to the profile of landscape insulation bar FET device of the present invention and plane graph;

Fig. 9 and 10 shows respectively according to the schematic diagram of bipolar transistor of the present invention and profile;

Figure 11 shows the perspective schematic view according to silicon on insulated substrate of the present invention; With

Figure 12 shows the schematic cross sectional view according to pn knot marginal end structure of the present invention.

Embodiment

With reference now to the Fig. 2 in the accompanying drawing,, shows according to simple semiconductor pn junction diode device 200 of the present invention.Identical with the mode of the known diode component 100 shown in Figure 1A, diode component 200 has between p type district 102 and n type district 103 rectifying junction 101 that forms, zone 102 with 103 respectively the more highly doped p+ by same conductivity link to each other with 105 with device metal electrode 104 with n+ zone 106,107.Diode component 200 also has insulative dielectric material field shaping region 201, both sides are adjacent and bridge joint pn ties the p type side 102 and the n type side 103 of the lateral extent of this shaping region and pn knot 101.The first and second capacitive voltage coupling districts 204 and 205 are coupled in each insulation dielectric district 201, and they are that electric conducting material is made, that is to say, they be metal and with the main electrode 104 and 105 of diode component 200 be whole.Such first and second capacitive voltage coupling districts 204 and 205 are configured in use be in and the essentially identical voltage of voltage that is applied to by electrode 104 and 105 on the pn knot 101.The material of each field shaping region 201 and capacitive couplings make: when applying reverse voltage and device 200 not conductings on pn knot 101, on the part of each field shaping region 201, there is capacitive electric field, it extends outside the pn knot depletion region border, have this border under the situation that does not have field shaping region 201, it illustrates with dotted line limit 108,109 in Figure 1A.The electric field of the broadening of the pn knot depletion region of the corresponding broadening of this electric field induction rising limit in semiconductor regions in the field shaping region 201, thereby make device 200 have the reverse breakdown voltage of enhancing.The edge of the broadening of the pn knot depletion region that induces under reverse breakdown voltage is shown in dotted line among Fig. 2 208 and 209.As shown in Figure 2, p+, p, n and the n+ zone of the both sides of pn knot 101 except being coupled to the first and second metal capacitor electrode zones 204,205, also is coupled in each insulation dielectric district 201.As an alternative, in the first and second capacitive voltage coupling districts of each dielectric region 201 at least one can comprise in the p type district 102 that forms pn knot 101 and the n district 103, perhaps at least one in the first and second capacitive voltage coupling districts of each dielectric region 201 can comprise the semiconductor regions of higher-doped, in this semiconductor regions and p type that forms the pn knot and the n N-type semiconductor N zone one adjacent and with have identical conduction type, that is, p+ zone 106 or n+ zone 107.For example, dielectric region 201 can only be coupled to p type district and n type district 102,103, or dielectric region 201 can only be coupled to p+ and n+ zone 106 and 107.

The recruitment of the broadening degree of pn knot depletion region and the diode device reverse breakdown voltage that causes thus is the function of semi-conducting material doped level.Pn knot p type side can have identical doped level with n type side.Perhaps, p type side can have different doped level with n type side, if there is obviously difference, the width of depletion layer is mainly by the side decision of mixing lower.The degree that puncture voltage increases also depends on the relative width of a semi-conducting material and a shaping dielectric substance.The increase of the puncture voltage of semiconductor pn knot is relevant with the dielectric constant difference of semi-conducting material and insulation field shaping region material.For example, the dielectric constant of silicon semiconductor material is approximately 11.7 to 11.9, and by comparison, the dielectric constant that is suitable for use as the Ta2O5 of the dielectric substance of (a plurality of) field shaping region in the device according to the present invention is approximately 22.And the breakdown field strength of insulative/dielectric materials is enough born the electric field that appears at according in the geometry of device architecture of the present invention; For example, for Ta2O5, it is 3-5MV/cm.Standard dielectric silicon dioxide SiO2 that uses in the semiconductor device and silicon nitride Si3N4 also can be used for (a plurality of) field shaping region of the device according to the present invention.SiO2 has 3.9 dielectric constant and the breakdown strength of 12-15MV/cm.Si3N4 has the breakdown strength of dielectric constant and the 10-11MV/cm of 7-9, and it is apparently higher than the disruptive field intensity of the 0.2MV/cm of semiconductor silicon.

With reference now to Fig. 3 A and 3B,, they are respectively the simulation drawings of the equipotential lines of the diode component shown in key diagram 2 and Figure 1A under reverse breakdown voltage.Among Fig. 3 A and the 3B, the 4.0 micron places of pn knot on vertical axis, p+ district from 0.0 to 0.2, p district from 0.2 to 4.0, n district from 4.0 to 8.0, n+ district from 8.0 to 8.2.The vertical height of Fig. 2 device shown in Fig. 3 A is selected than the height of actual needs; Total height from 2.5 microns to 5.5 microns the vertical axis is to proving that this effect is enough.The p of semiconductor silicon is identical with the doped level in n district in Fig. 3 A and the device shown in the 3B, all is 1 E17.The analog result of the puncture voltage of Figure 1A device has been shown in Fig. 3 B, is 21.4 volts.For the device of the Fig. 2 shown in Fig. 3 A, the width of semiconductor silicon, promptly the transverse width of pn knot is 0.4 micron, (be tantalum oxide, width Ta2O5) also is 0.4 micron in shaping insulation dielectric district, two fields 201.The analog result of the puncture voltage of the device of Fig. 2 is increased to 36 volts shown in Fig. 3 A from 21.4 volts.

Equipotential lines among Fig. 3 A and the 3B has clearly illustrated: (a) border (limit 108,109 shown in Fig. 3 B) of the pn knot depletion region that exists during no field shaping region, (b) be present in capacitive electric field in the part of each field shaping region territory 201 (Fig. 3 A), it extends border 108,109 (Fig. 3 B), (c) effect of the capacitive electric field in the field shaping region 201 induces the electric field of broadening, and the electric field of this broadening is limited to the pn knot depletion region (limit 208,209) of the corresponding broadening in the semiconductor regions.

Be explained as follows for some of the effect of the device of the Fig. 2 shown in Fig. 3 A.For each field shaping region territory, there is a two-dimentional capacitor, a pole plate is in p type district, and another is (more accurately, capacitor plate distributes: voltage is big more, and the distance of these pole plates is big more) in n type district.Center on the function of the voltage distribution of capacitor plate and the material (geometry and their dielectric constant) that electric field line is the capacitor pole panel area.A simple example is a plate condenser, and wherein, insulation dielectric is inserted between the pole plate: suppose that electric charge equates that voltage reduces at pole plate place on two plates.Semiconductor diode has the behavior of same type: introduce to be parallel to the insulation dielectric of knot and to suppose that the electric charge of both sides is identical and will cause the voltage on the diode lower.We can increase and apply voltage and arrive its initial point now.Action needs extra electric charge in the depletion layer hereto, therefore, needs thicker depletion layer.The result is, produces lower electric field under identical reverse voltage at the knot place.This causes higher puncture voltage.

In the modification of device shown in Figure 2, knot (therefore replacing P with N fully) moves up, if dielectric region 201 does not exist, cause 15 volts puncture voltage, if have two dielectric regions 201, puncture voltage is 28 volts (reuse and have 0.4 micron wide semiconductor silicon and 0.4 micron wide dielectric region 201).The result of this modification is that capacitive couplings strengthens, and causing depletion region to be widened will partly strengthen in low-doped n type.Because depletion region at low-doped part broad, might more easily extend depletion region in this low-doped part, same people wish to improve closely-coupled effect by this capacitive couplings.This more obtains near n+ side voltage by making p+ side voltage.N type district has high resistivity and keeps high-tension material piece like this.So it also can be used among the MOSFET.

Fig. 4 in the accompanying drawing shows the summary of the analog result of the diode among Fig. 2, wherein, and the relation of the puncture voltage (volt) of having drawn with semiconductor regions/dielectric area width (micron).P type and the doping of n type that curve 41 and 42 shows both sides and side knot respectively all are the result of 5E16, that is to say that dielectric and pn knot both sides as shown in Figure 2 are all adjacent, and dielectric only with the side adjacent (this also is possible within the scope of the invention) of knot.Curve 43 and 44 shows the p type of both sides or side knot and the result that the n type is doped to 1E17 similarly.

These results produce following implementation suggestion:

Pass the knot etching groove of diode, and use filling insulating material groove, this insulating material preferably have high-k (for example, dielectric constant〉20 Ta2O5; The SiO2 lining (result/curve chart that provides above uses 2nm) that is used for passivation silicon).Need additional charge (causing wideer depletion region) to set up critical electric field, produce higher puncture voltage result like this.Can the etching slivering, but advantageously etching groove is become hexagonal or square net, this is because owing to depress electric charge that need be higher and therefore need wideer depletion layer in same electrical, so the expansion of voltage is stronger.This mesh or cellular setting provide bigger area/capacity ratio; More cover high k material on the large tracts of land and provide stronger capacitive couplings, depletion layer widens stronger (better " RESURF "), the therefore higher puncture voltage of acquisition like this.

According to the present invention, relate to the described notion of semiconductor diode device above and can be used for any device (for example bipolar junction transistors and MOSFET) that other has reverse biased junction to provide better trading off between positive voltage drops (that is ON resistance) and puncture voltage.For example, mixing high as much as possible in drain extensions in the MOS device is attractive for ON resistance, but required breakdown voltage limit doped level.By using insulating material (preferably having high-k) at field shaping region adjacent with the pn knot or bridge joint pn knot, this restriction becomes and is not so strict.This adjacent field shaping region can be vertical, for example in groove, but also can be horizontal, for example for the marginal end of knot.And in SOI (silicon-on-insulator) device, replacing oxide skin(coating) with a sandwich generation of shaping dielectric layer by use shaping dielectric layer or oxide skin(coating), people can use the mechanism that is positioned at the top or is positioned at the bottom.The structure that whole oxide skin(coating) is replaced by field shaping dielectric is shown in Fig. 5 of accompanying drawing, and wherein, layer 51 is silicon substrates, layer 52 is the high-k dielectric field shaping regions of burying, layer 53 is the soi semiconductor silicon areas with pn knot 101, and layer 54 is top high-k dielectric field shaping regions, and layer 55 is field plates.The stretched edges of the pn knot depletion region of introducing under reverse breakdown voltage is by dotted line 508,509 indications.

In all devices within the scope of the present invention, the dielectric constant of a shaping insulating material is high more, and is high more to the useful influence of puncture voltage.That is to say, if the k value of a shaping insulative/dielectric materials is high more, the broadening of equipotential lines in the electric field of the field shaping material adjacent with semiconductor pn knot is big more so, like this, maximum field reduces (electric field is more lax), thereby the broadening of electric field in the semi-conducting material and the corresponding induction of pn knot depletion layer is bigger, so the breakdown reverse voltage of pn knot is bigger.The K value of field shaping material is big more, and the zone of this material can be thin more, to realize the given increase of the puncture voltage that semiconductor pn ties.Tantalum oxide Ta2O5 (the k value is approximately 22) is the field shaping region preferable material.Other insulating material of in Si semiconductor technology, knowing, for example silicon dioxide SiO2 (k is approximately 4) and silicon nitride Si3N4 (k is approximately 8) can be used for the field shaping region according to device of the present invention, but in order to obtain the equal increments of adjacent pn semiconductor junction puncture voltage, this zone is thick more a lot of than using Ta2O5.Because any electric current of dielectric field shaping region non-conducting, the field shaping region of thinner higher k/layer produces higher efficient, because there is how parallel diode/transistor unit in given area, the ON resistance of resultant device is littler.Other dielectric substance field shaping region, that the k value is higher than silicon nitride that can be used in according to device of the present invention is, for example, and aluminium oxide Al 2O3 (k=4.5-8.4), strontium titanates SiTiO3 and barium titanate BaTiO3 (k=12-15).An example with material of higher k value is CoTiO3 (k=40).The dielectric substance that the dielectric substance that the k value is higher than SiO2, particularly k value are higher than Si3N4 is preferably used as according to field shaping region of the present invention.

Fig. 6 in the accompanying drawing shows the profile of the part of the vertically insulated grid field effect transistor semiconductor device 60 of planar gate according to the present invention.Device 60 comprises silicon semiconductor body, and it comprises n+ substrate drain region 14, and the top, drain region is a n-drain-drift region 11.Insulated gate structure G is made up of the gate dielectric layer 30 and the grid conducting layer 31 that are located on the semiconductor body end face.When observing in the plane, insulated gate structure G has defined the grid with perforate or the grid of rule, wherein, forms source cell in each perforate, and it is tied 34 p type body region 32 and form by forming pn with drain-drift region 11, and comprises n+ source region 33.Fig. 6 shows each half of two source cell, and the every end of part all has a unit shown in the grid structure G.Insulating regions 35 is arranged on the grid structure G.The source metal 36 of contact institute active area 33 is located on the top semiconductor surface on the insulating regions 35 so that source electrode S to be provided.Be connected to provide by the window that passes insulating regions 35 with the electricity of insulated gate structure G.Metal level 16 contact drain regions 14 are to provide drain electrode D.Each shaping insulation layer 61 (it can be Ta2O5) all and the pn between p type block 32 and the n-drain-drift region 11 tie 34 adjacent, and all capacitive couplings and the n+ drain region be between the whole first capacitive voltage coupling district 62 and the second capacitive voltage coupling district 63, this second capacitive couplings district 63 preferably is made up of highly doped polysilicon or metal (it can be the extension of source metal 36), and its p type block zone 32 with device is adjacent and identical with the electromotive force in these two zones with source region 33.The second capacitive voltage coupling district 63 or can be p type block zone 32 or source region 33 itself.Metal or the highly doped polysilicon second capacitive voltage coupling district 63 (it is preferred, because it causes stronger the exhausting in the n drift region 11) preferably separate with semiconductor silicon by thin insulating barrier (not shown).A device part that shows Fig. 6 provides the effect of Ta2O5 field shaping region Fig. 6 A magnification ratio with elaboration.Fig. 6 A shows in field shaping region 61 and pn ties equipotential lines under the reverse breakdown voltage (source electrode to drain electrode) of the device in the semiconductor regions adjacent in 34 zones.Field shaping (it has increased the puncture voltage of device) in the pn tie region is limited in depletion region.Dotted line 68 shows the edge of the pn knot depletion region of broadening, and this depletion region only partly extends through drain-drift region 11.This is corresponding to the depletion region broadening of the diode shown in Fig. 3 A discussed above.In the example of discussing in the document WO 01/59847, a shaping extends through whole drain-drift region in the above, and arrives the place in the semi-insulating conductive region contact of shaping n+ drain region away from the pn knot.

The advantage that the present invention arranges is, field shaping region be insulation, be capacitively coupled, shaping depletion region only, not " shaping " comprise the electric field in the semi-conducting material of depletion layer of depletion region outside at a distance.In the layout of using semi insulating material as the WO-A-01/59847 of field shaping region and WO-A-03/043089, the field broadening is on the length of whole semi-insulating layer, this causes the broadening away from the depletion layer in the semiconductor with pn knot of original depletion region, and this makes electric capacity increase to the electric capacity that the puncture voltage greater than the required increase of device needs.Use is according to capacitive couplings insulation field shaping region of the present invention, and this broadening is by volitional check, because the increase of depletion layer charge has determined this broadening, is suitable for back-biased " feedback " thereby exist.Just be to use the insulation field shaping region, avoiding (parasitism) extra current leakage that exists in the layout of WO-A-01/59847 and the field shaping is limited in depletion region.Should be noted that WO-A-01/59849 mentions may use silicon nitride as semi-insulating layer, and this needs the processing of silicon nitride and composition to guarantee this semi-insulating attribute.If silicon nitride is used as of the present invention shaping material, its processing and composition will be guaranteed its insulation attribute.Because the effect of insulation field shaping region is limited in existing the part of the semiconductor silicon of depletion layer, compare with the layout among the WO-A-01/59847, insensitive to the accurate position at the starting and ending place of field shaping region.Like this, although in the device shown in Figure 6 field shaping region 11 only the p type side with pn knot 34 is adjacent, field shaping region territory 11 can be used as the second capacitive voltage coupling district and extends to metal source electrode 36 always, S, and therefore cross-over connection pn knot.In this situation, field shaping region 11 will be coupled to the capacitive voltage coupling district, and the voltage in described capacitive voltage coupling district does not just in time equal the voltage of reverse bias pn knot both sides in the semiconductor regions (being p type block and n type drain-drift region).This effect is therefore very not strong, but still can meet the demands.Can between the second capacitive voltage coupling Metal Contact and semiconductor regions, provide insulating barrier.In other device in the scope of the invention, diode for example shown in Figure 2 is not because the insulation field shaping region allows electric current to flow, so it can be connected between two metal capacitor electrodes.

In the example of the fieldtron of describing in WO-A-01/043089, field shaping region is described as intrinsic material, or the extrinsic semiconductor material lower than the drift region that mix, or semi insulating material; First and second capacitor electrode regions adjacent with the end of field shaping region have different electronics energy barriers.In contrast, in field-effect transistor according to the present invention, a shaping material is an insulating material; The capacitive voltage coupling district of insulation field shaping region end can have different electronics energy barriers, but this not necessarily; And importantly, electric field induction in the field shaping region part goes out the electric field (shown in Fig. 6 A) of broadening, the electric field of this extension is limited near the depletion region of p type block-drift region knot and does not extend along whole drift region, that is to say, the capacitive field shaping is limited in depletion width, and this is the position that voltage drop takes place in the device.

Fig. 7 of accompanying drawing shows the profile according to the part of vertical trench-gate insulated gate field effect transistor semiconductor device 70 of the present invention.Semiconductor body has the n+ source region 33 in the p type block district 32, and the n-drain-drift region 11 on p type block district 32 and the n+ drain region 14 forms pn knot 34.The grid structure G of trench-gate comprises from the end face of semiconductor body and passes the groove 75 that source region 33 and pn knot 34 extends to drain-drift region 11.Grid structure G is included at grid conducting material 31 and the insulating barrier 76 that provides in the groove 75 between the semiconductor body of groove 75 is provided.Top layer 35 is provided on grid conducting material 31.Identical with the mode of describing among Fig. 6, figure 7 illustrates each half of two source cell, every end of part all has one shown in the trench-gate structure G.Shaping insulation dielectric district 71 (its for example can be Ta2O5), adjoin respectively and bridge joint p type block 32 and n-drain-drift region 11 between pn knot 34, and each all capacitive couplings between the first capacitive voltage coupling district 72 (and n+ drain region 14 is whole) and the second capacitive voltage coupling district 73 (and metal source electrode is whole).It is noted that in the example of the described fieldtron of WO-A-03/043089 that the field shaping region territory is the knot between bridge joint p type block and the n type drain-drift region not.The equipotential lines of the source electrode of Fig. 7 A is shown in broken lines device under the puncture voltage of drain electrode is inhomogeneous field in the depletion region 77,78 of the broadening that induces in the part of field shaping region 71 and the adjacent semiconductor zone across pn knot 34.Similar with Fig. 6, the edge 78 of the depletion region of broadening only part extends through drain-drift region 11.

Generally, by field shaping region is replaced to insulative dielectric material, all FET devices described in WO-A-03/043089 may be modified as and drop within the scope of the invention in fact.These devices that Fig. 6 with reference to the accompanying drawings and Fig. 7 describe are examples of this modification of mainly obtaining by this replacement.

Fig. 8 A of accompanying drawing and 8B show the profile and the plane graph of an example of disclosed landscape insulation bar FET device among the WO-A-03/043089 that is modified according to the present invention respectively.N+ source region 33, n+ drain region 14 and n-drain-drift region 11 are under the top main surfaces of device.Plane insulated gate with gate dielectric layer 30 and grid conducting layer 31 is positioned on this top main surfaces.P type body channel-adjusting (accommodating) district 32 is also under this end face.Shaping insulation dielectric district 81 (they can be Ta2O5) are adjoined promptly near the pn knot between p type block zone 32 and the n type drift region 11 on this top main surfaces, and separate with drain-drift region by thin insulating SiO2 zone 82.The first capacitive voltage coupling district 84 of field shaping region 81 is formed by drain electrode 16.Also extend on the insulating barrier 83 of cover gate conductive layer 31 to contact a p+ zone in source metal electrode 36 contact source regions 33, and this p+ zone is adjacent with an end of dielectric field shaping region 81, and provide the second capacitive voltage coupling district 85 for field shaping region 81.When source electrode 36 directly contacted with field shaping region 81, this p+ zone can be omitted.Can relate to silicon layer (SOI) prepared device 80 on the dielectric substrate of buried oxide layer 86 on the substrate 87 with described use.

Fig. 9 of accompanying drawing shows schematically showing according to bipolar transistor 90 of the present invention.N+ emitter region 91, p+ base region 92, n type collector drift region 93 and n+ collector area 94 are embedded into both sides and all are provided with in the layout of shaping dielectric/insulation layer 95, under reverse voltage, the electric field/depletion region of described shaping dielectric/insulation layer 95 broadening base-collector junctions place also increases reverse breakdown voltage.

Generally, by replacing the semi-insulating field shaping region that is called area of grid among the WO-A-03/015178 with insulative/dielectric materials, disclosed all bipolar transistor structures can be modified within the scope of the invention among the WO-A-03/015178 in fact.With profile this example is shown in Figure 10 of accompanying drawing, it is the modification of the structure shown in Fig. 3 of WO-A-03/015178.

In the bipolar transistor 90 shown in Figure 10, vertical stratification has n+ collector substrate 94, and it has a plurality of table tops 901, p type base layer 92, emitter-base stage space charge region 96 and emitter region 91 that each table top comprises n type collector drift region 93, approaches.Each table top 901 is separated with table top by thin passivation SiO2 insulating barrier 903 around, groove 902 is optional by groove 902, and preferably includes the field shaping region 95 that the insulative/dielectric materials of high k value is tied as 92 collector electrodes 93 of the pn base stage in the bridge joint table top 901.First capacitive voltage coupling district of each field shaping region 95 and n+ collector area 94 whole formation, the second capacitive voltage coupling district 97 in each field shaping region territory 95 is formed by the Metal Contact on dielectric 95 tops.Perhaps the contact of the second capacitive voltage coupling district can link to each other with base stage or emitter.

Figure 11 in the accompanying drawing illustrates another example according to silicon-on-insulator of the present invention (SOI) structure 110.The semiconductor p type and the n type district 112,113 that are shown on oxide substrate 114 and form pn knot 111 can be simple diode component, but also can be considered to combine the drift region, for example the base stage of the main body of field-effect transistor and drain-drift region or bipolar transistor and collector drift region.Two parts insulation dielectric is preferably high K value, and field shaping region 115,116 is positioned at the top and the back side in p type and n N-type semiconductor N zone.In structure shown in Figure 11, left-hand side by this structure and right-hand side contact (not shown), voltage can be connected to semiconductor regions 112,113 and field shaping region 115,116.Perhaps, can only be used to apply contacting of voltage to p type 112 with 113 making of n type district, it provides the first and second required capacitive voltage coupling districts for field shaping region 115,116 then.The back side and top in p type and n N-type semiconductor N zone all exist high k field shaping region to illustrate three-dimensional (non-linear) distribution that capacitive field shaping according to the present invention can relate to electric charge.Be illustrated in the edge of the pn knot depletion region of broadening under the reverse breakdown voltage with dotted line 117,118 and 119.

Figure 12 in the accompanying drawing shows a kind of structure, wherein, insulation/dielectric (being preferably high k's) field shaping region 121 is used to increase the puncture voltage of pn knot marginal end (the pn knot 122 between p type district 123 promptly and the n type zone 124 is with the curve of the slyness point in the lateral surfaces end) according to the present invention.According to the present invention, the field shaping region 121 on the lateral surfaces top induces the more higher curvature radius of the depletion region (with the depletion region broadening shown in the dotted line 125 to imaginary point line 126) of the pn knot 122 that forms in lateral surfaces, thereby has improved the puncture voltage that pn ties.The relevant reverse voltage that is applied to pn knot is applied to contact A with B or be applied to and contact A and C.(as shown directly, or by thin insulator) contact p type and n type zone 123,124 because high k field shaping region 121 is so its is automatically connected and capacitive couplings applies the identical voltage of voltage to what tie with pn.Under the situation of contact A and B, only p type and n type zone 123,124 are as the first and second capacitive voltage coupling districts of field shaping region 121.These marginal ends appear in pn knot place nearly all in planar semiconductor device, and these marginal ends can be benefited from the present invention shown in Figure 12.Therefore this knot in the planar device can be simple diode shown in Figure 12 or for example be base-collector junction.

Read disclosure of the present invention, other distortion and modification are conspicuous to those skilled in the art.These distortion and modification can comprise equivalent characteristics as known in the art and further feature, and these features can replace or the additional feature of having described here.

Although claim has been specified to specific characteristics combination in this application, the scope that is to be understood that the disclosure of invention also comprises here clearly or disclosed ambiguously any novel characteristics and the combination of any novel characteristics or its are derived, no matter and it whether relate to any claim in present identical invention of advocating, no matter also whether the same with the present invention it alleviated one or all identical technical problems.

Can also in single embodiment, the form with combination be provided at the characteristic of describing in the independent embodiment content.On the contrary, the simple various features of describing can also provide individually or provide with any suitable special compound mode in single embodiment content.Here the applicant reminds, and in the application and the lawsuit process of further applying for arbitrarily of from then on deriving, new claim can be specified to any such feature and these combination of features.

Claims (17)

1. a semiconductor device (200), comprise semiconductor regions, this semiconductor regions has p N-type semiconductor N zone and the n N-type semiconductor N zone that forms pn knot (101) and adjoins only one the field shaping region (201) in order to the reverse breakdown voltage of raising device in p N-type semiconductor N zone and the n N-type semiconductor N zone, wherein, field shaping region (201) is insulating material and extends to the second capacitive voltage coupling district from the first capacitive voltage coupling district, the essentially identical voltage of voltage that provides these two capacitive voltage coupling districts to tie in use to apply and to be applied to pn, the material of field shaping region (201) and capacitive couplings make: when applying reverse voltage and not conducting of device on pn knot (101), in the part of field shaping region, there is capacitive electric field, this capacitive electric field extends beyond the border (108 of pn knot depletion region, 109), described border exists when this field shaping region not, the electric field of the broadening of the pn knot depletion region (208,209) of the corresponding broadening of this electric field induction rising limit in semiconductor regions in this field shaping region.

2. device according to claim 1, wherein, the dielectric constant of the permittivity ratio silicon dioxide of this field shaping region insulating material is big.

3. device according to claim 2, wherein, the dielectric constant of the permittivity ratio silicon nitride of this field shaping region insulating material is big.

4. device according to claim 3, wherein, this shaping insulating material is tantalum oxide Ta ₂O ₅

5. device according to claim 1, wherein, this insulation field shaping region (61) is adjacent with n N-type semiconductor N zone.

6. device according to claim 1, wherein said insulation field shaping region (61,71) is adjacent with an only side in n N-type semiconductor N zone.

7. device according to claim 1, wherein said insulation field shaping region territory (201) is adjacent with the both sides in n N-type semiconductor N zone.

8. device according to claim 1, wherein, at least one in the first and second capacitive voltage coupling districts comprises in the p N-type semiconductor N zone (112,123) that forms pn knot (111,122) and the n N-type semiconductor N zone (113,124).

9. device according to claim 1, wherein, in the first and second capacitive voltage coupling districts (62,72) at least one comprise with p that forms pn knot (34) and n semiconductor regions (11) in one have identical conduction type and adjacent with it more highly doped semiconductor regions (14).

10. device according to claim 1, wherein, at least one in the first and second capacitive voltage coupling districts comprises electric conducting material district (204,205).

11. according to the device described in the claim 10, wherein, electric conducting material district (204,205) are whole with the main electrode (104,105) of device.

12. device according to claim 1, wherein, capacitively coupled insulation field shaping region (81) is insulated district (82) to be separated with the semiconductor regions with pn knot.

13. device according to claim 1, wherein, this device is diode component (200), and this pn knot (101) is the rectifying junction of this diode component.

14. device according to claim 1, wherein, this device is bipolar transistor (90), and pn knot is the base region (92) that is positioned at this device and the knot between the collector drift region (93).

15. device according to claim 1, wherein, this device is field-effect transistor (60,70), and pn knot (34) is to be positioned at the raceway groove control agent zone (32) of this device and the knot between the drain-drift region (11).

16. device according to claim 14, wherein, the drift region is by non-uniform doping.

17. device according to claim 14, wherein, the pn of broadening knot depletion region (68,78) only partly extends through described drift region (11).

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