The flip chip bonding base plate of upside-down mounting welding core
Technical field
The present invention relates to the flip chip bonding base plate, particularly include the flip chip bonding base plate of multilayer isolate conductive film.
Background technology
Face-down bonding technique has been widely used in photoelectricity and electronic device.Adopt the heat-sinking capability that face-down bonding technique can boost device, particularly be applied to high power device.For light-emitting diode, particularly to using Sapphire Substrate with ultraviolet, indigo plant, the green LED of GaN as base semiconductor material, adopt face-down bonding technique can not only improve heat radiation, increase chip size, the electric current diffusion can also be improved to increase the luminous uniformity of chip gross area, the light extraction efficiency of chip can also be further promoted at frontal by the preparation reflector.
The preparation of upside-down mounting welding core also needs according to chip structure except that chip design, designs and prepares suitable base plate.Baseboard material commonly used can be conductive metal sheet (as copper sheet) or semiconductor chip (as silicon chip).Generally by on the base plate specific region, (claiming the ball district again) and ball (metal salient point) to provide flip chip bonding with solder joint (can be described as bonding electrode).This solder joint is connected with welding zone (claiming the welding zone electrode again) on the chip and has just formed the galvanic circle.No. the 00129633.7th, typical technology such as Chinese patent application, No. the 00101674.1st, Chinese patent application, P.3379-3381 and their P5 series of products etc. the technology of Lumileds report Applied Physicsl Letters Vo178, No.22,28-May-2001.
The characteristics of above-mentioned flip chip bonding type light-emitting diode typical technology are: base plate all adopts the individual layer conducting membrane structure.Under individual layer conducting membrane structure condition, can adopt the zigzag conductive film form metal salient point 14a, 14b (bonding electrode) ball district (shown in Figure 1A, Figure 1B).After the upside-down mounting welding core, current direction is the positive electrode 15 from the base plate 1, through positive electrode (claiming P type electrode again) district conductive film 10, P type electrode district metal salient point 14a, enter N type electrode district metal salient point 14b by the chip operation district, enter negative electrode 16 on the base plate through negative electrode region conductive film 11 again.Can see that the flow direction of electric current is unidirectional.
Because there is certain operating resistance in chip itself, and increases along with the increasing (direction of current flow) of chip size.Particularly on direction of current flow, the increase of chip size will be subjected to the limitation of himself operating resistance.Above-mentioned base arrangement obviously is not suitable for being applied to the chip of big current work.Though can be on the direction vertical with current direction widen chip and reduce series resistance by widening base plate, folk prescription can cause chip in the medium dip of flip chip bonding process to the increase of salient point, bonding difficulty height, the flip chip bonding yield is low.
Under individual layer conducting membrane structure condition, also can adopt fourchette shape or helical form conductive film 20,21 form metal salient point 24a, 24b (bonding electrode) ball point (shown in Fig. 2 A, Fig. 2 B).As seen from the figure, sense of current be not continuous along same direction from an electrode stream to another electrode, but electric current flows into by positive electrode 25, the mutual convection current between each fourchette shape conductive film is flowed out by negative electrode 26.For reaching uniform CURRENT DISTRIBUTION, the density of fourchette and helix is just than higher, and this has proposed relatively harsher requirement to technology, also makes the area that utilizes of effective chip reduce.Meticulous long fourchette shape conductive film or zigzag shape conductive film also can cause big series resistance.In addition, under big current work condition, because the current density height, the probability of chip failure can increase thereupon.Adopt the base plate of individual layer conducting membrane structure, can only be applied to the single layer device structure or only contain the chip of single PN junction structure, can not satisfy the demand of the chip of multilayer device structure or a plurality of PN junction structures flip chip bonding.
Summary of the invention
The technical problem to be solved in the present invention is, provides a kind of flow direction that makes electric current not limit by the shortcoming that the individual layer conductive film can not juxtaposition, can arbitrarily arrange the position of ball district or preparation metal salient point; The flow direction of electric current can be unidirectional, multidirectional, and 0-360 ℃ radial at any angle, can be from left to right, from right to left, from the top down and the bottom up, waits layout from inside to outside or from outside to inside; Chip size can not be subjected to conductive film in any direction, the flip chip bonding base plate of the limitation of the conductive salient point quantity or the sense of current.
The technical problem that the present invention further will solve is, the chip that can be applicable to multilayer device or a plurality of PN junction structures is provided, makes that they can be at energising under the identical or different current condition or simultaneously or the not energising simultaneously or the flip chip bonding base plate of alternately working under the pattern of energising in succession.
The technical problem that the present invention further will solve is, a kind of flip chip bonding base plate is provided, adopt the laminated structure to replace elongated fourchette shape or helical form conductive film can carry bigger current loading, be particularly conducive to and be applied in the High Power LED chip, simultaneously can also further reduce the contribution of conductive film, make device can be operated under the lower voltage by the thickness of the adjusting conductive film in a big way to the loop all-in resistance.
The technical problem that the present invention further will solve is, a kind of flip chip bonding base plate is provided, adopt laminated conductive film a plurality of bonding conductive salient points that can evenly distribute, can not only improve the bonding quality, avoid chip to tilt, more can provide a plurality of heat dissipation channels, make the heating of chip itself be transmitted on the base plate and leave by salient point by the multiple spot conductive salient point that evenly distributes.Good heat-sinking capability can significantly be improved device reliability, improves the life-span, and helps device and be operated in flip chip bonding base plate under the higher drive current.
The technical solution adopted for the present invention to solve the technical problems is: a kind of flip chip bonding base plate, comprise substrate, and it is characterized in that, on described substrate, be provided with the laminated structure that successively insulate and alternately be formed by stacking by insulation film and conductive film; Described laminated structure is provided with exposed part, is provided with conductive salient point on the described conductive film of described exposed part correspondence.Described laminated structure is made up of at least one described insulation film and two described conductive films at least; Perhaps form by at least one conductive film and at least two insulation films.
Above-mentioned flip chip bonding can use conductor or insulator with the described substrate of base plate, and it is shaped as polygon or arc or polygon in conjunction with arc, and its upper surface is the polishing minute surface; Described conductive film is the good electric conducting material of Metal Substrate, and its thickness is 0.01um~15um; Described insulation film is oxide-base insulating material or nitride based insulating material, and its thickness is 0.01um~15um; Described conductive salient point is a Metal Substrate good conductor material, and it is shaped as spherical, hemispherical, column, trapezoidal or bolt shape.
Above-mentioned flip chip bonding can be identical or inequality on thickness with described insulation film with the described conductive film of base plate; Between the described conductive film or the thickness between the described insulation film also can be identical or inequality; The area of described conductive film and described insulation film can be identical with described substrate or inequality with shape, and the area between described conductive film and the described insulation film can be identical or inequality with shape; Between the described conductive film and the area between the described insulation film can be identical or inequality with shape; The shape of described conductive film and described insulation film can be solid polygon, arc or polygon in conjunction with arc, polygon, arc and the polygon that also can be single hole or porous are in conjunction with arc.
Above-mentioned flip chip bonding is a monocrystalline silicon piece with the described substrate of base plate; Described insulation film comprises ground floor insulation film and second layer insulation film; Described conductive film comprises ground floor conductive film and second layer conductive film; Described ground floor insulation film is located at described upper surface of base plate, and described ground floor conductive film, second layer insulation film, second layer conductive film stack gradually.
Above-mentioned flip chip bonding is the exposed surface of the ground floor conductive film that forms of second layer conductive film upper surface and the perforate of being offered by described second layer insulation film and second layer conductive film and step with the described exposed part of base plate; Described conductive salient point and electrode are located at respectively on ground floor conductive film and the second layer conductive film.
Above-mentioned flip chip bonding is an aluminium oxide ceramics with the described substrate of base plate; Described insulation film comprises ground floor insulation film, second layer insulation film, three-layer insulated film and the 4th layer of insulation film; Described conductive film comprises ground floor conductive film, second layer conductive film, the 3rd layer of conductive film and the 4th layer of conductive film; Described ground floor insulation film is located at described upper surface of base plate, and described ground floor conductive film, second layer insulation film, second layer conductive film, three-layer insulated film, the 3rd layer of conductive film, the 4th layer of insulation film and the 4th layer of conductive film stack gradually.
Above-mentioned flip chip bonding is the 4th a layer of conductive film upper surface and by the exposed surface on the perforate of described second layer insulation film, second layer conductive film, three-layer insulated film, the 3rd layer of conductive film, the 4th layer of insulation film and the 4th layer of different depth that conductive film is offered and ground floor conductive film that step forms, second layer conductive film and the 3rd layer of conductive film with the described exposed part of base plate; Described conductive salient point and electrode are located at respectively on ground floor conductive film, second layer conductive film, the 3rd layer of conductive film and the 4th layer of conductive film.
Above-mentioned flip chip bonding is a copper coin with the described substrate of base plate, as an electrode; Described insulation film comprises ground floor insulation film and second layer insulation film; Described conductive film comprises ground floor conductive film and second layer conductive film; Described ground floor conductive film is located at described upper surface of base plate, and described ground floor insulation film, second layer conductive film, second layer insulation film stack gradually.
The ground floor conductive film that above-mentioned flip chip bonding forms for the perforate of being offered by ground floor insulation film, described second layer insulation film and second layer conductive film and step with the described exposed part of base plate and the exposed surface of second layer conductive film; Described conductive salient point and electrode are located on ground floor conductive film and the second layer conductive film.Above-mentioned flip chip bonding is located at conductive salient point and second layer conductive film insulation on the ground floor conductive film with base plate is described.
Compared with prior art, flip chip bonding of the present invention is with the conductive film that the multilayer laminated structure of base plate provides multilayer to isolate, and has to make the flow direction of electric current not limit by the shortcoming that the individual layer conductive film can not juxtaposition, can arbitrarily arrange the position of conductive salient point; The flow direction of electric current can be unidirectional, multidirectional, and 0-360 ℃ radial at any angle, can be from left to right, from right to left, from the top down and the bottom up, waits layout from inside to outside or from outside to inside; Chip size can not be subjected to conductive film in any direction, the advantage of the limitation of the conductive salient point quantity or the sense of current.
Description of drawings
Below in conjunction with drawings and Examples flip chip bonding of the present invention is described further with base plate, in the accompanying drawing:
Figure 1A is the front schematic view of the flip chip bonding of prior art with base plate.
Figure 1B is the cross-sectional schematic according to the hatching A-A of Figure 1A.
Fig. 2 A is the front schematic view of another flip chip bonding of prior art with base plate.
Fig. 2 B is the cross-sectional schematic according to the hatching A-A of Fig. 2 A.
Fig. 3 A is the front schematic view of flip chip bonding of the present invention with base plate first embodiment.
Fig. 3 B is the flip chip bonding of the present invention cross-sectional schematic of base plate first embodiment according to the C-C hatching of Fig. 3 A.
Fig. 4 A is the front schematic view of flip chip bonding of the present invention with base plate second embodiment.
Fig. 4 B is the flip chip bonding of the present invention cross-sectional schematic of base plate second embodiment according to the D-D hatching of Fig. 4 A.
Fig. 4 C is the flip chip bonding of the present invention cross-sectional schematic of base plate second embodiment according to the E-E hatching of Fig. 4 A.
Fig. 5 A is the front schematic view of flip chip bonding of the present invention with base plate the 3rd embodiment.
Fig. 5 B is the flip chip bonding of the present invention cross-sectional schematic of base plate the 3rd embodiment according to the F-F hatching of Fig. 5 A.
Embodiment
Below in conjunction with accompanying drawing, come flip chip bonding of the present invention is described in further detail with base plate by specific embodiment, yet the present invention is not limited to these embodiment.
Flip chip bonding of the present invention comprises a substrate with base plate, on described substrate, be provided with the laminated structure that successively alternately is formed by stacking by conductive film and insulation film, form exposed part by the step or the perforate of on the laminated structure, offering different depth, and on the conductive film of exposed part, be provided with conductive salient point and electrode.Described substrate is a sheet, its thickness〉0.001mm, have an even surface, smooth, preferably be minute surface; Its shape can be various polygons such as rectangle, square, hexagon, or various arcs such as circular, oval, fan-shaped, or polygon is in conjunction with arc (as semilune); Described substrate can use various solid-state materials, as conductor material (as Au, Ag, Al, Cu, stainless steel, AlSiC, SiC, AlSi, NiCu, CuAl, carbon steel etc.), perhaps semi-conducting material (as Si, Ge, GaAs, InP etc.), perhaps insulating material (as Al2O3, pottery, glass etc.), and macromolecular material (as rubber, plastics, polytetrafluoroethylene etc.).Described conductive film can use the good electric conducting material of Metal Substrate, and as simple metal (Au, Ag, Al and their alloy etc.), its thickness is 0.01um~15um, and optimum range is 0.2um~10um; Can adopt the mode of electron beam evaporation, sputter, thermal evaporation, plating or printing to prepare.Described insulation film can use the oxide-base insulating material, as Al2O3, SiO2 etc., or nitride based insulating material, as Si3N4 etc.; Its thickness is 0.01um~15um, optimum range 0.2~10um; Can adopt the mode of chemical vapour deposition (CVD), electron beam evaporation, thermal evaporation or sputter to prepare.Described conductive film and insulation film successively replace stacked system and form the laminated structure, can be to begin to form the conductive film insulation film from substrate surface, or insulation film conductive film, or conductive film insulation film conductive film, or insulation film conductive film insulation film, or other combination of more multi-layered time stack; And conductive film and insulation film can be identical on thickness also can be inequality, the thickness between the conductive film or between the insulation film also can be identical or different; The area of conductive film and insulation film and shape can be identical with base plate also can be inequality, the area between conductive film and the insulation film and shape can be identical also can be inequality; Area between the conductive film and between the insulation film and shape can be identical also can be inequality.The shape of conductive film and insulation film can be solid polygon (as square, rectangle or the like), arc (as circle, ellipse etc.), polygon adds arc (as semilune etc.), also can be that polygon, arc or the polygon of single hole or porous adds arc.The exposed part of described laminated structure can by position, shape, size and the degree of depth of control step, be selected position, shape and the size of the local exposed surface of conductive film by making step from its edge; Perhaps, select position, shape and the size of the local exposed surface of conductive film by position, shape, size and the degree of depth of control perforate from the zone line perforate of laminated structure; Perhaps simultaneously from one or many places make step; Perhaps simultaneously from one or the many places perforate; Perhaps simultaneously from one or many places make step and perforate; The area of the exposed surface of described exposed part is greater than 25um2, more preferably greater than 100um2; Can adopt chemical corrosion, plasma to carve turbid or (lift-off) technology that floats off is made step and perforate.Described conductive salient point is Metal Substrate good conductor material, as Au, Ag, Al, In and their alloy etc. for making bonding electrode in exposed conductive film surface preparation; Its shape can be spherical, hemispherical, column, trapezoidal, bolt shape etc.; The sectional area that described salient point contacts with conductive film is greater than 20um2, more preferably greater than 100um2; Its height greater than 5um, more preferably greater than 10um less than 100um; Can adopt the way preparation of ultrasonic bonding, thermocompression bonding, evaporation, plating and printing.
Shown in Fig. 3 A, Fig. 3 B, be the flip chip bonding base plate of the first embodiment of the present invention, have multilayer isolate conductive film.In the present embodiment, select to adopt monocrystalline silicon piece as substrate 100, its thickness is 0.45mm, is 2 inches disk shapes, and its upper surface is used to make the multilayer conductive film and is the polishing minute surface.After the decontamination of deoiling is cleaned, adopt the plasma-assisted chemical vapor deposition method, at substrate 100 polishing specular surface uniform deposition ground floor insulation film 101a, described ground floor insulation film 101a adopts SiO2.In the deposition, the gas of use has SiH4 and N2O, and the SiO2 thickness of deposition is 2.5 μ m.Ground floor insulation film 101a can provide the good insulation of 100 of multilayer conductive film and substrates.Adopt electron beam evaporation technique even evaporation ground floor conductive film 100a on ground floor insulation film 101a, can adopt proof gold, its thickness is 5000A.Use electron beam evaporation technique and combination to float off technology (Lift-offprocessing), second layer isolated insulation film 101b and second layer conductive film 100b on even evaporation on the ground floor conductive film 100a, thus formed the laminated structure.After floating off, can offer the elongated rectangular shape platform that step forms preparation electrode 150 at the edge of second layer conductive film 100b and second layer insulation film 101b, and on second layer conductive film 100b and second layer insulation film 101b, offer the round hole that is used to prepare conductive salient point 140a, the exposed part of laminated structure has been formed in described strip rectangular platform and perforate, makes ground floor conductive film 100a have exposed part.Described second layer insulation film 101b thickness is 1.5 μ m, and second layer conductive film 100b is a proof gold, and thickness is 6000A.By floating off technology, preparation electrode 150 and 160 on ground floor conductive film 100a and second layer conductive film 100b prepares conductive salient point 140a, the 140b bonding point as upside-down mounting welding core again on ground floor conductive film 100a and second layer conductive film 100b.Upside-down mounting welding core is adhered to above-mentioned flip chip bonding with after on the base plate, by electrode 150 and 160 and Chip Packaging support key solder joint between line, preparing can be for being encapsulated in upside-down mounting welding core on the support.
Shown in Fig. 4 A, Fig. 4 B and Fig. 4 C is second embodiment that flip chip bonding of the present invention is used base plate.Adopt aluminium oxide ceramics as substrate 200a, its thickness is 0.65mm, and is rectangular or square, each 2-4 inch of length and width; Its upper surface is used to make the multilayer conductive film and is the polishing minute surface.After the decontamination of deoiling is cleaned, adopt electron beam evaporation technique uniform deposition SiO2 on substrate 200, form ground floor insulation film 201a, its thickness is 2.5 μ m.Using plasma sputtering technology even evaporation ground floor conductive film 200a on ground floor insulation film 201a again, described ground floor conductive film 200a adopts proof gold, and its thickness is 5000A.Adopt electron beam evaporation technique and combination to float off technology, second layer insulation film 201b and second layer conductive film 200b on even evaporation on the ground floor conductive film 200a, three-layer insulated film 201c and the 3rd layer of conductive film 200c, the 4th layer of insulation film 201d and the 4th layer of conductive film 201d, thus the laminated structure formed.After floating off, can offer the step of different depth respectively at the edge of second layer insulation film 201b, second layer conductive film 200b, three-layer insulated film 201c, the 3rd layer of conductive film 200c, the 4th layer of insulation film 201d and the 4th layer of conductive film 200d, make to have the elongated rectangular shape platform for preparing electrode 250,260,280,290 on ground floor conductive film 200a, second layer conductive film 200b, the 3rd layer of conductive film 200c and the 4th layer of conductive film 200; And on second layer insulation film 201b, second layer conductive film 200b, three-layer insulated film 201c, the 3rd layer of conductive film 200c, the 4th layer of insulation film 201d and the 4th layer of conductive film 200d, offer the round hole that is used to prepare conductive salient point 240a, 240b, 240c and 240d.The thickness of insulation film 201b, 201c, 201d is that 1.5 μ m and conductive film 200b, 200c, 200d are proof gold, and thickness is 6000A.Described rectangular platform and circular hole have been formed the exposed part of laminated structure, make the conductive film 200a that wins, the second conductive film 200b, the 3rd conductive film 200c and the 4th conductive film 200d have exposed part.Prepare electrode 250,260,280 and 290 by floating off technology respectively at the first conductive film 200a, the second conductive film 200b, the 3rd conductive film 200c, the 4th conductive film 200d, and prepare conductive salient point 240a, 240b, 240c and 240d respectively, as the bonding point of upside-down mounting welding core.Upside-down mounting welding core is bonded to above-mentioned flip chip bonding with after on the base plate, seals by the company between electrode 250,260,280,290 and Chip Packaging support key solder joint.Preparing can be for being encapsulated in upside-down mounting welding core on the support.
Shown in Fig. 5 A and Fig. 5 B is the 3rd embodiment that flip chip bonding of the present invention is used base plate.Adopt good conductive copper as substrate 300, its thickness is 0.65mm, and is rectangular or square, each 2-4 inch of length and width; Its upper surface is used to make the multilayer conductive film and is the polishing minute surface.After the decontamination of deoiling is cleaned, adopt electron beam evaporation technique uniform deposition first conductive film 300a on substrate 300, adopt proof gold, thickness is 6000A.The first conductive film 300a forms with substrate 300 and well contacts.Substrate 300 directly becomes one of device electroplax, and best heat radiation approach can be provided.Adopt electron beam evaporation and form ground floor insulation film 301a and second layer conductive film 300b in conjunction with floating off technology SiO2 on even evaporation on the ground floor conductive film 300a.After floating off, on second layer conductive film 300b and ground floor insulation film 301a, offer a plurality of perforates, can on the first conductive film 300a, prepare a plurality of conductive salient point 340a by these perforates.The thickness of ground floor insulation film 301a is 1.5 μ m, and the second conductive film 300b is a proof gold, and thickness 6000A is provided with a plurality of conductive salient point 340b on second layer conductive film 300b.On second layer conductive film 300b, evenly form second layer insulation film 301b by anion assistant chemical gas deposition technology again, form the laminated structure; And on second layer insulation film 301b, open plurality of opening with the wet etching technology, expose conductive salient point 340a and 340b, and whole multilayer isolate conductive film wrapped is got up to form good insulation performance and isolation protection film.Be provided with the step that is used to prepare electrode 360 at second layer conductive film 300b and second layer insulation film 301b edge.Preparation electroplax 360 prepares a plurality of conductive salient point 340a, 340b respectively, again as the bonding point of upside-down mounting welding core on ground floor conductive film 300a and second layer conductive film 300b on exposed second layer conductive film 300b.During encapsulation, can be with above-mentioned flip chip bonding with base plate be bonded to described flip chip bonding and directly be placed on the chip of base plate and make directly formation one electroplax of substrate 300 and support on the conducting bracket, form another electroplax by the bonding point line on electroplax 360 and package support, but conduction and thermal conduction characteristic are raised the efficiency, improved to the method simple wires technology.