CN100547791C - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
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- CN100547791C CN100547791C CNB200710103803XA CN200710103803A CN100547791C CN 100547791 C CN100547791 C CN 100547791C CN B200710103803X A CNB200710103803X A CN B200710103803XA CN 200710103803 A CN200710103803 A CN 200710103803A CN 100547791 C CN100547791 C CN 100547791C
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- dielectric layer
- stress dielectric
- effect transistor
- compression stress
- gap
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823871—Complementary field-effect transistors, e.g. CMOS interconnection or wiring or contact manufacturing related aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
Abstract
Description
Claims (16)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/451,869 | 2006-06-13 | ||
US11/451,869 US7598540B2 (en) | 2006-06-13 | 2006-06-13 | High performance CMOS devices comprising gapped dual stressors with dielectric gap fillers, and methods of fabricating the same |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101090115A CN101090115A (zh) | 2007-12-19 |
CN100547791C true CN100547791C (zh) | 2009-10-07 |
Family
ID=38820994
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200710103803XA Active CN100547791C (zh) | 2006-06-13 | 2007-05-15 | 半导体器件及其制造方法 |
Country Status (2)
Country | Link |
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US (2) | US7598540B2 (zh) |
CN (1) | CN100547791C (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4899085B2 (ja) | 2006-03-03 | 2012-03-21 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
US8122394B2 (en) * | 2008-09-17 | 2012-02-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Performance-aware logic operations for generating masks |
CN102347358B (zh) * | 2010-07-30 | 2014-08-13 | 中国科学院微电子研究所 | 半导体器件结构及其制造方法 |
US20140042549A1 (en) * | 2012-08-09 | 2014-02-13 | Globalfoundries Inc. | Methods of forming stress-inducing layers on semiconductor devices |
US9455220B2 (en) * | 2014-05-31 | 2016-09-27 | Freescale Semiconductor, Inc. | Apparatus and method for placing stressors on interconnects within an integrated circuit device to manage electromigration failures |
US9466569B2 (en) | 2014-11-12 | 2016-10-11 | Freescale Semiconductor, Inc. | Though-substrate vias (TSVs) and method therefor |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3777814A (en) | 1972-05-19 | 1973-12-11 | Gulf Research Development Co | Clamped detector |
US5962923A (en) | 1995-08-07 | 1999-10-05 | Applied Materials, Inc. | Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches |
US5937323A (en) | 1997-06-03 | 1999-08-10 | Applied Materials, Inc. | Sequencing of the recipe steps for the optimal low-k HDP-CVD processing |
KR100767950B1 (ko) | 2000-11-22 | 2007-10-18 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 및 그 제조 방법 |
JP2003060076A (ja) | 2001-08-21 | 2003-02-28 | Nec Corp | 半導体装置及びその製造方法 |
JP4173672B2 (ja) * | 2002-03-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
US7022561B2 (en) * | 2002-12-02 | 2006-04-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOS device |
US20050214998A1 (en) * | 2004-03-26 | 2005-09-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Local stress control for CMOS performance enhancement |
US7214629B1 (en) * | 2004-11-16 | 2007-05-08 | Xilinx, Inc. | Strain-silicon CMOS with dual-stressed film |
-
2006
- 2006-06-13 US US11/451,869 patent/US7598540B2/en not_active Expired - Fee Related
-
2007
- 2007-05-15 CN CNB200710103803XA patent/CN100547791C/zh active Active
-
2009
- 2009-09-09 US US12/556,261 patent/US7847357B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20070284617A1 (en) | 2007-12-13 |
CN101090115A (zh) | 2007-12-19 |
US20090321847A1 (en) | 2009-12-31 |
US7847357B2 (en) | 2010-12-07 |
US7598540B2 (en) | 2009-10-06 |
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Effective date of registration: 20171102 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171102 Address after: American New York Patentee after: Core USA second LLC Address before: American New York Patentee before: International Business Machines Corp. |
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Effective date of registration: 20230803 Address after: Taiwan, Hsinchu, China Patentee after: Taiwan Semiconductor Manufacturing Co.,Ltd. Address before: Grand Cayman, Cayman Islands Patentee before: GLOBALFOUNDRIES INC. |
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