CN100558147C - A kind of frame head PN catching method and device thereof of terrestrial digital television system - Google Patents
A kind of frame head PN catching method and device thereof of terrestrial digital television system Download PDFInfo
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Abstract
The invention discloses a kind of frame head PN catching method and device thereof of terrestrial digital television system.When terrestrial DTV multimedia broadcasting (DTMB) system carries out the data recovery at the received signal frame, utilize FFT and IFFT grouped calculation to simplify time-domain related calculation, whether adjudicate frame head PN sequence by comparison correlation peak and detection threshold successfully catches, use the inventive method and can catch the PN pattern that identification signal frame frame head is selected for use rapidly, for the receiver subsequent treatment provides essential condition; Improve the speed of related operation, reduced computation complexity; Can when frame head is PN420, the rotation of PN945 pattern phase place, needn't increase other processing methods and logical circuit simultaneously, simplify circuit structure; And then improved the acquisition speed of frame head PN in the ground digital television broadcast transmission system.
Description
Technical field
The invention belongs to digital signal transmission field, relate to a kind of catching method and device thereof of frame head PN sequence, be specifically related to a kind of capture technique of frame head PN sequence of terrestrial digital television system.
Background technology
Digital tv ground broadcasting is the important component part of government broadcasting TV tech system.It and digital video broadcast-satellite system and cable digital TV broadcast system and other auxiliary system are collaborative to provide comprehensive covering for the audient, be the pith in the comprehensive nerve of a covering of government broadcasting TV, so digital tv ground broadcasting and correlation technique thereof enjoy countries in the world to pay close attention to.
In August, 2006, China Digital TV ground broadcast transfer system standard GB20600-2006 (hereinafter to be referred as GB) with independent intellectual property right---" digital television ground broadcast transmission system frame structure, chnnel coding and modulation " (DTMB, Digital Terrestrial Television Multimedia Broadcast, terrestrial DTV multimedia broadcasting) issue, and formally put teeth on August 1st, 2007.This standard is supported multiple business such as high definition TV, standard definition television and multimedia data broadcast, satisfies fixing the covering and the mobile needs that receive on a large scale.Systematic function based on this standard is good, the availability of frequency spectrum is high, extensibility is strong, adapts to China's town and country different application demand.The DTMB standard has adopted the patent of invention and the innovation point of China in formulation process, and fully analyzing on the basis of external existing digital television transfer standard, absorbed the new technology of field of information transmission in recent years, realize the more existing better performance of standard, also taken into full account and verified simultaneously the feasibility that realizes.
The transmitting terminal of DTMB system is finished the conversion that flows to terrestrial television Channel Transmission signal from input data bitstream.Input data bitstream stream is through scrambler, forward error correction coding, carry out the constellation mapping that bit flows to symbols streams then, the back formation master data that interweaves again piece, master data piece and system information combination back and process frame data processing form frame, frame is a signal frame with corresponding frame head multiple connection, is converted to output signal through baseband postprocessing.This signal is converted to radiofrequency signal (in UHF and the VHF band limits) through frequency conversion.Wherein, signal frame comprises frame head and two parts of frame, according to the difference of frame head, is divided into PN420, PN595, three kinds of structures of PN945, specifically as shown in Figure 1.
Length is the header signal (PN420) of 420 symbols, constitutes synchronously by behind a preamble, PN255 sequence and one, as shown in Figure 2.Preamble and after be defined as the cyclic extensions of PN255 sequence synchronously.The phase place of the definite PN sequence that is produced of the initial condition value of linear feedback shift register (LFSR).The generator polynomial that produces the LFSR of sequence PN255 is defined as:
G
255(x)＝1+x+x
5+x
6+x
8 (1)
Based on the initial condition of this LFSR, can produce the PN420 sequence of 255 outs of phase.When requiring to indicate frame number, the frame head of signal frame can adopt the PN420 signal of out of phase as the signal frame identifier.
Header signal PN595 adopts the pseudo-random binary sequence (brachymemma of m sequence) of 10 rank maximum lengths, and the length of header signal is 595 symbols, is that length is preceding 595 chips of 1023 m sequence.The generator polynomial of this m sequence is:
G
1023(x)＝1+x
3+x
10 (2)
The initial phase of the shift register group of this 10 bit is: 0000000001 (D1-D10) resets when each signal frame begins.When adopting PN595 to do the frame head sequence number, do not need to indicate frame number.
Length is the header signal (PN945) of 945 symbols, and wherein 945 symbols constitute synchronously by behind a preamble, PN511 sequence and one, as shown in Figure 3.Preamble and after be defined as the cyclic extensions of PN511 sequence synchronously.The phase place of the definite PN sequence that is produced of the initial condition value of LFSR.The generator polynomial that produces the LFSR of sequence PN511 is defined as:
G
511(x)＝1+x
2+x
7+x
8+x
9 (3)
Based on the initial condition of this LFSR, can produce the PN945 sequence of 511 outs of phase.GB is selected wherein 200 PN945 sequences for use, and when requiring to indicate frame number, the frame head of signal frame can adopt the PN945 signal of out of phase as the signal frame identifier.
More than the PN sequence chip of three kinds of frame heads, need all that the mapping transformation to-1 value is the binary character of non-return-to-zero to+1 value and " 1 " through " 0 ".
The receiving terminal of DTMB system carries out data when recovering at the received signal frame, at first will catch and identify the PN pattern that the frame head that sends signal frame is selected for use, and then can finish data by steps such as synchronous, channel estimating, demodulation and recover.
In existing national standard digital television receiver, the recognition methods of catching of frame head PN pattern mainly contains sliding correlation method and matched filter method, 3 kinds of PN frame heads of the local generation of receiver carry out related operation with the signal frame that receives respectively, identify the PN sequence pattern that receives the signal frame frame head by judging that the correlation peak size is caught.The capture time of using these two kinds of methods is longer, and computation complexity is higher.
Summary of the invention
The frame head PN that the present invention proposes a kind of terrestrial digital television system catches new method and device thereof, different according to frame head in the DTMB system and may exist phase place to rotate characteristics, utilize FFT and IFFT grouped calculation to simplify time-domain related calculation, whether adjudicate frame head PN sequence by comparison correlation peak and detection threshold successfully catches, use the inventive method and can catch the PN pattern that identification signal frame frame head is selected for use rapidly, for the receiver subsequent treatment provides essential condition; Can when frame head is PN420, the rotation of PN945 pattern phase place, needn't increase other processing methods and logical circuit simultaneously, simplify circuit structure, improve the acquisition speed of frame head PN in the ground digital television broadcast transmission system.
The frame head PN acquisition equipment of a kind of terrestrial digital television system of the present invention is made up of I road signal buffer, Q road signal buffer, FFT converter a, FFT converter b, IFFT converter a, IFFT converter b, IFFT converter c, multiplier a, multiplier b, multiplier c, square converter a, square converter b, square converter c, decision device a, decision device b, decision device c, conjugate output circuit and logic control circuit.Wherein, FFT converter a carries out 256 FFT computing; FFT converter b carries out 512 FFT computing; IFFT converter a carries out 256 IFFT computing; IFFT converter b and IFFT converter c all carry out 512 IFFT computing; Multiplier a carries out 256 dot product; Multiplier b and multiplier c carry out 512 dot product; 3 squares of converters are identical; 3 decision devices are identical.
Under the control of logic control circuit, I road signal buffer and Q road signal buffer keep length respectively since the i position be 256 and 512 two group codes, be I road [i, i+255], [i, i+511] and Q road [i, i+255], [i, i+511], i is an integer, and merges respectively and grow into two groups of complex signals of 256 and 512, and complex signal outputs to respectively among FFT converter a and the FFT converter b carries out the FFT computing; With 256 conjugation result of 256 operation result of FFT converter a output and the output of conjugate output circuit dot product mutually in multiplier a, two groups 512 the conjugation result that 512 operation result of FFT converter b output is exported with the conjugate output circuit respectively dot product mutually in multiplier b and multiplier c; Multiplied result is carried out the IFFT computing respectively in IFFT converter a, IFFT converter b and IFFT converter c; In a square converter a, square converter b and square converter c, get the correlation peak that obtains by the IFFT computing respectively, and in decision device a, decision device b and decision device c with the detection threshold of corresponding every kind of frame head PN sequence relatively; If surpass detection threshold, it is final matching result that logic control circuit writes down this kind frame head; If do not surpass detection threshold, then logic control circuit slides one respectively with the symbol of storing in I road signal buffer and the Q road signal buffer, carries out acquisition procedure again.
Described conjugate output circuit by PN maker a, PN maker b, PN maker c, FFT unit a, FFT unit b, FFT unit c, PN expanded circuit a, PN expanded circuit b, PN cut off circuit, get conjugate circuit a, get conjugate circuit b, get conjugate circuit c and form; PN maker a, PN maker b and PN maker c produce the basic sequence PN511 of basic sequence PN255, PN945 of PN420 and the former sequence PN 1023 of PN595 respectively, and it is input to respectively in PN expanded circuit a, PN expanded circuit b and the PN cut off circuit; Add 0 after 255 length that PN expanded circuit a and PN expanded circuit b generate respectively and the sequence of 512 length in PN maker a and PN maker b, preceding 512 symbols of intercepting PN1023 in the PN cut off circuit; Three groups of institute's calling sequences carry out 256 points, carry out 512 FFT computing in FFT unit b and FFT unit c at FFT unit a respectively, and to operation result in getting conjugate circuit a to 256 plural numbers, get conjugate circuit b and get among the conjugate circuit c 512 plural numbers are carried out respectively exporting after the complex conjugate conversion.
The PN maker a of described conjugate output circuit, PN maker b and PN maker c are consistent with PN255, PN511 and the generative circuit of PN1023 among the standard GB20600-2006 respectively.
Described conjugate output circuit can be substituted by a memory, is solidifying the complex conjugate that off-line calculates in advance in the memory.
Described FFT converter, FFT unit and IFFT converter count identical can be multiplexing.
The frame head PN catching method of a kind of terrestrial digital television system of the present invention may further comprise the steps:
Step 1:I road signal buffer and Q road signal buffer receive the baseband signal of I, Q two-way respectively from the baseband signal input, every road signal keeps length since the i position be 256 and 512 two group codes, be I road [i, i+255], [i, i+511] and Q road [i, i+255], [i, i+511], i is an integer;
Step 2: under the control of logic control circuit, I road signal buffer and Q road signal buffer are grown into I, the merging of Q two paths of signals of preserving two groups of complex signals of 256 and 512 respectively, and carry out the FFT computing respectively in FFT converter a and FFT converter b;
Step 3: three PN makers of conjugate output circuit produce the basic sequence PN511 of basic sequence PN255, PN945 of PN420 and the former sequence PN1023 of PN595 respectively, in the PN expanded circuit, respectively the end of PN255 and PN511 sequence is added 0, preceding 512 symbols of intercepting PN1023 in the PN cut off circuit; And three groups of institute's calling sequences are carried out respectively carrying out exporting after the complex conjugate conversion in getting conjugate circuit after the FFT computing;
Step 4: with 256 conjugation result exporting in 256 operation result of FFT converter a output and the step 3 dot product mutually in multiplier a, 512 operation result of FFT converter b output respectively with step 3 in two groups 512 conjugation result of output dot product mutually in multiplier b, multiplier c, carry out the IFFT computing then respectively;
Step 5: in square converter, get the correlation peak that obtains by the IFFT computing respectively, in decision device, compare respectively again with the detection threshold of corresponding every kind of frame head PN sequence; If surpass the situation of detection threshold, then to write down this kind frame head be final matching result to logic control circuit, and method finishes; Otherwise logic control circuit slides one respectively with the symbol of storing in I road signal buffer and the Q road signal buffer, even i=i+1, repeated execution of steps 1.
In the described step 3, the PN maker is respectively with PN255, and the initial phase of PN511 is fixedly elected arbitrary initial phase of listing among the standard GB20600-2006 as.
In the described step 3, but the complex conjugate transformation results of conjugate output circuit output be stored in the memory of local receiver after also calculated off-line finishes, and call through local receiver and to output in each multiplier.
The frame head PN catching method and the device thereof of a kind of terrestrial digital television system of the present invention, its advantage is:
(1) the present invention has replaced traditional time domain correlation technique with the correlation technique of FFT converter and IFFT converter grouped calculation, has improved the speed of related operation, has reduced computation complexity;
(2) owing to the present invention is based on the application of the correlation technique of FFT converter and IFFT converter grouped calculation, can when frame head is PN420, the rotation of PN945 pattern phase place, needn't increase other processing methods and logical circuit, realize simple.
Therefore method and apparatus of the present invention has improved the matching speed of catching of frame head PN in the ground digital television broadcast transmission system.
Description of drawings
Fig. 1 is the signal frame structure schematic diagram of existing ground digital television broadcast transmission system;
Fig. 2 is the header signal schematic diagram of 420 symbols for the length of existing ground digital television broadcast transmission system;
Fig. 3 is the header signal schematic diagram of 945 symbols for the length of existing ground digital television broadcast transmission system;
Fig. 4 is the structured flowchart of the frame head PN acquisition equipment of a kind of terrestrial digital television system of the present invention;
Fig. 5 is the structured flowchart of the conjugate output circuit of the frame head PN acquisition equipment of a kind of terrestrial digital television system of the present invention;
Fig. 6 is the flow chart of the frame head PN catching method of a kind of terrestrial digital television system of the present invention;
Fig. 7 catches the figure as a result of identification PN420 frame head mode for the inventive method;
Fig. 8 catches the figure as a result of identification PN945 frame head mode for the inventive method;
Fig. 9 catches the figure as a result of identification PN595 frame head mode for the inventive method.
Among the figure: signal buffer 2.Q road, 1.I road signal buffer 3.FFT converter a 4.FFT converter b5. multiplier a 6. multiplier b 7. multiplier c 8. conjugate output circuit 801.PN maker a802.PN expanded circuit a 803.FFT unit a 804. get conjugate circuit a 805.PN maker b806.PN expanded circuit b 807.FFT unit b 808. and get conjugate circuit b 809.PN maker c810.PN cut off circuit 811.FFT unit c 812. and get conjugate circuit c 9.IFFT converter a10.IFFT converter b 11.IFFT converter c 12. Square Transformation device a 13. Square Transformation device b14. Square Transformation device c 15. decision device a 16. decision device b 17. decision device c 18. logic control circuits
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in further detail.
The present invention proposes a kind of frame head PN catching method and device thereof of terrestrial digital television system.The receiving terminal of DTMB system carries out data when recovering at the received signal frame, use the inventive method and can catch the PN pattern that the frame head that sends signal frame is selected for use that identifies rapidly, for receiver further synchronously, steps such as channel estimating, demodulation provide essential condition.Whether the present invention is different and may have the characteristics of phase place rotation according to frame head in the DTMB system, utilizes FFT and IFFT grouped calculation to simplify time-domain related calculation, and then adjudicate frame head PN sequence by relatively correlation peak and detection threshold and successfully catch.The present invention is based on the application of the correlation technique of FFT and IFFT grouped calculation, improved the speed of related operation, reduced computation complexity; Can when frame head is PN420, the rotation of PN945 pattern phase place, needn't increase other processing methods and logical circuit simultaneously, simplify circuit structure; And then improved the matching speed of catching of frame head PN in the ground digital television broadcast transmission system.
The frame head PN acquisition equipment of a kind of terrestrial digital television system of the present invention comprises: be made up of I road signal buffer 1, Q road signal buffer 2, FFT converter a3, FFT converter b4, IFFT converter a9, IFFT converter b10, IFFT converter c11, multiplier a5, multiplier b6, multiplier c7, square converter a12, square converter b13, square converter c14, decision device a15, decision device b16, decision device c17, conjugate output circuit 8 and logic control circuit 18; Wherein, FFT converter a3 carries out 256 FFT computing; FFT converter b4 carries out 512 FFT computing; IFFT converter a9 carries out 256 IFFT computing; IFFT converter b10 and IFFT converter c11 all carry out 512 IFFT computing; Multiplier a5 carries out 256 dot product; Multiplier b6 and multiplier c7 carry out 512 dot product; 3 squares of converters are identical; 3 decision devices are identical.
As shown in Figure 4, the baseband signal of I road signal buffer 1 and Q road signal buffer 2 buffer memory I, Q two-way, every road signal keeps length since the i position be 256 and 512 two group codes, be I road [i, i+255], [i, i+511] and Q road [i, i+255], [i, i+511]; It is 256 FFT converter a3 of 256 symbols input that I road signal buffer 1 and Q road signal buffer 2 will be grown respectively; It is 512 FFT converter b4 of 512 symbols input that I road signal buffer 1 and Q road signal buffer 2 will be grown respectively; FFT converter a3 is 256 Fourier transform results input multiplier a5, with the FFT result's of the PN255 zero-adding sequence of conjugate output circuit 8 outputs conjugate dot product mutually; FFT converter b4 imports multiplier b6 and multiplier c7 respectively with 512 Fourier transform results, with the FFT result's of the PN511 zero-adding sequence of itself and conjugate output circuit 8 outputs conjugate dot product mutually, the PN595 that in multiplier c7 itself and conjugate output circuit 8 is exported blocks the FFT result's of sequence (being the sequence of blocking of PN1023) conjugate dot product mutually in multiplier b6; Multiplier a5 is input to IFFT converter a9 with 256 dot product result and carries out 256 IFFT conversion, and multiplier b6, multiplier c7 are input to IFFT converter b10 with 512 dot product result respectively, IFFT converter c11 carries out 512 IFFT conversion; Square converter a12, square converter b13, square converter c14 carry out a square conversion with the correlation peak of IFFT converter a9, IFFT converter b10, IFFT converter c11 output respectively; Decision device a15, decision device b16, decision device c17 compare the correlation peak and the corresponding detection threshold of square converter a12, square converter b13, square converter c14 output respectively, with comparative result input logic control circuit 18; If the comparative result of a certain decision device shows correlation peak and exceeds corresponding detection threshold, 18 corresponding frame head PN patterns of output of logic control circuit, if the comparative result of all decision devices shows each passage correlation peak and does not all exceed corresponding detection threshold, 18 of logic control circuits control I road signal buffer 1 and Q road signal buffer 2 are with one of the symbol-slips of buffer memory, even i=i+1, each device circuitry repeats above step.
The output circuit of conjugate described in the present invention 8, can by 3 PN makers, 2 PN expanded circuits, 1 PN cut off circuit, 3 FFT converters, 3 get conjugate circuit and form.PN maker a801 is consistent with the circuit structure of GB PN255, and PN maker b805 is consistent with the circuit structure of GB PN511, and PN maker c809 is consistent with the circuit structure of GB PN 1023; PN expanded circuit a802 adds 0 after the sequence of 255 length, PN expanded circuit b806 adds 0 after the sequence of 512 length; FFT unit a803 carries out 256 FFT computing, and FFT unit b807 and FFT unit c811 carry out 512 FFT computing; Getting conjugate circuit a804 gets conjugation, gets conjugate circuit b808 and get conjugate circuit c812 512 plural numbers are got conjugation 256 plural numbers.As shown in Figure 5, PN maker a801 generates PN255 (initial phase is fixedly elected arbitrary initial phase of listing in the GB as) according to the circuit structure of GB PN255, PN expanded circuit a802 adds 0 group with the end of PN255 and grows into 256 sequence, FFT unit a803 is that 256 sequence is carried out 256 FFT conversion to this length, gets conjugate circuit a804 the output result of FFT unit a803 is got complex conjugate and output; PN maker b805 generates PN511 (initial phase is fixedly elected arbitrary initial phase of listing in the GB as) according to the circuit structure of GB PN511, PN expanded circuit b806 adds 0 group with the end of PN511 and grows into 512 sequence, FFT unit b807 is that 512 sequence is carried out 512 FFT conversion to this length, gets conjugate circuit b808 the output result of FFT unit b807 is got complex conjugate and output; PN maker c809 generates PN1023 (initial phase is 0000000001) according to the circuit structure of GB PN1023,810 interceptings of PN cut off circuit keep preceding 512 symbol sebolic addressings of PN1023, FFT unit c811 is that 512 sequence is carried out 512 FFT conversion to this length, gets conjugate circuit c812 the output result of FFT unit c811 is got complex conjugate and output.
Described conjugate output circuit 8 also can be substituted by a memory.Because the output valve of conjugate output circuit 8 can be gone ahead of the rest to calculate when off-line and be finished, so it can be solidificated in the memory, directly call required numerical value during acquisition equipment work, directly multiply each other with these values and multiplier.
In the frame head PN of a kind of terrestrial digital television system of the present invention acquisition equipment, the IFFT converter of counting FFT converter, FFT unit identical and counting identical can be carried out multiplexingly, this can control by corresponding sequential logic and realize.
As shown in Figure 6, the frame head PN catching method of a kind of terrestrial digital television system of this method may further comprise the steps:
Step 1: I road signal buffer 1 and Q road signal buffer 2 receive the baseband signal of I, Q two-way respectively from the baseband signal input, every road signal keeps length since the i position be 256 and 512 two group codes, be I road [i, i+255], [i, i+511] and Q road [i, i+255], [i, i+511], i is an integer;
Step 2: under the control of logic control circuit 18, I road signal buffer 1 and Q road signal buffer 2 are grown into I, the merging of Q two paths of signals of preserving two groups of complex signals of 256 and 512 respectively, and carry out the FFT computing respectively in FFT converter a3 and FFT converter b4;
According to the rudimentary knowledge of Digital Signal Processing, the corresponding frequency domain of time domain convolution multiplies each other.Therefore can finish the related operation of time domain at frequency domain.Mathematical Modeling is as follows, and the symbol sebolic addressing x (n) that receives with the correlation function of local sign indicating number sequences y (n) of being derived by frame head PN sequence is:
In the formula (4), X (k)=FFT[x (n)], Y (k)=FFT[y (n)] and, the complex conjugate of Y (k) expression Y (k).
Send signal frame in the DTMB system and have PN420, PN945 and three kinds of header signals of PN595, wherein PN420 is that synchronizing symbol generates before and after being increased by PN255, and PN945 is that synchronizing symbol generates before and after being increased by PN511, and PN595 blocks generation by PN1023.And can there be the phase place rotation in PN255 and PN511, and promptly can there be the phase place rotary mode in PN420 and PN945.Therefore, to add by PN255 0 256 symbols, by PN511 add 0 512 symbols, by PN595 block 512 symbols carry out related operation, can judge whether to catch by relevant peaks.Select 256 and 512 symbols to be more suitable for carrying out the FFT computing.
Step 3: PN maker a801, the PN maker b805 of conjugate output circuit and PN maker c809 produce the basic sequence PN511 of basic sequence PN255, PN945 of PN420 and the former sequence PN1023 of PN595 respectively, in PN expanded circuit a802 and PN expanded circuit b806, the end of sequence PN255 and PN511 is added 0 respectively, preceding 512 symbols of intercepting PN1023 in PN cut off circuit 810; Three groups of institute's calling sequences carry out the FFT computing respectively in FFT unit a803, FFT unit b807 and FFT unit c811, and operation result is being got conjugate circuit a804, got conjugate circuit b808 and get and carry out respectively among the conjugate circuit c812 exporting after the complex conjugate conversion;
By formula (1) as can be known, require the local correlated series for the treatment of also need carry out the FFT conversion based on the related algorithm of FFT, and its result is got conjugation.Because the header signal of DTMB system is known, therefore corresponding 256 and 512 the symbol sebolic addressing that constructs is also known, therefore the conjugate after their FFT conversion also is known, so the operation in this step also can be carried out by off-line, directly the result of calculation of final conjugate output circuit 8 is exported to follow-up flow process.
Step 4: with 256 conjugation result exporting in 256 operation result of FFT converter a3 output and step 3 dot product mutually in multiplier a5,512 operation result of FFT converter b4 output respectively with step 3 in two groups 512 conjugation result exporting dot product mutually in multiplier b6 and multiplier c7, in IFFT converter a9, IFFT converter b10 and IFFT converter c11, carry out the IFFT computing respectively then;
Step 5: in a square converter a12, square converter b13 and square converter c14, get correlation peak respectively by every group of IFFT converter computing gained, more respectively in decision device a15, decision device b16 and decision device c17 with the detection threshold of corresponding every kind of frame head PN sequence relatively; If surpass detection threshold, then logic control circuit 18 this kind of record frame heads are final matching result, and method finishes; If surpass detection threshold, then logic control circuit 18 slides one respectively with the symbol of storage in I road signal buffer 1 and the Q road signal buffer 2, i.e. i=i+1, repeated execution of steps one.
256 conjugation result dot product mutually in multiplier a5 in 256 the operation result that FFT converter a3 conversion in the step 2 is obtained and the step 3, again the result is carried out the IFFT computing in IFFT converter a9, promptly finished the related operation of 256 symbols that receive and 256 symbols that are extended to by PN255, whether relevant peaks judges whether PN255 catches according to this, and then can catch by judgment frame header sequence PN420; In like manner, 512 symbols that receive are carried out related operation with 512 symbols that are extended to by PN511, whether relevant peaks judges whether PN511 catches according to this, and then can catch by judgment frame header sequence PN945; 512 symbols of 512 symbols and (being that PN1023 blocks) of being blocked by PN595 that receive are carried out related operation, and whether relevant peaks judges whether the PN512 that blocks catches according to this, and then can catch by judgment frame header sequence PN595.
If through judging, 3 correlation peak-to-means do not reach corresponding detection threshold, illustrate that then the symbol in I road signal buffer 1 and the Q road signal buffer 2 is uncorrelated with the frame head sequence, then symbol in two buffers are moved one, repeat above process, up to catch mate till the pattern of frame head PN.
Under the white Gaussian noise channel of the single footpath of static state, when signal to noise ratio is 2dB, be example with sampled point of each symbol, Fig. 7 to Fig. 9 shows and uses the inventive method to PN420, PN945, the signal frame of three kinds of frame head modes of PN595 is caught the effect of identification.
The frame head mode of selecting for use when the signal frame that sends be the phase place of PN420 pattern and the rotation of frame head phase place, local PN255 sequence fixedly elect 00001101 (D1-D8) as, when signal length is 10 signal frames, as seen from Figure 7, PN420 catches passage and 10 tangible relevant peaks occur, and the correlation of correlation peak noise in this passage; The correlation peak magnitude of PN420 passage is apparently higher than two other passage simultaneously.Thus, by decision threshold is set, just can differentiate the frame head mode that captures is the PN420 pattern.
The frame head mode of selecting for use when the signal frame that sends be the phase place of PN945 pattern and the rotation of frame head phase place, local PN511 sequence fixedly elect 111011111 (D1-D9) as, when signal length is 10 signal frames, as seen from Figure 8, PN945 catches passage and 10 tangible relevant peaks occur, and the correlation of correlation peak noise in this passage; The correlation peak magnitude of PN945 passage is apparently higher than two other passage simultaneously.Thus, by decision threshold is set, we just can differentiate the frame head mode that captures is the PN945 pattern.
The frame head mode of selecting for use when the signal frame that sends is PN595 pattern, signal length when being 10 signal frames, and as seen from Figure 9, PN595 catches passage and 10 tangible relevant peaks occur, and the correlation of correlation peak noise in this passage; The correlation peak magnitude of FN595 passage is apparently higher than two other passage simultaneously.Thus, by decision threshold is set, we just can differentiate the frame head mode that captures is the PN595 pattern.
More than describe, only be preferred steps of the present invention and execution mode, the present invention is not done any pro forma restriction, any simple modification, equivalent variations and modification that every foundation technical spirit of the present invention is done above implementation method step and device all still belong in the scope of technical solution of the present invention.
Claims (7)
1. the frame head PN acquisition equipment of a terrestrial digital television system, it is characterized in that, form by I road signal buffer, Q road signal buffer, FFT converter a, FFT converter b, IFFT converter a, IFFT converter b, IFFT converter c, multiplier a, multiplier b, multiplier c, square converter a, square converter b, square converter c, decision device a, decision device b, decision device c, conjugate output circuit and logic control circuit; Wherein, FFT converter a carries out 256 FFT computing; FFT converter b carries out 512 FFT computing; IFFT converter a carries out 256 IFFT computing; IFFT converter b and IFFT converter c all carry out 512 IFFT computing; Multiplier a carries out 256 dot product; Multiplier b and multiplier c carry out 512 dot product; 3 squares of converters are identical; 3 decision devices are identical; Described conjugate output circuit by PN maker a, PN maker b, PN maker c, FFT unit a, FFT unit b, FFT unit c, PN expanded circuit a, PN expanded circuit b, PN cut off circuit, get conjugate circuit a, get conjugate circuit b, get conjugate circuit c and form; PN maker a, PN maker b and PN maker c produce the basic sequence PN511 of basic sequence PN255, PN945 of PN420 and the former sequence PN1023 of PN595 respectively, and it is input to respectively in PN expanded circuit a, PN expanded circuit b and the PN cut off circuit; Add 0 after 255 length that PN expanded circuit a and PN expanded circuit b generate respectively and the sequence of 512 length in PN maker a and PN maker b, preceding 512 symbols of intercepting PN1023 in the PN cut off circuit; Three groups of institute's calling sequences carry out 256 points, carry out 512 FFT computing in FFT unit b and FFT unit c at FFT unit a respectively, and to operation result in getting conjugate circuit a to 256 plural numbers, get conjugate circuit b and get among the conjugate circuit c 512 plural numbers are carried out respectively exporting after the complex conjugate conversion;
Under the control of logic control circuit, I road signal buffer and Q road signal buffer keep length respectively since the i position be 256 and 512 two group codes, be I road [i, i+255], [i, i+511] and Q road [i, i+255], [i, i+511], i is an integer, and merges respectively and grow into two groups of complex signals of 256 and 512, and complex signal outputs to respectively among FFT converter a and the FFT converter b carries out the FFT computing; With 256 conjugation result of 256 operation result of FFT converter a output and the output of conjugate output circuit dot product mutually in multiplier a, two groups 512 the conjugation result that 512 operation result of FFT converter b output is exported with the conjugate output circuit respectively dot product mutually in multiplier b and multiplier c; Multiplied result is carried out the IFFT computing respectively in IFFT converter a, IFFT converter b and IFFT converter c; In a square converter a, square converter b and square converter c, get the correlation peak that obtains by the IFFT computing respectively, and in decision device a, decision device b and decision device c with the detection threshold of corresponding every kind of frame head PN sequence relatively; If surpass detection threshold, it is final matching result that logic control circuit writes down this kind frame head; If do not surpass detection threshold, then logic control circuit slides one respectively with the symbol of storing in I road signal buffer and the Q road signal buffer, carries out acquisition procedure again.
2. according to the frame head PN acquisition equipment of the described a kind of terrestrial digital television system of claim 1, it is characterized in that: the PN maker a of described conjugate output circuit, PN maker b and PN maker c are consistent with PN255, PN511 and the generative circuit of PN1023 among the standard GB20600-2006 respectively.
3. according to the frame head PN acquisition equipment of the described a kind of terrestrial digital television system of claim 1, it is characterized in that: described conjugate output circuit can be substituted by a memory, is solidifying the complex conjugate that off-line calculates in advance in the memory.
4. according to the frame head PN acquisition equipment of the described a kind of terrestrial digital television system of claim 1, it is characterized in that: described FFT converter, FFT unit and IFFT converter count identical can be multiplexing.
5. an application rights requires the frame head PN catching method of the terrestrial digital television system of 1 described device, it is characterized in that, may further comprise the steps:
Step 1: I road signal buffer and Q road signal buffer receive the baseband signal of I, Q two-way respectively from the baseband signal input, every road signal keeps length since the i position be 256 and 512 two group codes, be I road [i, i+255], [i, i+511] and Q road [i, i+255], [i, i+511], i is an integer;
Step 2: under the control of logic control circuit, I road signal buffer and Q road signal buffer are grown into I, the merging of Q two paths of signals of preserving two groups of complex signals of 256 and 512 respectively, and carry out the FFT computing respectively in FFT converter a and FFT converter b;
Step 3: three PN makers of conjugate output circuit produce the basic sequence PN511 of basic sequence PN255, PN945 of PN420 and the former sequence PN1023 of PN595 respectively, in the PN expanded circuit, respectively the end of PN255 and PN511 sequence is added 0, preceding 512 symbols of intercepting PN1023 in the PN cut off circuit; And three groups of institute's calling sequences are carried out respectively carrying out exporting after the complex conjugate conversion in getting conjugate circuit after the FFT computing;
Step 4: with 256 conjugation result exporting in 256 operation result of FFT converter a output and step 3 dot product mutually in multiplier a, 512 operation result of FFT converter b output respectively with step 3 in two groups 512 conjugation result exporting dot product mutually in multiplier b, multiplier c, carry out the IFFT computing then respectively;
Step 5: in square converter, get the correlation peak that obtains by the IFFT computing respectively, in decision device, compare respectively again with the detection threshold of corresponding every kind of frame head PN sequence; If surpass the situation of detection threshold, then to write down this kind frame head be final matching result to logic control circuit, and method finishes; Otherwise logic control circuit slides one respectively with the symbol of storing in I road signal buffer and the Q road signal buffer, even i=i+1, repeated execution of steps one.
6. according to the frame head PN catching method of the described a kind of terrestrial digital television system of claim 5, it is characterized in that: in step 3, the PN maker is respectively with PN255, and the initial phase of PN511 is fixedly elected arbitrary initial phase of listing among the standard GB20600-2006 as.
7. according to the frame head PN catching method of the described a kind of terrestrial digital television system of claim 5, it is characterized in that: in the step 3, the complex conjugate transformation results of conjugate output circuit output is stored in the memory of local receiver after also but calculated off-line finishes, and calls through local receiver and to output in each multiplier.
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