CN100562907C - The chaos signal generator that is used for ultra wide band communication system - Google Patents
The chaos signal generator that is used for ultra wide band communication system Download PDFInfo
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- CN100562907C CN100562907C CNB2006100902218A CN200610090221A CN100562907C CN 100562907 C CN100562907 C CN 100562907C CN B2006100902218 A CNB2006100902218 A CN B2006100902218A CN 200610090221 A CN200610090221 A CN 200610090221A CN 100562907 C CN100562907 C CN 100562907C
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/7163—Spread spectrum techniques using impulse radio
- H04B1/717—Pulse-related aspects
- H04B1/7174—Pulse generation
Abstract
In chaos signal generator, first signal generator produces first signal.First signal comprises first fundamental wave with preset first frequency and a plurality of harmonic waves of first fundamental wave.The secondary signal generator produces secondary signal.Secondary signal comprises second fundamental wave with preset second frequency and a plurality of harmonic waves of second fundamental wave.In addition, frequency mixer will from first signal of first signal generator with mix from the secondary signal of secondary signal generator, have chaotic signals first and second signals and the harmonic waves frequency and first and second signals with generation.Wave filter always leaches the signal of preset frequency band in the chaotic signal of self-mixing device.
Description
Prioity claim
The application requires the right of priority of the korean patent application submitted in Korea S Department of Intellectual Property on July 5th, 2005 2005-60391 number, and its full content is hereby expressly incorporated by reference.
Technical field
The present invention relates to a kind of chaos signal generator that is used for ultra wide band communication system, more specifically, relate to a kind of anti-phase type amplifier, be used to reduce the chip size of traditional LC type, save the unit cost of product, and with well reproduced increase output.
Background technology
Usually, chaotic signal (chaotic signal) shows as the nonperiodic signal and the broadband signal of no phase place.Typical periodic signal has the regular phase according to the time, thus, when adding the undesired signal of phase reversal, may distortion or be eliminated.Yet chaotic signal does not have clear and definite phase place, so even it is introduced any phase reversal signal or approaching undesired signal, this chaotic signal can not be interfered yet.This is used for the information in the guard signal.
In addition, in frequency domain, chaotic signal has uniform size, and irrelevant with the cycle in the broadband, and shows excellent energy efficient.
This chaotic signal is applicable to information transmission and can be used as carrier wave.() needs for example, during jumping in modulator-demodular unit also allow the easy configuration of the transceiver of the simple modulation method by on-off keying (OOK) for independent coding owing to less spike (spike) has been eliminated for it.
Simultaneously, in principle, by using the conventional modulated method of chaotic signal, can come transmission signals by 10% to 20% bandwidth corresponding to carrier frequency band.But unfriendly, traditional modulator approach is explained by suitable complicated technology and is realized.
Although there are these defectives, because the outstanding advantage of chaotic signal attempts using chaotic signal.Advantage is that chaotic signal guarantees communication system because its controllability by very little change in the system has higher power efficiency.Another advantage is that chaotic signal has the continuous spectrum that expands to the broad frequency band width substantially, thus, and applicable to needing power spectrum on whole wide bandwidth, not have the modulation of loss.
Fig. 1 is the circuit diagram of traditional chaos signal generator.
Traditional chaos signal generator as shown in Figure 1 is a Colpitts type signal generator.The chaos signal generator of Fig. 1 comprises chaos signal generator 10, is used to produce chaotic signal; And bandpass filter 20, be used for making chaotic signal to pass through from chaos signal generator 10 at the frequency band of appointment.
Yet, the traditional chaos signal generator that adopts resonator (comprising inductor L and capacitor C) is owing to inductor needs big chip area, thereby increased chip price very unfriendly, and a large amount of energy losses have weakened energy efficiency on the inductor that causes owing to CMOS.
In addition, unfriendly, traditional chaos signal generator is owing to the tetchiness to electric current when producing chaotic signal has very poor repeatability, thereby reduced the output of product.
Summary of the invention
The present invention is intended to solve above-mentioned the problems of the prior art, therefore the purpose according to some embodiment of the present invention is to provide a kind of chaos signal generator that is used for ultra wide band communication system, it comprises anti-phase type amplifier, be used to reduce the chip size of traditional LC type, save the unit cost of product, and with well reproduced increase chip output.
According to the one aspect of the present invention that is used to realize this purpose, a kind of chaos signal generator that is used for ultra wide band communication system is provided, it comprises: first signal generator, be used to produce first signal, first signal comprises first fundamental wave with preset first frequency and a plurality of harmonic waves of first fundamental wave; The secondary signal generator is used to produce secondary signal, and secondary signal comprises second fundamental wave with preset second frequency and a plurality of harmonic waves of second fundamental wave; Frequency mixer, be used for from first signal of first signal generator with mix from the secondary signal of secondary signal generator, have chaotic signals first and second signals and the harmonic waves frequency and first and second signals with generation; And wave filter, be used for the component of signal of preset frequency band always the chaotic signal of self-mixing device leach.
In first and second signal generators each includes ring oscillator.
First signal from first signal generator comprises square-wave signal.Secondary signal from the secondary signal generator comprises square-wave signal.
Be configured to be different from second frequency from the first frequency of the first fundamental wave of first signal generator from the second fundamental wave of secondary signal generator.
First signal generator comprises: a plurality of anti-phase type amplifiers that are connected in series; Feedback circuit has the feedback line that is connected to anti-phase type amplifier input terminal and output terminal jointly; And at least one delay circuit, be arranged between the signal wire and feedback line of anti-phase type amplifier.
Each anti-phase type amplifier all has the CMOS inverter structure, and this inverter structure has P-MOS transistor and the N-MOS transistor that is connected in series.
Each anti-phase type amplifier all has the DC bias voltage that the midpoint of all working at N-MOS transistor and P-MOS transistor applies.
Feedback circuit comprises at least one level damped resistor.
Feedback circuit comprises a plurality of level damped resistors, and each all is arranged between each anti-phase type amplifier input terminal and the output terminal.
Delay circuit comprises the RC circuit, and this RC circuit comprises resistor and capacitor.
The secondary signal generator comprises: a plurality of anti-phase type amplifiers; Feedback circuit has the feedback line that is connected to anti-phase type amplifier input terminal and output terminal jointly; And at least one delay circuit, be arranged between the signal wire and feedback line that connects anti-phase type amplifier.
Each anti-phase type amplifier all has the CMOS inverter structure, and this inverter structure has P-MOS transistor and the N-MOS transistor that is connected in series.
Each anti-phase type amplifier all has the DC bias voltage that the midpoint in N-MOS transistor and the work of P-MOS transistor applies.
Feedback circuit comprises at least one level damped resistor.
Feedback circuit comprises a plurality of level damped resistors, and each all is arranged between each anti-phase type amplifier input terminal and the output terminal.
Delay circuit comprises the RC circuit, and this RC circuit comprises resistor and capacitor.
Description of drawings
Above and other objects of the present invention, feature and other advantage will be by more clearly being understood below in conjunction with the detailed description of accompanying drawing, in the accompanying drawings:
Fig. 1 is the circuit diagram that traditional chaos signal generator is shown;
Fig. 2 is the arrangement plan that illustrates according to chaos signal generator of the present invention;
Fig. 3 a and Fig. 3 b are the circuit diagrams that first and second signal generators of Fig. 2 are shown;
Fig. 4 a and Fig. 4 b are the oscillograms in the output signal of time domain that is illustrated in the chaos signal generator of Fig. 2;
Fig. 5 is the oscillogram of output signal of frequency domain that is illustrated in the chaos signal generator of Fig. 2; And
Fig. 6 illustrates the input voltage of frequency mixer of Fig. 2 and the trajectory diagram of output voltage.
Embodiment
Below, will describe the preferred embodiments of the present invention in conjunction with the accompanying drawings in detail, wherein, in different accompanying drawings, use identical reference number to represent same or analogous parts.
Fig. 2 is the arrangement plan that illustrates according to chaos signal generator of the present invention.
With reference to Fig. 2, chaos signal generator of the present invention comprises: first signal generator 110, secondary signal generator 120, frequency mixer 200 and wave filter 300.First signal generator 110 produces the first signal S1, and this first signal comprises first fundamental wave f1 with preset first frequency and a plurality of harmonic waves of first fundamental wave.Secondary signal generator 120 produces secondary signal S2, and this secondary signal comprises second fundamental wave f2 with preset second frequency and a plurality of harmonic waves of second fundamental wave.In addition, frequency mixer 200 will mix with secondary signal S2 from secondary signal generator 120 from the first signal S1 of first signal generator 110, have the chaotic signal of the first and second signal S1 and S2's and frequency (sum frequency) and the first and second signal S1 and S2's harmonic wave with generation.Wave filter 300 always leaches the component of signal of preset frequency band in the chaotic signal of self-mixing device 200.
The first signal S1 from first signal generator 110 is a square-wave signal, and this square-wave signal comprises the harmonic wave of first fundamental wave f1 and first fundamental wave.Secondary signal S2 from secondary signal generator 120 also is a square-wave signal, and this square-wave signal comprises the harmonic wave of second fundamental wave f2 and second fundamental wave.Here, first and second signals can be pulse, triangle or serrated signal.
In first and second signal generators 110,120 each all produces the square-wave signal with a plurality of frequencies.Thus, each in first and second generators all can be the ring oscillator that is suitable for producing this square-wave signal.
Preferably, will be arranged to be different from second frequency from the second fundamental wave f2 of secondary signal generator 120, the chaotic signal that has a plurality of frequencies with generation from the first frequency of the first fundamental wave f1 of first signal generator 110.
In addition, first signal generator 110 and secondary signal generator 120 can be configured to as shown in Figure 3 the basic circuit that equates.Yet, the first fundamental wave f1 of first signal generator 110 is arranged to be different from the second fundamental wave f2 of secondary signal generator 120.Fig. 3 illustrates the exemplary configurations of first signal generator 110 and secondary signal generator 120.
Fig. 3 a and Fig. 3 b are the circuit diagrams that first and second signal generators shown in Figure 2 are shown.Fig. 3 a is the circuit diagram of first signal generator of Fig. 2, and Fig. 3 b is the circuit diagram of the secondary signal generator of Fig. 2.
With reference to Fig. 3 a, first signal generator 110 comprises a plurality of anti-phase type amplifier A11 to A13, feedback circuit 111 and delay circuit 112A and 112B.Anti-phase type amplifier A11 to A13 is connected in series.Feedback circuit 111 has the input end that is connected to anti-phase type amplifier A11 to A13 jointly and the feedback line FBL of output terminal.Delay circuit 112A is arranged between signal wire SL1 and the feedback line FBL, and delay circuit 112B is arranged between signal wire SL2 and the feedback line FBL.SL1 and SL2 link together anti-phase type amplifier A11, A12 and A13.
Here, first signal generator 110 of the present invention comprises the anti-phase type amplifier of three or more odd numbers.That is, three, five, seven or more this amplifier can cascade mode be used.
For example, comprise first at first signal generator 110, second, under the situation of the three or three amplifier A11 to A13, the first anti-phase type amplifier A11 has the CMOS inverter structure, this structure has P-MOS transistor M11 and the N-MOS transistor M12 that is connected in series, the second anti-phase type amplifier A12 has the CMOS inverter structure, this structure has P-MOS transistor M21 and the N-MOS transistor M22 that is connected in series, and the 3rd anti-phase type amplifier A13 also has the CMOS inverter structure, and this structure has P-MOS transistor M31 and the N-MOS transistor M32 that is connected in series.
Here, the first anti-phase type amplifier A11 has the DC bias voltage that the mid point in P-MOS transistor M11 and N-MOS transistor M12 work applies.Equally, the second anti-phase type amplifier A12 has the DC bias voltage that the mid point in P-MOS transistor M21 and N-MOS transistor M22 work applies.In addition, the 3rd anti-phase type amplifier A13 has the DC bias voltage that the mid point in P-MOS transistor M31 and N-MOS transistor M32 work applies.Therefore, each among first, second and the 3rd anti-phase type amplifier A11 to A13 all is activated by bias voltage Vdc.
In addition, feedback circuit 111 comprises at least one level damped resistor.Preferably, feedback circuit 111 comprises a plurality of level damped resistor R13 to R15, and each all is arranged between the input end and output terminal of each anti-phase type amplifier A11 to A13.
Level damped resistor R13 to R15 limit feedback is to the level of the input signal of the input end of each amplifier A11 to A13, thereby the overall level that prevents output signal is fed.
Each delay circuit 112A and 112B can be the RC circuit that comprises resistor and capacitor.For example, delay circuit 112A and 112B can be configured to RC series circuit, RC parallel circuit or RC series-parallel circuit.The delay circuit 112A of Fig. 3 a and each among the 112B all are configured to the RC parallel circuit, and this circuit comprises resistor R 11 or R12 and capacitor C11 or C12.
In addition, with reference to Fig. 3 b, secondary signal generator 120 of the present invention comprises a plurality of anti-phase type amplifier A21 to A23, feedback circuit 121 and delay circuit 122A and 122B.Anti-phase type amplifier A21 to A23 is connected in series.Feedback circuit 121 has the feedback line FBL that is connected to anti-phase type amplifier input terminal and output terminal jointly.Delay circuit 122A is arranged between signal wire SL1 and the feedback line FBL, and delay circuit 122B is arranged between signal wire SL2 and the feedback line FBL.SL1 and SL2 link together anti-phase type amplifier A21, A22 and A23.
Here, secondary signal generator 120 of the present invention comprises the anti-phase type amplifier of three or more odd numbers.That is, three, five, seven or more this amplifier can cascade mode be used.
For example, comprise first at secondary signal generator 120, second, under the situation of the three or three amplifier A21 to A23, the first anti-phase type amplifier A21 has the CMOS inverter structure, this structure has P-MOS transistor M41 and the N-MOS transistor M42 that is connected in series, the second anti-phase type amplifier A22 has the CMOS inverter structure, this structure has P-MOS transistor M51 and the N-MOS transistor M52 that is connected in series, and the 3rd anti-phase type amplifier A23 also has the CMOS inverter structure, and this structure has P-MOS transistor M61 and the N-MOS transistor M62 that is connected in series.
Here, the first anti-phase type amplifier A21 has the DC bias voltage that the mid point in P-MOS transistor M41 and N-MOS transistor M42 work applies.Equally, the second anti-phase type amplifier A22 has the DC bias voltage that the mid point in P-MOS transistor M51 and N-MOS transistor M52 work applies.In addition, the 3rd anti-phase type amplifier A23 has the DC bias voltage that the mid point in P-MOS transistor M61 and N-MOS transistor M62 operation applies.Therefore, each among first, second and the 3rd anti-phase type amplifier A21 to A23 all is activated by bias voltage Vdc.
In addition, feedback circuit 121 comprises at least one level damped resistor.Preferably, feedback circuit 121 comprises a plurality of level damped resistor R23 to R25, and each all is arranged between the input end and output terminal of each anti-phase type amplifier A21 to A23.
Level damped resistor R23 to R25 limit feedback is given the output signal level of the input end of each amplifier A21 to A23, thereby the overall level that prevents output signal is fed.
Each delay circuit 122A and 122B can be the RC circuit that comprises resistor and capacitor.For example, delay circuit 122A and 122B can be configured to RC series circuit, RC parallel circuit or RC series-parallel circuit.The delay circuit 122A of Fig. 3 b and each among the 122B all are configured to the RC parallel circuit, and this circuit comprises resistor R 21 or R22 and capacitor C21 or C22.
Fig. 4 a is the oscillogram of output signal on time domain that the chaos signal generator of Fig. 2 is shown.In oscillogram, transverse axis express time [nsec], and the longitudinal axis is represented the voltage level of input signal.
Fig. 4 b is the waveform amplification figure of the part A of Fig. 4 a.
Fig. 5 is the oscillogram of output signal on frequency domain that the chaos signal generator of Fig. 2 is shown.
In the oscillogram of Fig. 5, transverse axis is represented output signal frequency [GHz], and the longitudinal axis is represented the insertion loss of input signal.
Fig. 6 illustrates the input voltage of frequency mixer shown in Figure 2 and the trajectory diagram of output voltage.
In Fig. 6, transverse axis is represented the input voltage of frequency mixer, and the longitudinal axis is represented the output voltage of frequency mixer.By chaos signal generator of the present invention, obtain output voltage along many tracks (trajectory) from input voltage.
Below, provide operation of the present invention and effect with reference to the accompanying drawings in detail.
Explain the operation of chaos signal generator of the present invention with reference to Fig. 2 to Fig. 6.At first, with reference to Fig. 2, chaos signal generator of the present invention comprises first signal generator 110, secondary signal generator 120, frequency mixer 200 and wave filter 300.First signal generator produces the first signal S1, and this first signal comprises first fundamental wave f1 with preset first frequency and a plurality of harmonic waves of first fundamental wave.The first signal S1 is the square wave with a plurality of frequencies.
For example, if the first frequency of the first fundamental wave f1 of the first signal S1 is 1GHz, then its harmonic wave be 2GHz, 4GHz, 8GHz ....
Secondary signal generator of the present invention 120 produces secondary signal S2, and this secondary signal comprises second fundamental wave f2 with preset second frequency and a plurality of harmonic waves of second fundamental wave.Secondary signal S2 also is the square wave with a plurality of frequencies.
For example, if the second frequency of the second fundamental wave f2 of secondary signal S2 is 0.9GHz, then its harmonic wave be 1.8GHz, 3.6GHz, 7.24GHz ....
Here, in chaos signal generator of the present invention, preferably, the first frequency of first fundamental wave f1 is arranged to be different from the second frequency of second fundamental wave f2, the chaotic signal that has a plurality of frequencies with generation.
Explain first signal generator 110 with reference to Fig. 3 a and Fig. 3 b.
With reference to Fig. 3 a, first signal generator 110 comprises first to the 3rd anti-phase type amplifier A11 to A13 that is connected in series.The first anti-phase type amplifier A11 has the CMOS inverter structure, and this structure has P-MOS transistor M11 and the N-MOS transistor M12 that is connected in series.The second anti-phase type amplifier A12 has the CMOS inverter structure, and this structure has P-MOS transistor M21 and the N-MOS transistor M22 that is connected in series.In addition, the 3rd anti-phase type amplifier A13 has the CMOS inverter structure, and this structure has P-MOS transistor M31 and the N-MOS transistor M32 that is connected in series.In addition, the first anti-phase type amplifier A11 has the bias voltage Vdc that the mid point in P-MOS transistor M11 and N-MOS transistor M12 work applies.Equally, the second anti-phase type amplifier A12 has the bias voltage Vdc that the mid point in P-MOS transistor M21 and N-MOS transistor M22 work applies.In addition, the 3rd anti-phase type amplifier A13 has the bias voltage Vdc that the mid point in P-MOS transistor M31 and N-MOS transistor M32 work applies.At this moment, first to the 3rd amplifier is activated by bias voltage Vdc.
Subsequently, each output of first to the 3rd amplifier A11 to A13 all feeds back to each input end by feedback circuit 111.Signal feedback or input postpones preset time by delay circuit 112A and 112B.
In this way, the feedback signal of delay preset time produces and has the signal of out of phase and the square-wave signal with a plurality of frequencies.Here, feedback circuit 111 comprises a plurality of level damped resistor R13 to R15, is used for the level of limit feedback signal, is fed from the overall level of the output signal of first signal generator 110 preventing.
With reference to Fig. 3 b, secondary signal generator 120 comprises first to the 3rd anti-phase type amplifier A21 to A23 that is connected in series.The first anti-phase type amplifier A21 has the CMOS inverter structure, and this structure has P-MOS transistor M41 and the N-MOS transistor M42 that is connected in series.The second anti-phase type amplifier A22 has the CMOS inverter structure, and this structure has P-MOS transistor M51 and the N-MOS transistor M52 that is connected in series.The 3rd anti-phase type amplifier A23 also has the CMOS inverter structure, and this structure has P-MOS transistor M61 and the N-MOS transistor M62 that is connected in series.In addition, the first anti-phase type amplifier A21 has the bias voltage Vdc that the mid point in P-MOS transistor M41 and N-MOS transistor M42 work applies.The second anti-phase type amplifier A22 has the bias voltage Vdc that the mid point in P-MOS transistor M51 and N-MOS transistor M52 work applies.In addition, the 3rd anti-phase type amplifier A23 has the bias voltage Vdc that the mid point in P-MOS transistor M61 and N-MOS transistor M62 work applies.Herein, first to the 3rd anti-phase type amplifier A21 to A23 is activated by bias voltage Vdc.
Each output signal of first to the 3rd anti-phase type amplifier A21 to A23 all feeds back to each input end by feedback circuit 121.In this case, signal feedback or input postpones preset time by delay circuit 122A and 122B.
In this way, the feedback signal of delay preset time produces signal with out of phase and the square-wave signal with a plurality of different frequencies.Feedback circuit 121 comprises a plurality of level damped resistor R23 to R25, is used for the level of limit feedback signal, is fed from the overall level of the output signal of secondary signal generator 120 preventing.
As mentioned above, be under the situation of 1GHz at the first frequency of the first fundamental wave f1 of the first signal S 1, its harmonic wave be 2GHz, 4GHz, 8GHz ....Second frequency at the second fundamental wave f2 of secondary signal S2 is under the 0.9GHz situation, its harmonic wave be 1.8GHz, 3.6GHz, 7.24GHz ....Thus, different frequencies is interfering with each other, produces the chaotic signal with Fig. 4 and complex frequency shown in Figure 5 thus.
Next, with reference to Fig. 2, frequency mixer 200 of the present invention will mix with secondary signal S2 from secondary signal generator 120 from the first signal S1 of first signal generator 110, have the chaotic signal first signal S1 and secondary signal S2 and harmonic wave frequency and the first signal S1 and secondary signal S2 with generation.
For example, under with the second fundamental wave f2 of the first fundamental wave f1 of the first signal S1 and harmonic wave and secondary signal S2 and situation that harmonic wave is mixed with each other thereof, export the first and second signal S1, S2 with frequency f 1+f2 and difference frequency f1-f2 or f2-f1 with and harmonic wave 2f1,3f1,4f1 ... and 2f2,3f2,4f2 ....Therefore, frequency mixer 200 of the present invention is exported the chaotic signal with a lot of frequencies.
As shown in Figure 4, in time domain, chaotic signal has the combination of a plurality of phase places, and does not have specific phase place.
As mentioned above, the chaotic signal from frequency mixer 200 outputs is distributed on the ultrabroad band very widely.In communication system, adopt chaotic signal, need to select and the corresponding chaotic signal of special frequency band used in system, for example carrier wave.
Subsequently, with reference to Fig. 2, wave filter 300 of the present invention always leaches the component of signal of preset frequency band in the chaotic signal of self-mixing device, and is provided at the chaotic signal of desired frequency band.
In addition, with reference to Fig. 5,, have a plurality of frequencies from the output signal of chaos signal generator of the present invention, rather than have specific frequency at frequency domain.For example, as shown in Figure 5, have under the situation that is arranged on about passband of 3 to 5GHz the chaotic signal of its output in 3 to 5GHz scopes at wave filter 300 of the present invention.
In addition, as shown in Figure 6, chaos signal generator shows that frequency mixer output is with respect to the complicated track of the output voltage of input voltage owing to have the complex frequency of varying level.
Adopt the chaos signal generator of traditional resonator (comprising traditional inductor L and capacitor) in forming chip, to need large-sized circuit owing to inductor.This has increased chip price unfriendly and has caused owing to the tetchiness to electric current when producing chaotic signal has very poor repeatability.Yet, replacing the LC resonator by adopting anti-phase type amplifier, chaos signal generator of the present invention has overcome traditional defective.
As mentioned above, the chaos signal generator that is used for ultra wide band communication system of the present invention adopts anti-phase type amplifier, is used to reduce the chip size of traditional LC type, saves the unit cost of product, and with well reproduced increase chip output.
Although illustrate and described the present invention in conjunction with the preferred embodiments, apparent, those skilled in the art can carry out various forms of modifications and change under the situation of the spirit and scope of the present invention that do not break away from claim and limited.
Claims (17)
1. chaos signal generator that is used for ultra wide band communication system comprises:
First signal generator is used to produce first signal, and described first signal comprises first fundamental wave with preset first frequency and a plurality of harmonic waves of described first fundamental wave;
The secondary signal generator is used to produce secondary signal, and described secondary signal comprises second fundamental wave with preset second frequency and a plurality of harmonic waves of described second fundamental wave;
Frequency mixer, be used for and mix with described secondary signal from described first signal of described first signal generator, have chaotic signals described first and second signals and described harmonic waves frequency and described first and second signals with generation from described secondary signal generator; And
Wave filter is used for the component of signal of preset frequency band is leached from the described chaotic signal from described frequency mixer.
2. chaos signal generator according to claim 1, wherein, each in described first and second signal generators all is ring oscillators.
3. chaos signal generator according to claim 1 wherein, comprises square-wave signal from described first signal of described first signal generator.
4. chaos signal generator according to claim 3 wherein, comprises square-wave signal from the described secondary signal of described secondary signal generator.
5. chaos signal generator according to claim 3 wherein, is configured to be different from described second frequency from the described second fundamental wave of described secondary signal generator from the described first frequency of the described first fundamental wave of described first signal generator.
6. chaos signal generator according to claim 4, wherein, described first signal generator comprises:
The anti-phase type amplifier that odd number is connected in series;
Feedback circuit has the feedback line that is connected to described anti-phase type amplifier input terminal and output terminal jointly; And
At least one delay circuit is arranged between the signal wire and described feedback line of described anti-phase type amplifier.
7. chaos signal generator according to claim 6, wherein, each described anti-phase type amplifier all has the CMOS inverter structure, and described CMOS inverter structure has P-MOS transistor and the N-MOS transistor that is connected in series.
8. chaos signal generator according to claim 7, wherein, each described anti-phase type amplifier all has the DC bias voltage that the midpoint in described N-MOS transistor and the work of described P-MOS transistor applies.
9. chaos signal generator according to claim 6, wherein, described feedback circuit comprises at least one level damped resistor.
10. chaos signal generator according to claim 6, wherein, described feedback circuit comprises a plurality of level damped resistors, each described level damped resistor is arranged between the described input end and described output terminal of each described anti-phase type amplifier.
11. chaos signal generator according to claim 6, wherein, described delay circuit comprises the RC circuit, and described RC circuit comprises resistor and capacitor.
12. chaos signal generator according to claim 6, wherein, described secondary signal generator comprises:
The anti-phase type amplifier that odd number is connected in series;
Feedback circuit has the feedback line that is connected to described anti-phase type amplifier input terminal and output terminal jointly; And
At least one delay circuit is arranged between the signal wire and described feedback line that connects described anti-phase type amplifier.
13. chaos signal generator according to claim 12, wherein, each described anti-phase type amplifier all has the CMOS inverter structure, and described CMOS inverter structure has P-MOS transistor and the N-MOS transistor that is connected in series.
14. chaos signal generator according to claim 13, wherein, each described anti-phase type amplifier all has the DC bias voltage that the midpoint in described N-MOS transistor and the work of described P-MOS transistor applies.
15. chaos signal generator according to claim 13, wherein, described feedback circuit comprises at least one level damped resistor.
16. chaos signal generator according to claim 13, wherein, described feedback circuit comprises a plurality of level damped resistors, and each described level damped resistor is arranged between the described input end and described output terminal of each described anti-phase type amplifier.
17. chaos signal generator according to claim 13, wherein, described delay circuit comprises the RC circuit, and described RC circuit comprises resistor and capacitor.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050060391 | 2005-07-05 | ||
| KR1020050060391A KR100665218B1 (en) | 2005-07-05 | 2005-07-05 | Chaotic signal generator for ultra wide band |
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| CN1892732A CN1892732A (en) | 2007-01-10 |
| CN100562907C true CN100562907C (en) | 2009-11-25 |
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| US (1) | US7463103B2 (en) |
| KR (1) | KR100665218B1 (en) |
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| KR100665374B1 (en) * | 2006-02-22 | 2007-01-09 | 삼성전기주식회사 | Chaotic wireless communication apparatus for location awareness using spreading spectrum technology |
| US8385547B2 (en) * | 2006-09-08 | 2013-02-26 | The United States Of America, As Represented By The Secretary Of The Navy | Method and apparatus for secure digital communications using chaotic signals |
| US7394281B1 (en) * | 2008-01-31 | 2008-07-01 | International Business Machines Corporation | Bi-directional universal serial bus booster circuit |
| CN101977065B (en) * | 2010-10-13 | 2013-05-01 | 太原理工大学 | Ultra-wide band (UWB) chaotic signal generator |
| KR101331794B1 (en) | 2012-08-03 | 2013-11-21 | 인제대학교 산학협력단 | Three-phase clock driven chaos oscillator with dual voltage controllability |
| CN103199985A (en) * | 2013-03-22 | 2013-07-10 | 王少夫 | Communication non-liner closed loop frequency modulation chaotic system |
| CN103312324B (en) * | 2013-06-09 | 2016-02-03 | 广州山锋测控技术有限公司 | The generation method and system of short-wave band signal |
| KR101589712B1 (en) * | 2014-09-04 | 2016-01-28 | 인제대학교 산학협력단 | Chaos circuit based on active filter with voltage controlablity |
| US11303250B2 (en) * | 2020-08-09 | 2022-04-12 | Shenzhen GOODIX Technology Co., Ltd. | High linearity low noise amplifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5625324A (en) * | 1995-06-07 | 1997-04-29 | Hughes Electronics | Ultra low noise frequency generator producing the sum of plural signal sources |
| WO2002011342A1 (en) | 2000-07-27 | 2002-02-07 | Alexander Sergeevich Dmitriev | Method for transmitting data by means of chaotic signals |
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| KR100665218B1 (en) | 2007-01-09 |
| US7463103B2 (en) | 2008-12-09 |
| US20070008742A1 (en) | 2007-01-11 |
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