CN100565268C - Reflective spatial light modulator - Google Patents
Reflective spatial light modulator Download PDFInfo
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- CN100565268C CN100565268C CNB038019353A CN03801935A CN100565268C CN 100565268 C CN100565268 C CN 100565268C CN B038019353 A CNB038019353 A CN B038019353A CN 03801935 A CN03801935 A CN 03801935A CN 100565268 C CN100565268 C CN 100565268C
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- runner plate
- micro mirror
- hinge
- substrate
- spatial light
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Abstract
A kind of micro mirror array for example is used for reflective spatial light modulator.In one embodiment, micro mirror array comprises isolates supporting wall, vertical torsion hinge and runner plate, and they are by the single wafer manufacturing.Micro mirror array has big packing ratio.
Description
The cross reference of related application
The application's statement has the interim U.S. Patent Application Serial Number of submitting on June 19th, 2,002 60/390 that is entitled as " Reflective SpatialLight Modulator " (reflective spatial light modulator), 389 right of priority, its disclosure is as the reference of this paper.
Technical field
The present invention relates to spatial light modulator (SLM), more exactly, relate to and be used for the micro mirror array that display device has electronics addressable control circuit.
Background technology
Spatial light modulator (SLM) has a large amount of application in fields such as optical information processing, Projection Display, video and graphic monitor, TV and electrophotographic printing.Reflective SLM be in spatial model modulating the incident light with the equipment of reflection corresponding to the image of electronics or optics input.Can carry out the modulation of aspects such as phase place, intensity, polarization or yawing moment to incident light.Reflective SLM generally is made up of the zone or the two-dimensional array of the addressable picture elements that can reflect incident light (pixel).Source pixel data is at first passed through the processing of relevant control circuit, is loaded into then on the pel array, once loads a framework.
The SLM of prior art has multiple shortcoming.These shortcomings comprise: the not enough optics effective coverage of optimizing (gets by the reflecting part proportion in the measuring equipment surface, also be called " packing ratio ") reduced optical efficiency, coarse reflecting surface has reduced the reflectivity of mirror, diffraction has reduced the contrast of display degree, the material that uses has problems aspect long-term durability, also have, complicated manufacture process has increased production cost of products.
The equipment of many prior aries has comprised unreflecting substantially in its surface zone.This makes it have low packing ratio and low best reflection efficiency.For example, U.S. Patent number 4,229, disclosed MOSFET device forms on mirror and equipment surface in 732.These MOSFET devices have taken surface area, have reduced the optics live part in the equipment region, and have reduced reflection efficiency.MOSFET device on this equipment surface is the diffraction incident light also, and this can reduce the contrast of display degree.And then the high light of MOSFET device that shines exposure is by charging to the MOSFET device and make circuit overheated, thereby disturbed the operate as normal of these devices.
Some SLM designs have coarse surface, and this has also reduced reflection efficiency.For example, in some SLM designs, reflecting surface is the aluminium film that is deposited on the LPCVD silicon-nitride layer.Because they are films of deposit, therefore be difficult to the smoothness of these mirror surfaces of control.Like this, final products just have coarse surface, have therefore reduced reflection efficiency.
Reducing some SLM designs, particularly another problem of the reflection efficiency of the design of some overhung mirrors, is the hinge surface zone that large tracts of land exposes.The hinge surface zone that these large tracts of land expose has to use the sheet of generally being made by tungsten to block on hinge top, to prevent the scattering of incident light.These sheets have reduced the optics useful area widely, have reduced reflection efficiency.
Such as U.S. Patent number 4,566, many existing SLM such as disclosed SLM have the hinge of being made by aluminium alloy in 935.Fatigue and plastic yield takes place in aluminium and other metals easily, causes the long-term durability problem.In addition, aluminium is subject to the influence of unit " memory ", and wherein other positions begin towards the most frequent occupied inclined position.And then 4,566, disclosed mirror is by discharging from bottom cutting minute surface in No. 935 patents.This technology often causes the damage of delicate micro-mirror structures at deenergized period.It also needs to have big slot between the mirror, will reduce the optics live part in the equipment region like this.
That ideally need is reflection efficiency and the SLM of SLM device long-term reliability through improving, and manufacture process is simplified.
Summary of the invention
The present invention proposes a kind of spatial light modulator (SLM).In one embodiment, SLM has reflective, the optional micro mirror array of being made by first substrate of deflection, and wherein first substrate is bonded to second substrate with single addressable electrode.Second substrate also can have addressing and the control circuit that is used for micro mirror array.Under the optional situation, addressing and control circuit partly are positioned on the independent substrate, and are connected to circuit and the electrode that is positioned on second substrate.
Micro mirror array comprises controlled deflectable runner plate, and it has reflecting surface, is used to reflect incident light.Runner plate is connected with vertical hinge by connector, this hinge and then be connected to dividing wall by support bar.In runner plate, connector, vertical hinge, support bar and the dividing wall each is all made by first substrate.In one embodiment, the wafer formed by homogenous material such as monocrystalline silicon of this first substrate.Dividing wall is at runner plate and relevant with runner plate and controlling between the electrode of runner plate deflection isolation is provided, and dividing wall is positioned on second substrate that is bonded to micro mirror array.For micro mirror array, the close space length of runner plate and the vertical direction of hinge make reflecting surface have very high packing ratio.Seldom light can pass through micro mirror array, shines on the circuit that is positioned on second substrate.
The manufacturing of spatial light modulator only needs step seldom, and this has reduced manufacturing cost and complexity.The hole is to form in first side of first substrate.This finishes by carrying out single anisotropic etching in one embodiment.Electrode and addressing and control circuit are to make in mode arranged side by side on first side of second substrate.First side of first substrate is bonded on first side of second substrate.These sides are through alignment, so that the runner plate of electrode on second substrate and electrode control is in the correct relation.Second side of first substrate is thinned to expection thickness.Alternatively, layer of reflective material can be deposited on second side of first substrate.Second anisotropic etching defines support column, vertical hinge and connector, and goes out runner plate from second side release of first substrate.Like this, only just can produce spatial light modulator by two main etching steps.
Description of drawings
Fig. 1 shows the general structure of spatial light modulator according to an embodiment of the invention.
Fig. 2 a and 2b are the skeleton view of single micro mirror.
Fig. 3 a and 3b are skeleton view, show the top and the side of micro mirror array.
Fig. 4 a and 4b are skeleton view, show the bottom and the side of micro mirror array.
Fig. 5 a and 5b are the vertical view of micro mirror array.
Fig. 6 a and 6b are the upward view of micro mirror array.
Fig. 7 a～7d is a skeleton view, shows top, bottom and the side of the single minute surface in the alternative of micro mirror array.
Fig. 8 a～8d is a skeleton view, shows the top and the bottom of alternate micro mirror array.
Fig. 9 a is a process flow diagram, how to show the preferred embodiment of making space light regulator.
Fig. 9 b～9j is a block diagram, shows the manufacturing of spatial light modulator in further detail.
Figure 10 shows mask and the etched generation that forms the hole in first substrate in further detail.
Figure 11 is the skeleton view that is formed at an embodiment of the electrode on second substrate.
Figure 12 is a skeleton view, shows the micro mirror array on first substrate that is positioned at above the electrode, and is positioned at other circuit on second substrate.
Figure 13 shows the embodiment through simplifying of the mask that uses in the upper surface of etching first substrate.
Figure 14 is the sectional view of the part of two substrates being bonded together.
Embodiment
Reflective spatial light modulator (" SLM ") but 100 have the array of forming by deflecting mirror 202 103.By between the electrode 126 of single mirror 202 and correspondence, applying bias voltage, this mirror is deflected.The deflection of each mirror 202 is being controlled light from the source reflection to the video display.Like this,, the light that shines that mirror 202 is reflected on the direction of selecting by the deflection of control mirror 202, thus the appearance of the pixel on can the control of video display.
Spatial light modulator overview:
Fig. 1 shows the general structure of SLM 100 according to an embodiment of the invention.Shown embodiment has three-decker.Ground floor is a lens array 103, and it is made up of a plurality of deflectable micro mirrors 202.In a preferred embodiment, micro mirror array 103 is by making and get as first substrate 105 such as homogenous materials such as monocrystalline silicon.
The second layer is an electrod-array 104, and it has a plurality of electrodes 126 that are used to control micro mirror 202.Each electrode 126 is relevant with micro mirror 202, and is controlling the deflection of micro mirror 202.Addressing circuit can be selected single electrode 126, in order to the relevant micromirror 202 of control and this electrode 126.
The 3rd layer is 106 layers of control circuits.Control circuit 106 has addressing circuit, and it can control control circuit 106 to put on the voltage on the selected electrode 126.Therefore make control circuit 106 control the deflection of the mirror 202 in the lens array 103 by electrode 126.Usually, control circuit 106 also comprises demonstration control 108, line memory buffers 110, pulse width modulation array 112 and is used for vision signal 120 and the input of figure signal 122.Microcontroller 114, optics control circuit 116 and flash memory 118 can be the external modules that links to each other with control circuit 106, perhaps can be included in the control circuit 106 in certain embodiments.In various embodiments, some parts in the above-mentioned components listed of control circuit 106 can not have, can on independent substrate and with control circuit 106, link to each other, perhaps also can provide other additional components as control circuit 106 parts or link to each other with control circuit 106.
In one embodiment, the second layer 104 and the 3rd layer 106 are by using semiconductor fabrication to make on the second single substrate 107.That is to say that the second layer 104 does not need to separate with the 3rd layer 106 and be positioned at above it.And term " layer " is used for the different parts of generalities spatial light modulator 100.For example, in one embodiment, the second layer 104 of electrode is to make on the 3rd layer top of control circuit 106, and the second layer and the 3rd layer of all manufacturing on single second substrate 107.That is to say, in one embodiment, electrode 126, and show control 108, line memory buffers 110 and pulse width modulation array 112, all on single substrate, make.With will show control 108, line memory buffers 110 compares with the existing space light regulator that pulse width modulation array 112 is manufactured on respectively on the independent substrate, several functional modules of control circuit 106 are integrated in data transmission rate is improved.And then, on single substrate 107, make the second layer of electrode layer 104 and the 3rd layer of control circuit 106, have and make advantage simple and with low cost, make final product miniaturization simultaneously.
After having made layer 103,104 and 106, they are bonded together, to form SLM 100.Ground floor with lens array 103 covers the second layer and the 3rd layer 104,106.How many spaces the zone that is positioned in lens array 103 below the mirror 202 has determined to have below ground floor 103 be used for electrode 126, and addressing and control circuit 106.Below the micro mirror 202 of lens array 103, have only limited space to assemble the electronic component of electrode 126 and formation demonstration control 108, line memory buffers 110 and pulse width modulation array 112.The manufacturing technology (below will introduce in detail) that the present invention uses can generate little characteristic dimension, handle such as the manufacturing of 0.18 micron feature, and the manufacturing of 0.13 micron or littler feature is handled.The manufacturing of existing space light regulator is handled can't be at so little feature.Usually, the existing space light regulator obtains by limit feature is handled in about 1 micron or larger sized manufacturing.Like this, in the limited area of the present invention below the micro mirror of lens array 103, can make such as more circuit devcies such as transistors.Like this can be with such as showing on the integrated substrate identical such as control 108, line memory buffers 110 and pulse width modulation array 112 with electrode 126.With the same substrate 107 of electrode 126 on comprise sort circuit array 112, will improve the performance of SLM 100.
In other embodiments, the various combinations of the assembly of electrode 126 and control circuit can be manufactured on the different substrates, and electronics couples together.
Mirror:
Fig. 2 a is the skeleton view of single micro mirror 202.In a preferred embodiment, micro mirror 202 is by such as the wafer manufacturing of homogenous materials such as monocrystalline silicon and get.First substrate 105 like this, in such an embodiment is wafers of single crystal silicon material.Make the manufacturing that micro mirror 202 has been simplified mirror 202 greatly by the wafer of homogenous material.And then monocrystalline silicon can be polished, and to generate smooth minute surface, its surface smoothness is than the smooth high order of magnitude of the surface smoothness of deposited film.Mirror 202 by the monocrystalline silicon manufacturing mechanically is a rigidity, can prevent from like this minute surface is carried out unexpected bending or twisting, and the hinge of being made by monocrystalline silicon is durable, pliable and tough and reliable.In other embodiments, can use other materials to replace monocrystalline silicon.A kind of possibility is to use the silicon (for example, polysilicon, or amorphous silicon) of another kind of type to make micro mirror 202, or even uses metal (for example, aluminium alloy, or tungalloy) to make mirror 202 fully.
In certain embodiments, when runner plate 204 was deflected down a predetermined angular, micro mirror 202 comprises can stop the element that runner plate 204 deflects.Usually, these elements comprise motion stops and the end that lands.When minute surface 204 deflected, the motion stops that is positioned on the runner plate 204 contacted with the end that lands.At this moment, runner plate 204 just no longer deflections.For the motion stops and the end that lands, several possible structures are arranged.In one embodiment, the landing end is manufactured on the insulating frame relative with hinge side 210.The inclination maximum of runner plate 204 will be subjected to being positioned at the restriction of the landing end on the insulating frame 210, and insulating frame 210 has stopped the downward mechanical motion of runner plate 204.Have fixing inclination maximum and can simplify control, so that incident light is reflexed on the known direction spatial light modulator 100.
In another embodiment, the manufacturing of landing end is along the electrode 126 that is positioned on second substrate 107.The landing end of this embodiment can be short-circuited between runner plate 204 and electrode 126 so that prevent by such as insulator manufacturings such as Si oxides and get.In this embodiment, the inclination maximum of runner plate 204 is subjected to runner plate 204 and the restriction that is positioned at the angle of the landing end touching position on second substrate 107.The effect of altitude of insulating frame 210 this angle; Insulating frame 210 is high more, and then this angle is big more.The landing end that is positioned on second substrate 107 can be the pin of a protrusion, and it has reduced the in fact total surface area of contact.This pin can be in same electromotive force with runner plate 204, welds to avoid surface of contact.
In another embodiment, slot between runner plate 204 and hinge 206 is made exactly, therefore when runner plate 204 tilts a predetermined angle, runner plate 204 and hinge 206 approaching turnings will come in contact with the end points of hinge 206, serve as machinery and fill in.Why this takes place, and is because hinge 206 parts that are connected with runner plate 204 deflect along runner plate 204, and keeps not deflection relatively near hinge 206 parts of supporting wall 210.For example, when the height of torsion hinge 206 was 1 micron, it was 15 degree that 0.13 micron slot between supporting wall and hinge 206 will cause the inclination maximum of runner plate 204.
In a preferred embodiment, the motion stops and the end that lands all are by making with other part identical materials of mirror 202, and all are to make and get from first substrate 105.At material is among the embodiment of monocrystalline silicon, and therefore the motion stops and the end that lands are got by the hard material manufacturing with longer functional lifetime, can make lens array 103 continuities so for a long time.And then owing to monocrystalline silicon is hard material, then the motion stops and the end that lands can make motion stops and landing hold the pocket that contacts to make, and will significantly reduce adhesion like this, and runner plate 204 is freely deflected.In addition, this means on the same electromotive force of motion stops and the maintenance of landing end, can prevent like this, and the electric charge injection process is exactly the motion stops on different electromotive forces and lands and hold because of the contingent adhesion of welding.
Fig. 2 b is a skeleton view, shows the bottom of single micro mirror, comprises supporting wall 210, runner plate 204, hinge 206 and connector 216.
Fig. 3 a is a skeleton view, shows the top and the sidepiece of the micro mirror array 103 with 9 micro mirror 202-1 to 202-9.Fig. 3 a shows the micro mirror arrays 103 that have triplex row and three row, 9 micro mirrors 202 altogether, and the micro mirror array 103 with other sizes is possible.Usually, a pixel during each micro mirror 202 shows corresponding to video.Like this, the video with large-scale array 103 of more micro mirrors 202 shows and to have more pixel.Because the hinge 206 in the lens array 103 all is parallel to a direction, so on light source is directed into mirror 202 in the array 103 along the single direction of reflection, on showing, video formed projects images like this.
Shown in Fig. 3 a, the surface of micro mirror array 103 has big packing ratio.That is to say that the surperficial major part of micro mirror array 103 is to be made by the reflective surface will of the runner plate 204 of micro mirror 202.Have on the surface of micro mirror array 103 that seldom right and wrong are reflexive.Shown in Fig. 3 a, the non-reflective portion on micro mirror array 103 surfaces is the zones between the reflecting surface of micro mirror 202.For example, the width in the zone between mirror 202-1 and the 202-2 is by spaced walls wide 212 and decide at the runner plate 204 of mirror 202-1 and 202-2 and the slit-widths sum between the supporting wall 210.Slot can be done the same with the characteristic dimension of being supported by manufacturing technology for a short time with spaced walls wide 212.Like this, in one embodiment, slot is 0.2 micron, and in another embodiment, slot is 0.13 micron.Along with semiconductor fabrication allows littler feature, can reduce the size of spaced walls 210 and slot, so that have higher packing ratio.Fig. 3 b is a skeleton view, and it describes a mirror 202 of the lens array 103 among Fig. 3 a in detail.The packing ratio that embodiments of the invention allow is 85%, 90% or higher.
Fig. 4 a is a skeleton view, shows the bottom and the sidepiece of micro mirror array 103 as shown in Figure 3.Shown in Fig. 4 a, the spacer support frames 210 of micro mirror 202 defines the hole below the runner plate 204.These holes provide the space for runner plate 204 deflects down, and can allow to have big zone below runner plate 204, have the second layer 104 of electrode 126 so that place, and/or have the 3rd layer of control circuit 106.Fig. 4 b is a skeleton view, describes a mirror 202 of the lens array 103 of Fig. 4 a in detail.
Fig. 5 a is the vertical view of the micro mirror array that has 9 micro mirror 202-1 to 202-9 103 shown in Fig. 3 a and 4a.For example, for micro mirror 202-1, the connector 216 that Fig. 5 a shows runner plate 204, spacer support frames 210, torsionspring 206 and is used for runner plate 204 is connected with torsionspring 206.With reference to shown in the figure 3a, Fig. 5 a clearly show that also micro mirror array 103 has big packing ratio as top.The most surfaces of micro mirror array 103 is to be made by the reflective surface will of micro mirror 202-1 to 202-9.Fig. 5 a clearly illustrates that packing ratio is how to be decided by the area and the zone between each reflectivity zone of runner plate 204 of reflective mirror plate 204.In one embodiment, the area size between the reflective surface will of runner plate 204 is subjected to the restriction of the characteristic dimension limit of manufacture process.This has just determined the slot between runner plate 204 and spaced walls 210 to do how for a short time, and how thick spaced walls 210 is.Notice when spacer support frames 210 that described single mirror 202 as shown in Figure 2 has separately, then between such as two mirrors such as 202-1 and 202-2, do not have two adjacent independent adjacent spacer walls 210 usually.On the contrary, generally between mirror 202-1 and 202-2, have a physical isolation wall of supporting frame 210.Fig. 5 b is a skeleton view, describes a mirror 202 of the lens array 103 of Fig. 5 a in detail.
Fig. 6 a is the upward view as Fig. 3 micro mirror array with 9 micro mirror 202-1 to 202-9 103 extremely shown in Figure 5.Fig. 6 a also shows the bottom of runner plate 204 except the bottom that shows spacer support frames 210, torsionspring 206 and connector 216.In many examples, the zone that is positioned at below the runner plate 204 is enough big, so that can carry out the optimal design of electrode 126 and control circuit 106 and put, has and holds the space that possible mirror landing is held.Fig. 6 b is a skeleton view, describes a mirror 202 of the lens array 103 of Fig. 6 a in detail.
Shown in Fig. 5 a and 6a, seldom light can pass micro mirror array 103 and arrive electrode 126 or control circuit 106 below the micro mirror arrays 103 on the normal of runner plate 204.This is because the circuit below spacer support frames 210, torsionspring 206, connector 216 and 204 pairs of micro mirror arrays of runner plate 103 provides covering almost completely.Also have, because spacer support frames 210 is separated the circuit of runner plate 204 below micro mirror array 103, therefore along might getting on the wall of spacer support frames 210, and does not arrive the following circuit of micro mirror array 103 with non-perpendicular angle transmission of runner plate 204 and the light that passes runner plate 204.Because the high light that seldom incides on the lens array 103 arrives circuit, so SLM 100 has avoided the problem relevant with the high light of getting to circuit.These problems comprise the incident light of heater circuit, and incident photon is circuit component charging, and these two problems all can cause the circuit function fault.
In Fig. 3～6, each micro mirror 202 in micro mirror array 103 all has its torsionspring 206 in the same side.In an optional embodiment, the different micro mirrors 202 in micro mirror array 103 all have torsionspring 206 at homonymy not.For example, get back to Fig. 3 a, mirror 202-1 and 202-3 will be as shown in the figure, have spring 206 in the same side.In contrast, mirror 202-2 has spring 206 at homonymy not, so that the spring 206 of mirror 202-2 is perpendicular to the spring 206 of mirror 202-1 and 202-3.The runner plate 204 of different micro mirror 202-1 and 202-2 is deflected on different directions, therefore make lens array 103 have a controllable degrees of freedom generally.In this optional embodiment, two different light sources (for example, have light sources of different colors) can directly guide towards micro mirror array 103, and guided again by the micro mirror in the micro mirror array 103 202 selectively respectively, on video display, form image.In such an embodiment, can use a plurality of micro mirrors 202 to reflex to from the light of a plurality of light sources on the same pixel of video display.For example, two light sources of different colors can be directed on the lens array 103 along different directions, and are reflected by array 103, form multicolor image on video display.The micro mirror 202-1 and the 202-3 that have torsionspring 206 on first side are controlling the reflection of first light source to video display.Micro mirror such as micro mirror 202-2 that does not have spring 206 at another on the homonymy etc. is being controlled the reflection of second light source to video display.
Fig. 7 a is the skeleton view of micro mirror 702 according to an alternative embodiment of the invention.In this embodiment, torsionspring 206 is positioned on the diagonal with respect to spacer support frames 210, and with runner plate 204 separated into two parts, or both sides: first side 704 and second side 706.Two electrodes 126 are relevant with mirror 702, and an electrode 126 is used for 704, one electrodes 126 of first side and is used for second side 706.This all attracted to both sides 704 and 706 to be positioned on the following electrode 126 and vertically downward, and provides the wider angular movement of comparing with the mirror shown in Fig. 2～6 for the height of same supporting wall 210.Fig. 7 b is the more detailed view of mirror 702, wherein shows runner plate 204, hinge 206 and supporting wall 210.Fig. 7 c and 7d show the more detailed view of the interior angle of the downside of single mirror 702 and mirror 702.In other embodiments, hinge 206 parallels with one of the side of runner plate 204 rather than diagonal line basically, and its installation site is with runner plate 204 separated into two parts 704 and 706.
The serve as reasons various skeleton views of each micro mirror array of being formed as the described a plurality of micro mirrors 702 of Fig. 7 a～7d of Fig. 8 a～8d.Fig. 8 a and 8b show the top of mirror 702 arrays and the more detailed view of the mirror in the array 702.Fig. 8 c and 8d show the downside of mirror 702 arrays and the more detailed view of a mirror 702 in the array.
The manufacturing of spatial light modulator
Fig. 9 a is a process flow diagram, shows a preferred embodiment of the manufacturing of spatial light modulator 100.Fig. 9 b～9g is a block diagram, shows the manufacturing of spatial light modulator 100 in further detail.In a word, micro mirror 202 parts are manufactured on first substrate 105.Say that individually some or all in electrode, addressing circuit and the control circuit all are manufactured on second substrate 107.So first and second substrates 105 and 107 are bonded together.105 thins of first substrate are lithography and etching step then.Then, finish the manufacturing of micro mirror 202.Final step comprises encapsulation etc., has finished the manufacturing of spatial light modulator 100.In one embodiment, lens array 103 only is by using anisotropic dry etch methods, is formed by the wafer manufacturing of monocrystalline silicon, make lens array 103, only need two step etching, and the CMOS technology of standard has been used in the manufacturing of circuit.This provides easy and cheap method for making SLM 100.
The surperficial micromachine manufacturing technology that the manufacturing of existing space light regulator is used comprises the deposit of etching, structural sheet, the deposit and the removal of sacrifice layer.These existing MEMS manufacturing technologies produce very low output, very poor homogeneity, and the result obtains about 1 micron or larger sized characteristic dimension.Contrast with it, one embodiment of the present of invention are used semiconductor fabrication, and it does not comprise sacrifice layer, and has higher output, and can make 0.13 micron or littler feature.
With reference to figure 9a, the generation of first mask (902) initialization ground part has been made micro mirror 202.This mask defines in the side of first substrate 105 needs etched part, and by etching, formation hole below micro mirror array 103, this hole define spacer support frames 210 and support column 208.Be used on first substrate such as standard techniques such as lithoprintings and generate mask.As previously mentioned, in a preferred embodiment, micro mirror 202 is by forming such as homogenous materials such as monocrystalline silicon.Like this, in a preferred embodiment, first substrate 105 is materials of monocrystalline silicon.Notice that the general a plurality of micro mirror arrays 103 that use are made, and are being separated afterwards on single wafer in a plurality of SLM 100.The structure that is manufactured for generating micro mirror array 103 is generally greater than the feature of using in cmos circuit, and it is relatively easy that the known technology that therefore is used to make cmos circuit forms micro mirror array 103.Fig. 9 b is a side view, and it shows first substrate 105 before making.Originally substrate 105 comprises device layer 938, and it is the material that lens array 103 is rely and made, insulating oxide 936, and handle substrate 934.Fig. 9 c is a side view, and it shows first substrate 105, and mask is arranged on it.
After having generated mask 902, in a preferred embodiment, first substrate 105 is by anisotropy ion etching (904), so as below runner plate 204 the formation hole.In other words, in first substrate, formed " trap " for each micro mirror 202.Additive method except that the anisotropy ion etching such as wet etching or plasma etching etc., also can be used for forming hole or " trap ".Fig. 9 d is a block diagram, shows first substrate 105, and wherein etched have a hole.
Hole below being positioned at runner plate 204 is made and is divided other to be mutually, and electrode 126 and control circuit 106 are made on second substrate 107 (906).Second substrate 107 can be such as transparent material or other materials such as quartz.Compare with silicon metal,, also can make transistor with polysilicon if second substrate is quartzy.The manufacturing of circuit can be used standard CMOS manufacturing technology (906).For example, in one embodiment, the control circuit 106 that is manufactured on second substrate 107 comprises memory cell array, row addressing circuit and column data loaded circuit.There is multiple distinct methods to make circuit to carry out addressing function.Known DRAM, SRAM and latch devices can be carried out addressing function.Because complicated circuit can be made in the zone relatively large on semi-conductive yardstick (for example, runner plate 204 can have the zone of 225 square microns) of runner plate 204 therefore below micro mirror 202.The circuit that can make is including, but not limited to the memory buffers in order to storage sequential Pixel Information, by coming drive electrode 126 with different voltage with the circuit of compensation runner plate 204 to the possible heterogencity of spacing distance between the electrode 126, and in order to carry out the circuit of width modulation conversion.
Be covered with then above this control circuit 106, thereon the depositing metal layer such as passivation layers such as Si oxide or silicon nitrides.In one embodiment, this metal layer is formed composition, and through etching, except limiting biasing/replacement bus, also defines electrode 126.Electrode 126 is placed into during manufacture, and one or more like this electrodes 126 are just corresponding to each micro mirror 202.For first substrate 105, the general many covers circuit that uses in a plurality of SLM 100 is made (906) on second substrate 107, and is being separated after a while.
Next step, first and second substrates are bonded together (910).Side with hole of first substrate 105 is bonded to the side with electrode of second substrate 107. Substrate 105 and 107 is through alignment, and the electrode that is positioned at like this on second substrate 107 just is on the suitable position, so that can control the deflection of the micro mirror 202 in the micro mirror array 103.In one embodiment, by the figure on first substrate 105 is alignd with figure on second substrate 107, thereby use the double focusing microscope that these two substrates 105 and 107 are carried out optical alignment, and the low temperature press welding method by such as anode or eutectic press welding method is bonded together these two substrates 105 and 107.There are many possible alternative embodiments to be used for making (906).For example, can use thermoplasticity or dielectric resistance spin-coating glass pressure welding material, substrate 105 and 107 just obtains the pressure welding of heating power formula like this.Fig. 9 e is an outboard profile, shows first and second substrates 105 and 107 that are bonded together.
After being bonded to first and second substrates 105 and 107 together, the surface of not etched first substrate 105 is by thin to a predetermined thickness (912) as yet.At first, shown in Fig. 9 f, will handle substrate 934 by grinding or etching and remove.Then, remove oxide 936.Then, as required, with device layer 938 thins or polishing.In one embodiment, this thin operation is by what finish substrate 105 mechanical polishings to a thickness between the apparent surface of the bottom of manufacturing " trap " and first substrate 105, and this thickness approaches the expection thickness of micro mirror 202.In one embodiment, this thickness of obtaining by mechanical polishing is about 5 microns.Then, the method by mechanical fine polishing or chemically mechanical polishing is polished to a thickness of expecting with substrate 105 between the opposite face of " trap " bottom and first substrate 105.This thickness defines the thickness of runner plate 204.In one embodiment, this expection thickness is less than about 1 micron or littler.Fig. 9 g is a side view, shows first and second substrates 105 and 107 that are bonded together after 105 thins of first substrate.
Next, generated the reflecting surface of micro mirror 202.This can realize (913) by polishing first substrate 105, so that make the surface of first substrate 105 have reflectivity.Can be on first substrate 105 deposit one deck reflecting material (914), to generate reflecting surface.Also can use other to generate the method for reflecting surface.
In one embodiment, the aluminium reflection horizon is deposited (914).The titanium seed thin film through the thick about 10nm of coating above the surface of thin of first substrate 105.Then, the thick aluminium lamination deposit of about 30nm forms the reflection horizon thereon, and for most visible spectrums, its reflectivity is greater than 95%.Fig. 9 h is a side view, and it shows deposited reflective layer 932.
Then, the reflecting surface of first substrate 105 is masked, and carries out the anisotropy ion etching (916) of high aspect ratio in a preferred embodiment, with final formation micro mirror array 103 and release runner plate 204.This second step etching defines runner plate 204, torsionspring hinge 206 and connector 216.Like this, only need that first substrate 105 is carried out two step etching and just can make micro mirror 202.To reduce the manufacturing cost of micro mirror 202 greatly like this.Fig. 9 i is a block diagram, shows the surface of first substrate 105 that is covered for template 933, and Fig. 9 j is block diagram, shows through the spatial light modulator 100 after second step etching, and it comprises runner plate 204, hinge 206, spacer support frames 210 and electrode 126.
In certain embodiments, hinge 206 is by partly etchings, and is dented from the surface of runner plate 204.Also have, in certain embodiments, after having carried out being used to limit second etching of runner plate 204, torsionspring hinge 206 and connector 216, deposit reflecting surface (914).This reflection horizon can be by for example coming deposit with a downward angle evaporation aluminium, so that the horizontal vector of this angle is from runner plate 204 to hinge 206.This angle has been arranged, and etched so that under the situation of the surface depression of runner plate 204 at hinge 206, basically can be on the surface of the hinge 206 that falls in not deposit reflectance coating so that minimize the lip-deep astigmatism of incident light in torsion hinge 206.For example, in the reaction chamber of electron gun hot vaporizer, can evaporate with the deposition speed of per second one nanometer.
In certain embodiments, micro mirror array 103 is protected by a glass or other transparent materials.In one embodiment, during the manufacturing of micro mirror array 103, stayed a frame along the periphery of each micro mirror array 103 of on first substrate 105, making.In order to protect micro mirror 202, one sheet glass or other transparent materials in micro mirror array 103 to be bonded to this frame (918).This transparent material is protecting micro mirror 202 to avoid physical hazard.In an alternative embodiment, imprint lithography is used to produce in the photosensitive resin layer on glass plate the frame array.Then, epoxy resin is applied to the upper edge of frame, and with the glass plate alignment with adhere to complete reflectivity SLM 100.
As discussed above, can make a plurality of spatial light modulators 100 by two substrates 105 and 107; A plurality of micro mirror arrays 103 can be made in first substrate 105, and overlap circuit more and can make in second substrate 107.Making a plurality of SLM 100 has increased the efficient of spatial light modulator 100 manufacture processes.But, if a plurality of SLM 100 is disposable manufacturings, then they will must be divided into single SLM 100.There is several different methods that each spatial light modulator 100 is separated with easy to use.In first method, each spatial light modulator 100 just on the substrate 105 and 107 of combination with the be separated tube core of (920) of other parts of SLM 100.The encapsulation technology of using standard then encapsulates (922) with the spatial light modulator 100 of each separation.
In second method, carry out the encapsulation of wafer level chip yardstick, so that each SLM100 is packaged into single hole and formed electricity before SLM 100 is separated plumbous.But this is protection reflectivity deflecting element and minimizing packaging cost further.In an embodiment of this method, the rear side and the welding pin of second substrate 107 are bonded together (924).Then, the rear side of second substrate 107 etched (926) exposes metal connector, the formation during carrying out the circuit manufacturing on second substrate 107 of this connector.Next, lead is deposited between metal connector and the welding pin, to be electrically connected these two.At last, a plurality of SLM just become tube core (930) separately.
Figure 10 shows the generation (902) of mask 1000 in further detail and is used for forming at first substrate etching (904) in hole.In a preferred embodiment, first substrate is the wafer of monocrystalline silicon.Oxide is deposited and patterned on first substrate.The result obtains figure as shown in figure 10, and wherein zone 1004 is the etched oxide of substrate that prevents under it, and the area of zone 1002 for exposing.The zone of the substrate 1002 that exposes forms the hole through etching.Not etched regional 1004 still keep, and form isolation supporting pillar 208 and spacer support frames 210.
In one embodiment, substrate is etched in the reactive ion etching chamber that SF6, HBr and oxygen etc. respectively with the flow rate of 100sccm, 50sccm and 10sccm.Operating pressure arrives in the 50mTorr scope 10, and bias power is 60W, and source power is 300W.In another embodiment, substrate is etched in the reactive ion etching chamber that Cl2, HBr and oxygen etc. respectively with the flow rate of 100sccm, 50sccm and 10sccm.In these embodiments, when the hole was about 3～4 microns degree of depth, etching process stopped.This degree of depth is measured by using in-situ etch depth to monitor, for example by the live optical interferometer technique, perhaps by adjusting etch-rate.
In another embodiment, the hole forms in wafer by the anisotropic reactive ion etch process.This wafer is placed in the reaction chamber.SF6, HBr and oxygen are introduced in the reaction chamber with the flow velocity of 100sccm, 50sccm and 20sccm respectively.Under the pressure of 50mTorr, use about 5 minutes of the source power of the bias power setting of 50W and 150W.This wafer is cooled off by the rear side helium flow of 20sccm flow velocity under the pressure of 1mTorr then.In a preferred embodiment, when the hole is about 3～4 microns when dark, etch processes stops.This degree of depth is to use in-situ etch depth to monitor and measures, for example by the live optical interferometer technique, perhaps by adjusting etch-rate.
Figure 11 is the skeleton view that is formed at an embodiment of the electrode 126 on second substrate 107.In this embodiment, each micro mirror 202 has corresponding electrode 126.In an illustrated embodiment, other part height of the circuit on electrode 126 to the second substrates 107 of manufacturing.As shown in figure 11, the material that is positioned on the side of electrode 126 is downward-sloping with certain pyramidal shape from the upper surface of electrode.In other embodiments, other parts of the circuit on the electrode 126 and second substrate 107 are positioned on the sustained height, rather than extend above circuit.In one embodiment of the invention, electrode 126 is about 10 * 10 microns single aluminium flake.These electrodes 126 are manufactured on the surface of second substrate 107.In this embodiment, the most surfaces zone of electrode 126 will have in order to runner plate 204 being moved to beyond the Great Wall relatively low addressing voltage of machinery downwards, thereby runner plate 204 is deflected with predetermined angle fully.
Figure 12 is a skeleton view, shows the micro mirror array 103 on first substrate 105, and first substrate 105 wherein places on the electrode 126 and other circuit on second substrate 107.The figure shows with first and second substrates 105 and 107 pressure weldings (910) before together, the micro mirror 202 in micro mirror array 103 and the relative position of electrode.Notice that for ease of explaining, the micro mirror 202 in micro mirror array 103 is as shown in the complete micro mirror 202.But, described with reference to figure 9a in a preferred embodiment, the runner plate 204 following holes that only are arranged in first substrate 105 can be etched before first substrate 105 is bonded to second substrate 107.Runner plate 204, hinge 206 and connector 216 also do not have manufactured at present.Be positioned on the height of remainder of circuit at electrode 126 and situation that the material of electrode 126 1 sides is downward-sloping under, the material of inclination then helps correctly first substrate 105 to be put on second substrate 107.
Figure 13 shows the embodiment through simplifying of mask, and this mask is used in the etching of the upper surface of first substrate 105 (916).In etching step (916), zone 1302 is exposed, and through having generated runner plate 204 after the etching and having formed torsion hinge 206, connector 216 and supporting pillar 208.Other zones 1304 are covered by photoresist, and do not have etched.These zones comprise runner plate 204 self and the material that forms hinge 206.As shown in figure 13, the most surfaces of lens array 103 is reflexive.Manufacture process only generates and is used for little non-reflection slot that runner plate 204 and supporting wall 210 and hinge 206 are separated.
After the upper surface of first substrate 105 was masked, the upper surface of first substrate 105 had generated runner plate 204 and has formed hinge 206 through etching.In one embodiment, it is etched in the reactive ion etching chamber that SF6, HBr and oxygen etc. respectively with the flow rate of 100sccm, 50sccm and 10sccm.Operating pressure arrives in the 50mTorr scope 10, and bias power is 60W, and source power is 300W.Because etch depth is generally less than 1 micron, therefore there are other several manufacture processes can obtain this target.Another embodiment is 10 in the 50mTorr scope in operating pressure, and the bias power of etching reaction chamber is that 50W and source power are under the situation of 300W, uses Cl2 and oxygen to obtain tight dimension control respectively.By using in-situ etch depth to monitor or by adjusting etch-rate, this etch processes stops at desired depth (in one embodiment, be about 5 microns dark).
Operation:
In operation, single reflecting element is selectively deflected, and is used for the light that spatial modulation incides mirror and is reflected.
Figure 14 is a sectional view, and it shows the micro mirror 202 that is positioned on the electrode 126.In operation, voltage is applied on the electrode 126, to be controlled at the deflection of the corresponding runner plate 204 on the electrode 126.As shown in figure 14, when voltage was applied to electrode 126, runner plate 204 attracted on the electrode.This can make runner plate 204 rotate along torsionspring 206.When from electrode 126 removal voltages, hinge 206 will make runner plate 204 upwards rebound.Like this, getting to light on the runner plate 204 is reflected on the direction that can be controlled by the voltage that is applied to electrode.
The operation of an embodiment is as follows.Runner plate does not deflect at the beginning.At this not state of biasing, reflected by flat runner plate 204 to the incident beam on the SLM 100 from light source and oblique incidence.Outside folded light beam can by, for example, the optics dustbin absorbs.Never the light that reflects on the runner plate 204 that deflects is not reflected on the video display.
When bias voltage being applied between runner plate 204 and the bottom electrode 126, runner plate 204 is owing to electrostatic attraction deflects.Because the design of hinge 206, the free end of runner plate 204 deflects towards second substrate 107.Notice that in a preferred embodiment, all basically bendings all occur in the hinge 206 rather than occur in the runner plate 204.In one embodiment, this can be by making hinge width 222 attenuation, and hinge 206 only is connected to supporting pillar 208 finishes at two ends.The deflection of runner plate 204 is subjected to the restriction of motion stops, as mentioned above.The total reflection of runner plate 204 deflects into outside beam reflected on the image formation optical device, and arrives video display.
When runner plate 204 deflects past " pulling " or " dragging " voltage (being about 12 volts in one embodiment), then recover the moment of mechanical force or hinge 206 and incite somebody to action no longer balance electrostatic force or moment, and runner plate 204 downward " pulling " electrodes 126 to obtain complete deflection, only are subjected to the restriction of motion stops.Obtain runner plate 204 in order to discharge from the position of complete deflection, voltage must be significantly less than pulls voltage, arrives a release voltage (for example, pull voltage be to be approximately 3.3 volts among 5.0 volts the embodiment).Like this, micro mirror 202 is the electric motor type bistable device.Give to be positioned release voltage and to pull specific voltage between the voltage, then runner plate 204 can be in two possible deflection angles, and this depends on the history that runner plate 204 deflects.Therefore, the effect of latching is played in the deflection of runner plate 204.Owing to make the runner plate 204 required mechanical force that deflects approximately be proportional to deflection angle, therefore this bistable state and the effect of latching exist, although relative electrostatic force is inversely proportional to distance between runner plate 204 and the electrode 126.
Owing to depend on total voltage between runner plate 204 and the electrode 126, therefore be applied to negative voltage on the runner plate 204 and will reduce and to put on the electrode 126 to obtain the positive voltage of given amount of deflection at the electrostatic force between runner plate 204 and the electrode 126.Like this, apply voltage to the voltage amplitude requirement that lens array 103 will reduce electrode 126.This will be of great use, for example, maintain and will be lower than 12V because need to be applied to maximum voltage on the electrode 126 in some applications, and this is because the switching capability of 5V is more common in semi-conductor industry.In addition, when being put on lens array 103, voltage need apply the quantity of electric charge of biasing, than lacking in that lens array 103 is maintained electric charge required among the embodiment of earth potential to each electrode 126.Like this, it is comparatively faster correctly applying suitable voltage and make runner plate 204 required time that deflects to electrode 126.
Because the maximum deflection of runner plate 204 is fixed, therefore at operating voltage when pulling voltage, can operate SLM 100 with digital mode.This operation comes down to numeral, because runner plate 204 or can its generations be deflected down fully by applying voltage to relevant electrode 126, or permission upsprings back under the situation that voltage is not applied to related electrode 126.Runner plate 204 is deflected down fully up to the voltage that physical component stopped that can be stopped runner plate 204 deflections be called " pulling " or " dragging " voltage.Like this, deflect down comprehensively, can apply to corresponding electrode 126 and be equal to or greater than a voltage pulling voltage in order to make runner plate 204.In the video display application, when runner plate 204 was completely deflected down, the light that incides on the runner plate 204 was reflected to the respective pixel that is positioned on the video display.When allowing runner plate 204 upwards to rebound, the reflection of light direction is not for shining the direction on the video display.
During this digit manipulation, after complete deflection takes place relevant runner plate 204, need on electrode 126, not maintain again and pull voltage completely.During " address phase ", the voltage that is used for selected electrode 126 is corresponding to the runner plate 204 that complete deflection should take place, and this voltage is set to level rank that runner plate 204 is deflected.Because the voltage that on electrode 126, applies and after deflecting, keep the required voltage of runner plate 204 at described runner plate 204 at the inflection point place less than the actual required voltage that deflects.This be because the runner plate 204 of deflection and the gap between the addressing electrode 126 less than in the process that is in when runner plate 204 when being deflected.Therefore, in " the maintenance stage " after address phase, the voltage that puts on selected electrode 126 can be reduced from its initial required level under the situation of the deflection state that does not influence runner plate 204 substantially.Having the low advantage of stage voltage that keeps is to be close to the runner plate 204 that does not deflect and to be subjected to littler electrostatic attraction, and therefore keep very near distance with the zero deflection position.This will improve deflection runner plate 204 and the optical contrast between the deflection runner plate 204 not.
By selecting suitable yardstick (in one embodiment, interval 210 between runner plate 204 and electrode 126 is 1～5 micron, and the thickness of hinge 206 is 0.05～0.45 micron), and material (such as monocrystalline silicon (100)), then can make the operating voltage of reflectivity SLM 100 that the level of several volts is only arranged.The module of reversing of hinge 206 is made by monocrystalline silicon, and it can be every square metre of every radius 5 * 10 for example
10Newton's size.By runner plate 204 is maintained suitable magnitude of voltage (" negative bias ") is gone up rather than earth potential on, can make to make the operating voltage of the electrode 126 that relevant runner plate 204 deflects fully lower.For the given voltage that is applied on the electrode 126, can cause bigger deflection angle like this.Maximum negative bias voltage is a release voltage, and therefore when addressing voltage dropped to zero, runner plate 204 can turn back the position that does not deflect.
Can also control the deflection of runner plate 204 in addition in the mode of " simulation ".Use deflects runner plate 204 less than the voltage of " pulling voltage ", and is controlling the reflection of incident light direction.
Other application:
Except video display, spatial light modulator 100 also is useful in other are used.An application is in not having the photolithography of mask, and wherein spatial light modulator 100 direct light are with the photoresist of development deposit.This will exempt the needs to mask, so that correctly develop photoresist in the expection figure.
Although by being particularly shown and described for the invention with reference to a plurality of embodiment, but for the relevant speciality those of skill in the art, all be understandable to its change of carrying out on situation and the details under the situation without departing from the spirit and scope of the present invention.For example, can runner plate 204 be deflected by the additive method that use destatics outside the attraction.Can use magnetic, heat and piezoelectric type motivational techniques that runner plate 204 is deflected.
Claims (17)
1. micro mirror comprises:
Runner plate, described runner plate have upper surface and the lower surface that has defined runner plate thickness;
Be coupled to the framework of described runner plate, wherein said framework comprises wall portion, and the height that is characterised in that wall is greater than described runner plate thickness; And
Hinge, it is connected to described framework and described runner plate, be used to make that described runner plate rotates around the axle that is limited by described hinge with respect to described framework, wherein, described runner plate, described framework and this three of described hinge are by with the continuous single piece of material manufacturing of a slice, gap width between described runner plate and the described wall portion is 0.2 micron or littler, and described hinge extends to described runner plate inside from described framework.
2. micro mirror as claimed in claim 1, wherein said material is a monocrystalline silicon.
3. micro mirror as claimed in claim 1, wherein said hinge is a torsionspring, the width of described hinge is less than the degree of depth of described hinge.
4. micro mirror as claimed in claim 1, the described upper surface of wherein said runner plate is a reflective surface will.
5. micro mirror as claimed in claim 1 further comprises the reflection horizon at the top that is positioned at described runner plate.
6. micro mirror as claimed in claim 1, the described wall portion of wherein said framework has 1 micron or littler width.
7. micro mirror as claimed in claim 1 further comprises the machinery plug, and when described runner plate had rotated predetermined angular, this machinery plug was used to stop the rotation of described runner plate with respect to described framework.
8. spatial light modulator comprises:
The micro mirror of a plurality of one-tenth arrays, each micro mirror in described array all comprises having the upper surface that defined runner plate thickness and at least one runner plate of lower surface, and comprises that described at least one runner plate that is connected to described micro mirror is used at least one hinge that makes described runner plate rotation; And
Supporting frame with a plurality of supporting walls, the height that is characterised in that wall is greater than described runner plate thickness, each described hinge all is connected at least one supporting wall, is used to support described hinge and described runner plate and each runner plate and the substrate that is connected to described supporting frame are separated; Wherein said runner plate, described supporting frame and this three of described hinge are by with the continuous single piece of material manufacturing of a slice, have 0.2 micron or littler gap between the edge of the upper surface of runner plate and the supporting wall of supporting frame, described hinge extends to described runner plate inside from described supporting frame.
9. array as claimed in claim 8, wherein a plurality of upper surfaces of a plurality of runner plates are polished with reflected light.
10. spatial light modulator as claimed in claim 8, wherein the reflection horizon is deposited on each upper surface that is used for catoptrical a plurality of runner plates.
11. spatial light modulator as claimed in claim 8 further comprises the control substrate, it is connected to described supporting frame, and has at least one electrode corresponding to each of a plurality of runner plates, is used to receive voltage and comes the controllably runner plate of deflection micro mirror.
12. spatial light modulator as claim 11, wherein hinge is divided into first and second portion with runner plate, make when the first of runner plate along with runner plate around the axle rotation that limits by hinge and when controlling substrate and move, the second portion of runner plate moves away from controlling substrate.
13. as the spatial light modulator of claim 11, wherein control substrate and further comprise addressing and control circuit, be used for optionally voltage being applied at least one electrode with the runner plate of deflection micro mirror controllably optionally.
14. spatial light modulator as claimed in claim 8, wherein the surface of the runner plate in the micro mirror array has constituted at least 85% of array surface area.
15. as the spatial light modulator of claim 14, wherein the surface of the runner plate in the micro mirror array has constituted at least 90% of array surface area.
16. spatial light modulator as claimed in claim 8, wherein the upper surface of runner plate is a rectangle.
17. as the spatial light modulator of claim 16, wherein the area of the upper surface of runner plate is 225 square microns.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US39038902P | 2002-06-19 | 2002-06-19 | |
| US60/390,389 | 2002-06-19 | ||
| US10/378,056 | 2003-02-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1688913A CN1688913A (en) | 2005-10-26 |
| CN100565268C true CN100565268C (en) | 2009-12-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200710128466XA Expired - Fee Related CN101093282B (en) | 2002-06-19 | 2003-05-30 | Reflective spatial light modulator |
| CNB038019353A Expired - Fee Related CN100565268C (en) | 2002-06-19 | 2003-05-30 | Reflective spatial light modulator |
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| Application Number | Title | Priority Date | Filing Date |
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| CN200710128466XA Expired - Fee Related CN101093282B (en) | 2002-06-19 | 2003-05-30 | Reflective spatial light modulator |
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| CN (2) | CN101093282B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10018723B2 (en) | 2012-07-26 | 2018-07-10 | Apple Inc. | Dual-axis scanning mirror |
| WO2014064606A1 (en) * | 2012-10-23 | 2014-05-01 | Primesense Ltd. | Production of micro-mechanical devices |
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2003
- 2003-05-30 CN CN200710128466XA patent/CN101093282B/en not_active Expired - Fee Related
- 2003-05-30 CN CNB038019353A patent/CN100565268C/en not_active Expired - Fee Related
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| CN101093282B (en) | 2010-06-02 |
| CN101093282A (en) | 2007-12-26 |
| CN1688913A (en) | 2005-10-26 |
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