CN100587831C

CN100587831C - Error correction system and method thereof

Info

Publication number: CN100587831C
Application number: CN200710102601A
Authority: CN
Inventors: 简国龙
Original assignee: MediaTek Inc
Current assignee: MediaTek Inc
Priority date: 2006-04-21
Filing date: 2007-04-23
Publication date: 2010-02-03
Anticipated expiration: 2027-04-23
Also published as: TWI334132B; CN101059993A; TWI334133B; TW200746078A; TWI334134B; TW200805298A; CN101059994A; CN100592411C; CN100587832C; TW200805297A; CN101075468A

Abstract

Disclosed is an error correction system, comprising: a demodulator for receiving and demodulating raw data to generate an ECC block; an on the fly PI ECC decoder, coupled to the demodulator, for performing a PI ECC operation on the ECC block; a data buffer, for storing the ECC block; a non-linear EDC check device, for performing a non-linear EDC operation to generate an EDC result; a syndrome generator for generating at least one syndrome according to a PI codeword and a PO codeword of the ECC block; an ECC decoder for performing an ECC operation according to the syndrome; and an EDC correctorfor correcting the EDC result according to a result of the ECC operation; wherein the syndrome comprises at least one of a PI syndrome and a PO syndrome, and the ECC decoder performs the ECC operation after the PI ECC operation.

Description

Error correcting system and method thereof

Technical field

The present invention is particularly to the error correcting system and the method thereof of CD-ROM drive relevant for error correcting system.

Background technology

Along with the progress of science and technology, the kind of CD and the data class that stores thereon also increase thereupon, so CD-ROM drive needs error-detecting and corrigendum mechanism to determine to read correct data.

Fig. 1 has illustrated the error correcting system 100 of correlation technique.As shown in Figure 1, error correcting system 100 comprises a data buffer 101, one detuner, 103, one syndrome generators 105 (syndromegenerator), a syndrome storer 107, an error correcting code (ECC:error correction code) demoder 109, one linear error-detecging code (EDC:error detection code) are confirmed element 111, an EDC storer 113 and EDC corrigendum device 115.In this example, when the data volume in being stored in data buffer 101 was enough decoded, the ECC block (ECC block) that is stored in the data area impact damper 101 was read out to carry out calculating of PI/PO syndrome and linear EDC.Simultaneously, if find mistake, then implement PI ECC action and be stored in misdata in the data buffer 101, and the syndrome that is stored in the syndrome storer 107 also is updated with correction.And the syndrome that is stored in the syndrome storer 107 is directly read in the ECC action of next direction (being PO in this example), rather than according to the data computation syndrome in the data buffer 101.Yet this class formation lacks the ECC of PI direction, so it has relatively poor usefulness.And such structure lacks the problem that can overcome frame lock simultaneous bias (frame sync shift).

Except aforesaid correlation technique, also have other correlation technique also to be developed, but also have other shortcoming because of other factors, these shortcomings can be summarized as follows.Calculate if system only has in advance (on the fly) PO syndrome, it can't overcome the frame lock simultaneous bias.And if system has EDC mechanism in advance, it also can't overcome the frame lock simultaneous bias.If system has last EDC mechanism, it also has relatively poor performance.Syndrome calculates if system has in advance, and it has higher cost.If system is at detuner and do not have memory element in advance between the PI ECC element, system can't overcome the frame lock simultaneous bias problem that causes because synchrodata loses, and can have relatively poor bandwidth because of the more positive period on the data buffer.(on the fly) expression data just processed before entering data buffer in advance.

Summary of the invention

Therefore, purpose of the present invention is for providing a kind of error correcting system, and it can be avoided above-mentioned shortcoming and keep above-mentioned advantage.

Embodiments of the invention have disclosed a kind of error correcting system, comprise: a detuner, in order to receive and the demodulation raw data to produce an ECC block; One PI syndrome generator in advance is coupled to described detuner, produces a PI syndrome according to the described ECC block from described detuner; One data buffer is in order to store described ECC block; One PO syndrome generator is in order to produce a PO syndrome according to the described ECC block in the described data buffer; One EDC confirms element, in order to produce an EDC result according to the described ECC block in the described data buffer; One ECC demoder, in order to according to described PI syndrome and described PO syndrome wherein at least one implement ECC action; And an EDC corrigendum device, correct described EDC result in order to result according to described ECC action.

Embodiments of the invention have also disclosed the error correction method thereof of this system of a kind of correspondence, comprise: (a) receive and the demodulation raw data to produce an ECC block; (b) produce a syndrome according to described ECC block from described step (a); (c) store described ECC block; (d) the PO code word according to the described ECC block that stores in the described step (c) produces a PO syndrome; (e) produce an EDC result according to the described ECC block that stores in the described step (c); (f) according to described PI syndrome and described PO syndrome wherein at least one implement ECC action; And the result who (g) moves according to described ECC corrects described EDC result.

Description of drawings

Fig. 1 has illustrated the calcspar of the error correcting system of correlation technique.

Fig. 2 has illustrated the calcspar according to the error correcting system of the first embodiment of the present invention.

Fig. 3 has illustrated the calcspar of error correcting system according to a second embodiment of the present invention.

Fig. 4 has illustrated the calcspar of the error correcting system of a third embodiment in accordance with the invention.

Fig. 5 has illustrated the calcspar of the error correcting system of a fourth embodiment in accordance with the invention.

Fig. 6 has illustrated the calcspar of error correcting system according to a fifth embodiment of the invention.

Fig. 7 has illustrated the calcspar of error correcting system according to a sixth embodiment of the invention.

Fig. 8 has illustrated the calcspar of error correcting system according to a seventh embodiment of the invention.

Fig. 9 has illustrated the calcspar according to the error correcting system of the eighth embodiment of the present invention.

Figure 10 has illustrated the calcspar according to the error correcting system of the ninth embodiment of the present invention.

Figure 11 has illustrated the calcspar according to the error correcting system of the tenth embodiment of the present invention.

Figure 12 has illustrated the calcspar according to the error correcting system of the 11st embodiment of the present invention.

Figure 13 has illustrated the calcspar according to the error correcting system of the 12nd embodiment of the present invention.

Figure 14 has illustrated the calcspar according to the error correcting system of the 13rd embodiment of the present invention.

Figure 15 has illustrated the calcspar according to the error correcting system of the 14th embodiment of the present invention.

Figure 16 has illustrated the calcspar according to the error correcting system of the 15th embodiment of the present invention.

Figure 17 has illustrated the calcspar according to the error correcting system of the 16th embodiment of the present invention.

Figure 18 has illustrated the calcspar according to the error correcting system of the 17th embodiment of the present invention.

Figure 19 has illustrated the calcspar according to the error correcting system of the 18th embodiment of the present invention.

Figure 20 has illustrated the calcspar according to the error correcting system of the 19th embodiment of the present invention.

Figure 21 has illustrated the process flow diagram of error correction method thereof of the error correcting system of corresponding diagram 2.

Figure 22 has illustrated the process flow diagram of error correction method thereof of the error correcting system of corresponding diagram 5.

Figure 23 has illustrated the process flow diagram of error correction method thereof of the error correcting system of corresponding diagram 6.

Figure 24 has illustrated the process flow diagram of error correction method thereof of the error correcting system of corresponding diagram 8.

Figure 25 has illustrated the process flow diagram of error correction method thereof of the error correcting system of corresponding diagram 9～Figure 25.

Drawing reference numeral:

Error correcting system: 100,700,1100,1200,1300,1400,1500,1600,1700,1800,1900,2000,2100,2200,2300,2400,2500,2600,2700,2800.

Data buffer: 101,501,1101,1801,2201,2501.

Detuner: 103,503,1103,1803,2203,2503.

Syndrome generator: 105,1107.

Syndrome generator in advance: 2507.

Syndrome storer: 107,1109,2509,2511.

Storer: 2509,2511.

ECC demoder: 109,513,1111,1405,1813,2215,2513.

Linear EDC confirms element: 111.

EDC storer: 113,605,1113,1411,1817,2217,2515.

EDC corrects device: 115,603,1115,1413,1819,2219,2517.

EDC confirms element in advance: 601,1105,2205,2505.

PI ECC demoder in advance: 1201.

PI ECC syndrome generator in advance: 2001,2301,2701.

Memory component: 1301,1401,1203.

PI syndrome storer: 505,1409,1807,2209.

PI syndrome generator: 1407.

PI syndrome generator in advance: 507,1805,2207.

PO syndrome generator: 509,1403,1805,1809,2211.

Non-linear EDC confirms element: 1501,1601,1701,1815.

PO syndrome storer: 1811,511,2213.

CD: 1102.

Embodiment

In the middle of instructions and claims, used some vocabulary to censure specific element.The person with usual knowledge in their respective areas should understand, and hardware manufacturer may be called same element with different nouns.This specification and claims book is not used as distinguishing the mode of element with the difference of title, but the criterion that is used as distinguishing with the difference of element on function.Be an open term mentioned " comprising " in the middle of instructions and claims in the whole text, so should be construed to " comprise but be not limited to ".In addition, " couple " speech and comprise any indirect means that are electrically connected that directly reach at this.Therefore, be coupled to one second device, then represent described first device can directly be electrically connected in described second device, or be electrically connected to described second device indirectly through other device or connection means if describe one first device in the literary composition.

Fig. 2 has illustrated the calcspar according to the error correcting system of the first embodiment of the present invention.As shown in Figure 2, error correcting system 1100 comprises a data buffer 1101, a detuner 1103, an element 1105 (as mentioned above, representing that in advance data are processed before entering data buffer) of (onthe fly) EDC affirmation in advance, a syndrome generator 1107, a syndrome storer 1109, an ECC demoder 1111, an EDC storer 1113 and EDC corrigendum device 1115.Detuner 1103 is in order to receive also demodulation comprises data, PI code word (PI codeword) and PO code word (PO codeword) with generation from the raw data of CD 1102 ECC block.EDC confirms that element 1105 is in order to operate to produce an EDC result according to implementing EDC from the data of detuner 1105 in advance.Data buffer 1101 is used to store ECC block and EDC result.Syndrome generator 1107 produces PI and PO syndrome according to the PI code word and the PO code word that are stored in the data buffer 1101.Syndrome storer 1109 is in order to store PI syndrome and PO syndrome.ECC demoder 111 is in order to according to the data implementation errors corrigendum to the ECC block in the data impact damper 1101 of the PI syndrome in the syndrome storer 1109 and PO syndrome, and revises PI syndrome and PO syndrome in the syndrome storer 1109 according to the result that corrects errors in printing (errata result).EDC storer 1113 is in order to buffering EDC result.EDC corrigendum device 1115 is according to the correction EDC result as a result that corrects errors in printing from ECC demoder 1111.

In this example, the ECC of next direction action (being the error correction action) is directly to read from syndrome storer 1109.In addition, syndrome storer 1109 and EDC storer 1113 can be integrated into data buffer 1101, and this type of variation also should be within the scope of the present invention.

The action of error correcting system 1100 can be summarized as follows: 1103 demodulated data of detuner are transferred into EDC affirmation element 1105 and data buffer 1101 in advance, and EDC result is stored to data buffer 1101.Then after the data of enough decodings are stored to data buffer 1101, begin to carry out following action: the EDC result that data buffer 1101 stores is read and is stored to EDC storer 1113.The ECC block that has data, PI, PO code word in the data buffer 1101 is read, and PI, PO syndrome are produced and be stored to syndrome storer 1109 according to PI, PO code word, and the ECC of first direction action is implemented.If in data buffer 1101, find misdata, just right the wrong, syndrome in the while ECC demoder 1111 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 1113 also correct device 1115 through EDC and are updated.Then, the syndrome of syndrome storer 1109 is directly read in the ECC of next direction action, and the ECC block in can read data buffer 1101 and recomputating.What the ECC action of both direction continued hockets, till reaching the predetermined action number of times or no longer including the misdata existence.

Fig. 3 has illustrated the calcspar of error correcting system 1200 according to a second embodiment of the present invention.With error correcting system 1100 by comparison, error correcting system 1200 also comprises one, and PI ECC demoder 1201 is (as previously mentioned in advance, be meant that in advance data are just processed before entering data buffer), in order to directly to implementing PI ECC action from the data of detuner 1103 and according to the ECC result in the correction data buffer 1101 as a result of correcting errors in printing.Therefore, the action of error correcting system 1200 has partly different with error correcting system 1100.For error correcting system 1200, except above-mentioned element, also be sent to PI ECC demoder 1201 in advance from the data of detuner 1103, and EDC result is stored in the data buffer 1101.1201 pairs of data that are stored in the data buffer 1101 of PI ECC demoder are implemented PI ECC action in advance in advance, and EDC confirms that element 1105 is directly to implementing the EDC action from the data of detuner 1103 in advance.Detailed action and Fig. 2 after the data of enough decodings are stored to data buffer 1101 are similar, and can be by pushing away easily in the above-mentioned explanation, so do not repeat them here.

Fig. 4 has illustrated the calcspar of the error correcting system 1300 of a third embodiment in accordance with the invention.With error correcting system 1200 by comparison, error correcting system 1300 also comprises at EDC in advance confirms element 1105 and the memory element between the PI ECC demoder 1,201 1301 in advance.Therefore, the some row from the demodulating data of detuner 1103 are stored in the memory element 1301.ECC block in 1201 pairs of memory elements 1301 of PI ECC demoder is implemented PI ECC action in advance.And EDC confirms that element 1105 also is coupled to memory component 1301 the master data in the ECC block is implemented the EDC action to produce EDC result in advance.Other action of error correcting system 1300 is identical with error correcting system 1200, so do not repeat them here.

Fig. 5 has illustrated the calcspar of the error correcting system 1400 of a fourth embodiment in accordance with the invention.Be similar to error correcting system 1200, error correcting system 1400 comprises a data buffer 1101, a detuner 1103, an element 1105 and of EDC affirmation in advance PI ECC demoder 1201 in advance.Yet error correcting system 1400 also comprises a memory element 1401, a PO syndrome 1403, an ECC demoder 1405, a PI syndrome generator 1407, a PI syndrome storer 1409, an EDC storer 1411 and EDC corrigendum device 1413.Detuner 1103 in order to receive and demodulation raw data (raw data) to produce the ECC block.EDC confirms that element 1105 is in order to implement the EDC action to produce EDC result to the master data of ECC block in advance.Data buffer 1101 is in order to store ECC block and EDC result.PI ECC demoder 1201 is in order to directly implementing a PI ECC action in advance to the data from the ECC block of detuner 1103 in advance, and the EDC result in the correction data buffer 1101 as a result of correcting errors in printing that is produced according to PI ECC action in advance.Memory element 1401 is in order to the part row of temporary transient storage from the ECC block of data buffer 1101.PO syndrome generator 1403 is in order to produce the PO syndrome according to the PO code word in the memory element 1401.PI syndrome storer 1409 is in order to store the part PI syndrome from PI syndrome generator 1407.ECC demoder 1405 is according to PI syndrome or the corrigendum of PO syndrome implementation errors.PI syndrome generator 1407 is in order to produce the PI syndrome according to the ECC block in the memory element 1401.EDC storer 1411 is in order to store EDC result.EDC corrigendum device 1413 is in order to correct EDC result according to the result that corrects errors in printing from ECC demoder 1405.

The action of error correcting system 1400 can be summarized as follows: be transferred into real-time EDC from the demodulating data of detuner 1103 and confirm element 1105, PI ECC demoder 1201 and data buffer 1101 in advance.PI ECC demoder 1201 is directly implemented a PI ECC action in advance to the data from the ECC block of detuner 1103 in advance, EDC confirms that element 1105 calculates EDC result in advance, wherein EDC result is stored to data buffer 1101, and EDC confirms that element 1105 upgrades EDC result according to the result that corrects errors in printing of PI ECC in advance in advance.Then after the data of enough decodings were stored to data buffer 1101, begin to carry out following action: EDC result was read out and is stored in the EDC storer 1411 from data buffer 1101.The some of ECC block row are stored in the memory element 1401, and PO ECC action is performed on the column data of memory element 1401 with the generation result that corrects errors in printing.Then, the misdata in the data buffer 1101 corrected and EDC corrigendum device 1413 according to the EDC result in the Data Update EDC storer 1411 of correcting errors in printing.Then, PI syndrome generator 1407 reads the capable data of having corrected to produce the PI syndrome from memory element 1401, wherein the PI syndrome is stored in the PI syndrome storer 1409, after all data were handled by PO ECC action, the PI syndrome was read from PI syndrome storer 1409 and PI ECC action is implemented.

Then, the misdata in memory element 1401 and the data buffer 1101 be read and the EDC storer in EDC result see through EDC corrigendum device 1413 and be updated.PI and PO ECC action can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.And error correcting system 1400 also can comprise a memory component, and it confirms element 1105 and in advance between the PIECC demoder 1201 at EDC in advance.

Fig. 6 is identical with the embodiment of Fig. 3 to Fig. 5 to embodiment shown in Figure 8, its difference is that Fig. 3 confirms that to EDC shown in Figure 5 element is the element of EDC affirmation in advance, just EDC confirms that element is positioned at before the data buffer, but to embodiment shown in Figure 8, EDC confirms that element is positioned at after the data buffer at Fig. 6.Therefore, Fig. 6 is different in action to the embodiment of embodiment shown in Figure 8 and Fig. 3 to Fig. 5.

Fig. 6 has illustrated the calcspar of error correcting system 1500 according to a fifth embodiment of the invention.Please refer to Fig. 3 and Fig. 6, the structure similar of Fig. 3 and Fig. 6, but error correcting system 1500 has the non-linear EDC that is positioned at after the data buffer 1101 confirms element 1501, rather than be positioned at data buffer 1101 affirmation of EDC in advance element 1105 before, so error correcting system 1200 has different actions with error correcting system 1500.

For error correcting system 1500,1103 demodulated data of detuner are transferred into data buffer 1101 and PI ECC demoder 1201 in advance.PI ECC demoder 1201 directly moves to implementing PI ECC from the data of detuner 1103 in advance then.Then after the data of enough decodings are stored to data buffer 1101, begin to carry out following action: the ECC block that comprises data and PI/PO code word in the data buffer 1101 is read, and PI, PO syndrome are produced and be stored to syndrome storer 1109 according to PI, PO code word simultaneously.And the ECC of the one one direction action is implemented.When being read from data buffer 1101 with the ECC block, non-linear EDC confirms that 1501 pairs of ECC blocks of element implement a non-linear EDC action producing an EDC result, and EDC result is stored in the EDC storer 1113.If realize that wrong data are just corrected in the data buffer 1101, simultaneously corresponding syndrome see through in the ECC demoder 1111 a syndrome more positive circuit (not illustrating) be updated, and the EDC result in the EDC storer 1113 sees through EDC corrigendum device 1115 and is updated.Then, the syndrome that is stored in the syndrome storer 1109 is directly read in the ECC of next direction action (being PO in this example), rather than according to the data computation syndrome in the data buffer 1101.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

It is noted that, about the detailed description of linear and non-linear EDC action, can be with reference to the patent of Application No. the 11/531280th, this patent is applied for by same Applicant and identical inventor.

Fig. 7 has illustrated the calcspar of error correcting system 1600 according to a sixth embodiment of the invention.The structure similar of Fig. 4 and Fig. 7, but error correcting system 1600 has the non-linear EDC that is positioned at after the data buffer 1101 confirms element 1601, rather than be positioned at data buffer 1101 affirmation of EDC in advance element 1105 before, so error correcting system 1300 has different actions with error correcting system 1600.1103 demodulated data of detuner are stored to memory component 1203.Memory component 1203 is in order to store some row of ECC block, and PI ECC demoder 1201 moves with the ECC block after the generation corrigendum in order to the ECC block in the memory component 1203 is implemented PI ECC in advance then.Error correcting system 1600 ensuing actions shown in Figure 7 and error correcting system 1500 shown in Figure 6 are similar, so do not repeat them here.With prior art shown in Figure 1 by comparison, error correcting system 1600 shown in Figure 7 also comprises a PI ECC demoder 1201 and a memory component 1203 in advance.And the EDC in the error correcting system 1600 shown in Figure 7 confirms that element is that non-linear EDC confirms that element rather than linear EDC confirm element.Therefore, error correcting system 1600 is because PI ECC demoder 1201 has preferable usefulness in advance, and can reduce bandwidth because of memory component 1203.And the use of non-linear EDC affirmation element 1601 also can assist to overcome the problem of frame lock simultaneous bias.

Fig. 8 has illustrated the calcspar of error correcting system 1700 according to a seventh embodiment of the invention.Please refer to Fig. 5 and Fig. 8, the structure similar of Fig. 5 and Fig. 8, but error correcting system 1700 has the non-linear EDC that is positioned at after the data buffer 1101 confirms element 1701, rather than be positioned at data buffer 1101 affirmation of EDC in advance element 1105 before, so error correcting system 1400 has different actions with error correcting system 1700.

For

error correcting system

1700,1103 demodulated data of detuner are transferred into data buffer 1101 and PI ECC demoder 1201 in advance.PI ECC demoder 1201 directly moves to implementing PI ECC from the data of detuner 1103 in advance then.Then after the data of enough decodings are stored to data buffer 1101, begin to carry out following action: the ECC block is read from data buffer 1101, and 1701 pairs of ECC blocks of non-linear EDC affirmation element are implemented non-linear EDC action to produce an EDC result, and this EDC result is stored in the EDC storer 1411.

The part row of the ECC block in the data buffer 1101 is read and is stored to memory component 1401, and PO ECC action is implemented in the line data of memory component 1401 with the generation result that corrects errors in printing.EDC result in the EDC storer 1411 sees through EDC corrigendum device 1413 and is updated according to the result that corrects errors in printing then.Then, PI syndrome generator reads the capable data of being corrected with generation PI syndrome from memory component 1401, and this PI syndrome is stored in the PI syndrome storer 1409.After all line data were all handled by PO ECC action, the PI syndrome was read and PI ECC action is performed from PI syndrome storer 1409.Then, the misdata in memory component 1401 and the data buffer 1101 corrected and EDC storer 1411 in EDC result see through EDC corrigendum device 1413 by corresponding renewal.

Fig. 9 to Figure 12 has illustrated according to other embodiments of the invention, and its EDC that also has after the data buffer confirms element.Fig. 9 has illustrated the error correcting system 1800 according to the eighth embodiment of the present invention.As shown in Figure 9, error correcting system 1800 comprises a data buffer 1801, a detuner 1803, one PI syndrome generator 1805, a PI syndrome storer 1807, a PO syndrome generator 1809, a PO syndrome storer 1811, an ECC demoder 1813, one non-linear EDC confirm element 1815, an EDC storer 1817 and EDC corrigendum device 1819 in advance.Detuner 1803 in order to receive and demodulation from the raw data of CD with generation comprise data, PI code word and PO code word the ECC block.Data buffer 1801 is in order to store the ECC block.PI syndrome generator 1805 produces the PI syndrome in order to the PI code word according to the ECC block in advance.PI syndrome storer 1807 is in order to store the PI syndrome.PO syndrome generator 1805 produces the PO syndrome in order to the PO code word according to the ECC block.Non-linear EDC confirms that element 1815 is in order to implement non-linear EDC action to produce EDC result to the master data of ECC block.

PO syndrome storer 1811 is in order to store the PO syndrome.ECC demoder 1813 is implemented PI ECC action producing the PIECC result that corrects errors in printing according to the PI syndrome in the PI syndrome storer 1807 to the ECC block, and according to the PO syndrome in the PO syndrome storer 1811 the ECC block is implemented POI ECC action to produce the PO ECC result that corrects errors in printing.EDC storer 1817 is in order to store EDC result.EDC corrigendum device 1819 is corrected EDC result according to result or the PO ECC result that corrects errors in printing that corrects errors in printing of the PI ECC from ECC demoder 1813.

The action of error correcting system 1800 can be summarized as follows: the data from detuner 1803 are transferred into PI syndrome generator 1805 and data buffer 1801 in advance, and the PI syndrome is stored in the PI syndrome storer 1807.Then after the data of enough decodings are stored to data buffer 1801, begin to carry out following action.ECC demoder 1813 is implemented PI ECC action according to the PI syndrome in the PI syndrome storer 1807 to the data in the data impact damper 1801, while ECC demoder 1813 interior syndromes are the corresponding syndrome that upgrades in the PI syndrome storer 1807 of positive circuit more, and the device of the EDC corrigendum simultaneously 1819 corresponding EDC results that upgrade in the EDC storeies 1817.

And, the ECC block is read from data buffer 1801, and PO syndrome generator 1809 produces the PO syndrome, it is stored in the PO syndrome storer 1811, and ECC demoder 1813 and non-linear EDC affirmation element 1815 are implemented PO ECC action and the master data in the data impact damper 1801 are implemented non-linear EDC action according to the syndrome result respectively, and the result of wherein non-linear EDC action is stored in the EDC storer 1817.Misdata in the ECC demoder 1813 corrigendum data buffers 1801, the syndromes syndrome in the corresponding renewal syndrome of the positive circuit storer 1807 more in the ECC demoder 1813 simultaneously, and the EDC results in the device of the EDC corrigendum simultaneously 1819 corresponding renewal EDC storeies 1817.

The syndrome that is stored in the syndrome storer 1811 is directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 1801.PI and PO ECC action can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

PI syndrome storer 1807 can be integrated into data buffer 1801, as shown in figure 10.Figure 10 has illustrated the calcspar according to the error correcting system 1900 of the ninth embodiment of the present invention.Except PI syndrome storer 1807, error correcting system shown in Figure 10 1900 is roughly the same with the error correcting system 1800 that Fig. 9 illustrates, so the connected mode of the element of error correcting system 1900 and action can be different with error correcting system 1800.

The action of error correcting system 1900 can be summarized as follows.Demodulating data from detuner 1803 is transferred into PI syndrome generator 1805 and data buffer 1801 in advance, and the PI syndrome is stored in the data buffer 1801.Then after the data of enough decodings are stored to data buffer 1801, begin to carry out following action: ECC demoder 1813 is implemented data in PI ECC action and the corrigendum data buffer 1801 according to being stored in PI syndromes in the data buffer 1801, syndrome in the while ECC demoder 1813 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 1817 also correct device 1819 through EDC and are updated.Then the ECC block is read out and PO syndrome generator 1809 produces the PO syndrome according to the ECC block from data buffer 1801, and the PO syndrome is stored in the PO syndrome storer 1811.After PO syndrome generator 1809 calculated the PO syndrome, PO ECC action was performed.ECC demoder 1813 and non-linear EDC affirmation element 1815 are implemented the POECC action and the data in the data impact damper 1801 are implemented non-linear EDC action according to the syndrome result respectively, and the result of wherein non-linear EDC action is stored in the EDC storer 1817.Misdata in the ECC demoder 1813 corrigendum data buffers 1801, more the PO syndrome in the corresponding renewal of the positive circuit PO syndrome storer 1811 and the PI syndrome in the data buffer 1801 of syndromes in the ECC demoder 1813 simultaneously, and the EDC results in the device of the EDC corrigendum simultaneously 1819 corresponding renewal EDC storeies 1817.

The ECC action of next direction is directly read and is stored in the PO syndrome storer 1811 or the syndrome in the data buffer 1801, rather than according to the data computation syndrome in the data buffer 1801.PI and PO ECC action can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

PI syndrome generator 1805 can be integrated in advance in the PI ECC demoder, as shown in figure 11 in advance.Figure 11 has illustrated the calcspar according to the error correcting system 2000 of the tenth embodiment of the present invention.In this embodiment, be transferred into PI ECC syndrome generator 2001 and data buffer 1801 in advance from the frequcny modulation data of separating of separating frequency modulator 1803, and the syndrome generator in the PI ECC syndrome generator 2001 produces the PI syndrome and is stored within the PI syndrome storer 1807 in advance.PI ECC syndrome generator 2001 is directly to implementing PI ECC action from the data of detuner 1803 in advance, and the PI syndrome in the corresponding correction of the positive circuit PI syndrome storer 1807 more of the syndrome in the PI ECC syndrome generator 2001 in advance.

Then after the data of enough decodings are stored to data buffer 1801, begin to carry out following action.The ECC block is read from data buffer 1801, and PO syndrome generator 1809 produces the PO syndrome and is stored in the PO syndrome 1811.ECC demoder 1813 and non-linear EDC confirm that element 1815 implements the ECC action and the non-linear EDC action of first direction respectively on the data in data buffer 1801 according to the syndrome result.The result of wherein non-linear EDC action is stored in the EDC storer 1817.Then, misdata in the ECC demoder 1813 corrigendum data buffers 1801, syndrome in the ECC demoder 1813 is corresponding PI and the PO syndrome of correcting in PI syndrome storer 1807 and the PO syndrome storer 1811 of positive circuit more, and the EDC results in the EDC storer 1817 also see through EDC corrigendum device 1819 and are updated.The syndrome that is stored in the syndrome storer 1807 is directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 1801.PI and PO ECC action can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

PI syndrome storer 1807 among Figure 11 can be integrated into data buffer 1801, as shown in figure 12.Figure 12 has illustrated the calcspar according to the error correcting system 2100 of the 11st embodiment of the present invention.In this embodiment, the PI syndrome is stored in the data buffer 1801 rather than PI syndrome storer 1807.Other action is identical with the action of error correcting system 2000, so do not repeat them here.

Figure 13 to Figure 15 has illustrated the calcspar of other embodiments of the invention.These embodiment have the element of EDC affirmation in advance before data buffer, syndrome generator or is the ECC element in advance, and has components identical after data buffer.

Figure 13 has illustrated the calcspar according to the error correcting system 2200 of the 12nd embodiment of the present invention.As shown in figure 13, error correcting system 2200 comprise a data buffer 2201, a detuner 2203, in advance EDC confirm element 2205, PI syndrome generator 2207, a PI syndrome storer 2209, a PO syndrome generator 2211, a PO syndrome storer 2213, an ECC demoder 2215, an EDC storer 2217 and EDC corrigendum device 2219 in advance.Detuner 2213 answers demodulation to comprise the ECC block of data, PI code word and PO code word with generation from the raw data of CD in order to reception.In advance EDC confirm element 2205 in order to implement EDC action on from the master data of detuner 2203 to produce an EDC result.Data buffer 2203 is in order to store ECC block and EDC result.PI syndrome generator 2207 is in order to produce the PI syndrome according to the ECC block from detuner 2201 in advance.PO syndrome storer 2209 is in order to store the PO syndrome from PO syndrome generator 2213.ECC demoder 2215 is carried out the ECC action with the generation result that corrects errors in printing according to PI or PO syndrome.EDC storer 2217 is in order to store EDC result.EDC corrigendum device 2219 is in order to correct EDC result according to the result that corrects errors in printing from ECC demoder 2215.

The action of error correcting system 2200 can be as described below.Be sent to from the demodulating data of detuner 2203 that the PI syndrome produces circuit 2207, EDC confirms element 2205 and data buffer 2201 in advance, wherein the PI syndrome is stored in the PI syndrome storer 2209 and EDC result is stored in the data buffer 2201.Then after the data of enough decodings are stored to data buffer 2201, begin to carry out following action.

EDC result in the data buffer 2201 is read and is stored in the EDC storer 2217.ECC demoder 2215 is implemented the ECC action of a direction according to being stored in PI syndrome storer 2209 interior PI syndromes, simultaneously the syndrome in the ECC demoder 2215 more positive circuit (not illustrating) upgrade PI and PO syndrome in PI syndrome storer 2209 and the PO syndrome storer 2213, the EDC results in the EDC storer 2217 also see through EDC corrigendum device 2219 and are updated simultaneously.ECC block in the data buffer 2201 is read and PO syndrome generator 2211 calculates the PO syndromes and is stored in the PO syndrome storer 2213.After the ECC of direction action was done, the syndrome that is stored in

syndrome storer

2209 and 2211 was directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 2201.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

Figure 14 has illustrated the calcspar of the error correcting system 700 of the 13 embodiment according to the present invention.As shown in figure 14, error correcting system 700 comprise a data buffer 501, a detuner 503, in advance EDC confirm element 601, PI syndrome generator 507, a PI syndrome storer 505, a PO syndrome generator 509, a PO syndrome storer 511, an ECC demoder 513, an EDC storer 605 and EDC corrigendum device 603 in advance.ECC demoder 513 is carried out the ECC action with the generation result that corrects errors in printing according to PI or PO syndrome.EDC storer 605 is in order to store EDC result.EDC corrigendum device 603 is in order to correct EDC result according to the result that corrects errors in printing from ECC demoder 513.

The action of error correcting system 700 can be as described below.Be sent to from the demodulating data of detuner 503 that the PI syndrome produces circuit 507, EDC confirms element 601 and data buffer 501 in advance, wherein the PI syndrome is stored in the PI syndrome storer 505 and EDC result is stored in the data buffer 501.Then after the data of enough decodings are stored to data buffer 501, begin to carry out following action.

EDC result in the data buffer 501 is read and is stored in the EDC storer 605.ECC demoder 513 is implemented the ECC action of a direction according to being stored in data buffer 501 interior PI syndromes, simultaneously the syndrome in the ECC demoder 513 more positive circuit (not illustrating) upgrade PI and PO syndrome in the syndrome storer 511, the EDC results in the EDC storer 605 also see through EDC corrigendum device 603 and are updated simultaneously.ECC block in the data buffer 501 is read and PO syndrome generator 509 calculates the PO syndromes and stores in the syndrome storer 511.After the ECC of direction action was done, the syndrome that is stored in the syndrome storer 511 was directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 501.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

Figure 15 has illustrated the calcspar according to the error correcting system 2300 of the 14th embodiment of the present invention.With the error correcting system 2200 shown in Figure 13 by comparison, error correcting system 2300 has more a PI ECC syndrome generator 2301 in advance, and PI syndrome generator 2207 is integrated in advance in the PI ECC syndrome generator 2301 in advance.So the annexation of

error correcting system

2200 and 2300 is different with action.

The action of error correcting system 2300 can be as follows: from the demodulating data of detuner 2203 be sent in advance PI ECC syndrome generator 2301, EDC confirms element 2205 and data buffer 2201 in advance, wherein the PI syndrome is stored in the PI syndrome storer 2209 and EDC result is stored in the data buffer 2201.Then after the data of enough decodings are stored to data buffer 2201, begin to carry out following action.EDC results in the data buffer 2201 are read and are stored in the EDC storer 2217, and PO syndrome generator 2211 calculates the PO syndromes and is stored in the PO syndrome storer.ECC demoder 2215 is implemented the ECC action of a direction according to the PO syndrome, syndrome in the while ECC demoder 2215 more positive circuit (not illustrating) upgrades corresponding PO syndromes in the PO syndrome storer 2213, and while EDC storer 2217 interior EDC results also see through EDC corrigendum device 2219 and are updated.

Then ECC demoder 2215 is implemented the ECC action of other direction according to the PI syndrome, syndrome in the while ECC demoder 2215 more positive circuit (not illustrating) upgrades corresponding syndromes in the syndrome storer 2213, and while EDC storer 2217 interior EDC results also see through EDC corrigendum device 2219 and are updated.The syndrome that is stored in PI syndrome storer 2209 and the PO syndrome storer 2211 is directly read in the ECC action of next direction.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

PI syndrome storer 2209 in the error correcting system 2300 can be integrated in the data buffer, as shown in figure 16.Figure 16 has illustrated the calcspar according to the error correcting system 2400 of the 15th embodiment of the present invention.In error correcting system 2400, be stored in the data buffer 2201 from the PI syndrome of PI ECC syndrome generator 2301 in advance, rather than PI syndrome storer 2209.Because the action of error correcting system 2400 can be pushed away easily by the description of error correcting system 2300 and the wrong more structure of locking system 2400, so do not repeat them here.

Figure 17 to Figure 20 has illustrated the calcspar of other embodiments of the invention.These embodiment have the element of EDC affirmation in advance before data buffer, a syndrome generator or a syndrome storer, and after data buffer, have components identical.

Figure 17 has illustrated the calcspar according to the error correcting system of the 16th embodiment of the present invention.As shown in figure 17, error correcting system 2500 comprise a data buffer 2501, a detuner 2503, in advance EDC confirm device 2505, syndrome generator 2507,

storer

2509 and 2511, an ECC demoder 2513, an EDC storer 2515 and EDC corrigendum device 2517 in advance.Detuner 2503 answers demodulation to comprise the ECC block of data, PI code word and PO code word with generation from the raw data of CD in order to reception.Data buffer 2501 is in order to store the ECC block.Syndrome generator 2507 is in order to produce syndrome according to PI code word or PO code word in advance.Storer 2509 is in order to store from the syndrome of syndrome generator 2507 in advance.Storer 2511 is in order to store the syndrome from data buffer 2511.ECC demoder 2513 is in order to implement PI or PO ECC action to produce PI or the PO result that corrects errors in printing according to being stored in syndromes in the storer 2511.EDC storer 2515 is in order to store the EDC result from data buffer 2501.EDC corrigendum device 2517 is in order to correct EDC result according to suppressing the mistake result from the PI of ECC demoder 2517 or PO.

The action of error correcting system 2500 can be summarized as follows.From the demodulating data of detuner 2503 be transferred into data buffer 2501, EDC confirms device 2505, syndrome generator 2507 in advance in advance.Syndrome result and EDC result are stored in the data buffer 2501.

Then after the data of enough decodings are stored to data buffer 2501, begin to carry out following action.EDC result is read to EDC storer 2515.The syndrome result is read to storer 2511, ECC demoder 2513 is implemented the ECC action of a direction, syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 2515 also correct device 2517 through EDC and are updated.Till this kind action will last till that each row all is updated.

After all row have all been corrected, ECC demoder 2513 is implemented the ECC action of other direction according to PO syndrome result, syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 2515 also correct device 2517 through EDC and are updated.Till this kind action will last till that each provisional capital is updated.

All provisional capitals processed intact after, the syndrome that is stored in the storer 2511 is directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 2501.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

The syndrome result of the storer 2511 shown in the error correcting system 2500 is not limited to be stored to data buffer 2501, and as shown in figure 18, so the annexation of

error correcting system

2500 and 2600 can be different with action.Figure 18 has illustrated the calcspar according to the error correcting system of the 17th embodiment of the present invention.The action of error correcting system 2500 can be summarized as follows.From the demodulating data of detuner 2503 be transferred into data buffer 2501, EDC confirms device 2505, syndrome generator 2507 in advance in advance.The syndrome result is stored in storer 2509, and EDC result is stored in the data buffer 2501.

Then after the data of enough decodings are stored to data buffer 2501, begin to carry out following action.EDC result is read to EDC storer 2515.ECC demoder 2513 is implemented the ECC action of a direction according to the syndrome in the storer 2509, syndrome in the while ECC demoder 2513 is positive circuit (not illustrating) updated stored device 2509 interior corresponding syndromes more, and the EDC results in the EDC storer 2515 also are updated through EDC corrigendum device 2517 simultaneously.Till this kind action will last till that each row all is updated.

Error correcting system 2500 also can comprise a PI ECC syndrome generator 2701 in advance, as shown in figure 19.Figure 19 has illustrated the calcspar according to the error correcting system 2700 of the 18th embodiment of the present invention, and its action is as follows.From the demodulating data of detuner 2503 be transferred into data buffer 2501, EDC confirms device 2505 and syndrome generator 2507 in advance in advance.Syndrome result and EDC result are stored in the data buffer 2501.

PI ECC syndrome generator 2701 is implemented PI ECC action to produce syndrome result and EDC result according to the syndrome of syndrome generator to the ECC block in the data impact damper 2501 in advance, all is stored in the data buffer 2501.Syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome in the syndrome storer, and while data buffer 2501 interior EDC results also see through EDC corrigendum device 2517 and are updated.

Then after the data of enough decodings are stored to data buffer 2501, begin to carry out following action.The syndrome result is read to storer 2511, ECC demoder 2513 is implemented the ECC action of a direction, syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 2515 also correct device 2517 through EDC and are updated.

PI syndrome result is read to storer 2511 then, ECC demoder 2513 is implemented the ECC action of other direction, syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 2515 also correct device 2517 through EDC and are updated.

The syndrome that is stored in the storer 2511 is directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 2501.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

The syndrome result of storer 2511 is not limited to be stored to data buffer 2501, and as shown in figure 20, so the action of error correcting system 2700 and 2800 and annexation are different.Figure 20 has illustrated the calcspar according to the error correcting system 2800 of the 19th embodiment of the present invention, and its action can be as described below.From the demodulating data of detuner 2503 be transferred into data buffer 2501, EDC confirms device 2505 and syndrome generator 2507 in advance in advance.

PI ECC syndrome generator 2701 is implemented PI ECC action with the syndrome in the updated stored device 2509 according to the syndrome of syndrome generator to the ECC block in the data impact damper 2501 in advance.The syndrome result is stored in storer 2509 and EDC result is stored in the data buffer 2501.Syndrome in the while ECC demoder 2513 is positive circuit (not illustrating) updated stored device 2509 interior corresponding syndromes more, and 2515 EDC result also is updated through EDC corrigendum device 2517 in the EDC storer simultaneously.

Then after the data of enough decodings are stored to data buffer 2501, begin to carry out following action.EDC result is read to EDC storer 2515.ECC demoder 2513 is implemented the ECC action of other direction according to the syndrome in the storer 2509, syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 2515 also correct device 2517 through EDC and are updated.

PI syndrome result is read to storer 2509 then, ECC demoder 2513 is implemented the ECC action of a direction, syndrome in the while ECC demoder 2513 more positive circuit (not illustrating) upgrades corresponding syndrome, and the EDC results in the while EDC storer 2515 also correct device 2517 through EDC and are updated.

The syndrome that is stored in the storer 2509 is directly read in the ECC action of next direction, rather than according to the data computation syndrome in the data buffer 2501.The ECC action of two directions can continue alternately to carry out till the execution number of times reaches a predetermined number or do not have misdata to exist.

Figure 21 has illustrated the error correction method thereof of error correcting system shown in Figure 2 1100.The method comprises:

Step 3001: reception and demodulation raw data are to produce an ECC block;

Step 3003: implement EDC action to produce an EDC result according to the data of described ECC block;

Step 3005: store described ECC block and described EDC result;

Step 3007: a PI code word and a PO code word according to the described ECC block that stores produce at least one syndrome;

Step 3009: implement ECC action according to described syndrome;

Step 3011: according to the result of described ECC action to correct described EDC result.

Action will constantly replace and repeat up to the quantity that repeats to a predetermined value or till not having the misdata existence according to the ECC of PI or PO syndrome.

If the method is corresponding to error correcting system shown in Figure 3 1200, it more comprises: to implement PI ECC action from the ECC block of step 3001, with the EDC result of correction as a result who rights the wrong data and move according to PI ECC.

If the method is corresponding to error correcting system shown in Figure 4, it more comprises: store the ECC block from step 3001, and implement PI ECC action on the ECC block that stores.And step 3003 is more implemented the EDC action to produce EDC result after PI ECC action.

Other detailed features has been exposed in the middle of the description of Fig. 2 to Fig. 4, so do not repeat them here.

Figure 22 has illustrated the error correction method thereof of corresponding error correcting system 1400 shown in Figure 5, and it comprises:

Step 3101: reception and demodulation raw data are to produce an ECC block;

Step 3103: implement EDC action to produce an EDC result according to the data of described ECC block;

Step 3105: store ECC block and described EDC result;

Step 3107: described ECC block is implemented PI ECC action, correcting described ECC block, and correct described EDC result in order to a result according to described PI ECC action;

Step 3109: store a part of described storage ECC block;

Step 3111: the PO code word according to the described ECC block that stores in the step 3109 produces a PO syndrome;

Step 3113: the PI code word according to described ECC block produces a PI syndrome;

Step 3115: according to described PI syndrome and described PO syndrome at least one implement ECC action; And

Step 3117: the result according to described ECC action corrects described EDC result.

Other details has been disclosed in the description of Fig. 5 in addition, so in this omission.

Figure 23 has illustrated the error correction method thereof of corresponding error correcting system 1500 shown in Figure 6, and it comprises:

Step 3201: reception and demodulation raw data are to produce an ECC block;

Step 3203: to implementing PI ECC action from the ECC block of step 3201 to produce corrigendum back ECC block;

Step 3205: store ECC block and corrigendum back ECC block;

Step 3207: the ECC block that stores in the step 3205 is implemented a non-linear EDC action to produce EDC result;

Step 3209: PI code word and PO code word according to the ECC block that stores in the step 3205 produce at least one syndrome;

Step 3211: implement ECC action according to syndrome;

Step 3213: the result according to the ECC action corrects EDC result.

The syndrome of the method comprises PI syndrome and PO syndrome one at least.Action will constantly replace and repeat up to the quantity that repeats to a predetermined value or till not having the misdata existence according to the ECC of PI or PO syndrome.

If method shown in Figure 21 is corresponding to error correcting system shown in Figure 7 1600, it more comprises: store from the part ECC block in the step 3201.Other variation can be by learning in the above stated specification.

If method shown in Figure 21 is corresponding to error correcting system shown in Figure 12 2100, step 3209 produces the PO syndrome that desire stores, and step 3203 produces the PI syndrome, and PI is stored to different storage units with the PO syndrome.In addition if method shown in Figure 21 corresponding to the error correcting system 2100 shown in the 12nd figure, the method also is included as the PI syndrome that step 3011 storing step 3203 is produced.

Other detailed features has been exposed in the middle of the description of Fig. 6, Fig. 7, Figure 11 and Figure 12, so do not repeat them here.

Figure 24 has illustrated the error correction method thereof of corresponding error correcting system 1700 shown in Figure 8, and it comprises:

Step 3301: reception and demodulation raw data are to produce an ECC block;

Step 3303: store ECC block and corrigendum back ECC block;

Step 3305: on from the ECC block of step 3301, implement PI ECC action to produce corrigendum back ECC block;

Step 3307: implement non-linear EDC action to produce EDC result according to the ECC block in the step 3303;

Step 3309: the PO code word according to the ECC block in the step 3303 produces a PO syndrome;

Step 3311: the ECC block in the step 3303 is implemented the ECC action according to PI syndrome or PO syndrome;

Step 3313: the PI code word according to the ECC block in the step 3303 produces a PI syndrome;

Step 3315: the result according to described ECC action corrects described EDC result.

Other detailed features has been exposed in the middle of the description of Fig. 8, so do not repeat them here.

Figure 25 has illustrated the error correcting system 1800 of corresponding diagram 9～shown in Figure 20 and 1900 error correction method thereof.

Step 3401: reception and demodulation raw data are to produce an ECC block;

Step 3403: the PI code word according to the ECC block in the step 3401 produces a PI syndrome;

Step 3405: store the ECC block;

Step 3407: the PO code word according to the ECC block in the step 3405 produces a PO syndrome;

Step 3409: implement non-linear EDC action to produce EDC result according to the ECC block in the step 3405;

Step 3411: according to PI syndrome and PO syndrome at least one implement ECC action;

Step 3413: the result according to the ECC action corrects EDC result.

If method shown in Figure 25 is corresponding to the error correcting system shown in the 13rd and 14 figure.The method more produces the PO syndrome according to the ECC block that stores in the step 3405, and step 3403 is more in order to produce the PI syndrome.

In addition if method shown in Figure 25 corresponding to the error correcting system shown in the 15th and 16 figure, step 3403 is more implemented PI ECC action.

Store syndrome and provide syndrome if method shown in Figure 25 corresponding to error correcting system shown in Figure 17, more comprises to step 3409.

Store syndrome and provide syndrome if method shown in Figure 25 corresponding to error correcting system shown in Figure 19, more comprises to step 3409.

If method shown in Figure 25, more comprises the data and the EDC result of the ECC block that stores in the corrigendum step 3405 corresponding to error correcting system shown in Figure 20, and the syndrome of corrigendum storage.

Aforesaid system has different structures and different benefits.For instance, syndrome storer and the syndrome more use of positive circuit can reduce the bandwidth consumption of data buffer, and the use of EDC storer and EDC corrigendum device can also reduce the bandwidth consumption of data buffer.And, the invention provides use syndrome storer, syndrome more positive circuit, EDC storer and EDC corrigendum device and PI, PO ECC so that the error correcting system of different kenels to be provided.Therefore the present invention can meet different demands.

The above only is preferred embodiment of the present invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.

Claims

1. an error correcting system is characterized in that, described error correcting system comprises:

One detuner, in order to receive and the demodulation raw data to produce an error correcting code block;

One PI syndrome generator in advance is coupled to described detuner, produces a PI syndrome according to the described error correcting code block from described detuner;

One data buffer is in order to store described error correcting code block;

One PO syndrome generator is in order to produce a PO syndrome according to the described error correcting code block in the described data buffer;

One error-detecging code is confirmed element, in order to produce an error-detecging code result according to the described error correcting code block in the described data buffer;

One error-correcting code decoder is in order to wherein to implement one of at least error correcting code action according to described PI syndrome and described PO syndrome; And

One error-detecging code corrigendum device is corrected described error-detecging code result in order to the result according to described error correcting code action.

2. error correcting system according to claim 1 is characterized in that, described error correcting system also comprises a PI syndrome storer to store described PI syndrome.

3. error correcting system according to claim 1 is characterized in that, described error correcting system also comprises an error-detecging code storer and is integrated into described data buffer.

4. error correcting system according to claim 1 is characterized in that, the wherein said syndrome of PI in advance generator is integrated into a PI error-correcting code decoder in advance of implementing PI error correcting code action.

5. error correcting system according to claim 4, it is characterized in that, described error correcting system also comprises a storer, be coupled between described error-correcting code decoder and the described data buffer, to store from the described PI syndrome of described data buffer and to provide described PI syndrome to described error-correcting code decoder.

6. error correcting system according to claim 1 is characterized in that wherein said raw data is stored in the discs.

7. error correcting system according to claim 2, it is characterized in that, described error correcting system also comprises a PI error-correcting code decoder in advance, be stored in described error correcting code block and described error-detecging code result in the described data buffer in order to corrigendum, and be stored in described PI syndrome in the described PI syndrome storer in order to corrigendum.

8. error correcting system according to claim 7, it is characterized in that, described error correcting system also comprises a storer, be coupled between described error-correcting code decoder and the described data buffer, to store from the described PI syndrome of described data buffer and to provide described PI syndrome to described error-correcting code decoder.

9. error correcting system according to claim 2 is characterized in that, wherein said PI syndrome storer is integrated into described data buffer.

10. error correcting system according to claim 1 is characterized in that, wherein said error-detecging code confirms that element is coupled to described detuner to implement error-detecging code action.

11. an error correction method thereof comprises:

(a) reception and demodulation raw data are to produce an error correcting code block;

(b) produce a PI syndrome according to described error correcting code block from described step (a);

(c) store described error correcting code block;

(d) the PO code word according to the described error correcting code block that stores in the described step (c) produces a PO syndrome;

(e) produce an error-detecging code result according to the described error correcting code block that stores in the described step (c);

(f) wherein implement one of at least error correcting code action according to described PI syndrome and described PO syndrome; And

(g) result according to described error correcting code action corrects described error-detecging code result.

12. error correction method thereof according to claim 11 also comprises the described PI syndrome that the described step of storage (b) is produced.

13. error correction method thereof according to claim 11 also comprises the described error-detecging code result of storage.

14. error correction method thereof according to claim 11, wherein said raw data is stored in the discs.

15. error correction method thereof according to claim 11, wherein said error correction method thereof also comprises:

Produce described PO syndrome according to the described error correcting code block that is stored in the described step (c), and described step (b) is in order to produce described PI syndrome.

16. error correction method thereof according to claim 15 also comprises the described PO syndrome of storage.

17. error correction method thereof according to claim 11, wherein said step (b) are more implemented PI error correcting code action.

18. error correction method thereof according to claim 17 also comprises the described PI syndrome of storage and provides described PI syndrome to described step (e).

19. error correction method thereof according to claim 11 also comprises corrigendum and is stored in described error correcting code block and the described error-detecging code result who stores in the described step (c), and in order to correct stored described PI syndrome.

20. error correction method thereof according to claim 11 also comprises the described PI syndrome of storage and provides described PI syndrome to described step (e).