CN101006559B - SiCOH膜的DUV激光退火及稳定性 - Google Patents
SiCOH膜的DUV激光退火及稳定性 Download PDFInfo
- Publication number
- CN101006559B CN101006559B CN2005800274867A CN200580027486A CN101006559B CN 101006559 B CN101006559 B CN 101006559B CN 2005800274867 A CN2005800274867 A CN 2005800274867A CN 200580027486 A CN200580027486 A CN 200580027486A CN 101006559 B CN101006559 B CN 101006559B
- Authority
- CN
- China
- Prior art keywords
- coating
- deielectric
- sicoh
- dielectric
- precursor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000005224 laser annealing Methods 0.000 title description 13
- 230000006641 stabilisation Effects 0.000 title 1
- 238000011105 stabilization Methods 0.000 title 1
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 18
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 16
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 10
- 238000000576 coating method Methods 0.000 claims description 114
- 239000011248 coating agent Substances 0.000 claims description 98
- 238000013532 laser treatment Methods 0.000 claims description 48
- 238000000034 method Methods 0.000 claims description 39
- 239000000758 substrate Substances 0.000 claims description 39
- 238000000151 deposition Methods 0.000 claims description 33
- 239000003989 dielectric material Substances 0.000 claims description 31
- 239000000463 material Substances 0.000 claims description 31
- 230000008021 deposition Effects 0.000 claims description 30
- 239000002243 precursor Substances 0.000 claims description 26
- 239000004065 semiconductor Substances 0.000 claims description 25
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 21
- 239000004020 conductor Substances 0.000 claims description 20
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 17
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 15
- 238000000985 reflectance spectrum Methods 0.000 claims description 14
- 239000011810 insulating material Substances 0.000 claims description 12
- 238000002310 reflectometry Methods 0.000 claims description 12
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 11
- 230000008569 process Effects 0.000 claims description 11
- 125000004435 hydrogen atom Chemical group [H]* 0.000 claims description 10
- 230000005855 radiation Effects 0.000 claims description 10
- 238000009413 insulation Methods 0.000 claims description 7
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- 238000006552 photochemical reaction Methods 0.000 claims description 6
- 239000004215 Carbon black (E152) Substances 0.000 claims description 5
- 229910018540 Si C Inorganic materials 0.000 claims description 5
- 125000004429 atom Chemical group 0.000 claims description 5
- 229930195733 hydrocarbon Natural products 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 230000004907 flux Effects 0.000 claims description 4
- 150000002430 hydrocarbons Chemical group 0.000 claims description 4
- 238000004528 spin coating Methods 0.000 claims description 4
- VGGSQFUCUMXWEO-UHFFFAOYSA-N Ethene Chemical compound C=C VGGSQFUCUMXWEO-UHFFFAOYSA-N 0.000 claims description 3
- 229910018557 Si O Inorganic materials 0.000 claims description 3
- 238000000862 absorption spectrum Methods 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical group [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- NBBQQQJUOYRZCA-UHFFFAOYSA-N diethoxymethylsilane Chemical compound CCOC([SiH3])OCC NBBQQQJUOYRZCA-UHFFFAOYSA-N 0.000 claims description 3
- HMMGMWAXVFQUOA-UHFFFAOYSA-N octamethylcyclotetrasiloxane Chemical compound C[Si]1(C)O[Si](C)(C)O[Si](C)(C)O[Si](C)(C)O1 HMMGMWAXVFQUOA-UHFFFAOYSA-N 0.000 claims description 3
- RSNQKPMXXVDJFG-UHFFFAOYSA-N tetrasiloxane Chemical compound [SiH3]O[SiH2]O[SiH2]O[SiH3] RSNQKPMXXVDJFG-UHFFFAOYSA-N 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- GJEZBVHHZQAEDB-UHFFFAOYSA-N 6-oxabicyclo[3.1.0]hexane Chemical compound C1CCC2OC21 GJEZBVHHZQAEDB-UHFFFAOYSA-N 0.000 claims description 2
- DGXPASZXUJQWLQ-UHFFFAOYSA-N diethyl(methoxy)silane Chemical compound CC[SiH](CC)OC DGXPASZXUJQWLQ-UHFFFAOYSA-N 0.000 claims description 2
- QUZPNFFHZPRKJD-UHFFFAOYSA-N germane Chemical group [GeH4] QUZPNFFHZPRKJD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052986 germanium hydride Inorganic materials 0.000 claims description 2
- ICVBNINMOKOHSQ-UHFFFAOYSA-N [C].O[Si](O)(O)O Chemical compound [C].O[Si](O)(O)O ICVBNINMOKOHSQ-UHFFFAOYSA-N 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 230000002411 adverse Effects 0.000 abstract description 3
- 230000001747 exhibiting effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 133
- 239000012774 insulation material Substances 0.000 description 64
- 238000001020 plasma etching Methods 0.000 description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 16
- 238000009792 diffusion process Methods 0.000 description 14
- 239000000203 mixture Substances 0.000 description 11
- 230000004888 barrier function Effects 0.000 description 9
- 238000005498 polishing Methods 0.000 description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 238000011282 treatment Methods 0.000 description 7
- 239000012212 insulator Substances 0.000 description 6
- 239000003870 refractory metal Substances 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000003321 amplification Effects 0.000 description 4
- 125000004432 carbon atom Chemical group C* 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 230000006872 improvement Effects 0.000 description 4
- 239000012705 liquid precursor Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- -1 polytetrafluoroethylene Polymers 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- WZJUBBHODHNQPW-UHFFFAOYSA-N 2,4,6,8-tetramethyl-1,3,5,7,2$l^{3},4$l^{3},6$l^{3},8$l^{3}-tetraoxatetrasilocane Chemical compound C[Si]1O[Si](C)O[Si](C)O[Si](C)O1 WZJUBBHODHNQPW-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052735 hafnium Inorganic materials 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 229910052726 zirconium Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 108010014173 Factor X Proteins 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 125000002534 ethynyl group Chemical group [H]C#C* 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- 150000004678 hydrides Chemical class 0.000 description 2
- 125000001183 hydrocarbyl group Chemical group 0.000 description 2
- 125000001449 isopropyl group Chemical group [H]C([H])([H])C([H])(*)C([H])([H])[H] 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 2
- 239000004810 polytetrafluoroethylene Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000000376 reactant Substances 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 125000000999 tert-butyl group Chemical group [H]C([H])([H])C(*)(C([H])([H])[H])C([H])([H])[H] 0.000 description 2
- ICSWLKDKQBNKAY-UHFFFAOYSA-N 1,1,3,3,5,5-hexamethyl-1,3,5-trisilinane Chemical compound C[Si]1(C)C[Si](C)(C)C[Si](C)(C)C1 ICSWLKDKQBNKAY-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- 208000037656 Respiratory Sounds Diseases 0.000 description 1
- 229910003811 SiGeC Inorganic materials 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 239000002920 hazardous waste Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 238000005984 hydrogenation reaction Methods 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 229920000592 inorganic polymer Polymers 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 1
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 229910052755 nonmetal Inorganic materials 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 150000003961 organosilicon compounds Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229920000090 poly(aryl ether) Polymers 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- RMAQACBXLXPBSY-UHFFFAOYSA-N silicic acid Chemical compound O[Si](O)(O)O RMAQACBXLXPBSY-UHFFFAOYSA-N 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 description 1
- 230000003019 stabilising effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
- 229940094989 trimethylsilane Drugs 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02354—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light using a coherent radiation, e.g. a laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31633—Deposition of carbon doped silicon oxide, e.g. SiOC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/469—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/249921—Web or sheet containing structurally defined element or component
- Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
- Y10T428/249978—Voids specified as micro
Abstract
本发明公开了一种制造包括Si,C,O和H原子(以后称为SiCOH)的介质膜的方法,该介质膜与包括没有进行本发明的深紫外(DUV)的现有技术SiCOH介质膜的现有技术介质膜相比提高了绝缘特性。提高的特性包括在没有对SiCOH介质膜的介电常数的不利影响(增加)下减小电流泄漏。根据本发明,通过对沉积的SiCOH介质膜进行DUV激光退火获得表现出泄漏电流减小和可靠性提高的SiCOH介质膜。本发明的DUV激光退火步骤可能从膜除去弱键合的碳,从而改善泄漏电流。
Description
技术领域
本发明涉及在如BEOL(后段制程)应用的半导体应用中使用的介质膜的制造方法,更具体地说,涉及包括Si,C,O和H原子(以后称为“SiCOH”)也称作C掺杂氧化物(CDO)的介质膜的制造方法,该膜具有低介电常数(K),改善的泄漏电流和改善的膜的可靠性。本发明还涉及使用本发明的方法制造的介质膜以及包括本发明的介质膜的如互连结构的电子结构。
背景技术
近几年,在ULSI(超大规模集成)电路中利用的电子器件的尺寸持续缩小,导致BEOL金属化电阻增加以及层内介质和层间介质电容增加。此结合效应增加了ULSI电子器件中的信号延迟。为了提高未来ULSI电路的开关性能,需要低介电常数(K)绝缘体特别是那些K明显低于氧化硅的绝缘体以减小电容。具有低K值的介电材料(即,介质)已经商业可获得。例如具有约2.0的介电常数的聚四氟乙烯(“PTFE”)就是一种这样的商业可获得材料。然而,当暴露在300℃以上的温度下时,多数商业可获得介质材料不是热稳定的。在已有ULSI芯片中低K介质的集成要求在至少400℃下的热稳定性。
被认为在ULSI器件中应用的低K材料包括包含Si,C,O和H原子的聚合物,如甲基硅氧烷,甲基硅倍半氧烷,以及其它有机和无机聚合物。例如,文献(N.Hacker等人的“Properties of new low dielectric constantspin-on silicon oxide based dielectrics”Mat.Res.Soc.Symp.Proc.476(1997):25)描述了表现出满足热稳定性要求的材料,虽然当通过旋涂技术制备薄膜时,当达到在互连结构中集成需要的厚度时,这些材料中的一些容易导致裂纹。另外,这些现有技术的前体材料成本高而且禁止在大规模生产中使用。另外,甚大规模集成电路(“VLSI”)和ULSI芯片的大部分制造步骤是通过等离子体增强化学或物理气相沉积技术完成的。
从而,通过使用先前安装并且可获得的工艺设备的等离子体增强化学气相沉积(PECVD)技术制造低K材料的能力将简化其在制造工艺中的集成,减小制造成本,并且产生更少的危险废物。美国专利Nos.6,147,009和6,497,963描述了由Si,C,O和H原子构成的低介电常数材料,该材料具有不大于3.6的介电常数并且表现出很低的裂纹扩展速度。
美国专利Nos.6,312,793,6,441,491,6,541,398和6,479,110B2描述了由Si,C,O和H原子构成的基质相和主要由C和H构成的其它相组成的多相低K介质材料。在前述专利中公开的介质材料具有不大于3.2的介电常数。
美国专利No.6,437,443描述了一种具有两种或多种相的低K介质材料,其中第一相由SiCOH材料形成。通过包括Si,C,O和H原子的第一前体气体和主要包括C,H和可选的F,N和O原子的至少第二前体气体在等离子体增强化学气相沉积室中反应提供低K介质材料。
虽然公开了大量制造低K SiCOH介质膜的方法,但是现有技术SiCOH膜包括高含量的C原子(典型的约10-20原子%或更大),这增加了包括SiCOH膜的器件的泄漏电流。泄漏电流的增加,进而降低膜的绝缘性并且因此对膜的可靠性有不利影响。因此,需要使用不影响SiCOH膜的介电常数和/或可靠性的方法提供具有改善的泄漏电流的SiCOH膜。
发明内容
本发明提供了一种制造SiCOH介质膜的方法,该介质膜与包括没有进行本发明的深紫外(DUV)激光退火的现有技术SiCOH介质膜的现有技术介质膜比较具有提高的绝缘特性。提高的特性包括在没有对SiCOH介质膜的介电常数的不利影响(增加)下减小电流泄漏。根据本发明,通过对沉积的SiCOH介质膜进行DUV激光退火步骤获得表现出泄漏电流减小和可靠性提高的SiCOH介质膜。申请人相信,本发明的DUV激光退火步骤可能从膜除去弱键合的碳,从而改善泄漏电流。
通常使用电子束稳定包括SiCOH介质膜的许多介质膜。使用电子束处理的缺点是不能典型地从膜除去弱键合的C并且引入的电子可能引起膜的意想不到的改变。高温退火(在约500℃到约600℃的量级上)同样不能典型地除去C,因此不能稳定膜。需要C原子和深UV之间的光化学反应以提高SiCOH介质膜的质量。
广义上讲,本发明的方法包括如下步骤:
在衬底表面上提供包括Si,C,O和H原子的介质膜;以及
使用深紫外(DUV)激光器辐射所述介质膜以在介质膜内引起光化学反应,其与非DUV激光处理的SiCOH膜比较提高了膜的绝缘特性。
除了上述方法以外,本发明还提供与非DUV处理SiCOH膜相比具有提高的绝缘特性即减小的泄漏电流的SiCOH介质膜。
广义上讲,本发明发明的介质膜包括包含Si,C,O和H原子的介质材料,所述介质材料具有共价键合的三维网络结构,不大于2.8的介电常数和与SiO2基本相同的吸收光谱。
“与SiO2基本相同”的意思是SiCOH介质膜具有在DUV(248nm)下SiO2典型的约60%的反射率,如图6所示,此处SiO2和激光退火SiCOH膜具有相同的反射光谱。对未曝光的SiCOH膜,由于C原子,在DUV下的反射率低于(约20%)标准吸收。
如上所述,本发明的DUV处理SiCOH介质膜与非DUV处理SiCOH膜相比具有提高的绝缘特性。提高的绝缘特性包括当本发明的膜用在电子结构中时观察到的减小的泄漏电流。具体地,本发明的DUV激光处理SiCOH介质膜具有的电流密度与非DUV激光(即,沉积的)SiCOH介质相比至少一到几个数量级的明显更小的泄漏电流。这在图8中示出,其中富C SiCOH膜在沉积后具有很高的泄漏电流(图8中,脱离范围),而在激光退火后,在-2V处的泄漏电流大大减小到约10-7A/cm2。图7示出了此特殊样品的反射光谱。在激光退火前,SiCOH膜在DUV下(曲线C)具有低反射(约15%),而在激光退火后,在DUV下的反射率约60%,典型地为SiO2膜(曲线D)。
本发明还涉及包括至少一种包括本发明的DUV激光处理SiCOH介质膜的绝缘材料的电子结构。包括本发明的DUV激光处理SiCOH介质的至少一种介质膜包括电子结构中的级间和/或级内介质层,覆层,和/或硬掩模/抛光停止层。
附图说明
图1A-1B示出了(通过截面图)本发明的基本工艺步骤。
图2是本发明的电子器件的放大截面图,包括本发明的DUV激光处理的SiCOH介质膜作为级内介质层和级间介质层。
图3是具有在本发明的DUV激光处理的SiCOH介质膜顶部沉积的另外的扩散阻挡介质覆层的图2的电子结构的放大截面图。
图4是具有在抛光停止层的顶部沉积的另外的RIE硬掩模/抛光停止介质覆层和介质覆盖扩散阻挡层的图3的电子结构的放大截面图。
图5是具有在本发明的DUV激光处理的SiCOH介质膜顶部沉积的另外的RIE硬掩模/抛光停止介质层的图4的电子结构的放大截面图。
图7是没有DUV激光处理的SiCOH介质膜和DUV激光处理的SiCOH介质膜的反射率对波长的曲线图。
图8示出了在DUV激光处理之前和之后SiCOH膜的电流-电压特性曲线。
具体实施方式
现在,将更详细地描述本发明,本发明描述了制造具有改善的绝缘性的SiCOH介质材料,DUV激光处理的SiCOH介质膜和包括它们的电子结构的方法。根据本发明的方法,在衬底10的表面上形成SiCOH介质膜12,如在图1A中所示。术语“衬底”当与衬底10一起使用时包括半导体材料,绝缘材料,导体材料或其包括多层结构的任意组合。因此,例如衬底10可以是如Si,SiGe,SiGeC,SiC,GaAs,InAs,InP以及其它III/V或II/VI化合物半导体的半导体材料。半导体衬底10还包括如Si/SiGe,Si/SiC,绝缘体上硅(SOI)或绝缘体上硅锗(SGOI)的多层衬底。当衬底10为绝缘材料时,绝缘材料可以是有机绝缘体,无机绝缘体或其包括多层的组合。当衬底10为导体材料时,衬底10可以包括,例如,多晶Si,单质金属,单质金属的合金,金属硅化物,金属氮化物及其包括多层的组合。
在一些实施例中,衬底10包括半导体材料和绝缘材料的组合,半导体材料和导体材料的组合或半导体材料,绝缘材料和导体材料的组合。包括上述组合的衬底的一个实例是互连结构。
优选使用等离子体增强化学气相沉积(PECVD)沉积SiCOH介质膜12。除了PECVD,本发明还旨在利用化学气相沉积(CVD),高密度等离子体(HDP)沉积,脉冲PECVD,旋涂施加或其它相关方法形成SiCOH介质膜12。可以改变沉积的介质膜12的厚度;沉积的介质膜12的厚度范围优选从约50nm到约1μm,更优选从约100到约500nm的厚度。
典型地,使用共同受让的美国专利Nos.6,147,009,6,312,793,6,441,491,6,437,443,6,441,491,6,541,398,6,479,110B2和6,497,963中公开的工艺技术沉积SiCOH介质膜。
具体地,通过向反应室提供包括Si,C,O和H原子的至少第一前体(液体,气体或蒸汽)和如He或Ar惰性载体形成SiCOH介质膜12,优选反应室是PECVD反应室,然后在合适的衬底上利用有效形成SiCOH介质材料的条件沉积源自所述第一前体的膜。而且,本发明还提供第一前体与如O2,CO2或其组合的氧化剂的混合,从而稳定反应室中的反应物并且提高沉积在衬底10上的介质膜12的均匀性。
除了第一前体,可以使用由C,H和可选的O,F和N原子构成的第二前体(气体,液体或蒸汽)。可选地,还可以使用包括Ge的第三前体(气体,液体或蒸汽)。
优选,第一前体选自具有包括SiCOH成分的环结构的有机分子,如1,3,5,7-四甲基环四硅氧烷(“TMCTS”或“C4H16O4Si4”),八甲基环四硅氧烷(OMCTS),二乙氧基甲基硅烷(DEMS),二甲基二甲氧基硅烷(DMDMOS),二乙基甲氧基硅烷(DEDMOS),以及相关的环或非环硅烷,硅氧烷等。
可以使用的第二前体是碳氢化合物分子。虽然可以使用如乙烯的任何碳氢化合物分子,但是优选第二前体选自具有环结构的碳氢化合物分子,优选分子中存在多于一个环或具有附在环上的支链。特别有用的是包括稠环的物种,其中的至少一种包括杂原子,优选氧。在这些物种中,最合适的是那些包括施加明显环应变的尺寸的环,即3或4原子和/或7或更多原子的环。具有特别吸引力是公知为如环戊烯氧化物(“CPO”或“C5H8O”)的氧环双杂的一类化合物的成员。同样有用的是包括与碳氢环连接的支链叔丁基(t-丁基)和异丙基(i-丙基)的分子;该环可以是饱和的或未饱和的(含C=C双键)。第三前体可以由锗氢化物或任何其它包括Ge源的反应物形成。
可以使用包括提供平行板反应室的步骤的方法沉积SiCOH膜12,反应室具有在约85cm2和约750cm2之间的衬底卡盘的导电区域和在衬底和顶电极之间,在约1cm和约12cm之间的间隙。向一个电极提供频率在约0.45Mhz和约200Mhz之间的高频RF功率。可选地,向一个电极提供另外的低频功率。
沉积步骤使用的条件可以根据SiCOH介质膜12期望的最终介电常数改变。广义上,用于提供具有约2.8或更小的介电常数的包括Si,C,O和H元素的稳定介质材料的条件包括:设置衬底的温度在约300℃和约425℃之间;设置高频RF功率密度在约0.1W/cm2和约1.5W/cm2之间;设置第一液体前体流速在约100mg/min和约5000mg/min之间;可选地设置第二液体前体流速在约50mg/min到约10,000mg/min之间;可选地设置第三液体前体流速在约25mg/min到约4000mg/min之间;可选地设置如氦(或/和氩)惰性载体气体流速在约50sccm到约5000sccm之间;设置反应室的压力在约1000mTorr和约7000mTorr之间;并且设置高频RF功率在约75W和约1000W之间。可选地,可以向等离子体施加在约30W和约400W之间的超低频率功率。当衬底卡盘的导电区域以因素X改变时,向衬底卡盘提供的RF功率同样以因素X改变。
当在本发明中使用氧化剂时,其以在约10sccm到约1000sccm之间的流速流入PECVD反应室。
虽然在上述实例中使用液体前体,但是技术人员应该知道还可以使用有机硅化合物气相前体(如三甲基硅烷)沉积。在介质膜12的沉积期间可以包括在随后固化步骤期间在膜12中形成孔的成孔剂。随后的固化步骤可以发生在DUV激光退火步骤之前,或固化发生在DUV激光退火步骤期间。
在本发明的此处形成的介质膜12包括在共价键合的三维网络中的Si,C,O和H原子的氢氧化硅碳材料(SiCOH)的矩阵,并且具有不大于约2.8的介电常数。三维键合网络包括包含Si-O,Si-C,Si-H,C-H和C-C键的共价键合的三维环结构。介质膜12可以包括F和N并且可以可选地部分由Ge原子替代Si原子。介质膜12可以包括直径在约0.3到约50纳米之间的分子范围的空隙(即,纳米尺寸的孔),并且最优选直径在约0.4和约10纳米之间,进一步减小膜12的介电常数到低于约2.0的值。膜12的纳米尺寸孔所占的体积为材料的体积的约0.5%和约50%之间,更具体地说,膜12的介电常数从约1.6到约2.6,并且更优选从约1.8到约2.2。未处理的SiCOH膜12优选具有不大于1.3微米的厚度并且在水中的裂纹扩展速度小于10-9米每秒。
SiCOH介质膜12包括:在约5和约40原子百分比之间的Si;在约5和约45原子百分比之间的C;在约0和约50原子百分比之间的O;和在约10和约55原子百分比之间的H。SiCOH介质膜12在350℃之上热稳定。
在衬底10的表面上沉积SiCOH介质膜12后,使用深紫外(DUV)激光源照射所得结构以便提供如图1B示出的结构,该结构包括在衬底10顶上的DUV处理SiCOH介质14。在本发明中使用的激光装置包括任何包括能够发射DUV射线的激光的装置。术语“DUV射线”指具有波长低于350nm的射线。可以在本发明中使用的这样的激光装置的实例包括共同受让美国专利No.6,395,650的图1和2中描述的激光系统。
用于处理沉积的SiCOH介质膜12的激光源是依赖于激光气体混合物在几个DUV波长的一个下操作的受激准分子激光器。例如,可以使用产生308nm辐射的XeF激光器。同样,可以在本发明中使用产生248nm辐射的KrF激光器,或产生193nm辐射的ArF激光器。受激准分子激光器可以在几百脉冲每秒下操作,脉冲能量高达导致几百瓦特(W)输出的焦耳(J)。
处理沉积的SiCOH介质膜12使用的激光器优选在脉冲模式下操作。激光束可以扩展到曝光整个样品。可选地,对较大的样品,激光曝光区域可以光栅扫描整个样品以提供均匀的剂量。使用受激准分子激光器,限制通量到小于5mJ/cm2每脉冲以确保不发生烧蚀。对受激准分子激光器,在大于20mJ/cm2的通量水平下短脉冲持续约10ns可以引起材料烧蚀。优选,使用每个脉冲0.1-5mJ/cm2的激光通量水平。总剂量可以从1到10000焦耳/cm2改变,优选500-2000J/cm2。这通过多激光脉冲曝光获得。例如,可以使用1mJ/cm2的通量持续106的脉冲获得1000J/cm2的剂量。一般在几百脉冲每秒下操作受激准分子激光器。依赖于所需的总剂量,DUV激光处理的整个曝光时间周期从几秒到几小时。使用在3mJ/cm2每脉冲的通量水平下操作的200Hz的激光器在小于15分钟内获得典型的500J/cm2。
本发明的DUV激光退火SiCOH膜14比非DUV处理SiCOH膜(例如膜12)更稳定。本发明的DUV处理SiCOH膜14具有与沉积的SiCOH介质膜12的介电常数基本相同的介电常数。可以从DUV处理膜看出介电常数从沉积的SiCOH膜12的初值有轻微的升高或降低(±0.5)。这样,DUV处理SiCOH膜14具有小于2.8(±0.5)的介电常数。DUV处理SiCOH膜14还具有其它特征,例如,同样类似于沉积的SiCOH介质膜12的三维键合网络,多孔性,裂纹速度,350℃之上热稳定等。
DUV处理SiCOH膜14和沉积膜12之间的一个不同点是在膜内发生光化学反应,其被认为从处理膜14除去弱键C。因此在DUV激光退火膜14中的C成分略小于未处理介质膜12。C成分的降低发生在本发明的DUV处理SiCOH膜14中。在DUV处理膜14中C成分的降低提供具有反射光谱基本与SiO2相同的介质膜,这说明在DUV激光处理期间已经从膜除去了C。这在图6和7中有明显的表示,其中对沉积膜在DUV下反射光谱约15-20%。这些低反射值是因为C的吸收。激光处理后,SiCOH反射光谱在DUV下约与SiO2相同,说明至少部分C已经被除去。
在一些实施例中,DUV处理介质膜14在激光处理后具有的泄漏电流的减小约10或更多。本发明的介质膜14还具有表征为在248nm处具有约60-70%的反射率的反射光谱。
本发明的SiCOH介质膜14可以用作电子结构中的级间和/或级内介质,覆层,和/或作为硬掩模/抛光停止层。
本发明的电子结构包括预处理半导体衬底,其具有嵌入第一绝缘材料层中的第一金属区域,嵌入第二绝缘材料层中的第一导体区域,第二绝缘材料层与第一绝缘材料层紧密接触,第一导体区域与第一金属区域电连接,和与第一导体区域电连接并且嵌入第三绝缘材料层中的第二导体区域,第三绝缘材料层与第二绝缘材料层紧密接触。
在上述结构中,每个绝缘层都可以包括本发明的通过DUV激光曝光处理的SiCOH介质膜14。
电子结构还可以包括,位于第一绝缘材料层和第二绝缘材料层之间中的介质覆层,并且还可以包括位于第二绝缘材料层和第三绝缘材料层之间中的介质覆层。电子结构还可以包括,在第二绝缘材料层和第三绝缘材料层之间第一介质覆层,和在第三绝缘材料层的顶上的第二介质覆层。
介质覆层可以选自氧化硅,氮化硅,氧氮化硅,碳氮化硅(SiCN),具有Ta,Zr,Hf或W的难熔金属的难熔金属硅氮化物,碳化硅,碳氧化硅,碳掺杂氧化物及它们的氢化或氮化化合物。在一些实施例中,介质覆层自己可以包括本发明的DUV处理SiCOH介质材料。第一和第二介质覆层可以选自与介质材料相同的组。第一绝缘材料层是氧化硅或氮化硅或这些材料的掺杂种类,如PSG或BPSG。
电子结构还包括沉积在第二和第三绝缘材料层的至少一个上的介质材料的扩散阻挡层。电子结构还包括在第二绝缘材料层顶上的用作RIE硬掩模/抛光停止层的介质层和介质RIE硬掩模/抛光停止层顶上的介质扩散阻挡层。电子结构还包括在第二绝缘材料层顶上的第一介质RIE硬掩模/抛光停止层,第一介质抛光停止层顶上的第一介质RIE扩散阻挡层,在第三绝缘材料层顶上的第二介质RIE硬掩模/抛光停止层,和在第二介质抛光停止层顶上的第二介质扩散阻挡层。介质RIE硬掩模/抛光停止层可以包括本发明的SiCOH介质材料。
图2-5中示出了包括本发明的DUV激光处理SiCOH介质膜的电子器件。注意,图2-5示出的器件仅示出了本发明的实例,还可以通过本发明的新方法形成大量的其它器件。
图2示出了在半导体衬底32上制造的电子器件30。在半导体衬底32顶上首先形成第一金属区域36嵌入其中的绝缘材料层34。在第一金属区域36上进行CMP工艺后,在第一绝缘材料层34和第一金属区域36顶上形成本发明的DUV激光处理SiCOH介质膜38。适合由氧化硅,氮化硅,这些材料的掺杂种类或任何其它合适的绝缘材料形成第一绝缘材料层34。然后在接着蚀刻的光刻工艺中构图DUV激光处理SiCOH介质膜38并且在其上沉积导体层40。在第一导体层40上进行CMP工艺后,通过等离子体增强化学气相沉积工艺在第一DUV激光处理SiCOH介质膜38和第一导体层40上沉积本发明的第二层DUV激光处理SiCOH膜44。第一导体层40可以是沉积的金属材料或非金属导体材料。例如,铝或铜的金属材料或氮化物或多晶硅的非金属材料。第一导体40与第一金属区域36电连接。
然后,在DUV激光处理SiCOH膜44的光刻工艺之后形成第二导体区域50,接着进行蚀刻并且接着第二导体材料的沉积工艺。第二导体区域50也可以沉积金属材料或非金属材料,类似于沉积第一导体层40中使用的。第二导体区域50与第一导体区域40电连接并且镶嵌在第二层DUV激光处理SiCOH介质膜44中。第二层DUV激光处理SiCOH介质膜44与第一层DUV激光处理SiCOH介质膜38紧密接触。在此实例中,第一层DUV激光处理SiCOH介质膜38是级内介质材料,而第二层DUV激光处理SiCOH介质膜44是级内和级间介质。基于本发明的DUV激光处理SiCOH介质膜的特性,可以通过第一绝缘层38和第二绝缘层44获得较好的绝缘特性。
图3示出了类似于图2中的电子器件30的本发明的电子器件60,但是具有在第一绝缘层38和第二绝缘层44之间沉积的另外的介质覆层62。适合由如氧化硅,氮化硅,氧氮化硅,具有Ta,Zr,Hf或W的难熔金属的难熔金属硅氮化物,碳化硅,碳氮化硅(SiCN),碳氧化硅(SiCO)及它们的氢化物形成介质覆层62。附加的介质覆层62起扩散阻挡层的作用,用于防止第一导体层40扩散进第二绝缘材料层44或下面的层中,特别是进入层34和32中。
图4中示出了本发明的电子器件70的另一个可选实施例。在电子器件70中,使用了用作RIE掩模和CMP(化学机械抛光)抛光停止层的两个附加介质覆层72和74。在第一DUV激光处理SiCOH介质材料38的顶上沉积第一介质覆层72并且用作RIE掩模和CMP停止,因此在CMP后第一导体层40和层72基本共面。第二介质层74的功能类似于层72,然而还利用层74平整化第二导体层50。抛光停止层74是沉积的合适的介质材料,例如氧化硅,氮化硅,氧氮化硅,具有Ta,Zr,Hf或W的难熔金属的难熔金属硅氮化物,碳化硅,碳氧化硅(SiCO)及它们的氢化物。对层72或74,优选抛光停止层的成分是SiCH或SiCOH。当层72由SiCOH构成时,优选使用本发明的DUV激光处理SiCOH膜。为了相同的目的,可以在第二DUV激光处理SiCOH介质膜44顶上附加第二介质层74。
图5中示出的仍是本发明的电子器件80的可选实施例。在此可选实施例中,沉积介质材料的附加层82并且因此将第二绝缘材料层44分成层84和86。从而,图2中示出的由本发明的DUV激光处理SiCOH介质膜形成的级内和级间介质层44在过孔92和互连94之间的边界处分成层间介质层84和级内介质层86。还在上介质层74的顶上沉积附加扩散阻挡层96。可选实施例电子结构80提供的另外的优点是介质层82用作RIE蚀刻停止以提供较好的互连深度控制。因此,选择层82的成分以提供关于层86的蚀刻选择性。
另一可选实施例包括具有作为布线结构内的级内或级间介质的绝缘材料层的电子结构,布线结构包括预处理半导体衬底,其具有嵌入第一绝缘材料层中的第一金属区域,嵌入第二绝缘材料层中的第一导体区域,其中第二绝缘材料层与第一绝缘材料层紧密接触以及第一导体区域与第一金属区域电连接,与第一导体区域电连接并且嵌入第三绝缘材料层中的第二导体区域,其中第三绝缘材料层与第二绝缘材料层紧密接触,在第二绝缘材料层和第三绝缘材料层之间的第一介质覆层,和在第三绝缘材料层顶上的第二介质覆层,其中由包括本发明的DUV激光处理SiCOH介质膜的材料形成第一和第二介质覆层。
本发明的另一可选实施例包括具有作为布线结构内的级内或级间介质的绝缘材料层的电子结构,布线结构包括预处理半导体衬底,其具有嵌入第一绝缘材料层中的第一金属区域,嵌入第二绝缘材料层中的第一导体区域,第二绝缘材料层与第一绝缘材料层紧密接触,第一导体区域与第一金属区域电连接,第二导体区域与第一导体区域电连接并且嵌入第三绝缘材料层中,第三绝缘材料层与第二绝缘材料层紧密接触,和在第二和第三绝缘材料层的至少一个上形成的包括本发明的DUV激光处理SiCOH膜的扩散阻挡层。
本发明的另一可选实施例包括具有作为布线结构内的级内或级间介质的绝缘材料层的电子结构,布线结构包括预处理半导体衬底,其具有嵌入第一绝缘材料层中的第一金属区域,嵌入第二绝缘材料层中的第一导体区域,第二绝缘材料层与第一绝缘材料层紧密接触,第一导体区域与第一金属区域电连接,与第一导体区域电连接并且嵌入第三绝缘材料层中的第二导体区域,第三绝缘材料层与第二绝缘材料层紧密接触,第二绝缘材料层顶上的反应离子蚀刻(RIE)硬掩模/抛光停止层,和RIE硬掩模/抛光停止层顶上的扩散阻挡层,其中RIE硬掩模/抛光停止层和扩散阻挡层包括本发明的DUV激光处理SiCOH介质膜。
本发明的另一可选实施例包括具有作为布线结构内的级内或级间介质的绝缘材料层的电子结构,布线结构包括预处理半导体衬底,其具有嵌入第一绝缘材料层中的第一金属区域,嵌入第二绝缘材料层中的第一导体区域,其与第一绝缘材料层紧密接触,第一导体区域与第一金属区域电连接,与第一导体区域电连接并且嵌入第三绝缘材料层中的第二导体区域,第三绝缘材料层与第二绝缘材料层紧密接触,第二绝缘材料层顶上的第一RIE硬掩模/抛光停止层,第一RIE硬掩模/抛光停止层顶上的第一扩散阻挡层,在第三绝缘材料层顶上的第二RIE硬掩模/抛光停止层,以及在第二RIE硬掩模/抛光停止层顶上的第二扩散阻挡层,其中RIE硬掩模/抛光停止层和扩散阻挡层包括本发明的DUV激光处理SiCOH介质膜。
本发明的另一可选实施例包括具有作为布线结构内的级内或级间介质的绝缘材料层的电子结构,布线结构类似于上面刚描述的布线结构,但是还包括介质覆层,其包括位于级间介质层和级内介质层之间的本发明的DUV激光处理SiCOH介质材料。
提供随后的实例,以说明本发明的方法并且展示所得DUV激光处理SiCOH介质膜的一些优点。
实例
在此实例中,在衬底上沉积不同的介质膜并且通过使用n&k技术(Santa Clara,CA)的n&k分析仪获得每种介质膜的反射光谱。图6中示出了最终的反射光谱(反射率对波长,nm)。包括SiLK膜(曲线A,虚线),沉积SiCOH介质(曲线C,实线)和DUV处理SiCOH介质膜(曲线D,实粗线)的样品与SiO2模拟光谱(曲线B,点线)比较。
通过在Si衬底上旋涂500nm的SiLK层制备包括SiLK膜的样品。使用n&k工具制造商提供的内部膜库模拟SiO2样品。通过TMCTS的PECVD制备包括图6的样品的未处理SiCOH。最终的非DUV激光处理SiCOH膜具有约400nm的沉积厚度。使用248nm激光源对该膜进行激光处理。激光退火的条件如下:30J/min,总剂量1800J。
图6中示出的反射光谱显示具有高碳含量的SiLK(曲线A)膜,表现出在DUV下约10%的低反射率,相比于未处理SiCOH膜(曲线C,实线)的约30%。如前述,在膜中的碳含量越高,吸收越高(低反射率)。在激光处理SiCOH膜后(曲线D,实粗线),表现出类似于SiO2的反射光谱(在DUV下约60%反射率,曲线B,点线)表明C成分大大减小。
图7示出了简化的光谱,仅包含非DUV处理SiCOH介质膜(曲线C)和DUV激光处理SiCOH膜(曲线D)。这样,通过在20mTorr下使用TMCTS(流速100sccm)并且在He中10%的乙炔(流速40sccm)作为前体的PECVD沉积膜。加入乙炔以向SiCOH膜增加碳成分。膜厚约150nm。再次,这里,如前所示,沉积SiCOH膜在DUV下具有约15%的反射光谱,小于图6的SiCOH膜的30%。这是因为图7中示出的膜C成分增加。在约5kJ激光处理后,在DUV下反射光谱约60%,是SiO2特有的,再次示出了C的去除(图7,曲线D)。图8中示出了与图7的样品相同的电流电压特性。注意,在激光处理前,-2V处的泄漏电流很高并且超出了范围(曲线C)。在激光处理后,-2V处的泄漏电流约10-7A/cm2,与未处理的样品比较有几个数量级的降低。这再次显示C的去除对获得低泄漏电流是很重要的。
虽然关于其优选实施例具体显示并描述了本发明,本领域的技术人员应该明白,可以在不脱离本发明的精神和范围内进行形式和细节上的前述和其它改变。因此说明本发明没有限制在描述和示出的实际形式和细节上,而是旨在落入附加权利要求的范围内。
Claims (39)
1.一种形成介质膜的方法,包括如下步骤:
在衬底表面上提供包括Si,C,O和H原子的介质膜;以及
使用深紫外激光器辐射所述介质膜以在所述介质膜内引起光化学反应,其与非深紫外激光处理的氢氧化硅碳膜比较提高了膜的绝缘特性。
2.根据权利要求1的方法,其中所述衬底包括半导体材料,绝缘材料,导体材料或包括半导体材料、绝缘材料和导体材料中至少两种的多层的组合。
3.根据权利要求2的方法,其中所述衬底是半导体材料。
4.根据权利要求1的方法,其中所述提供所述介质膜的步骤包括选自等离子体增强化学气相沉积,高密度等离子体沉积,脉冲等离子体增强化学气相沉积以及旋涂的沉积工艺。
5.根据权利要求4的方法,其中所述沉积工艺包括等离子体增强化学气相沉积。
6.根据权利要求1的方法,其中所述提供所述介质膜的步骤包括选择至少一种包括Si,C,O和H原子的第一前体。
7.根据权利要求6的方法,还包括选择第二前体,该第二前体包括C,H和选自O,F和N中的任意原子。
8.根据权利要求7的方法,还包括选择包括Ge的第三前体。
9.根据权利要求6的方法,其中所述第一前体是包括环结构的有机分子。
10.根据权利要求9的方法,其中所述第一前体是1,3,5,7-四甲基环四硅氧烷,八甲基环四硅氧烷,二乙氧基甲基硅烷,二甲基二甲氧基硅烷,或二乙基甲氧基硅烷。
11.根据权利要求7的方法,其中所述第二前体是碳氢化合物分子。
12.根据权利要求11的方法,其中所述碳氢化合物分子是氧环双杂化合物或乙烯。
13.根据权利要求8的方法,其中所述第三前体是锗氢化物。
14.根据权利要求1的方法,其中所述提供所述介质膜的步骤包括选择1,3,5,7-四甲基环四硅氧烷作为第一前体以及乙烯或环戊烯氧化物作为第二前体,并且通过等离子体增强化学气相沉积来沉积所述第一和第二前体。
15.根据权利要求1的方法,其中在所述辐射之前所述介质膜具有2.8或更小的介电常数。
16.根据权利要求1的方法,其中所述深紫外激光器包括受激准分子激光器。
17.根据权利要求16的方法,其中所述受激准分子激光器是在193nm下操作的ArF激光器,在248nm下操作的KrF激光器,或在308nm下操作的XeF激光器。
18.根据权利要求1的方法,其中所述辐射使用脉冲或光栅扫描模式进行。
19.根据权利要求1的方法,其中所述辐射以从0.1到5mJ/cm2脉冲的通量进行。
20.一种介质膜,包括包含Si,C,O和H原子的介质材料,所述介质材料被使用深紫外激光器辐射以在所述介质材料内引起光化学反应,从而具有共价键合的三维网络结构,不大于2.8的介电常数和与SiO2相同的吸收光谱。
21.根据权利要求20的介质膜,其中所述共价键合的三维网络结构包括Si-O,Si-C,Si-H,C-H和C-C键。
22.根据权利要求20的介质膜,其中所述介质材料包括直径在0.3和50nm之间的分子范围的空隙。
23.根据权利要求22的介质膜,其中所述分子空隙占0.5%和50%之间的体积。
24.根据权利要求20的介质膜,其中所述介质材料包括在水中小于10-9米每秒的裂纹扩展速度。
25.根据权利要求20的介质膜,还包括下面的衬底。
26.根据权利要求25的介质膜,其中所述下面的衬底包括半导体材料,绝缘材料,导体材料或包括半导体材料、绝缘材料和导体材料中至少两种的多层的组合。
27.根据权利要求26的介质膜,其中所述下面的衬底包括半导体材料。
28.根据权利要求20的介质膜,其中所述介质材料在激光处理后具有10或更多的泄漏电流的减少。
29.根据权利要求20的介质膜,其中所述反射光谱在激光处理后在248nm处具有60-70%的反射率。
30.一种电子结构,包括至少一种包括Si,C,O和H原子的介质材料,所述介质材料被使用深紫外激光器辐射以在所述介质材料内引起光化学反应,从而具有共价键合的三维网络结构,不大于2.8的介电常数和与SiO2相同的吸收光谱。
31.根据权利要求30的电子结构,其中所述共价键合的三维网络结构包括Si-O,Si-C,Si-H,C-H和C-C键。
32.根据权利要求30的电子结构,其中所述介质材料包括直径在0.3和50nm之间的分子范围的空隙。
33.根据权利要求32的电子结构,其中所述分子空隙占0.5%和50%之间的体积。
34.根据权利要求30的电子结构,其中所述介质材料包括在水中小于10-9米每秒的裂纹扩展速度。
35.根据权利要求30的电子结构,还包括下面的衬底。
36.根据权利要求35的电子结构,其中所述下面的衬底包括半导体材料,绝缘材料,导体材料或包括半导体材料、绝缘材料和导体材料中至少两种的多层的组合。
37.根据权利要求36的电子结构,其中所述下面的衬底包括半导体材料。
38.根据权利要求30的电子结构,其中所述介质材料具有10或更多的泄漏电流的减少。
39.根据权利要求30的电子结构,其中所述反射光谱在248nm处具有60-70%的反射率。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/923,247 | 2004-08-20 | ||
US10/923,247 US7223670B2 (en) | 2004-08-20 | 2004-08-20 | DUV laser annealing and stabilization of SiCOH films |
PCT/US2005/009112 WO2006022856A2 (en) | 2004-08-20 | 2005-03-17 | DUV LASER ANNEALING AND STABILIZATION OF SiCOH FILMS |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101006559A CN101006559A (zh) | 2007-07-25 |
CN101006559B true CN101006559B (zh) | 2011-10-26 |
Family
ID=35910180
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2005800274867A Expired - Fee Related CN101006559B (zh) | 2004-08-20 | 2005-03-17 | SiCOH膜的DUV激光退火及稳定性 |
Country Status (7)
Country | Link |
---|---|
US (3) | US7223670B2 (zh) |
EP (1) | EP1794781A4 (zh) |
JP (1) | JP5102618B2 (zh) |
KR (1) | KR101006329B1 (zh) |
CN (1) | CN101006559B (zh) |
TW (1) | TWI348191B (zh) |
WO (1) | WO2006022856A2 (zh) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10202036A1 (de) | 2002-01-18 | 2003-07-31 | Zeiss Carl Meditec Ag | Femtosekunden Lasersystem zur präzisen Bearbeitung von Material und Gewebe |
JP4338495B2 (ja) * | 2002-10-30 | 2009-10-07 | 富士通マイクロエレクトロニクス株式会社 | シリコンオキシカーバイド、半導体装置、および半導体装置の製造方法 |
US7485570B2 (en) * | 2002-10-30 | 2009-02-03 | Fujitsu Limited | Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device |
US20040253378A1 (en) * | 2003-06-12 | 2004-12-16 | Applied Materials, Inc. | Stress reduction of SIOC low k film by addition of alkylenes to OMCTS based processes |
US20050008789A1 (en) * | 2003-06-26 | 2005-01-13 | Rafac Robert J. | Method and apparatus for stabilizing optical dielectric coatings |
US7223670B2 (en) * | 2004-08-20 | 2007-05-29 | International Business Machines Corporation | DUV laser annealing and stabilization of SiCOH films |
US7678682B2 (en) * | 2004-11-12 | 2010-03-16 | Axcelis Technologies, Inc. | Ultraviolet assisted pore sealing of porous low k dielectric films |
US7622378B2 (en) | 2005-11-09 | 2009-11-24 | Tokyo Electron Limited | Multi-step system and method for curing a dielectric film |
US20070210421A1 (en) * | 2006-03-13 | 2007-09-13 | Texas Instruments Inc. | Semiconductor device fabricated using a carbon-containing film as a contact etch stop layer |
US8956457B2 (en) * | 2006-09-08 | 2015-02-17 | Tokyo Electron Limited | Thermal processing system for curing dielectric films |
US20090075491A1 (en) * | 2007-09-13 | 2009-03-19 | Tokyo Electron Limited | Method for curing a dielectric film |
US7964442B2 (en) * | 2007-10-09 | 2011-06-21 | Applied Materials, Inc. | Methods to obtain low k dielectric barrier with superior etch resistivity |
US7858533B2 (en) * | 2008-03-06 | 2010-12-28 | Tokyo Electron Limited | Method for curing a porous low dielectric constant dielectric film |
US7977256B2 (en) | 2008-03-06 | 2011-07-12 | Tokyo Electron Limited | Method for removing a pore-generating material from an uncured low-k dielectric film |
US20090226694A1 (en) * | 2008-03-06 | 2009-09-10 | Tokyo Electron Limited | POROUS SiCOH-CONTAINING DIELECTRIC FILM AND A METHOD OF PREPARING |
US20090226695A1 (en) * | 2008-03-06 | 2009-09-10 | Tokyo Electron Limited | Method for treating a dielectric film with infrared radiation |
US20100065758A1 (en) * | 2008-09-16 | 2010-03-18 | Tokyo Electron Limited | Dielectric material treatment system and method of operating |
US8895942B2 (en) * | 2008-09-16 | 2014-11-25 | Tokyo Electron Limited | Dielectric treatment module using scanning IR radiation source |
CN102413970B (zh) * | 2009-03-04 | 2016-08-10 | 施乐公司 | 结构化有机膜 |
US8242460B2 (en) * | 2010-03-29 | 2012-08-14 | Tokyo Electron Limited | Ultraviolet treatment apparatus |
CN102157439A (zh) * | 2011-03-01 | 2011-08-17 | 复旦大学 | 一种超低介电常数材料薄膜及其制备方法 |
US9881833B1 (en) * | 2016-10-26 | 2018-01-30 | International Business Machines Corporation | Barrier planarization for interconnect metallization |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4933206A (en) * | 1988-08-17 | 1990-06-12 | Intel Corporation | UV-vis characteristic writing in silicon nitride and oxynitride films |
US6147009A (en) * | 1998-06-29 | 2000-11-14 | International Business Machines Corporation | Hydrogenated oxidized silicon carbon material |
CN1430274A (zh) * | 2002-01-02 | 2003-07-16 | 艾格瑞系统有限公司 | 用于隔离多孔低k介电薄膜的结构和方法 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6473729A (en) * | 1987-09-16 | 1989-03-20 | Matsushita Electric Ind Co Ltd | Formation of thin film |
JP3170533B2 (ja) * | 1992-08-27 | 2001-05-28 | 株式会社半導体エネルギー研究所 | 薄膜状半導体装置の作製方法 |
JP3521737B2 (ja) * | 1998-03-30 | 2004-04-19 | セイコーエプソン株式会社 | 薄膜半導体装置の製造方法、アクティブマトリックス基板の製造方法及びテトラメトキシシランの塗布装置 |
US6121130A (en) * | 1998-11-16 | 2000-09-19 | Chartered Semiconductor Manufacturing Ltd. | Laser curing of spin-on dielectric thin films |
US6312793B1 (en) | 1999-05-26 | 2001-11-06 | International Business Machines Corporation | Multiphase low dielectric constant material |
US6768200B2 (en) * | 2000-10-25 | 2004-07-27 | International Business Machines Corporation | Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device |
US6441491B1 (en) | 2000-10-25 | 2002-08-27 | International Business Machines Corporation | Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device containing the same |
US6720522B2 (en) * | 2000-10-26 | 2004-04-13 | Kabushiki Kaisha Toshiba | Apparatus and method for laser beam machining, and method for manufacturing semiconductor devices using laser beam machining |
US20030087043A1 (en) * | 2001-11-08 | 2003-05-08 | International Business Machines Corporation | Low k dielectric film deposition process |
US6645853B1 (en) | 2001-12-05 | 2003-11-11 | Advanced Micro Devices, Inc. | Interconnects with improved barrier layer adhesion |
US7384471B2 (en) * | 2002-04-17 | 2008-06-10 | Air Products And Chemicals, Inc. | Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants |
US6903001B2 (en) | 2002-07-18 | 2005-06-07 | Micron Technology Inc. | Techniques to create low K ILD for BEOL |
US20040063308A1 (en) * | 2002-09-27 | 2004-04-01 | Taiwan Semiconductor Manufacturing Company | Method for forming openings in low-k dielectric layers |
US6991959B2 (en) | 2002-10-10 | 2006-01-31 | Asm Japan K.K. | Method of manufacturing silicon carbide film |
US7404990B2 (en) * | 2002-11-14 | 2008-07-29 | Air Products And Chemicals, Inc. | Non-thermal process for forming porous low dielectric constant films |
TWI240959B (en) * | 2003-03-04 | 2005-10-01 | Air Prod & Chem | Mechanical enhancement of dense and porous organosilicate materials by UV exposure |
JP4344841B2 (ja) * | 2003-05-30 | 2009-10-14 | 独立行政法人産業技術総合研究所 | 低誘電率絶縁膜の形成方法 |
US7030468B2 (en) * | 2004-01-16 | 2006-04-18 | International Business Machines Corporation | Low k and ultra low k SiCOH dielectric films and methods to form the same |
US7223670B2 (en) * | 2004-08-20 | 2007-05-29 | International Business Machines Corporation | DUV laser annealing and stabilization of SiCOH films |
US7491658B2 (en) * | 2004-10-13 | 2009-02-17 | International Business Machines Corporation | Ultra low k plasma enhanced chemical vapor deposition processes using a single bifunctional precursor containing both a SiCOH matrix functionality and organic porogen functionality |
US7335980B2 (en) * | 2004-11-04 | 2008-02-26 | International Business Machines Corporation | Hardmask for reliability of silicon based dielectrics |
US7371461B2 (en) * | 2005-01-13 | 2008-05-13 | International Business Machines Corporation | Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics |
-
2004
- 2004-08-20 US US10/923,247 patent/US7223670B2/en not_active Expired - Fee Related
-
2005
- 2005-03-17 EP EP05728347A patent/EP1794781A4/en not_active Withdrawn
- 2005-03-17 CN CN2005800274867A patent/CN101006559B/zh not_active Expired - Fee Related
- 2005-03-17 JP JP2007527209A patent/JP5102618B2/ja not_active Expired - Fee Related
- 2005-03-17 KR KR1020077002340A patent/KR101006329B1/ko not_active IP Right Cessation
- 2005-03-17 WO PCT/US2005/009112 patent/WO2006022856A2/en active Application Filing
- 2005-08-02 TW TW094126266A patent/TWI348191B/zh not_active IP Right Cessation
-
2007
- 2007-03-29 US US11/693,409 patent/US7560794B2/en not_active Expired - Fee Related
-
2008
- 2008-06-02 US US12/131,330 patent/US7755159B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4933206A (en) * | 1988-08-17 | 1990-06-12 | Intel Corporation | UV-vis characteristic writing in silicon nitride and oxynitride films |
US6147009A (en) * | 1998-06-29 | 2000-11-14 | International Business Machines Corporation | Hydrogenated oxidized silicon carbon material |
CN1430274A (zh) * | 2002-01-02 | 2003-07-16 | 艾格瑞系统有限公司 | 用于隔离多孔低k介电薄膜的结构和方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2006022856A3 (en) | 2007-01-11 |
US7223670B2 (en) | 2007-05-29 |
WO2006022856A2 (en) | 2006-03-02 |
US20070284698A1 (en) | 2007-12-13 |
KR20070042990A (ko) | 2007-04-24 |
JP2008511135A (ja) | 2008-04-10 |
US7755159B2 (en) | 2010-07-13 |
US20060040513A1 (en) | 2006-02-23 |
US7560794B2 (en) | 2009-07-14 |
EP1794781A2 (en) | 2007-06-13 |
TWI348191B (en) | 2011-09-01 |
TW200618106A (en) | 2006-06-01 |
CN101006559A (zh) | 2007-07-25 |
EP1794781A4 (en) | 2010-10-20 |
KR101006329B1 (ko) | 2011-01-06 |
JP5102618B2 (ja) | 2012-12-19 |
US20080230875A1 (en) | 2008-09-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101006559B (zh) | SiCOH膜的DUV激光退火及稳定性 | |
US7030468B2 (en) | Low k and ultra low k SiCOH dielectric films and methods to form the same | |
US7202564B2 (en) | Advanced low dielectric constant organosilicon plasma chemical vapor deposition films | |
US7491658B2 (en) | Ultra low k plasma enhanced chemical vapor deposition processes using a single bifunctional precursor containing both a SiCOH matrix functionality and organic porogen functionality | |
CN101138085B (zh) | 电介质叠层及其形成方法 | |
EP1617957B1 (en) | Method of forming an ultra low dielectric constant film | |
CN100388477C (zh) | 互连结构及其形成方法 | |
CN101548362B (zh) | 具有受控的双轴应力的超低介电常数层 | |
JP5324734B2 (ja) | 誘電体材料とその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20111026 Termination date: 20170317 |