CN101061590B - 发光器及其制造方法 - Google Patents

发光器及其制造方法 Download PDF

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CN101061590B
CN101061590B CN2005800395819A CN200580039581A CN101061590B CN 101061590 B CN101061590 B CN 101061590B CN 2005800395819 A CN2005800395819 A CN 2005800395819A CN 200580039581 A CN200580039581 A CN 200580039581A CN 101061590 B CN101061590 B CN 101061590B
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conductive layer
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CN101061590A (zh
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C·G·A·霍伦
A·C·J·C·范登阿克维肯
C·F·J·鲁特杰斯
K·范奥斯
M·A·德萨姆伯
T·C·特鲁尔尼特
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

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Abstract

本发明涉及发光器(10)，其包括：衬底(12)，在衬底的一个表面上形成的结构化导电层(16)，和与该结构化导电层连接的至少一个发光二极管(LED)芯片(18，26)。该发光器的特征在于其进一步包括在所述结构化导电层上面形成的未结构化反射层(24)，该未结构化反射层至少在所述至少一个LED芯片的周围具有基本上连续的范围。由于具有未结构化反射层，使得该发光器的光学效率得到了改进。另外本发明也涉及制造该发光器的方法。

Description

发光器及其制造方法
技术领域
本发明涉及一种发光器，其包括：衬底，于衬底的一个表面上形成的结构化导电层，和与该结构化导电层连接的至少一个光源。本发明也涉及一种制造这种发光器的方法。
背景技术
基于发光二极管(LED)的发光器，尤其是多芯片的LED模块正被广泛地发展。然而，对于LED，存在的一个问题是从LED芯片发出的光的方向性和均匀性非常差，这对LED模块的光学效率具有负面影响。
这个问题在例如申请号为2004/0080939的美国专利申请中被提到，该申请中公开了一种发光器，其包括安装于衬底上的光源，例如LED，和覆盖光源的透镜。衬底包括导电和反射材料的多个垫，其中各垫被电连接至光源。反射垫用于反射位于衬底总平面内的LED发出的光向上并穿过透镜，由此发光器的光学效率得到了改善。
然而，虽然在US2004/0080939中提出的方案对光学效率有部分改进，但从LED发出的光仍然被例如衬底和各垫之间的边界吸收。因此，需要具有改进光学效率的基于LED的发光器。
发明内容
本发明的一个目的在于提供具有改进光学效率的发光器。
利用根据所附权利要求的发光器和相应的制造方法可以实现这个目的和其它目的，通过下面的描述其将是清楚的。
根据本发明的第一方面，提供一种发光器，其包括：衬底，形成在衬底的一个表面上的结构化导电层，与结构化导电层连接的至少一个光源，和形成在所述结构化导电层上的未结构化的反射层，该未结构化的反射层至少在所述至少一个光源的周围具有基本上连续的范围。
该导电层被结构化为多个分离的导电轨迹(track)，同时该反射层未被结构化，也就是未被分割成小的分离部分。术语未结构化意味着所述反射层具有一非常适合反射的表面构造，也就是没有引起任何光吸收的不规则形状(就结构化层而言)，否则该吸收对反射效率具有负面影响。因此，本发明基于以下认识，即通过在结构化导电层上提供未结构化的反射层，可以获得具有良好反射特性的大面积区域，以用于反射光源产生的光远离衬底，而这将增加发光器的光学效率。
应注意，即使该反射层是未结构化的，它也能包括用于容纳一个或多个光源的接触孔。
根据该实施例，可获得本发明的一个优点，即能获得用于将光源产生的光反射远离衬底的最大反射面积，这同样有助于最大化发光器的光学效率。
在本发明的一个实施例中，未结构化的反射层基本上覆盖了衬底的整个表面。大体上，除了光源的电连接器与导电层电接触的地方外，反射层能覆盖整个衬底。
未结构化的反射层可以为任意适合的反射材料。进一步地，未结构化的反射层可以是导电的或非导电的。在前面的例子中，反射层优选包括Ag，Al，Ni和Cr中的一种，它们都显示出优良的反射特性。在后面的例子中，可以使用玻璃状的层。
进一步地，如果使用导电的未结构化反射层，发光器优选另外包括一形成于未结构化的反射层和结构化的导电层之间的绝缘层。由于该中间绝缘层，在未结构化的反射层和结构化的导电层之间的短路风险将会消除。其中绝缘层优选包括接触孔，用于实现光源和结构化导电层之间的连接。
在本发明的一个实施例中，光源为倒装焊安装。可替换地，光源例如可以被线焊。优选地，光源是LED芯片。因此，根据本发明的发光器包括安装在单个衬底上的多个倒装焊LED和/或线焊LED(即多芯片LED模块/发光器)。
根据本发明的另一方面，提供一种制造发光器的方法，包括：提供一衬底，在所述衬底的一个表面上形成结构化的导电层，设置至少一个光源与所述结构化导电层连接，在所述结构化导电层的上面形成未结构化的反射层，该未结构化的反射层至少在所述至少一个光源的周围具有基本上连续的范围。该方法可获得与本发明先前描述的方面相似的优点。也应注意，根据第二方面的方法中的步骤的顺序不限于上面描述的顺序。例如，未结构化的反射层也可在安装光源之前形成。
附图说明
参照示出了当前优选实施例的附图，下面将更详细地说明本发明的该些方面和其它方面。
图1是根据本发明一个实施例的包括倒装焊安装的LED发光器的侧视图，
图2是根据本发明另一实施例的包括线焊LED芯片发光器的侧视图，和
图3a-3f显示了根据本发明的制造发光器方法的步骤。
具体实施方式
图1显示了根据本发明实施例的发光器10，发光器10包括衬底12，例如硅衬底，形成在衬底12的上面的介电层14，和形成在介电层14上面的结构化导电层16。结构化导电层16覆盖部分衬底表面并形成了导电轨迹，具有接触垫19的LED芯片18安装在该导体轨迹上。因此，通过结构化导电层16，LED芯片18能被电连接至外部电路。图1中的LED芯片18是倒装焊安装的，并且导电层16优选包括Cu。
具有LED芯片18的衬底优选被光学元件(未示出)覆盖，例如光学透镜或准直器。同样，衬底12的底侧优选焊接到用于散热的散热器(未示出)。
根据本发明，进一步提供绝缘层(20)来覆盖衬底12和导电层16。该绝缘层20可为例如有机PI或BCB层。该绝缘层中具有接触孔22，以用于连接LED芯片18和结构化导电层16的导电轨迹。
进一步地，在绝缘层20的上面，提供有分离的未结构化反射层24。反射层24优选包括Al或Ag，这两者都具有良好的反射特性。反射层24覆盖了衬底中环绕LED芯片18的区域但并不限于导电层16的范围。优选地，未被任何LED芯片占据的衬底的整个区域均被未结构化反射层24覆盖，这样可获得最大可能的反射区域。
在发光器10的操作上，反射层24用于反射LED芯片18产生的光远离衬底并穿过覆盖衬底和芯片的任何透镜。由于反射层24未结构化的性质，可以防止光被不规则结构如结构化导电层16或者衬底12吸收。这使得发光器10的发光效率得到改善。由于绝缘层20的缘故，在分离的反射层24和导电层16之间不会发生短路。
应注意，在LED下面具有部分未结构化的反射层也是可能的，也就是，反射层仅在LED的接触垫处被蚀刻。
图2示出了根据本发明另一实施例的发光器10。在图2中的发光器10与先前描述的图1中所示的发光器相似，不同之处在于，用LED芯片26代替了倒装芯片18，LED芯片26具有经由焊线28的顶接触。如在图2中看到的，在本实施例中，反射层24覆盖了环绕LED26和焊线28的区域。然而，反射层延伸在LED芯片26和焊线28与导电轨迹16的连接位置之间也是可能的。因此，如果那样的话，如上面所述，未结构化的反射层仅在LED芯片的电连接器与下部导电轨迹的电连接处被蚀刻。除了焊线，图2的实施例与根据图1描述的实施例功能上相似并具有相似的优点。
应注意，即使在图1-2中各自仅有一个LED芯片(为了简明)，可以想到根据本发明的发光器可包括设置在单个衬底上的多个LED芯片，例如多个倒装焊安装的LED，多个线焊的LED，或者倒装焊安装的LED和线焊的LED的任意组合。
根据本发明制造发光器的方法现在将参考图3a-3f进行说明。
首先(图3a)，提供由例如硅制成的衬底12。
接着(图3b)，在衬底12的上侧形成介电层14。
接着(图3c)，结构化导电层16沉积在介电层14上面。层16优选包括Cu并且构成发光器的导电轨迹。然而，应注意任何其它合适的低电阻金属轨迹均可被替换使用。
接着(图3d)，形成绝缘层20，该层覆盖衬底12的介电层14和结构化导电层16。接触孔22也被提供在绝缘层22中以在要被安装的LED芯片和导电层16的轨迹之间实现连接。接触孔22的尺寸和形状取决于要被安装的LED芯片。
接着(图3e)，反射层24沉积在绝缘层20上。反射层24优选包括Al或Ag。为了容纳一个或多个LED芯片，部分反射层24被蚀刻。
最后(图3f)，LED芯片被安装以使得它和导电轨迹16相连接，此处LED芯片为倒装芯片18。
如上，在发光器的操作上，围绕LED18的未结构化反射层24用以反射LED芯片发出的光远离衬底，由此发光器的光学效率得到了改进。
本发明并不限于上面描述的实施例，本领域普通技术人员将认识到可以作出不脱离附随的权利要求申明的本发明范围的变化和改变。

Claims (9)

1.一种发光器(10)，包括：
衬底(12)，
形成在所述衬底的一个表面的结构化导电层(16)，和
与所述结构化导电层相连的至少一个光源(18，26)，
其特征在于该发光器进一步包括：
形成在所述结构化导电层上面的未结构化反射层(24)，所述未结构化反射层至少在所述至少一个光源的周围具有基本上连续的范围，其中所述未结构化反射层还覆盖了未被任何光源或与所述光源相接的任何电连接器占据的衬底的整个表面。
2.根据权利要求1所述的发光器，其中所述未结构化反射层基本上覆盖衬底的整个表面。
3.根据权利要求1所述的发光器，进一步包括形成在所述结构化导电层和所述未结构化反射层之间的绝缘层(20)。
4.根据权利要求3所述的发光器，其中所述绝缘层包括接触孔(22)，以在光源和结构化导电层之间实现连接。
5.根据前述权利要求中任一项所述的发光器，其中所述光源是倒装芯片光源(18)和线焊光源(26)之一。
6.根据前述权利要求中任一项所述的发光器，其中所述光源是发光二极管。
7.一种制造发光器的方法，所述方法包括：
提供衬底(12)，
在所述衬底的一个表面上形成结构化导电层(16)，
设置至少一个光源(18，26)与所述结构化导电层连接，
其特征在于所述方法进一步包括：
在所述结构化导电层的上面形成未结构化反射层(24)，所述未结构化反射层至少在所述至少一个光源的周围具有基本上连续的范围，其中所述未结构化反射层还覆盖了未被任何光源或与所述光源相接的任何电连接器占据的衬底的整个表面。
8.根据权利要求7所述的方法，进一步包括：在所述结构化导电层和所述未结构化反射层之间形成绝缘层(20)。
9.根据权利要求8所述的方法，进一步包括：在绝缘层中提供接触孔(22)，以在光源和结构化导电层之间实现连接。
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US8541797B2 (en) 2013-09-24
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ATE541320T1 (de) 2012-01-15
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