CN101080009B - Filtering method and device for removing block in image encoder/decoder - Google Patents
Filtering method and device for removing block in image encoder/decoder Download PDFInfo
- Publication number
- CN101080009B CN101080009B CN 200710127900 CN200710127900A CN101080009B CN 101080009 B CN101080009 B CN 101080009B CN 200710127900 CN200710127900 CN 200710127900 CN 200710127900 A CN200710127900 A CN 200710127900A CN 101080009 B CN101080009 B CN 101080009B
- Authority
- CN
- China
- Prior art keywords
- square
- pixel
- data
- address
- pixel data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000001914 filtration Methods 0.000 title abstract description 11
- 239000012536 storage buffer Substances 0.000 claims abstract description 119
- 239000000872 buffer Substances 0.000 claims abstract description 47
- 241001269238 Data Species 0.000 claims description 39
- 238000003860 storage Methods 0.000 abstract description 10
- 239000010432 diamond Substances 0.000 abstract 4
- 238000010586 diagram Methods 0.000 description 28
- 101100490563 Caenorhabditis elegans adr-1 gene Proteins 0.000 description 3
- 101100388220 Caenorhabditis elegans adr-2 gene Proteins 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 239000012634 fragment Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Images
Abstract
This invention discloses a de-diamonds filtration method and a device used in image code-decode devices including: receiving a big diamonds pixel data output by a mobile compensation unit to divide the data into multiple pixel data and carrying out a data exchange process to the data and storing the data into a storage buffer, utilizing said pixel data in the buffer storage to filter the level pixel of the diamonds to update part of the pixel data in the buffer, and exchanging said data in the buffer and carrying out vertical pixel filtration action using the pixel data to update part of said large diamonds pixel data in the buffer.
Description
Technical field
The present invention relates to a kind of codec, and be particularly related to a kind of applying to and remove square filter method and device in the image codec (VideoCodec).
Background technology
In recent years, digital broadcast machine, digital television case and personal computer can be presented in the high quality images image quality on the screen and be become the main flow of digital audio-video now.That is to say, the video and audio fragment that TV programme now or player are shown all can utilize the image coding and decoding technology of various different sizes to finish high-quality audio-visual output, wherein just so-called image compression of image coding and decoding technology and decompression technique.
With present stage common on the market image coding and decoding technology have at least MPEG-2, H.264, Divx or the like.And Microsoft (Microsoft) in 2003 to (the Society of MotionPicture and Television Engineers of film and television engineering association, SMPTE) propose its image coding and decoding technology newly developed and be called image codec 1 (Video Codec 1 is hereinafter to be referred as VC-1).Owing to VC-1 doing well on the high-resolution film, therefore regarded as international standard by film and television engineering association.
With all now image coding and decoding technology is example, and the coding of digital picture or decoding are based on square (Block) and carry out.That is to say, an image picture frame (Frame) can be cut into a plurality of squares and be used for encoding or deciphering, therefore, and when decoding and reconstructed image picture frame, the edge that each square is adjacent can seem smooth-going inadequately, and this promptly is called square phenomenon (Blocking Phenomenon).For the square phenomenon in the removal of images picture frame, must in image codec, provide one to remove square filter element (Deblocking Filtering Unit).
In general, the square filter element that goes in the image codec is to be connected in a motion compensation unit (Motion Compensating Unit), exporting the image picture frame with square phenomenon in order to receive the motion compensation unit, is the image picture frame of exportable elimination square phenomenon and go the square filter element to go after the square filter action.Color space (Color Space) with Y, U, V is an example.Please refer to Fig. 1, it illustrates is the pixel Y value image picture frame that 12 big squares (Macroblock) are formed.This image picture frame is made up of 12 big squares that (MB1～MB12), and each big square all comprises the data of 16 * 16 bytes (byte), that is to say, the Y value of each pixel is a byte.And 16 * 16 bytes in big square are promptly represented corresponding the 1st～256 byte of the 1st～256 pixel (Pixel), and each byte is the Y value of opposite position in the representative image picture frame.Moreover, be 32 internal memory with data/address bus, four bytes can be deposited in an address, therefore need 64 data that continuation address comes a big square of access.And address arrangement that is to say in proper order for from top to bottom increasing progressively in regular turn from left to right, and the 1st～4 pixel Y value is stored in first address (Adr1), and the 5th～8 pixel Y value is stored in second address (Adr2), and the rest may be inferred, has 64 addresses (Adr64).In other words, need 64 addresses in the internal memory and deposit 256 pixel Y values that big square is required.With the sixth-largest square (MB6) is example, and the 1st～256 byte align of the 1st～256 pixel of 16 * 16 byte representatives is for from left to right, from top to bottom.Moreover, be example with the eighth-largest square (MB8), need 64 data that continuation address comes a big square of access, each address can store 4 pixel Y values.
Moreover because the ratio data of the color space of Y, U, V is 4: 2: 0, the needed memory size of pixel picture frame of the pixel picture frame of U value and V value is less, and the mode of its data arrangement is same as the pixel picture frame of Y value.Therefore, the following description is all done explanation with the pixel picture frame of Y value.
Because the decoding of image all is to be that unit carries out with the square in the image codec.Therefore, the data of the extremely big square 12 (MB12) of big square one (MB1) as shown in Figure 1 can be exported in regular turn to removing the square filter element in the motion compensation unit in the image codec.That is to say that all can there be the square phenomenon on the border of each adjacent big square in the image picture frame of being made up of big square one (MB1) to big square 12 (MB12).Therefore, all pixels of generous block edge must recomputate and obtain a Y value of upgrading through past square filter element, do not have the image of square phenomenon picture frame in order to finish.With big square six (MB6) is example, and the Y value of at least the 1～17th byte, the 32nd and 33 byte, the 48th and 49 byte, the 64th and 65 pixel, the 80th and 81 pixel, the 96th and 97 pixel, the 112nd and 113 pixel, the 128th and 129 pixel, the 144th and 145 pixel, the 160th and 161 pixel, the 176th and 177 pixel, the 192nd and 193 pixel, the 208th and 209 pixel, the 224th and 225 pixel, the 240th～256th pixel need recomputate.And when going the each Y value of upgrading a pixel of square filter element, must calculate with reference near the Y value of a plurality of pixels this pixel, in order to obtain the renewal Y value of this pixel.
Moreover according to VC-1 image coding and decoding technology, it is more to go the square filter element to eliminate the required number of pixels that recomputates of square phenomenon.Must utilize a storage buffer (Memory Buffer) temporarily to store the data of part pixel in other adjacent big square of the data of 256 pixels in the big square and this big square when therefore, going the square filter element that a big square is gone the square filter action.The square filter action of going with big square six (MB6) is an example, the data of 16 * 16 bytes (byte), the data that must use big square two (MB2) 8 * 16 bytes in top, the big square five of left (MB5) 16 * 8 bytes and the big square one in upper left side (MB1) 8 * 8 bytes are in addition come computing in big square six (MB6).That is to say, going will have a storage buffer in the square filter element at least, in order to the data of temporary transient storage 24 * 24 bytes, when on behalf of the square filter action of going of big square six (MB6), the pixel Y value that all need be updated in the storage buffer promptly finish by calculating and after being stored to storage buffer once more.Therefore, the data in the storage buffer can be deposited to a picture frame buffer (Frame Buffer), and the square filter action of going of the big square seven (MB7) that continues promptly can utilize this storage buffering to carry out once more, and the rest may be inferred.After all big squares were all finished the square filter action, this picture frame buffer promptly stored the image picture frame of a no square phenomenon.
According to VC-1 image coding and decoding technology, go the square filter action to comprise that (Horizontal) of level goes that square filter action and vertical (vertical's) go the square filter action.Please refer to Fig. 2 A to Fig. 2 H, its illustrate is for removing square filter action schematic diagram in the VC-1 image coding and decoding technology.With big square six (MB6) is example, shown in Fig. 2 A to Fig. 2 D, according to the specification of VC-1 image coding and decoding technology, what (Horizontal) pixel of level need go earlier just can to carry out after the square filter action vertical (vertical) pixel goes the square filter action.And the pixel of level goes the square filter action to be in proper order: the pixel of the 8th in the storage buffer, 9 row (R8, R9) is gone earlier square filter action (horizontal boundary of just big square six (MB6)); Then, the 4th, 5 row (R4, R5) go the square filter action; Then, the 16th, 17 row (R16, R17) go the square filter action; Then, the 12nd, 13 row (R12, R13) go the square filter action.Shown in Fig. 2 E to Fig. 2 H, vertical pixel goes the square filter action to be in proper order: the 8th in the storage buffer, 9 row (C8, C9) go earlier square filter action (vertical boundary of just big square six (MB6)); Then, the 4th, 5 row (C4, C5) go the square filter action; Then, the 16th, 17 row (C16, C17) go the square filter action; Then, the 12nd, 13 row (C12, C13) go the square filter action.
Specification according to VC-1 image coding and decoding technology, when going the square filter element will handle the 1st pixel of the 241st pixel that the 8th, 9 row (R8, R9) go up big square two (MB2) and big square six (MB6), shown in Fig. 2 A, go the square filter element to utilize altogether this two pixel up and down totally eight pixels calculate the 241st and 1 pixel Y value after the renewal, the 1st, 17,33,49 pixels of the 193rd, 209,225,241 pixels of just big square two (MB2) and big square six (MB6).When going the square filter element will handle the 129th pixel of the 144th pixel that the 8th, 9 row (C8, C9) go up big square one (MB1) and big square two (MB2), shown in Fig. 2 E, go the square filter element will utilize about this two pixel the 144th and 129 pixel Y values after totally eight pixels are calculated renewal, the 129th～132 pixel of the 141st～144 pixel of just big square one (MB1) and bulk two (MB2) altogether.
Please refer to Fig. 3, its illustrate is for removing square filter element schematic diagram in the known image codec.Wherein, go the square filter element comprise a filter (Filter) 16, a multiplexer 18, with a storage buffer.And storage buffer comprise a generous block buffer (Macroblock buffer) 10, one column buffer (Column Buffer) 12, with a line buffer (Row Buffer) 14, and generous block buffer size is 16 * 16 bytes, the column buffer size is 24 * 8 bytes, and line buffer size is 8 * 16 bytes.When filter 16 to handle a pixel go the square filter action time, filter 16 must utilize multiplexer 18 to read near the Y value of a plurality of pixels this pixel in the storage buffer and calculate in order to the numerical value that produces the pixel of upgrading and time deposit.For instance, among Fig. 2 A according to VC-1 image coding and decoding technology carry out the 1st pixel in the 241st pixel in the big square two (MB2) and the big square six (MB6) go the square filter action time, filter 16 must read in the big square two (MB2) the 241st, 225,209,193 in totally four pixels and the big square six (MB6) the 1st, 17,33, the 49 Y values of totally four pixels, filter 16 are utilized the numerical value of eight pixels to calculate the numerical value of the 1st pixel in the 241st pixel in the big square two (MB2) that the back obtains to upgrade and the big square six (MB6) and are returned and deposit to storage buffer.When the Y of all pixels that need be updated value be updated in regular turn finish after, the Y value of all pixels can be returned and be deposited to the picture frame buffer in the storage buffer, and is stored in storage buffer and is gone the square filter action by the Y value that the picture frame buffer reads follow-up big square and relevant pixel thereof once more.
Filter method, device and media (Filtering method in the image codec that is disclosed as U.S. Patent Application Publication US2006/0013315 application case, apparatus, and medium used inaudio-video codec) in, the square filter element that goes that it disclosed has the not high shortcoming of access efficiency when going the square filter action.Be described as follows:
Because the data of all pixel Y values all are to be stored in the storage buffer with continuation address in the big square, therefore, when going the square filter element will carry out the filter action of level, must read the data of eight addresses, for instance, read in the big square two (MB2) the 241st, 225,209,193 in totally four pixels and the big square six (MB6) the 1st, 17,33,49 during the Y value of totally four pixels, goes the square filter element must read address 49 (Adr49) in the big square two (MB2) in regular turn, 53 (Adr53), 57 (Adr57), address 1 (Adr1) in 61 (Adr61) and the big square six (MB6), 5 (Adr5), 9 (Adr9), the data of each byte are calculated among 13 (Adr13).Therefore, go the square filter element must utilize a plurality of internal memory read cycles (Cycle) just can read the Y value of eight pixels, just can utilize filter to calculate the pixel Y value of renewal afterwards.Moreover, since horizontal pixel go square filter action and vertical pixel go the square filter action time pixel Y value read regular differently, therefore, can cause very complexity of whole Circuit Design of removing the square filter element.
Summary of the invention
How designing in the square filter element data arrangement in the storage buffer reaches the efficient square method of going in order to the simplified control circuit design and is main purpose of the present invention.Therefore, the present invention proposes to remove the square filter method in a kind of image codec, comprises the following steps: to receive the big square pixel data by motion compensation unit output; Should be divided into a plurality of square pixel datas by big square pixel data, and these square pixel datas were carried out a data swapping program; These square pixel datas of finishing the data swapping program are stored to a storage buffer; Utilize this big square pixel data in this storage buffer to carry out a horizontal pixel filter action of this big square in order to upgrade this big square pixel data of part in this storage buffer; Before carrying out a vertical pixel filter action, these square pixel datas in this storage buffer are carried out this data swapping program; And, utilize these square pixel datas in this storage buffer to carry out this vertical pixel filter action of this big square in order to upgrade this big square pixel data of part in this storage buffer.
The present invention also proposes to go in a kind of image codec the square filter, comprise: a storage buffer, this storage buffer can receive the big square pixel data by motion compensation unit output, wherein, this big square pixel data can be divided into a plurality of square pixel datas, and these square pixel datas have been carried out a data swapping program; One first input buffer is in order to receive by the partial pixel data in the one first square pixel data in this storage buffer; One second input buffer is in order to receive by the partial pixel data in this storage buffer one second square pixel data; One of them that one filter, this filter are changed one of them of these pixel datas in this first input buffer according to these pixel datas of this first input buffer and this second input buffer and changed these pixel datas in this second input buffer; One first output register group is in order to receive these pixel datas that are modified in this first input buffer and do not change; One second output register group is in order to receive these pixel datas that are modified in this second input buffer and do not change; And, one data swapping multiplexer, according to a data swapping signal-selectivity ground these pixel datas in this first output register group and this second output register group are carried out this data swapping program or do not carry out this data swapping program, these pixel datas in this first output register group and this second output register group are returned respectively deposit afterwards to this storage buffer.
The present invention also proposes to go in a kind of image codec the square filter, this goes the square filter can receive a plurality of big square pixel data of being exported in regular turn by a motion compensation unit, and each this big square pixel data can be divided into a plurality of square pixel datas, this goes the square filter to comprise: a storage buffer, this storage buffer can be divided into one first storage buffer cell at least, one second storage buffer cell, one the 3rd storage buffer cell, with one the 4th storage buffer cell, each storage buffer cell all can store this big square pixel data in regular turn, and wherein these square pixel datas in this big square pixel data are through a data swapping program; And, one filtering module, this filtering module can carry out the square action according to this second storage buffer cell and the 3rd storage these big square pixel datas in the buffer cell, and will go these big square pixel datas after the square action to return to deposit to store buffer cell to this first storage buffer cell and this second; Wherein, when this filtering module utilized these the big square pixel datas in this second storage buffer cell and the 3rd storage buffer cell to carry out the square action, another big square pixel data and this first storage buffer cell that the 4th storage buffer cell can receive after this data swapping program can be sent to a picture frame buffer with this stored big square pixel data after past square action.
Description of drawings
It is the pixel Y value image picture frame that 12 big squares (Macroblock) are formed that Fig. 1 illustrates.
Fig. 2 A to Fig. 2 H illustrate is for removing square filter action schematic diagram in the VC-1 image coding and decoding technology.
Fig. 3 illustrate is for removing square filter element schematic diagram in the known image codec.
It is the internal storage data transposing program schematic diagram of 4 * 4 bytes that Fig. 4 illustrates.
Fig. 5 illustrate is for being the arrangement schematic diagram of square with 4 * 4 bytes in the storage buffer.
Fig. 6 A illustrate is carried out the schematic diagram of the 8th row (R8) and the 9th row (R9) for the present invention goes to the square unit.
Fig. 6 B illustrate is carried out the schematic diagram of fourth line (R4) and fifth line (R5) for the present invention goes to the square unit.
Fig. 6 C illustrate is carried out the schematic diagram of the 16 row (R16) and the 17 row (R17) for the present invention goes to the square unit.
Fig. 6 D illustrate is carried out the schematic diagram of the 12 row (R12) and the tenth triplex row (R13) for the present invention goes to the square unit.
Fig. 6 E illustrate is carried out the schematic diagram that the 8th row (C8) and the 9th are listed as (C9) for the present invention goes to the square unit.
Fig. 6 F illustrate is carried out the schematic diagram that the 4th row (C4) and the 5th are listed as (C5) for the present invention goes to the square unit.
Fig. 6 G illustrate is carried out the schematic diagram that the 16 row (C16) and the 17 are listed as (C17) for the present invention goes to the square unit.
Fig. 6 H illustrate is carried out the schematic diagram that the 12 row (C12) and the 13 are listed as (C13) for the present invention goes to the square unit.
Fig. 7 illustrate is removed square filter element schematic diagram for the present invention.
Another removes square filter element schematic diagram to Fig. 8 illustrate for the present invention.
Wherein, description of reference numerals is as follows:
10 generous block buffer 12 column buffers
14 line buffers, 16 filters
18 multiplexers, 110 storage buffers
120 first input registers, 130 second input registers
140 filters, 150 first output register groups
160 second output register groups, 170 data swapping multiplexers
210 storage buffer 210a, the first storage buffer cell
The 210b second storage buffer cell 210c the 3rd storage buffer cell
210d the 4th storage buffer cell 220 first input registers
230 second input registers, 240 filters
250 first output register groups, 260 second output register groups
270 data swapping multiplexers, 205 memory spaces
Embodiment
In order further to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing, yet appended accompanying drawing only provide with reference to and explanation, be not to be used for being limited the present invention.
For to solve known when removing square filter element access storage buffer, just must utilize more storage read cycle can read the Y value of eight pixels.The present invention proposes a kind of square filter method and device of going in order to solving known shortcoming, and makes control circuit go the square filter action all identical with the data flow of going the square filter action of vertical pixel in what carry out horizontal pixel.
Please refer to Fig. 4, it illustrates is internal storage data transposing (Transpose) program schematic diagram of 4 * 4 bytes.As shown in the figure, its address of the internal memory of 4 * 4 bytes is Adr (x), Adr (x+4), Adr (x+8), Adr (x+12).Wherein, four byte datas among the Adr (x) are a0～a3, and four byte datas among the Adr (x+4) are that four byte datas among b0～b3, the Adr (x+8) are c0～c3, and four byte datas among the Adr (x+12) are d0～d3.After the internal storage data transposing, four byte datas among the Adr (x) are a0～d0, and four byte datas among the Adr (x+4) are that four byte datas among a1～d1, the Adr (x+8) are a2～d2, and four byte datas among the Adr (x+12) are a3～d3.In like manner, carrying out the data swapping program once more promptly is that four byte datas among the Adr (x) are reduced to a0～a3, four byte datas that four byte datas among the Adr (x+4) are reduced among b0～b3, the Adr (x+8) are reduced to c0～c3, and four byte datas among the Adr (x+12) are reduced to d0～d3.And the present invention utilizes this kind data swapping to promote the pixel data access efficiency.
Please refer to Fig. 5, its illustrate is for being the arrangement schematic diagram of square (Block) with 4 * 4 bytes in the storage buffer.With big square six (MB6) is example, and the data among the address 1 (Adr1) in the big square six (MB6), address 5 (Adr5), address 9 (Adr9), address 13 (Adr13) can be formed the square one (B1) in the big square six (MB6).In like manner, the data among the address 2 (Adr2) in the big square six (MB6), address 6 (Adr6), address 10 (Adr10), address 14 (Adr14) can be formed the square two (B2) in the big square six (MB6), and the rest may be inferred.Therefore, as shown in Figure 5, when go the square filter element carry out big square six (MB6) go the square filter action time, storage buffer must store square 11 (B11), square 12 (B12), square 15 (B15), the square 16 (B16) of big square one (MB1) separately; Square three (B3), square four (B4), square seven (B7), square eight (B8), square 11 (B11), square 12 (B12), square 15 (B15), the square 16 (B16) of big square five (MB5); And the data in the square nine (B9) of big square two (MB2), square ten (B10), square 11 (B11), square 12 (B12), square 13 (B13), square 14 (B14), square 15 (B15), the square 16 (B16) are in order to go the square filter action.
According to embodiments of the invention, when going the square filter element to receive the generous blocks of data of being exported by the motion compensation unit in the image codec, removing the square filter element must be that unit carries out the data swapping program with the square earlier, afterwards, the square that will carry out after the data swapping program is temporary in the storage buffer.And go that the square filter element can begin to carry out horizontal pixel go the square filter action.And Fig. 6 A to be with the square be unit through the data arrangement of the pixel Y value in the storage buffer after the data swapping program.
Please refer to Fig. 6 A, its illustrate is carried out the schematic diagram of the 8th row (R8) and the 9th row (R9) for the present invention goes to the square unit.By Fig. 2 A as can be known, when going the square filter element to upgrade the 13rd pixel Y value of big square five (MB5) in the 253rd pixel Y value of big square one (MB1) in the 8th row (R8) and the 9th row (R9), must read this two pixel totally eight pixel Y values up and down, that is, the pixel Y value of big square one (MB1) the 205th pixel, the 221st pixel, the 237th pixel, the 253rd pixel and big square five (MB5) the 13rd pixel, the 29th pixel, the 45th pixel, the 61st pixel.Referring again to Fig. 6 A, because the present invention is with data storing advanced line data transposing program to the storage buffer, therefore, above-mentioned eight pixel Y values just can be stored in two addresses, just, the 52nd address (Adr52) of big square one (MB1) and big square five (MB5) the 4th address (Adr4).Therefore, go to the square unit only need send two reading command and read above-mentioned two address data and can obtain eight pixel Y values, and upgrade identical address in the 253rd pixel Y value and the 13rd pixel Y value and this storage buffer of Hui Cunzhi.
In like manner, when going the square filter element to upgrade the 14th pixel Y value of big square five (MB5) in the 254th pixel Y value of big square one (MB1) in the 8th row (R8) and the 9th row (R9), go to the square unit only need send eight interior pixel Y values of the 56th address (Adr56) and big square five (MB5) the 8th address (Adr8) that two reading command read big square one (MB1) and calculate also identical address in this storage buffer of Hui Cunzhi of the 254th pixel Y value after obtaining to upgrade and the 14th pixel Y value.Then, eight pixels that read in the 12nd address (Adr12) of the 60th address (Adr60) of big square one (MB1) and big square two (MB2) continue to calculate the pixel Y values of upgrading, and the rest may be inferred promptly can finish the 8th row (R8) and the 9th go (R9) horizontal pixel go the square filter action.Above-mentioned example all is to utilize the data/address bus of 32 (bits) to read storage buffer, that is to say, goes the square filter element need send two reading command and obtains eight pixel Y values.Certainly the present invention can also utilize the data/address bus of 64 (bits) to read storage buffer, that is to say, can make the square filter element only need to send a reading command by suitable data arrangement and can obtain eight pixel Y values.
Moreover, when the horizontal pixel of the 8th row (R8) and the 9th row (R9) go the square filter action to finish after, please refer to Fig. 6 B, its illustrate is carried out the schematic diagram of fourth line (R4) and fifth line (R5) for the present invention goes to the square unit.According to illustrating of Fig. 2 B, when going the square filter element to upgrade the 189th pixel Y value of big square one (MB1) in fourth line (R4) and the fifth line (R5) and the 205th pixel Y value, must read this two pixel totally eight pixel Y values up and down, that is, the pixel Y value of big square one (MB1) the 141st pixel, the 157th pixel, the 173rd pixel, the 189th pixel, the 205th pixel, the 221st pixel, the 237th pixel, the 253rd pixel; Wherein, the pixel Y value of the 253rd pixel the 8th the row (R8) with the 9th the row (R9) horizontal pixel go the square filter action time be updated.Therefore, by Fig. 6 B as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 36th address (Adr36) of big square one (MB1) and the 52nd address (Adr52) and calculates also identical address in this storage buffer of Hui Cunzhi of the 189th pixel Y value after can obtaining to upgrade and the 205th pixel Y value.Then, eight pixels that read in the 40th address (Adr40) of big square one (MB1) and the 56th address (Adr56) continue to calculate pixel Y values of upgrading, and the rest may be inferred promptly can finish fourth line (R4) and fifth line (R5) horizontal pixel go the square filter action.According to embodiments of the invention, since the horizontal pixel of fourth line (R4) and fifth line (R5) go the square filter action to finish after, in first square (MB1) and the second largest square (MB2) all pixel Y value follow-up horizontal pixel go will no longer be read in the square filter action, therefore, all pixel Y values can square be that unit carries out the data swapping program in first square (MB1) and the second largest square (MB2).And after finishing the data swapping program of first square (MB1) and second largest square (MB2), the data arrangement of storage buffer is shown in first square (MB1) among Fig. 6 C and second largest square (MB2).
Moreover, when the horizontal pixel of fourth line (R4) and fifth line (R5) go the square filter action to finish after, please refer to Fig. 6 C, its illustrate is carried out the schematic diagram of the 16 row (R16) and the 17 capable (R17) for the present invention goes to the square unit.According to illustrating of Fig. 2 C, when going the square filter element to upgrade the 125th pixel Y value of big square five (MB5) in the 17 row (R17) and the 18 row (R18) and the 141st pixel Y value, must read this two pixel totally eight pixel Y values up and down, that is, the pixel Y value of big square five (MB5) the 77th pixel, the 93rd pixel, the 109th pixel, the 125th pixel, the 141st pixel, the 157th pixel, the 173rd pixel, the 189th pixel.By Fig. 6 C as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 20th address (Adr20) of big square five (MB5) and the 36th address (Adr36) and calculates also identical address in this storage buffer of Hui Cunzhi of the 125th pixel Y value after can obtaining to upgrade and the 141st pixel Y value.Then, eight pixels that read in the 24th address (Adr24) of big square five (MB5) and the 40th address (Adr40) continue to calculate pixel Y values of upgrading, and the rest may be inferred promptly can finish the 16 row (R16) and the 17 go (R17) horizontal pixel go the square filter action.
Then, when the horizontal pixel of the 16 row (R16) and the 17 row (R17) go the square filter action to finish after, please refer to Fig. 6 D, its illustrate is carried out the schematic diagram of the 12 row (R12) and the tenth triplex row (R13) for the present invention goes to the square unit.According to illustrating of Fig. 2 D, when going the square filter element to upgrade the 61st pixel Y value of big square five (MB5) in the 12 row (R12) and the tenth triplex row (R13) and the 77th pixel Y value, must read this two pixel totally eight pixel Y values up and down, that is, the pixel Y value of big square five (MB5) the 13rd pixel, the 29th pixel, the 45th pixel, the 61st pixel, the 77th pixel, the 93rd pixel, the 109th pixel, the 125th pixel; Wherein, the pixel Y value of the 13rd pixel the 8th the row (R8) with the 9th the row (R9) horizontal pixel go the square filter action time be updated; The pixel Y value of the 125th pixel the 16 the row (R16) with the 17 the row (R17) horizontal pixel go the square filter action time be updated.By Fig. 6 D as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 4th address (Adr4) of big square five (MB5) and the 20th address (Adr20) and calculates also identical address in this storage buffer of Hui Cunzhi of the 61st pixel Y value after can obtaining to upgrade and the 77th pixel Y value.Then, eight pixels that read in the 8th address (Adr8) of big square five (MB5) and the 24th address (Adr24) continue to calculate pixel Y values of upgrading, and the rest may be inferred promptly can finish the 12 row (R12) and the tenth triplex row (R13) horizontal pixel go the square filter action.According to embodiments of the invention, since the horizontal pixel of the 12 row (R12) and the tenth triplex row (R13) go the square filter action to finish after, the square filter action of going of all horizontal pixels is all finished, therefore, all pixel Y values can square be that unit carries out the data swapping program in the fifth-largest square (MB5) and the sixth-largest square (MB6).And after finishing the data swapping program of the fifth-largest square (MB5) and the sixth-largest square (MB6), the fifth-largest square (MB5) of the data arrangement of storage buffer in shown in Fig. 6 E is with shown in the sixth-largest square (MB6).
When all horizontal pixels go the square filter action all to finish after, that goes that the square filter element then carries out vertical pixel goes the square filter action.Please refer to Fig. 6 E, its illustrate is carried out the schematic diagram that the 8th row (C8) and the 9th are listed as (C9) for the present invention goes to the square unit.Because the data of all big squares have all been carried out the data swapping program in the storage buffer, therefore, when the 144th pixel Y value and the 9th of going the square filter element to upgrade big square one (MB1) in the 8th row (C8) is listed as the 129th pixel Y value of big square two (MB2) in (C9), must read about this two pixel totally eight pixel Y values, that is, the pixel Y value of big square one (MB1) the 141st pixel, the 142nd pixel, the 143rd pixel, the 144th pixel and big square two (MB2) the 129th pixel, the 130th pixel, the 131st pixel, the 132nd pixel.By Fig. 6 E as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 33rd address (Adr33) of the 36th address (Adr36) of big square one (MB 1) and big square two (MB2) and calculates also identical address in this storage buffer of Hui Cunzhi of the 144th pixel Y value after can obtaining to upgrade and the 129th pixel Y value.Then, eight pixels that read in the 37th address (Adr37) of the 40th address (Adr40) of big square one (MB1) and big square two (MB2) continue to calculate the pixel Y values of upgrading, and the rest may be inferred promptly can finish the 8th row (C8) and the 9th be listed as (C9) vertical pixel go the square filter action.
When finish the 8th row (C8) with the 9th row (C9) vertical pixel go the square filter action after.Please refer to Fig. 6 F, its illustrate is carried out the schematic diagram that the 4th row (C4) and the 5th are listed as (C5) for the present invention goes to the square unit.When going the square filter element to upgrade the 140th pixel of big square one (MB1) in the 4th row (C4) and the 5th row (C5) and the 141st pixel Y value, must read about this two pixel totally eight pixel Y values, that is, the pixel Y value of big square one (MB 1) the 137th pixel, the 138th pixel, the 139th pixel, the 140th pixel, the 141st pixel, the 142nd pixel, the 143rd pixel, the 144th pixel.Wherein, the pixel Y value of the 144th pixel the 8th row (C8) with the 9th row (C9) vertical pixel go the square filter action time be updated.By Fig. 6 F as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 35th address (Adr35) of big square one (MB1) and the 36th address (Adr36) and calculates also identical address in this storage buffer of Hui Cunzhi of the 140th pixel Y value after can obtaining to upgrade and the 141st pixel Y value.Then, eight pixels that read in the 39th address (Adr39) of big square one (MB1) and the 40th address (Adr40) continue to calculate pixel Y values of upgrading, and the rest may be inferred promptly can finish the 4th row (C4) and the 5th be listed as (C5) vertical pixel go the square filter action.
When finish the 4th row (C4) with the 5th row (C5) vertical pixel go the square filter action after.Please refer to Fig. 6 G, its illustrate is carried out the schematic diagram that the 16 row (C16) and the 17 are listed as (C17) for the present invention goes to the square unit.When going the square filter element to upgrade the 136th pixel Y value of big square two (MB2) in the 16 row (C16) and the 17 row (C17) and the 137th pixel Y value, must read about this two pixel totally eight pixel Y values, that is, the pixel Y value of big square two (MB2) the 133rd pixel, the 134th pixel, the 135th pixel, the 136th pixel, the 137th pixel, the 138th pixel, the 139th pixel, the 140th pixel.By Fig. 6 G as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 34th address (Adr34) of big square two (MB2) and the 35th address (Adr35) and calculates also identical address in this storage buffer of Hui Cunzhi of the 136th pixel Y value after can obtaining to upgrade and the 137th pixel Y value.Then, eight pixels that read in the 38th address (Adr38) of big square two (MB2) and the 39th address (Adr39) continue to calculate pixel Y values of upgrading, and the rest may be inferred promptly can finish the 16 row (C16) and the 17 be listed as (C17) vertical pixel go the square filter action.
When finish the 16 row (C16) with the 17 row (C17) vertical pixel go the square filter action after.Please refer to Fig. 6 H, its illustrate is carried out the schematic diagram that the 12 row (C12) and the 13 are listed as (C13) for the present invention goes to the square unit.When going the square filter element to upgrade the 132nd pixel of big square two (MB2) in the 12 row (C12) and the 13 row (C13) and the 133rd pixel Y value, must read about this two pixel totally eight pixel Y values, that is, the pixel Y value of big square two (MB2) the 129th pixel, the 130th pixel, the 131st pixel, the 132nd pixel, the 133rd pixel, the 134th pixel, the 135th pixel, the 136th pixel.Wherein, the pixel Y value of the 129th pixel the 8th row (C8) with the 9th row (C9) vertical pixel go the square filter action time be updated; The pixel Y value of the 136th pixel the 16 row (C16) with the 17 row (C17) vertical pixel go the square filter action time be updated.By Fig. 6 H as can be known, going to the square unit only need send two reading command reads eight pixel Y values in the 33rd address (Adr33) of big square two (MB2) and the 34th address (Adr34) and calculates also identical address in this storage buffer of Hui Cunzhi of the 132nd pixel Y value after can obtaining to upgrade and the 133rd pixel Y value.Then, the 37th address (Adr37) and eight pixels in the 38th address (Adr38) that read big square two (MB2) continue to calculate the pixel Y value of upgrading, and the rest may be inferred promptly can finish the 12 row (C12) and the 13 row (C13) vertical pixel go the square filter action, and finish all vertical pixels go the square filter action.
Above embodiment is an example with the data/address bus that storage buffer has 32 (bits), that is to say, go the square filter element to send the pixel Y value that two reading command promptly can obtain eight pixels, and the mode of utilizing the VC-1 specifications to be disclosed calculate the pixel Y value of renewal.Certainly the present invention can also utilize the data/address bus of 64 (bits) to read storage buffer, that is to say, can make the square filter element only need to send a reading command by the Data Position in the suitable data arrangement storage buffer and can obtain eight pixel Y values.
Please refer to Fig. 7, its illustrate is removed square filter element schematic diagram for the present invention.Wherein, this go the square filter element comprise at least a storage buffer 110, one first input register 120, one second input register 130, a filter 140, one first output register group 150, one second output register group 160, with a data swapping multiplexer 170.According to embodiments of the invention, go the square filter element carry out pixel Y value go square to handle action the time to need size be that the storage buffer 110 of 576 bytes (24 * 24 byte) is in order to the pixel Y value that stores a big square and the partial pixel Y value of three big squares.Moreover when the motion compensation unit is that unit transmits pixel Y value when removing the square filter element with big square, removing the square filter element can be that unit carries out being stored to storage buffer 110 again after the data swapping program with the square.
As shown in Figure 7, go the square filter action when what remove the square filter element to begin to carry out horizontal pixel, go the square filter element can read eight pixel Y values in the storage buffer 110 and temporary respectively to first input register (register) 120 and second input register 130, that is, P3, P2, P1, P0 and Q3, Q2, Q1, Q0.According to embodiments of the invention, the data-bus width of storage buffer 110 is 64, that is to say, utilizes a read cycle promptly can read eight pixel Y values.
Then, filter 140 can calculate the pixel Y value of renewal and be stored to the first output register group 150 and the second output register group 160 according to the pixel Y value in first input register (register) 120 and second input register 130, that is to say that filter 140 upgrades the pixel Y value of P0 and Q3 and keeps the pixel Y value of P3, P2, P1 and Q2, Q1, Q0.
According to embodiments of the invention, all comprise four registers in the first output register group 150 and the second output register group 160, each register can store 32 data.And calculate the pixel Y value of renewal when filter 140 after, P3, P2, P1, P0 and Q3, Q2, Q1, Q0 can divide other to be stored to a register in the first output register group 150 and the second output register group 160.Moreover, after going the square filter element can send four read cycles and filter 140 to carry out upgrading pixel Y value for four times, the first output register group 150 and the second output register group 160 have been filled with, and at this moment, removing the square processing unit can be that unit stores back raw address with the square.
Moreover, data swapping multiplexer 170 can according to a data swapping signal optionally receive in the first output register group 150 and second output register 160 through the square of data swapping program or receive the first output register group 150 with second output register 160 in pass through the square of data swapping program.For instance, when go the square filter element carry out fourth line (R4) and fifth line (R5) horizontal pixel go the square filter action time, be that unit returns the data of depositing to storage buffer 110 and must carry out the data swapping program with the square.That is to say, go the square filter element carry out horizontal pixel go the square filter action time, if square follow-up horizontal pixel go can not be utilized once more in the square filter action program time, this square return deposits to storage buffer 110 just must be through the data swapping program.
In like manner, when go the square filter element to begin to carry out vertical pixel go the square filter action time, go the square filter element promptly to can read eight pixel Y values and temporary respectively in the storage buffer 110 to first input register 120 and second input register 130.Calculate the pixel Y value of renewal when filter 140 after, P3, P2, P1, P0 and Q3, Q2, Q1, Q0 can divide other to be stored to a register in the first output register group 150 and the second output register group 160.And its all handling procedure and horizontal pixel go the square filter action identical.
When storage buffer 110 oneself finish all pixels go the square filter action after, all data in this storage buffer 110 all can be moved in the picture frame buffer.Afterwards, this storage buffer can receive the data of follow-up big square and go the square filter action.For instance, when big square six (MB6) go the square filter action to finish after and after all data in the storage buffer 110 are moved into the picture frame buffer, storage buffer 110 can receive all pixel Y values of big squares seven (MB7) and big square six (MB6), big square two (MB2), big square three (MB3) partly pixel Y value and go the square filter action.
In order to improve the efficient of square filter element, please refer to Fig. 8, another removes square filter element schematic diagram to its illustrate for the present invention.Wherein, this go the square filter element comprise at least a storage buffer 210, one first input register 220, one second input register 230, a filter 240, one first output register group 250, one second output register group 260, with a data swapping multiplexer 270.According to embodiments of the invention, the square that goes that goes the square filter element to carry out pixel Y value is handled four storage buffer cells that size is 384 bytes (24 * 16 byte) of needs when moving, that is size all is the first storage buffer cell 210a, the second storage buffer cell 210b, the 3rd storage buffer cell 210c, the 4th storage buffer cell 210d of 384 bytes.
For instance, suppose that the pixel Y value of the fifth-largest square is stored in the lower part of the second storage buffer cell 210b, the pixel Y value of the sixth-largest square is stored in the lower part of the 3rd storage buffer cell 210c, the upper part of the second storage buffer cell 210b is the pixel Y value of first square part, and the upper part of the 3rd storage buffer cell 210c is the pixel Y value of second largest square part.When go the square filter element carry out big square six (MB6) go the square filter action time, must use among the second storage buffer cell 210b and the 3rd storage buffer cell 210c pixel Y value of totally 576 (24 * 24) byte, that is the memory space 205 of Fig. 8.In order to improve the efficient of square filter element, go the square filter element carry out the sixth-largest square (MB6) go the square filter action time, it is that unit carries out the data swapping program and is stored to the 4th storage buffer cell 210d with the square that the motion compensation unit can continue the pixel Y value in the seventh-largest square (MB7), simultaneously, the first pixel Y value of storing in the fourth-largest square (MB4) of having finished the square filter action among the buffer cell 210a also can move on to the picture frame buffer.
After the sixth-largest square (MB6) is finished the square filter action, pixel Y value in the seventh-largest square (MB7) among the 4th storage buffer cell 210d has stored and has finished, and the pixel Y value in the fourth-largest square (MB4) among the first storage buffer cell 210a has also moved on to the picture frame buffer.At this moment, that can carry out big square seven (MB7) goes the square filter action, and must use among the 3rd storage buffer cell 210c and the 4th storage buffer cell 210d pixel Y value of totally 576 (24 * 24) byte, that is memory space 205 past moving right one are stored buffer cell.At this moment, it is that unit carries out the data swapping program and is stored to the first storage buffer cell 210a with the square that the motion compensation unit can continue the pixel Y value in the eighth-largest square (MB8), simultaneously, the second pixel Y value of storing in the fifth-largest square (MB5) of having finished the square filter action among the buffer cell 210b also can move on to the picture frame buffer.
That is to say, storage buffer is actually a cyclic buffer (Ring Buffer), when going the square filter element to go the square filter action, what the memory space of two storages in the buffer cell can be used to carry out specific big square goes the square filter action, a storage buffer cell can be used to continue to store the pixel Y value of next big square, and a storage buffer cell can be used to the pixel Y value of big square is moved on to the picture frame buffer.
As previously mentioned, when the reality realization was of the present invention, storage buffer 110 (or 210) can be formed by two each 32 memory module A, B (not icon), and adjacent up and down square is stored in different memory modules respectively.With Fig. 5 is example, and the square B16 of big square MB1 can be stored in memory module A, adjacent square (the square B13 of big square MB2) can be stored in memory module B; Square under it (big square MB6 square B1) can be stored in memory module A and the square B4 of big square MB5 can be stored in memory module B.This interleaving access can make full use of 64 data-bus width, just can obtain four pixels will carrying out Filtering Processing respectively from memory module A, B in same read cycle.Such as, handle in the example at capable R8, the R9 of Fig. 6 A, the present invention just can be by the pixel 205,221,237,253 that obtains big square MB 1 among the memory module A in same read cycle, and, handle to carry out deblocking filtering by the pixel 13,29,45,61 that obtains big square MB5 among the memory module B.In other words, the data of memory module A can provide the capable input of R8 to filter, and the data of memory module B can provide to the capable input of R9 of filter and handle to carry out the capable square that goes of R8-R9; And the R8/R9 line output of filter also can be returned respectively and deposited to memory module A/B.In like manner, the present invention also can be by the pixel 193,209,225,241 that obtains big square MB2 among the memory module B in same read cycle, and carries out Filtering Processing by the pixel 1,17,33,49 that obtains big square MB6 among the memory module A.But, in this case, because the capable pixel of R8 is to be stored in memory module B and the capable pixel of R9 is to be stored in memory module A, so will be alternately with the transfer of data of memory module B the capable input of R8 to filter, and the transfer of data of the memory module A capable input of R9 to filter so could correctly to be carried out the capable square that goes of R8-R9 and handles.In addition, the R8/R9 line output after the filter process also will be returned respectively alternately and be deposited to memory module B/A.The present invention can be provided with the staggered mechanism of control respectively at the input of filter and output and go into staggered with the output of controlled filter device.
As everyone knows, the ratio data of the color space of Y, U, V is 4: 2: 0.Therefore, pixel U value and pixel V value are gone the square filter action, also must utilize aforesaid way to carry out, and its difference only is that the capacity of storage buffer is less, and the opportunity of data swapping program is all identical.
In sum; though the present invention discloses as above with preferred embodiment; yet it is not in order to limit the present invention; any technical staff who is familiar with this technology; without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is when being as the criterion with accompanying claims.
Claims (8)
1. remove the square filter method in an image codec, comprise the following steps:
Reception is by an adjacent first square pixel data, a second largest square pixel data, a third-largest square pixel data, a fourth-largest square pixel data of motion compensation unit output;
With this third-largest square pixel data of this second largest square pixel data of this first square pixel data, part, part, and partly this fourth-largest square pixel data be divided into a plurality of square pixel datas, and described square pixel data is carried out a data swapping program;
The described square pixel data of finishing the data swapping program is stored to a storage buffer;
Utilize the described square pixel data in this storage buffer to carry out a horizontal pixel filter action of this first square in order to upgrade this first square pixel data of part in this storage buffer;
Before carrying out a vertical pixel filter action, the described square pixel data in this storage buffer is carried out this data swapping program; And
Utilize the described square pixel data in this storage buffer to carry out this vertical pixel filter action of this first square in order to upgrade this first square pixel data of part in this storage buffer;
Wherein, each this square pixel data comprises 4x 4 bytes, promptly comprise b0, b1, b2, b3 position, the three-address of the a0, the a1 that place first address, a2, a3 position, second address c0, c1, c2, c3 position, with four address d0, d1, d2, d3 position, this data swapping program changes first address in each this square pixel data into a0, b0, c0, d0 position, second address and changes that a1, b1, c1, d1 position, three-address change a2, b2, c2, d2 position into, the four-address changes a3, b3, c3, d3 position into into.
2. remove the square filter method in the image codec as claimed in claim 1, comprise that also this first square pixel data in this storage buffer is sent to a picture frame buffer after this horizontal pixel filter action and this vertical pixel filter action with finishing.
3. remove the square filter method in the image codec as claimed in claim 1, wherein carry out once this horizontal pixel filter action time spent and need be undertaken by each four bit data that all read in the address in two square pixel datas.
4. remove the square filter method in the image codec as claimed in claim 1, wherein carry out once this vertical pixel filter action time spent and need be undertaken by each four bit data that all read in the address in two square pixel datas.
5. remove the square filter method in the image codec as claimed in claim 1, wherein this big square pixel data comprises a plurality of pixel Y Value Datas, a plurality of pixel U Value Data or a plurality of pixel V Value Data.
6. remove the square filter in an image codec, comprising:
One storage buffer, this storage buffer receives the first square pixel data by motion compensation unit output, one second largest square pixel data, one the third-largest square pixel data, one the fourth-largest square pixel data, this first square pixel data, this second largest square pixel data, this the third-largest square pixel data, this the fourth-largest square pixel data is divided into a plurality of square pixel datas, and described square pixel data has been carried out a data swapping program to carry out a horizontal pixel filter action, wherein, each this square pixel data comprises the 4x4 byte, promptly comprise the a0 that places first address, a1, a2, the a3 position, the b0 of second address, b1, b2, the b3 position, the c0 of three-address, c1, c2, the c3 position, with four address d0, d1, d2, the d3 position, this data swapping program changes first address in each this square pixel data into a0, b0, c0, the d0 position, second address changes a1 into, b1, c1, the d1 position, three-address changes a2 into, b2, c2, the d2 position, the four-address changes a3 into, b3, c3, the d3 position;
One first input register is in order to receive by four bit data in the address in the one first square pixel data of a plurality of square pixel datas described in this storage buffer;
One second input register is in order to receive by four bit data in the address in the one second square pixel data of a plurality of square pixel datas described in this storage buffer;
One of them that one filter, this filter are changed one of them of described four bit data in this first input register according to totally eight bit data of this first input register and this second input register and changed described four bit data in this second input register;
One first output register group is in order to receive described four bit data that are modified in this first input register and do not change;
One second output register group is in order to receive described four bit data that are modified in this second input register and do not change; And
One data swapping multiplexer, before carrying out a vertical pixel filter action, according to a data swapping signal the described pixel data in this first output register group and this second output register group is carried out this data swapping program, the described pixel data in this first output register group and this second output register group is returned respectively deposit afterwards to this storage buffer.
7. remove the square filter in the image codec as claimed in claim 6, wherein, this storage buffer will return to deposit to the described pixel data of this storage buffer and be sent to a picture frame buffer.
8. remove the square filter in the image codec as claimed in claim 6, wherein this big square pixel data comprises a plurality of pixel Y Value Datas, a plurality of pixel U Value Data or a plurality of pixel V Value Data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200710127900 CN101080009B (en) | 2007-07-17 | 2007-07-17 | Filtering method and device for removing block in image encoder/decoder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200710127900 CN101080009B (en) | 2007-07-17 | 2007-07-17 | Filtering method and device for removing block in image encoder/decoder |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101080009A CN101080009A (en) | 2007-11-28 |
| CN101080009B true CN101080009B (en) | 2011-02-23 |
Family
ID=38907197
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200710127900 Expired - Fee Related CN101080009B (en) | 2007-07-17 | 2007-07-17 | Filtering method and device for removing block in image encoder/decoder |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101080009B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI469643B (en) * | 2009-10-29 | 2015-01-11 | Ind Tech Res Inst | Deblocking apparatus and method for video compression |
| CN111028360B (en) * | 2018-10-10 | 2022-06-14 | 芯原微电子(上海)股份有限公司 | Data reading and writing method and system in 3D image processing, storage medium and terminal |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5832135A (en) * | 1996-03-06 | 1998-11-03 | Hewlett-Packard Company | Fast method and apparatus for filtering compressed images in the DCT domain |
| US6823087B1 (en) * | 2001-05-15 | 2004-11-23 | Advanced Micro Devices, Inc. | Parallel edge filters in video codec |
| CN1725860A (en) * | 2004-07-19 | 2006-01-25 | 三星电子株式会社 | The filtering method that in audio-video codec, uses, equipment and medium |
| EP1296288B1 (en) * | 2001-09-21 | 2006-04-19 | Interuniversitair Microelektronica Centrum Vzw | A 2D FIFO device and method for use in block based coding applications |
| CN1870752A (en) * | 2005-05-23 | 2006-11-29 | 其乐达科技股份有限公司 | Deblock filtering method and device for video-frequency coding/decoding |
| CN1874516A (en) * | 2006-06-22 | 2006-12-06 | 上海交通大学 | Implementation device in VLSI of filter for removing blocking effect based on AVS |
-
2007
- 2007-07-17 CN CN 200710127900 patent/CN101080009B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5832135A (en) * | 1996-03-06 | 1998-11-03 | Hewlett-Packard Company | Fast method and apparatus for filtering compressed images in the DCT domain |
| US6823087B1 (en) * | 2001-05-15 | 2004-11-23 | Advanced Micro Devices, Inc. | Parallel edge filters in video codec |
| EP1296288B1 (en) * | 2001-09-21 | 2006-04-19 | Interuniversitair Microelektronica Centrum Vzw | A 2D FIFO device and method for use in block based coding applications |
| CN1725860A (en) * | 2004-07-19 | 2006-01-25 | 三星电子株式会社 | The filtering method that in audio-video codec, uses, equipment and medium |
| CN1870752A (en) * | 2005-05-23 | 2006-11-29 | 其乐达科技股份有限公司 | Deblock filtering method and device for video-frequency coding/decoding |
| CN1874516A (en) * | 2006-06-22 | 2006-12-06 | 上海交通大学 | Implementation device in VLSI of filter for removing blocking effect based on AVS |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101080009A (en) | 2007-11-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI335764B (en) | In-loop deblocking filtering method and apparatus applied in video codec | |
| CN101860662B (en) | Video processing device, video display device, and video processing method | |
| CN1804900B (en) | Apparatus and method for edge handling in image processing | |
| CN1717055A (en) | Use the deblocking filter apparatus and the method for sub-macro-block-shifting register arrays | |
| US8295360B1 (en) | Method of efficiently implementing a MPEG-4 AVC deblocking filter on an array of parallel processors | |
| EP2997539B1 (en) | Method and device for processing input image data | |
| EP1977372B1 (en) | Method and apparatus for scaling down a bayer domain image | |
| EP2819415B1 (en) | Image decoding apparatus | |
| CN1921625A (en) | Filtering method and system of deblocking effect filter | |
| CN101080009B (en) | Filtering method and device for removing block in image encoder/decoder | |
| US8369635B2 (en) | Information processing device and method | |
| EP1296288B1 (en) | A 2D FIFO device and method for use in block based coding applications | |
| US20110200254A1 (en) | Image processing device, image processing method, and computer program | |
| EP2400455A1 (en) | System, data structure, and method for transposing multi-dimensional data to switch between vertical and horizontal filters | |
| JP4245123B2 (en) | Wavelet processing apparatus and wavelet processing method | |
| CN102055971B (en) | Deblocking filtering apparatus and method for video compression | |
| US8213731B2 (en) | Information processing device and method | |
| CN104754363B (en) | Loop circuit filtering method and device, encoder and decoder for HEVC | |
| CN101005619A (en) | Loop circuit filtering method | |
| CN113689407A (en) | Image correction method and related equipment | |
| CN101710938A (en) | Image signal processor, image processing system and image processing method | |
| JP5157951B2 (en) | Image processing apparatus and image processing method | |
| CN1589005A (en) | Video image pixel interpolation device | |
| CA2752287A1 (en) | System, data structure, and method for transposing multi-dimensional data to switch between vertical and horizontal filters | |
| US10204600B2 (en) | Storage system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110223 Termination date: 20150717 |
|
| EXPY | Termination of patent right or utility model |