CN101083267A - 半导体结构以及制造半导体结构的方法 - Google Patents
半导体结构以及制造半导体结构的方法 Download PDFInfo
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- CN101083267A CN101083267A CNA2007100893285A CN200710089328A CN101083267A CN 101083267 A CN101083267 A CN 101083267A CN A2007100893285 A CNA2007100893285 A CN A2007100893285A CN 200710089328 A CN200710089328 A CN 200710089328A CN 101083267 A CN101083267 A CN 101083267A
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
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- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
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- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
Abstract
Description
Claims (20)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US11/444,011 | 2006-05-31 | ||
US11/444,011 US7671421B2 (en) | 2006-05-31 | 2006-05-31 | CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials |
Publications (2)
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CN101083267A true CN101083267A (zh) | 2007-12-05 |
CN100508194C CN100508194C (zh) | 2009-07-01 |
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US (3) | US7671421B2 (zh) |
CN (1) | CN100508194C (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102420144A (zh) * | 2011-06-15 | 2012-04-18 | 上海华力微电子有限公司 | 一种改善先栅极工艺高k栅电介质nmos hci方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
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US7671421B2 (en) * | 2006-05-31 | 2010-03-02 | International Business Machines Corporation | CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials |
JP5119696B2 (ja) * | 2007-03-20 | 2013-01-16 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
US8120123B2 (en) | 2007-09-18 | 2012-02-21 | Samsung Electronics Co., Ltd. | Semiconductor device and method of forming the same |
DE102008064930B3 (de) * | 2007-09-18 | 2022-09-15 | Samsung Electronics Co., Ltd. | Halbleitervorrichtung mit reduzierter Dicke |
US8258587B2 (en) * | 2008-10-06 | 2012-09-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistor performance with metal gate |
US8362622B2 (en) | 2009-04-24 | 2013-01-29 | Synopsys, Inc. | Method and apparatus for placing transistors in proximity to through-silicon vias |
KR101623123B1 (ko) * | 2009-07-23 | 2016-05-23 | 삼성전자주식회사 | 반도체소자 및 그 제조방법 |
JP6019599B2 (ja) * | 2011-03-31 | 2016-11-02 | ソニー株式会社 | 半導体装置、および、その製造方法 |
US9041116B2 (en) | 2012-05-23 | 2015-05-26 | International Business Machines Corporation | Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) |
US8932920B2 (en) | 2013-05-29 | 2015-01-13 | International Business Machines Corporation | Self-aligned gate electrode diffusion barriers |
US10699911B2 (en) * | 2017-11-07 | 2020-06-30 | Tokyo Electron Limited | Method of conformal etching selective to other materials |
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KR100253394B1 (ko) * | 1997-12-29 | 2000-04-15 | 김영환 | 듀얼 게이트절연막을 가지는 게이트전극의 제조방법 |
US6221560B1 (en) * | 1999-08-12 | 2001-04-24 | Chartered Semiconductor Manufacturing Ltd. | Method to enhance global planarization of silicon oxide surface for IC device fabrication |
JP3547419B2 (ja) * | 2001-03-13 | 2004-07-28 | 株式会社東芝 | 半導体装置及びその製造方法 |
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-
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2010
- 2010-01-07 US US12/683,535 patent/US8158481B2/en not_active Expired - Fee Related
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2012
- 2012-02-09 US US13/369,707 patent/US8785281B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102420144A (zh) * | 2011-06-15 | 2012-04-18 | 上海华力微电子有限公司 | 一种改善先栅极工艺高k栅电介质nmos hci方法 |
Also Published As
Publication number | Publication date |
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US20120142181A1 (en) | 2012-06-07 |
CN100508194C (zh) | 2009-07-01 |
US8785281B2 (en) | 2014-07-22 |
US20070278586A1 (en) | 2007-12-06 |
US7671421B2 (en) | 2010-03-02 |
US20100112800A1 (en) | 2010-05-06 |
US8158481B2 (en) | 2012-04-17 |
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