CN101197423A - 制造存储单元中的自收敛存储材料元件的方法 - Google Patents
制造存储单元中的自收敛存储材料元件的方法 Download PDFInfo
- Publication number
- CN101197423A CN101197423A CNA2007101966851A CN200710196685A CN101197423A CN 101197423 A CN101197423 A CN 101197423A CN A2007101966851 A CNA2007101966851 A CN A2007101966851A CN 200710196685 A CN200710196685 A CN 200710196685A CN 101197423 A CN101197423 A CN 101197423A
- Authority
- CN
- China
- Prior art keywords
- layer
- memory cell
- opening
- width
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
- H10N70/026—Formation of the switching material, e.g. layer deposition by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/041—Modification of the switching material, e.g. post-treatment, doping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Patterning of the switching material
- H10N70/066—Patterning of the switching material by filling of openings, e.g. damascene method
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/884—Other compounds of groups 13-15, e.g. elemental or compound semiconductors
Abstract
一种在制造一存储单元时生成的自收敛存储材料元件,包括具有一底电极的一基底层以及一上层,该上层具有一第三平坦化停止层于基底层之上、一第二层于第三层之上、以及一第一层于第二层之上。一微孔开口形成穿透此上层以将底电极外露。第一层具有一凸悬部份延伸进入开口中。一介电材料沉积于微孔开口中,以生成一自收敛空洞于此微孔开口中。一非等向性蚀刻形成了一介电材料侧壁于微孔开口中,一电极孔对准至此空洞而将底电极外露。一存储材料沉积于电极孔中而接触至底电极,并向下平坦化至第三层以生成此存储材料元件。
Description
相关申请的交叉引用
本案涉及下列的美国专利申请,其申请日期均与本案的优先权日相同,且其受让人与发明人与本发明相同:“Method for Making aSelf-Converged Void and Bottom Electrode for Memory Cell”,律师档案号码MXIC1761-1;以及“Method for Making a Keyhole Opening Duringthe Manufacture ofa Memory Cell”,律师档案号码MXIC1775-1。联合研究合约的当事人
纽约国际商业机器公司(International Business MachinesCorporation)、台湾旺宏国际股份有限公司及德国英飞凌技术公司(Infineon Technologies A.G.)为联合研究合约的当事人。
技术领域
本发明涉及使用存储材料的高密度存储装置,例如电阻随机存取存储器(RRAM)装置,本发明还涉及制造这种装置的方法。通过施加电能,此存储材料可在不同的电气状态之间切换。此存储材料可为相变化存储材料,包括硫属化物与其他材料等。
背景技术
相变化存储材料广泛地用于读写光碟中。这些材料包括有至少两种固态相,包括如为非晶态的固态相,以及为结晶态的固态相。激光脉冲用于读写光碟片中,以在两种相中切换,并读取此种材料于相变化之后的光学性质。
如硫属化物及类似材料的这种相变化存储材料,可通过施加其幅度适用于集成电路中的电流,而致使晶相变化。一般而言非晶态的特征为其电阻高于结晶态,此电阻值可轻易测量得到而用以作为指示。这种特性则引发使用可编程电阻材料以形成非易失性存储器电路等兴趣,此电路可用于随机存取读写。
从非晶态转变至结晶态一般为一低电流步骤。从结晶态转变至非晶态(以下指称为重置(reset))一般为一高电流步骤,其包括一短暂的高电流密度脉冲以融化或破坏结晶结构,其后此相变化材料会快速冷却,抑制相变化的过程,使得至少部份相变化结构得以维持在非晶态。理想状态下,致使相变化材料从结晶态转变至非晶态的重置电流幅度应越低越好。欲降低重置所需的重置电流幅度,可通过减低在存储器中的相变化材料元件的尺寸、以及减少电极与此相变化材料的接触面积而实现,因此可针对此相变化材料元件施加较小的绝对电流值而达成较高的电流密度。
此领域发展的一种方法为致力于在一集成电路结构上形成微小孔洞,并使用微量可编程的电阻材料填充这些微小孔洞。致力于这种微小孔洞的专利包括:于1997年11月11日公告的美国专利第5,687,112号“Multibit Single Cell Memory Element Having TaperedContact”、发明人为Ovshinky;于1998年8月4日公告的美国专利第5,789,277号 “Method of Making Chalogenide[sic]MemoryDevice”、发明人为Zahorik等;于2000年11月21日公告的美国专利第6,150,253号“Controllable Ovonic Phase-Change SemiconductorMemory Device and Methods of Fabricating the Same”、发明人为Doan等。
在相变化存储器中,通过施加电流而致使相变化材料在非晶态与结晶态之间切换而储存数据。电流会加热此材料并致使在各状态之间转换。从非晶态转变至结晶态一般为一低电流步骤。从结晶态转变至非晶态(以下指称为重置(reset))一般为一高电流步骤。较佳将用以导致相变化材料进行转换(从结晶态转换至非晶态)的重置电流幅度最小化。重置所需要的重置电流幅度可以通过将存储单元中的主动相变化材料元件的尺寸减少而降低。相变化存储装置的问题之一在于,重置操作所需要的电流幅度,会随着相变化材料中需要进行相变化的体积大小而改变。因此,使用标准集成电路制程所制造的单元,将会受到制程设备的最小特征尺寸的限制。因此,必须研发可提供次微影尺寸的技术以制造存储单元,在大尺寸高密度存储装置中,通常缺少均一性与可靠性。
一种用以在相变化单元中控制主动区域尺寸的方式,设计非常小的电极以将电流传送至一相变化材料体中。此微小电极结构将在相变化材料的类似蕈状小区域中诱发相变化,亦即接触部位。请参照2002/8/22发证给Wicker的美国专利6,429,064号“Reduced ContactAreas of Sidewall Conductor”、2002/10/8发证给Gilgen的美国专利6,462,353“Method for Fabricating a Small Area of Contact BetweenElectrodes”、2002/12/31发证给Lowrey的美国专利6,501,111号“Three-Dimensional(3D)Programmable Device”、以及2003/7/1发证给Harshfield的美国专利6,563,156号“Memory Elements and Methodsfor Making same”。
因此,需要一种存储单元的制造方法与结构,使存储单元的结构可具有微小的可编程电阻材料主动区域,使用可靠且可重复的制程技术制造。
发明内容
用以在制造一存储单元时生成一自收敛存储材料元件的例示方法之一,包括形成一基底层,其包括一底电极、以及形成一上层于此基底层之上。此上层形成步骤包括形成一第三平坦化停止层于基底层之上、形成一第二层于第三层之上、以及形成一第一层于第二层之上。一微孔开口形成而穿透上层,以外露底电极的一表面,并生成一第一存储单元次组合。此微孔开口包括形成于第一层中的第一上开口部分、形成于第二层中的第二开口部分、以及形成于第三层中的第三开口部分。第一与第二开口部分分别具有第一与第二宽度。第一层具有一凸悬部分延伸进入开口中,使得第一宽度小于第二宽度。一介电材料沉积于此微孔开口中也生成一第二存储单元次组合。第二存储单元次组合在所沉积的介电材料之中,包括了一空洞,此空洞在微孔开口中为一自收敛空洞。第二存储单元次组合被非等向性地蚀刻,进而形成一介电材料侧壁于此微孔开口中,且一电极孔对准至此空洞而将底电极外露。一存储材料沉积于电极孔中,并接触至底电极,以生成一第三存储单元次组合。此第三存储单元次组合向下平坦化至第三平坦化停止层,以形成一第四存储单元次组合,其包括由存储材料所构成的存储材料元件、以及一平坦上表面。此平坦上表面由存储材料元件、介电填充材料以及第三层所定义。
在某些实例中,蚀刻步骤、存储材料沉积步骤与平坦化步骤的进行,使得存储材料元件在平坦上表面处的宽度,实质上小于微孔形成步骤的最小特征尺寸。
在某些实例中,蚀刻步骤、存储材料沉积步骤与平坦化步骤的进行,使得存储材料在平坦上表面处的宽度,与最小微影特征尺寸无关。
在某些实例中,微孔形成步骤包括了,增加第一层的体积。在某些实例中,微孔形成步骤包括了回蚀刻第二层。
在某些实例中,开口形成步骤的进行,生成一最小尺寸开口。
以下详细说明本发明的结构与方法。本发明说明书的目的并非在于定义本发明。本发明由所附权利要求书所定义。举凡本发明的实施例、特征、目的及优点等将可通过以下的描述及所附图式获得充分了解。
附图说明
图1-7示出了本发明制程的一实施例的各步骤;
图1为一第一存储单元次组合的简化侧视图,包括一基底层与一上层,同时一开口形成于上层中;
图2示出了图1结构进行氧化步骤以生成一较小尺寸微孔开口的结果;
图3示出了在图2的较小尺寸开口中以一氧化沉积步骤形成一自对准空洞的结果;
图4示出了图3的结构进行蚀刻的结果,以生成一电极孔开口延伸至基底层的底电极;
图5示出了存储材料沉积于图4结构中的结果,包括沉积于图4的电极孔开口中;
图6示出了图5的结构在化学机械研磨后的结果,以从存储材料生成一存储材料元件于电极孔开口中;
图7示出了一上电极形成于存储材料元件之上;
图8-14示出了图1-7的制程的替代实施例的各步骤。
【主要元件符号说明】
10 第一存储单元次组合
12 基底层
14 上层
18 底电极
20 氧化物层
22 第一层
24 第二层
26 第三层
28 开口
30 上表面
32 较小尺寸微孔开口
33 凸悬部分
34 第一宽度
36 第二宽度
37 凸悬尺寸
38 介电材料
40 第二存储单元次组合
42 空洞
44 电极孔开口
46 存储材料
48 第三存储单元次组合
50 第四存储单元次组合
52 平坦外表面
54 存储材料元件
56 存储材料元件的直径
58 上电极
60 相变化区域
64 存储单元
66 内延伸
具体实施方式
以下的发明说明将参照至特定结构实施例与方法。可以理解的是,本发明的范畴并非限定于特定所披露的实施例,且本发明可利用其他特征、元件、方法与实施例进行实施。较佳实施例被描述以了解本发明,而非用以限制本发明的范畴,本发明的范围以所附权利要求书的定义为准的。本领域技术人员可以根据后续的叙述而了解本发明的均等变化。在各实施例中的类似元件将以类似标号指定。
图1为一第一存储单元次组合10的简化示意图,其包括一基底层12与一上层14。基底层12在一氧化物层20之中包括一底电极18。底电极18典型地由氮化钛或钨所构成,而氧化物层20典型地由二氧化硅所构成;其他材料也可使用于氧化物层20之中。底电极18连接至适当的隔离元件,例如晶体管或二极管。上层14包括一第一层22、一第二层24、以及一第三层26,其中第三层邻接于基底层12。在某些实施例中,第三层26作用为一平坦化停止层。在本实施例中,第一层由硅所构成,较佳为多晶硅;第二层24由如二氧化硅等氧化物所构成;第三层为氮化物,例如氮化硅。
一开口28形成且穿透上层14,以露出底电极18的上表面30,此开口典型地由微影技术所形成。如下所详述,开口28的宽度或直径,较佳为最小尺寸开口,其由所使用制程的最小特征尺寸所决定,典型地为一最小微影特征尺寸。使用公知的微影技术,开口25的宽度或直径典型地约为90奈米,且典型地具有约+/-10%的变化,亦即+/-9奈米。
图2示出了图1的结构进行氧化步骤的结果,以生成一较小尺寸微孔开口32。开口28的尺寸的缩减,通过选择一制程步骤而沉积材料于第一层22之上或与第一层22反应,以增加第1层22的体积。此步骤将生成凸悬部分33,但不会大幅增加第二层24或第三层26的体积。微孔开口32具有一较小第一宽度34(从第一层22处测量)、以及一第二宽度36(从第二层24处测量)。凸悬部分33的尺寸等于第二宽度36与第一宽度34的差别,又称为凸悬尺寸37。这些宽度为平均宽度。当第一层22由多晶硅所构成且第二层24由二氧化硅所构成时,可使用的制程为化学气相沉积(CVD)。
使用硅或其他适合材料于第一层22中,允许了微孔开口32的形成,而不需借助公知技术从第二层24移除材料。第一层22的凸悬部分33,生成了较小的微孔开口32,其可小于公知技术所能完成的微孔开口。亦即,微孔开口32的宽度34可以为一次微影宽度,而公知技术所完成的微孔开口则典型地为一最小微影宽度。在某些实施例中,凸悬尺寸37不大于第二宽度36的10%。
图3示出了介电材料38的原子层沉积(ALD)结果,其典型地为二氧化硅,以生成第二存储单元次组合40。其他材料如氮化硅或氮氧化硅(Si2N2O)等,也可用作为介电材料38,而其他如化学气相沉积或低压化学气相沉积(LPCVD)等,也可用于沉积介电材料38。此沉积步骤在微孔开口32中的介电材料38内,生成了自对准的空洞42。空洞42的横向尺寸(或宽度)与不使用图2的氧化步骤所生成的较小尺寸开口32相较之下,会较小。利用此种方法,空洞42的尺寸可以主要地通过控制凸悬部分33的尺寸而控制,而不需要控制最初生成的开口28的尺寸。
图3的结构接着被蚀刻,如图4所示,较佳使用非等向性蚀刻技术,以移除第一层22、部分的介电材料38、以及部分的第二层24。此步骤会生成一介电材料侧壁38,以及一电极孔开口44延伸至底电极18的表面30。电极孔开口44的直径(或宽度)与不使用图2的氧化步骤而生成的图3的较小尺寸空洞42相较之下,典型地亦较小。
凸悬尺寸37并非由形成开口28的技术所控制。凸悬部分33的尺寸(亦即凸悬尺寸37)由所使用的体积改变制程所决定。若凸悬尺寸37为大约15奈米、而开口28为大约90奈米,以典型的1 0%变化量而言,凸悬尺寸37的变化量大约为+/-1.5奈米,实质上小于开口28的+/-9奈米变化量。因此,在空洞42的直径(或宽度)变化量,会少于以开口28的原始直径(宽度)为基础的变化量。因此,空洞42与开口44具有自收敛的宽度,且可分别被视为自收敛空洞42与自收敛电极孔开口44。
沉积一存储材料46于图4的结构上,以生成图5的第三存储单元次组合48。存储材料46如图所示填满图4的电极孔开口44。存储材料46较佳为一电阻型态存储材料,且更佳为一相变化材料,例如锗锑碲(GST)。
图6示出了图5的第三存储单元次组合48进行平坦化(材料移除步骤)后的结果,较佳使用一化学机械研磨制程,以生成一第四存储单元次组合50。此材料移除步骤的实施停止于第三层26而生成一平坦外表面52。此步骤生成一存储材料元件54,其被介电材料38所环绕。存储材料元件54于表面52处的直径(或宽度)56实质上小于用以生成开口28的最小微影特征尺寸,较佳小于50%,且更佳为小于最小微影特征尺寸的30%。举例而言,若用以生成开口28的最小微影特征尺寸为90奈米,则存储材料元件54在底电极18处的直径或宽度,较佳至多为45奈米,且更佳至多为大约30奈米。
图7所示的上电极58形成于第四存储单元次组合50的表面52之上,接触至存储材料元件54。上电极58典型地为氮化钛,虽然其他如铝钛等电极材料亦可被使用。在图7中还示出一相变化区域60。如上所述,重置一相变化型存储材料元件54所需要的重置电流幅度,可以通过减少存储材料元件54的尺寸而降低,因而缩小相变化区域60的尺寸。此结果将在相变化区域60中产生较高的电流密度,而只需较小的绝对电流值穿过存储材料元件54。
图8-14示出了如图1-7所示的制程的替代实施例。在图8(对应至图1)中,第一与第三层22、26典型地由相同材料所构成,例如氮化硅,而第二层24则由一不同材料所构成,典型地为如二氧化硅等氧化物。图8的结构接着进入到一制程中,典型地为一蚀刻制程,且在此制程中会将第二层24下切,进而减少第二层的体积,而不会减少(典型地亦不会改变)第一层与第三层22、26的体积。若有需要时,第一层22与第三层26可以为不同的材料,只要二者的体积在进入用以减少第二层24的体积的制程时不会减少即可。当第一层与第三层22、26由氮化硅所构成、且第二层24由二氧化硅所构成时,可使用的制程为化学气相沉积。此制程的结果如图9所示,且包括第一层22的凸悬部分33以及第三层26的内延伸66,二者均向内延伸到微孔开口32之中。图10-14的制程步骤,对应至图2-7的步骤。
在某些实施例中,第一层22与第二层24必须充分不同,以生成图2所示的第一层22的凸悬部分33。同时,在某些实施例中,第一层22与第三层26必须充分地与第二层24不同,以生成图9所示的第一层22的凸悬部分33、以及第三层26的内延伸66。为了达成此要求与不同实施例的要求,各种介电材料可组成一电绝缘体,包括选自下列各项中的一个以上的元素:硅、钛、铝、钽、氮、氧、与碳。在较佳装置中,介电材料38具有低导热性,小于0.014J/cm*K*sec。在其他较佳实施例中,当存储材料元件54由一相变化材料所构成时,此热绝缘介电材料38的导热性低于相变化材料的非晶态的导热性,或者对于一包含有GST的相变化材料而言、低于约0.003J/cm*K*sec。代表性的绝热材料包括由硅、碳、氧、氟、与氢所组成的复合材料。可使用于热绝缘介电材料38的热绝缘材料的范例,包括二氧化硅、SiCOH、聚亚酰胺、聚酰胺、以及氟碳聚合物。其他可用于热绝缘介电材料38中的材料范例,包括氟化的二氧化硅、硅氧烷(silsesquioxane)、聚亚芳香醚(polyarylene ether)、聚对二甲苯(parylene)、含氟聚合物、含氟非晶碳、钻石类碳、多孔性二氧化硅、中孔性二氧化硅、多孔性硅氧烷、多孔性聚亚酰胺、以及多孔性聚亚芳香醚。在其他实施例中,此热绝缘结构包括了一气体填充的空洞,以实现热绝缘。介电材料38之中的单层或复合层均可提供热绝缘与电绝缘效果。
可编程电阻型存储材料(例如一相变化材料)的有利特征,包括此材料的电阻值为可编程的,且较佳为可逆的,例如具有至少二固态相其可通过施加电流而可逆地诱发。此至少二相态包括一非晶相与一结晶相。然而,在操作中,可编程电阻材料并不需要完全转变至非晶相或结晶相。中间相或二相的混合可能具有可检测的材料特征差异。此二固态性可大致为双稳态,并具有不同的电气特性。可编程电阻材料可为一硫属化物材料。一硫属化物材料可包括锗锑碲(GST)。在本发明的后续讨论中,相变化或其他存储材料,通常称为GST,且可以了解的是,其他类型的相变化材料亦可使用。可以使用于本发明存储单元中的材料之一,为Ge2Sb2Te5。
本发明的一存储单元64以标准微影制程与薄膜沉积技术而制造,且不需要额外的步骤以生成次微影图案,并能使单元中在编程时实际上改变电阻率的区域尺寸相当微小。在本发明的实施例中,此存储材料可为一可编程电阻材料,典型地为一相变化材料,例如Ge2Sb2Te5或其他后述的材料。存储材料元件中进行相变化的区域相当微小;因此,相变化所需要的重置电流幅度也相当小。
存储单元64的实施例,包括了在存储单元64中使用相变化存储材料,包括硫属化物材料与其他材料。硫属化物包括下列四元素的任一者:氧(O)、硫(S)、硒(Se)、以及碲(Te),形成元素周期表上第VI族的部分。硫属化物包括将一硫属元素与一更为正电性的元素或自由基结合而得。硫属化合物合金包括将硫属化合物与其他物质如过渡金属等结合。一硫属化合物合金通常包括一个以上选自元素周期表第六栏的元素,例如锗(Ge)以及锡(Sn)。通常,硫属化合物合金包括下列元素中一个以上的复合物:锑(Sb)、镓(Ga)、铟(In)、以及银(Ag)。许多以相变化为基础的存储材料已经被描述于技术文件中,包括下列合金:镓/锑、铟/锑、铟/硒、锑/碲、锗/碲、锗/锑/碲、铟/锑/碲、镓/硒/碲、锡/锑/碲、铟/锑/锗、银/铟/锑/碲、锗/锡/锑/碲、锗/锑/硒/碲、以及碲/锗/锑/硫。在锗/锑/碲合金家族中,可以尝试大范围的合金成分。此成分可以下列特征式表示:TeaGebSb100-(a+b),其中a与b代表了所组成元素的原子总数为100%时,各原子的百分比。一位研究员描述了最有用的合金为,在沉积材料中所包含的平均碲浓度远低于70%,典型地低于60%,并在一般型态合金中的碲含量范围从最低23%至最高58%,且最佳介于48%至58%的碲含量。锗的浓度高于约5%,且其在材料中的平均范围从最低8%至最高30%,一般低于50%。最佳地,锗的浓度范围介于8%至40%。在此成分中所剩下的主要成分则为锑。(Ovshinky‘112专利,栏10~11)由另一研究者所评估的特殊合金包括Ge2Sb2Te5、GeSb2Te4、以及GeSb4Te7。(Noboru Yamada,“Potential of Ge-Sb-Te Phase-changeOptical Disks for High-Data-Rate Recording”,SPIE v.3109,pp.28-37(1997))更一般地,过渡金属如铬(Cr)、铁(Fe)、镍(Ni)、铌(Nb)、钯(Pd)、铂(Pt)、以及上述的混合物或合金,可与锗/锑/碲结合以形成一相变化合金其包括有可编程的电阻性质。可使用的存储材料的特殊范例,如Ovshinsky‘112专利中栏11-13所述,其范例在此列入参考。
相变化材料能在此单元主动通道区域内依其位置顺序于材料为一般非晶状态的第一结构状态与为一般结晶固体状态的第二结构状态之间切换。这些材料至少为双稳定态。此词汇「非晶」用以指称一相对较无次序的结构,其较之一单晶更无次序性,而带有可检测的特征如较之结晶态更高的电阻值。此词汇「结晶态」用以指称一相对较有次序的结构,其较之非晶态更有次序,因此包括有可检测的特征例如比非晶态更低的电阻值。典型地,相变化材料可电切换至完全结晶态与完全非晶态之间所有可检测的不同状态。其他受到非晶态与结晶态的改变而影响的材料特征包括,原子次序、自由电子密度、以及活化能。此材料可切换成为不同的固态、或可切换成为由两种以上固态所形成的混合物,提供从非晶态至结晶态之间的灰阶部分。此材料中的电性质亦可能随之改变。
相变化材料可通过施加一电脉冲而从一种相态切换至另一相态。先前观察指出,一较短、较大幅度的脉冲倾向于将相变化材料的相态改变成大体为非晶态。一较长、较低幅度的脉冲倾向于将相变化材料的相态改变成大体为结晶态。在较短、较大幅度脉冲中的能量够大,因此足以破坏结晶结构的键结,同时够短因此可以防止原子再次排列成结晶态。在没有不适当实验的情形下,可以利用实验方法决定特别适用于一特定相变化合金的适当脉冲量变曲线。
接着简单描述四种电阻存储材料。
1.硫属化物材料
GexSbyTez
x∶y∶z=2∶2∶5
或其他成分为x:0~5;y:0~5;z:0~10
以氮、硅、钛或其他元素掺杂的GeSbTe亦可被使用。
形成方法:利用PVD溅镀或磁控(Magnetron)溅镀方式,其反应气体为氩气、氮气、及/或氦气、压力为1mTorr至100mTorr。此沉积步骤一般于室温下进行。一长宽比为1~5的准直器(collimater)可用以改良其填入表现。为了改善其填入表现,亦可使用数十至数百伏特的直流偏压。另一方面,同时合并使用直流偏压以及准直器亦是可行的。
有时需要在真空中或氮气环境中进行一沉积后退火处理,以改良硫属化物材料的结晶态。此退火处理的温度典型地介于100℃至400℃,而退火时间则少于30分钟。
硫属化物材料的厚度随着单元结构的设计而定。一般而言,厚度大于8奈米的硫属化物可以具有相变化特性,使得此材料展现至少双稳定的电阻态。
2.超巨磁阻(CMR)材料
PrxCayMnO3
x∶y=0.5∶0.5
或其他成分为x:0~1;y:0~1。
包括有锰氧化物的超巨磁阻材料亦可被使用。
形成方法:利用PVD溅镀或磁控溅镀方式,其反应气体为氩气、氮气、氧气及/或氦气、压力为1mTorr至100mTorr。此沉积步骤的温度可介于室温至600℃,视后处理条件而定。一长宽比为1~5的准直器(collimater)可用以改良其填入表现。为了改善其填入表现,亦可使用数十至数百伏特的直流偏压。另一方面,同时合并使用直流偏压以及准直器亦是可行的。可施加数十高斯(Gauss)至10,000高斯之间的磁场,以改良其磁结晶态。
可能需要在真空中或氮气环境中或氧气/氮气混合环境中进行一沉积后退火处理,以改良超巨磁阻材料的结晶态。此退火处理的温度典型地介于400℃至600℃,而退火时间则少于2小时。
超巨磁阻材料的厚度随着存储单元结构的设计而定。厚度介于10奈米至200奈米的超巨磁阻材料,可被用作为核心材料。
一YBCO(YBaCuO3,一种高温超导体材料)缓冲层通常被用以改良超巨磁阻材料的结晶态。此YBCO的沉积在沉积超巨磁阻材料之前进行。YBCO的厚度介于30奈米至200奈米。
3.双元素化合物
NixOy、TixOy、AlxOy、WxOy、ZnxOy、ZrxOy、CuxOy等
x∶y=0.5∶0.5
或其他成分为x:0~1;y:0~1
形成方法:
1.利用PVD溅镀或磁控溅镀方式,其反应气体为氩气、氮气、氧气、及/或氦气、压力为1mTorr至100mTorr,其标靶金属氧化物为如NixOy、TixOy、AlxOy、WxOy、ZnxOy、ZrxOy、CuxOy等。此沉积步骤一般于室温下进行。一长宽比为1~5的准直器可用以改良其填入表现。为了改善其填入表现,亦可使用数十至数百伏特的直流偏压。若有需要时,同时合并使用直流偏压以及准直器亦是可行的。
有时需要在真空中或氮气环境或氧气/氮气混合环境中进行一沉积后退火处理,以改良金属氧化物内的氧原子分布。此退火处理的温度典型地介于400℃至600℃,而退火时间则少于2小时。
2.反应性沉积:利用PVD溅镀或磁电管溅镀方式,其反应气体为氩气/氧气、氩气/氮气/氧气、纯氧、氦气/氧气、氦气/氮气/氧气等,压力为1mTorr至100mTorr,其标靶金属氧化物为如Ni、Ti、Al、W、Zn、Zr、Cu等。此沉积步骤一般于室温下进行。一长宽比为1~5的准直器可用以改良其填入表现。为了改善其填入表现,亦可使用数十至数百伏特的直流偏压。若有需要时,同时合并使用直流偏压以及准直器亦是可行的。
有时需要在真空中或氮气环境或氧气/氮气混合环境中进行一沉积后退火处理,以改良金属氧化物内的氧原子分布。此退火处理的温度典型地介于400℃至600℃,而退火时间则少于2小时。
3.氧化:使用一高温氧化系统(例如一高温炉管或一快速热处理(RTP))进行氧化。此温度介于200℃至700℃、以纯氧或氮气/氧气混合气体,在压力为数mTorr至一大气压下进行。进行时间可从数分钟至数小时。另一氧化方法为等离子氧化。一无线射频或直流电压源等离子与纯氧或氩气/氧气混合气体、或氩气/氮气/氧气混合气体,在压力为1mTorr至100mTorr下进行金属表面的氧化,例如Ni、Ti、Al、W、Zn、Zr、Cu等。此氧化时间从数秒钟至数分钟。氧化温度从室温至约300℃,视等离子氧化的程度而定。
4.聚合物材料
掺杂有铜、碳六十、银等的TCNQ
PCBM-TCNQ混合聚合物
形成方法:
1.利用热蒸发、电子束蒸发、或原子束磊晶系统(MBE)进行蒸发。一固态TCNQ以及掺杂物在一单独室内进行共蒸发。此固态TCNQ以及掺杂物被置于一钨座或一钽座或一陶瓷座中。接着施加一大电流或电子束,以熔化反应物,使得这些材料混合并沉积于晶圆之上。此处并未使用反应性化学物质或气体。此沉积作用于压力为10-4Torr至10-10Torr下进行。晶圆温度介于室温至200℃。
有时需要在真空中或氮气环境中进行一沉积后退火处理,以改良聚合物材料的成分分布。此退火处理的温度典型地介于室温至300℃,而退火时间则少于1小时。
2.旋转涂布:使用一旋转涂布机与经掺杂的TCNQ溶液,转速低于1000rpm。在旋转涂布之后,此晶圆被静置(典型地在室温下,或低于200℃的温度)一足够时间以利固态的形成。此静置时间可介于数分钟至数天,视温度以及形成条件而定。
与相变化随机存取存储装置的制造、元件材料、使用、与操作方式相关的额外信息,请参见美国专利申请案号第11/155,067号“ThinFilm Fuse Phase Change Ram And Manufacturing Method”,申请日为2005/6/17。
由于底电极接触至存储材料元件,全部或部分的底电极最好包括一电极材料如氮化钛或其他可与存储材料元件的相变化材料相容的电极材料。其他类型的导体可用于栓塞结构、以及上与底电极结构中,包括例如铝及铝合金、氮化钛、氮化钽、氮化铝钛、或氮化铝钽。其他可以使用的导体材料,包括一个以上选自下列各项的元素:钛、钨、钼、铝、钽、铜、铂、铱、镧、镍、钌、与氧。氮化钛为较佳的,因为其与存储材料元件的GST有良好的接触(如上所述),其为半导体制程中常用的材料,且在GST转换的高温(典型地介于600至700℃)下可提供良好的扩散障碍。
上述说明中所提到的词汇如之上、之下、上、底等,仅为协助了解本发明,而非用以限制本发明。
虽然本发明已参照较佳实施例来加以描述,但可以理解的是,本发明创作并未受限于其详细描述内容。替换方式及修改样式已于先前描述中所建议,并且其他替换方式及修改样式将为本领域技术人员所思及。特别是,根据本发明的结构与方法,所有具有实质上相同于本发明的构件结合而达成与本发明实质上相同结果的发明皆不脱离本发明的精神范畴。因此,所有这种替换方式及修改样式均落入在本发明的权利要求书及其均等物所界定的范围之中。
任何在上文中提及的专利申请案以及印刷文本,均被列为本申请案的参考。
Claims (16)
1.一种在制造一存储单元时用以生成一自收敛存储材料元件的方法,包括:
形成一基底层,其包括一底电极;
在所述基底层之上形成一上层,所述上层形成步骤包括在所述基底层之上形成一第三平坦化停止层、在所述第三层之上形成一第二层、以及在所述第二层之上形成一第一层;
形成一微孔开口穿透所述上层以外露所述底电极的一表面、并生成一第一存储单元次组合,所述微孔开口包括形成于所述第一层中的一第一上开口部分、形成于所述第二层中的一第二开口部分、以及形成于所述第三层中的一第三开口部分,所述第一与第二开口部分分别具有第一与第二宽度,所述第一层具有一凸悬部分延伸进入所述开口以使得所述第一宽度短于所述第二宽度;
沉积一介电材料于所述微孔开口中,以生成一第二存储单元次组合,包括在所述沉积介电材料中的一空洞,所述空洞为位于所述微孔开口内的一自收敛空洞;
非等向性地蚀刻所述第二存储单元次组合,进而形成一介电材料侧壁于所述微孔开口中,且一电极孔对准至所述空洞并外露所述底电极;
沉积一存储材料于所述电极孔中并使其接触至所述底电极,以生成一第三存储单元次组合;以及
向下平坦化所述第三存储单元次组合至所述第三平坦化停止层,以生成一第四存储单元次组合,所述第四存储单元次组合包括有一由所述存储材料所构成的一存储材料元件,以及一平坦上表面,所述平坦上表面由所述存储材料元件、所述介电填充材料、以及所述第三层所定义。
2.如权利要求1所述的方法,还包括选择锗锑碲(GST)作为所述存储材料。
3.如权利要求1所述的方法,其中所述蚀刻步骤、所述存储材料沉积步骤、以及所述平坦化步骤的进行,使得所述存储材料元件的宽度小于所述第一宽度。
4.如权利要求1所述的方法,其中所述蚀刻步骤、所述存储材料沉积步骤、以及所述平坦化步骤的进行,使得所述存储材料元件于所述平坦上表面处的宽度实质上小于所述微孔开口形成步骤的最小特征尺寸。
5.如权利要求1所述的方法,其中所述蚀刻步骤、所述存储材料沉积步骤、以及所述平坦化步骤的进行,使得所述存储材料元件于所述平坦上表面处的宽度不受限于所述最小微影特征尺寸。
6.如权利要求1所述的方法,其中所述微孔形成步骤包括增加所述第一层的体积。
7.如权利要求1所述的方法,其中所述微孔形成步骤包括回蚀刻所述第二层。
8.如权利要求1所述的方法,其中所述自收敛空洞的宽度小于所述第一宽度。
9.如权利要求1所述的方法,其中所述微孔形成步骤包括:
选择一第一层的材料,当所述材料进入一选定制程时,其体积将会增加;
选择一第二层的材料,当所述材料进入一选定制程时,其体积并不增加;
形成一开口穿透所述上层以外露所述底电极的一表面,并生成一第一存储单元次组合,所述开口包括所述第一上开口部分以及所述第二开口部分;以及
使所述第一存储单元次组合进行所述选定制程,以增加所述第一层的体积并生成所述凸悬部分延伸进入所述开口,同时不增加所述第二层的体积。
10.如权利要求9所述的方法,其中所述选择步骤包括选择硅作为所述第一层的材料、以及选择一氧化物作为所述第二层的材料,且还包括选择一化学机械研磨停止层为所述第三平坦化停止层。
11.如权利要求9所述的方法,其中所述开口形成步骤的进行,在所述开口形成步骤中生成一最小尺寸的开口。
12.如权利要求9所述的方法,其中所述开口形成步骤以微影方式进行,以在所述开口形成步骤中生成一最小微影尺寸的开口。
13.如权利要求9所述的方法,其中所述选定制程步骤的进行,使得所述减少的第一宽度与所述第二宽度无关。
14.一种生成一存储单元的方法,所述存储单元于一介电材料中包括一自收敛存储材料元件,所述方法还包括:
生成如权利要求1所述的一第四存储单元次组合;以及
形成一上电极于所述平坦上表面之上且接触至所述存储材料元件,以生成一存储单元。
15.如权利要求1所述的方法,其中所述微孔形成步骤包括:
选择所述第一层的一材料,当所述材料进入至一选定制程时其体积将不缩小;
选择所述第二层的一材料,当所述材料进入所述选定制程时被回蚀刻而因此缩小其体积;
形成一开口穿透所述上层以外露所述底电极的一表面,并生成一第一存储单元次组合,所述开口包括所述第一上开口部分以及所述第二开口部分;以及
使所述第一存储单元次组合进入所述选定制程,进而回蚀刻所述第二层,因而减少所述第二层的体积而不减少所述第一层的体积,进而生成所述凸悬部分延伸进入所述开口。
16.如权利要求15所述的方法,其中所述选择步骤包括选择氮化硅作为第一层的材料、以及选择一氧化物作为所述第二层的材料,并还包括选择氮化硅作为所述第三平坦化停止层。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/567,300 | 2006-12-06 | ||
US11/567,300 US7476587B2 (en) | 2006-12-06 | 2006-12-06 | Method for making a self-converged memory material element for memory cell |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101197423A true CN101197423A (zh) | 2008-06-11 |
CN101197423B CN101197423B (zh) | 2010-04-21 |
Family
ID=39498570
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007101966851A Active CN101197423B (zh) | 2006-12-06 | 2007-12-04 | 制造存储单元中的自收敛存储材料元件的方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7476587B2 (zh) |
CN (1) | CN101197423B (zh) |
TW (1) | TWI326925B (zh) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102473597A (zh) * | 2009-08-28 | 2012-05-23 | 国际商业机器公司 | 用于完全非晶相变存储器孔隙单元的化学机械抛光停止层 |
CN103165519A (zh) * | 2011-12-08 | 2013-06-19 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN105826464A (zh) * | 2015-01-06 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | 导电桥接随机存储器的形成方法 |
CN107437529A (zh) * | 2017-09-05 | 2017-12-05 | 睿力集成电路有限公司 | 一种半导体结构及其制造方法 |
US10204989B2 (en) | 2013-12-23 | 2019-02-12 | Intel Corporation | Method of fabricating semiconductor structures on dissimilar substrates |
CN105745769B (zh) * | 2013-12-23 | 2019-02-22 | 英特尔公司 | 在异质衬底上制造半导体结构的方法 |
US11251370B1 (en) | 2020-08-12 | 2022-02-15 | International Business Machines Corporation | Projected memory device with carbon-based projection component |
Families Citing this family (72)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7635855B2 (en) | 2005-11-15 | 2009-12-22 | Macronix International Co., Ltd. | I-shaped phase change memory cell |
US7449710B2 (en) | 2005-11-21 | 2008-11-11 | Macronix International Co., Ltd. | Vacuum jacket for phase change memory element |
US7759765B2 (en) * | 2006-07-07 | 2010-07-20 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor device mounted with fuse memory |
US7527985B2 (en) * | 2006-10-24 | 2009-05-05 | Macronix International Co., Ltd. | Method for manufacturing a resistor random access memory with reduced active area and reduced contact areas |
US7476587B2 (en) | 2006-12-06 | 2009-01-13 | Macronix International Co., Ltd. | Method for making a self-converged memory material element for memory cell |
US7682868B2 (en) * | 2006-12-06 | 2010-03-23 | Macronix International Co., Ltd. | Method for making a keyhole opening during the manufacture of a memory cell |
US7718989B2 (en) | 2006-12-28 | 2010-05-18 | Macronix International Co., Ltd. | Resistor random access memory cell device |
US20080164453A1 (en) * | 2007-01-07 | 2008-07-10 | Breitwisch Matthew J | Uniform critical dimension size pore for pcram application |
TW200840022A (en) * | 2007-03-27 | 2008-10-01 | Ind Tech Res Inst | Phase-change memory devices and methods for fabricating the same |
US7679163B2 (en) * | 2007-05-14 | 2010-03-16 | Industrial Technology Research Institute | Phase-change memory element |
KR20090013419A (ko) * | 2007-08-01 | 2009-02-05 | 삼성전자주식회사 | 상변화 기억 소자 및 그 형성 방법 |
US7729161B2 (en) | 2007-08-02 | 2010-06-01 | Macronix International Co., Ltd. | Phase change memory with dual word lines and source lines and method of operating same |
US7642125B2 (en) * | 2007-09-14 | 2010-01-05 | Macronix International Co., Ltd. | Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing |
US8426838B2 (en) | 2008-01-25 | 2013-04-23 | Higgs Opl. Capital Llc | Phase-change memory |
US7879645B2 (en) * | 2008-01-28 | 2011-02-01 | Macronix International Co., Ltd. | Fill-in etching free pore device |
US7935564B2 (en) * | 2008-02-25 | 2011-05-03 | International Business Machines Corporation | Self-converging bottom electrode ring |
US8077505B2 (en) | 2008-05-07 | 2011-12-13 | Macronix International Co., Ltd. | Bipolar switching of phase change device |
US8134857B2 (en) | 2008-06-27 | 2012-03-13 | Macronix International Co., Ltd. | Methods for high speed reading operation of phase change memory and device employing same |
US8268695B2 (en) * | 2008-08-13 | 2012-09-18 | Micron Technology, Inc. | Methods of making capacitors |
US8604457B2 (en) * | 2008-11-12 | 2013-12-10 | Higgs Opl. Capital Llc | Phase-change memory element |
US8107283B2 (en) | 2009-01-12 | 2012-01-31 | Macronix International Co., Ltd. | Method for setting PCRAM devices |
US8030635B2 (en) | 2009-01-13 | 2011-10-04 | Macronix International Co., Ltd. | Polysilicon plug bipolar transistor for phase change memory |
US8064247B2 (en) | 2009-01-14 | 2011-11-22 | Macronix International Co., Ltd. | Rewritable memory device based on segregation/re-absorption |
US8933536B2 (en) | 2009-01-22 | 2015-01-13 | Macronix International Co., Ltd. | Polysilicon pillar bipolar transistor with self-aligned memory element |
US8692310B2 (en) | 2009-02-09 | 2014-04-08 | Spansion Llc | Gate fringing effect based channel formation for semiconductor device |
US8084760B2 (en) | 2009-04-20 | 2011-12-27 | Macronix International Co., Ltd. | Ring-shaped electrode and manufacturing method for same |
US8173987B2 (en) | 2009-04-27 | 2012-05-08 | Macronix International Co., Ltd. | Integrated circuit 3D phase change memory array and manufacturing method |
US8097871B2 (en) | 2009-04-30 | 2012-01-17 | Macronix International Co., Ltd. | Low operational current phase change memory structures |
US7933139B2 (en) | 2009-05-15 | 2011-04-26 | Macronix International Co., Ltd. | One-transistor, one-resistor, one-capacitor phase change memory |
US7968876B2 (en) | 2009-05-22 | 2011-06-28 | Macronix International Co., Ltd. | Phase change memory cell having vertical channel access transistor |
US8350316B2 (en) | 2009-05-22 | 2013-01-08 | Macronix International Co., Ltd. | Phase change memory cells having vertical channel access transistor and memory plane |
US8809829B2 (en) | 2009-06-15 | 2014-08-19 | Macronix International Co., Ltd. | Phase change memory having stabilized microstructure and manufacturing method |
US8406033B2 (en) | 2009-06-22 | 2013-03-26 | Macronix International Co., Ltd. | Memory device and method for sensing and fixing margin cells |
US8363463B2 (en) | 2009-06-25 | 2013-01-29 | Macronix International Co., Ltd. | Phase change memory having one or more non-constant doping profiles |
US8238149B2 (en) | 2009-06-25 | 2012-08-07 | Macronix International Co., Ltd. | Methods and apparatus for reducing defect bits in phase change memory |
US8198619B2 (en) | 2009-07-15 | 2012-06-12 | Macronix International Co., Ltd. | Phase change memory cell structure |
US8110822B2 (en) | 2009-07-15 | 2012-02-07 | Macronix International Co., Ltd. | Thermal protect PCRAM structure and methods for making |
US7894254B2 (en) | 2009-07-15 | 2011-02-22 | Macronix International Co., Ltd. | Refresh circuitry for phase change memory |
US8283650B2 (en) | 2009-08-28 | 2012-10-09 | International Business Machines Corporation | Flat lower bottom electrode for phase change memory cell |
US8283202B2 (en) | 2009-08-28 | 2012-10-09 | International Business Machines Corporation | Single mask adder phase change memory element |
US7985654B2 (en) * | 2009-09-14 | 2011-07-26 | International Business Machines Corporation | Planarization stop layer in phase change memory integration |
US8064248B2 (en) | 2009-09-17 | 2011-11-22 | Macronix International Co., Ltd. | 2T2R-1T1R mix mode phase change memory array |
US8178387B2 (en) | 2009-10-23 | 2012-05-15 | Macronix International Co., Ltd. | Methods for reducing recrystallization time for a phase change material |
US20110108792A1 (en) * | 2009-11-11 | 2011-05-12 | International Business Machines Corporation | Single Crystal Phase Change Material |
US8129268B2 (en) | 2009-11-16 | 2012-03-06 | International Business Machines Corporation | Self-aligned lower bottom electrode |
US7943420B1 (en) | 2009-11-25 | 2011-05-17 | International Business Machines Corporation | Single mask adder phase change memory element |
US8729521B2 (en) | 2010-05-12 | 2014-05-20 | Macronix International Co., Ltd. | Self aligned fin-type programmable memory cell |
US8310864B2 (en) | 2010-06-15 | 2012-11-13 | Macronix International Co., Ltd. | Self-aligned bit line under word line memory array |
US8395935B2 (en) | 2010-10-06 | 2013-03-12 | Macronix International Co., Ltd. | Cross-point self-aligned reduced cell size phase change memory |
US8497705B2 (en) | 2010-11-09 | 2013-07-30 | Macronix International Co., Ltd. | Phase change device for interconnection of programmable logic device |
US8467238B2 (en) | 2010-11-15 | 2013-06-18 | Macronix International Co., Ltd. | Dynamic pulse operation for phase change memory |
US8486743B2 (en) | 2011-03-23 | 2013-07-16 | Micron Technology, Inc. | Methods of forming memory cells |
US8994489B2 (en) | 2011-10-19 | 2015-03-31 | Micron Technology, Inc. | Fuses, and methods of forming and using fuses |
US8546231B2 (en) | 2011-11-17 | 2013-10-01 | Micron Technology, Inc. | Memory arrays and methods of forming memory cells |
US8723155B2 (en) | 2011-11-17 | 2014-05-13 | Micron Technology, Inc. | Memory cells and integrated devices |
US9252188B2 (en) | 2011-11-17 | 2016-02-02 | Micron Technology, Inc. | Methods of forming memory cells |
US9136467B2 (en) | 2012-04-30 | 2015-09-15 | Micron Technology, Inc. | Phase change memory cells and methods of forming phase change memory cells |
US8765555B2 (en) | 2012-04-30 | 2014-07-01 | Micron Technology, Inc. | Phase change memory cells and methods of forming phase change memory cells |
US9553262B2 (en) | 2013-02-07 | 2017-01-24 | Micron Technology, Inc. | Arrays of memory cells and methods of forming an array of memory cells |
US9741918B2 (en) | 2013-10-07 | 2017-08-22 | Hypres, Inc. | Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit |
US9881971B2 (en) | 2014-04-01 | 2018-01-30 | Micron Technology, Inc. | Memory arrays |
US9559113B2 (en) | 2014-05-01 | 2017-01-31 | Macronix International Co., Ltd. | SSL/GSL gate oxide in 3D vertical channel NAND |
US9362494B2 (en) | 2014-06-02 | 2016-06-07 | Micron Technology, Inc. | Array of cross point memory cells and methods of forming an array of cross point memory cells |
US9343506B2 (en) | 2014-06-04 | 2016-05-17 | Micron Technology, Inc. | Memory arrays with polygonal memory cells having specific sidewall orientations |
CN105789435B (zh) * | 2014-12-25 | 2018-08-21 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法、电子装置 |
US9672906B2 (en) | 2015-06-19 | 2017-06-06 | Macronix International Co., Ltd. | Phase change memory with inter-granular switching |
US10388646B1 (en) * | 2018-06-04 | 2019-08-20 | Sandisk Technologies Llc | Electrostatic discharge protection devices including a field-induced switching element |
WO2020150983A1 (en) * | 2019-01-25 | 2020-07-30 | Yangtze Memory Technologies Co., Ltd. | Methods for forming hole structure in semiconductor device |
KR20210038772A (ko) | 2019-09-30 | 2021-04-08 | 삼성전자주식회사 | 3차원 반도체 메모리 소자 |
CN111540828A (zh) * | 2020-03-23 | 2020-08-14 | 江苏时代全芯存储科技股份有限公司 | 相变存储器的形成方法 |
US11411180B2 (en) | 2020-04-28 | 2022-08-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Phase-change memory device and method |
CN113517393A (zh) * | 2020-04-28 | 2021-10-19 | 台湾积体电路制造股份有限公司 | 相变存储器件及其形成方法 |
Family Cites Families (280)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3271591A (en) * | 1963-09-20 | 1966-09-06 | Energy Conversion Devices Inc | Symmetrical current controlling device |
US3530441A (en) * | 1969-01-15 | 1970-09-22 | Energy Conversion Devices Inc | Method and apparatus for storing and retrieving information |
IL61678A (en) * | 1979-12-13 | 1984-04-30 | Energy Conversion Devices Inc | Programmable cell and programmable electronic arrays comprising such cells |
US4453592A (en) * | 1981-08-03 | 1984-06-12 | The Air Preheater Company, Inc. | Expansion guide |
US4452592A (en) | 1982-06-01 | 1984-06-05 | General Motors Corporation | Cyclic phase change coupling |
JPS60137070A (ja) | 1983-12-26 | 1985-07-20 | Toshiba Corp | 半導体装置の製造方法 |
US4719594A (en) * | 1984-11-01 | 1988-01-12 | Energy Conversion Devices, Inc. | Grooved optical data storage device including a chalcogenide memory layer |
US4876220A (en) * | 1986-05-16 | 1989-10-24 | Actel Corporation | Method of making programmable low impedance interconnect diode element |
JP2685770B2 (ja) * | 1987-12-28 | 1997-12-03 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2606857B2 (ja) | 1987-12-10 | 1997-05-07 | 株式会社日立製作所 | 半導体記憶装置の製造方法 |
US5166758A (en) * | 1991-01-18 | 1992-11-24 | Energy Conversion Devices, Inc. | Electrically erasable phase change memory |
US5534712A (en) * | 1991-01-18 | 1996-07-09 | Energy Conversion Devices, Inc. | Electrically erasable memory elements characterized by reduced current and improved thermal stability |
US5177567A (en) * | 1991-07-19 | 1993-01-05 | Energy Conversion Devices, Inc. | Thin-film structure for chalcogenide electrical switching devices and process therefor |
JP2825031B2 (ja) | 1991-08-06 | 1998-11-18 | 日本電気株式会社 | 半導体メモリ装置 |
US5166096A (en) * | 1991-10-29 | 1992-11-24 | International Business Machines Corporation | Process for fabricating self-aligned contact studs for semiconductor structures |
JPH05206394A (ja) | 1992-01-24 | 1993-08-13 | Mitsubishi Electric Corp | 電界効果トランジスタおよびその製造方法 |
US5958358A (en) | 1992-07-08 | 1999-09-28 | Yeda Research And Development Co., Ltd. | Oriented polycrystalline thin films of transition metal chalcogenides |
JP2884962B2 (ja) | 1992-10-30 | 1999-04-19 | 日本電気株式会社 | 半導体メモリ |
US5515488A (en) | 1994-08-30 | 1996-05-07 | Xerox Corporation | Method and apparatus for concurrent graphical visualization of a database search and its search history |
US5785828A (en) * | 1994-12-13 | 1998-07-28 | Ricoh Company, Ltd. | Sputtering target for producing optical recording medium |
US5879955A (en) * | 1995-06-07 | 1999-03-09 | Micron Technology, Inc. | Method for fabricating an array of ultra-small pores for chalcogenide memory cells |
US6420725B1 (en) * | 1995-06-07 | 2002-07-16 | Micron Technology, Inc. | Method and apparatus for forming an integrated circuit electrode having a reduced contact area |
US5789758A (en) * | 1995-06-07 | 1998-08-04 | Micron Technology, Inc. | Chalcogenide memory cell with a plurality of chalcogenide electrodes |
US5869843A (en) * | 1995-06-07 | 1999-02-09 | Micron Technology, Inc. | Memory array having a multi-state element and method for forming such array or cells thereof |
US5831276A (en) * | 1995-06-07 | 1998-11-03 | Micron Technology, Inc. | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell |
US5837564A (en) * | 1995-11-01 | 1998-11-17 | Micron Technology, Inc. | Method for optimal crystallization to obtain high electrical performance from chalcogenides |
KR0182866B1 (ko) | 1995-12-27 | 1999-04-15 | 김주용 | 플래쉬 메모리 장치 |
US5687112A (en) * | 1996-04-19 | 1997-11-11 | Energy Conversion Devices, Inc. | Multibit single cell memory element having tapered contact |
US6025220A (en) * | 1996-06-18 | 2000-02-15 | Micron Technology, Inc. | Method of forming a polysilicon diode and devices incorporating such diode |
US5866928A (en) | 1996-07-16 | 1999-02-02 | Micron Technology, Inc. | Single digit line with cell contact interconnect |
US5814527A (en) * | 1996-07-22 | 1998-09-29 | Micron Technology, Inc. | Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories |
US5789277A (en) * | 1996-07-22 | 1998-08-04 | Micron Technology, Inc. | Method of making chalogenide memory device |
US5985698A (en) * | 1996-07-22 | 1999-11-16 | Micron Technology, Inc. | Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell |
US5998244A (en) * | 1996-08-22 | 1999-12-07 | Micron Technology, Inc. | Memory cell incorporating a chalcogenide element and method of making same |
US5688713A (en) | 1996-08-26 | 1997-11-18 | Vanguard International Semiconductor Corporation | Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers |
US6147395A (en) * | 1996-10-02 | 2000-11-14 | Micron Technology, Inc. | Method for fabricating a small area of contact between electrodes |
US6087674A (en) * | 1996-10-28 | 2000-07-11 | Energy Conversion Devices, Inc. | Memory element with memory material comprising phase-change material and dielectric material |
US5716883A (en) | 1996-11-06 | 1998-02-10 | Vanguard International Semiconductor Corporation | Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns |
US6015977A (en) * | 1997-01-28 | 2000-01-18 | Micron Technology, Inc. | Integrated circuit memory cell having a small active area and method of forming same |
US5952671A (en) * | 1997-05-09 | 1999-09-14 | Micron Technology, Inc. | Small electrode for a chalcogenide switching device and method for fabricating same |
US6031287A (en) * | 1997-06-18 | 2000-02-29 | Micron Technology, Inc. | Contact structure and memory element incorporating the same |
US5933365A (en) | 1997-06-19 | 1999-08-03 | Energy Conversion Devices, Inc. | Memory element with energy control mechanism |
US5902704A (en) | 1997-07-02 | 1999-05-11 | Lsi Logic Corporation | Process for forming photoresist mask over integrated circuit structures with critical dimension control |
US6768165B1 (en) * | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
US6969866B1 (en) | 1997-10-01 | 2005-11-29 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US7023009B2 (en) | 1997-10-01 | 2006-04-04 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US6617192B1 (en) * | 1997-10-01 | 2003-09-09 | Ovonyx, Inc. | Electrically programmable memory element with multi-regioned contact |
FR2774209B1 (fr) | 1998-01-23 | 2001-09-14 | St Microelectronics Sa | Procede de controle du circuit de lecture d'un plan memoire et dispositif de memoire correspondant |
US6087269A (en) | 1998-04-20 | 2000-07-11 | Advanced Micro Devices, Inc. | Method of making an interconnect using a tungsten hard mask |
US6372651B1 (en) | 1998-07-17 | 2002-04-16 | Advanced Micro Devices, Inc. | Method for trimming a photoresist pattern line for memory gate etching |
US6141260A (en) | 1998-08-27 | 2000-10-31 | Micron Technology, Inc. | Single electron resistor memory device and method for use thereof |
US7157314B2 (en) * | 1998-11-16 | 2007-01-02 | Sandisk Corporation | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6351406B1 (en) * | 1998-11-16 | 2002-02-26 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6034882A (en) * | 1998-11-16 | 2000-03-07 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
JP2000164830A (ja) | 1998-11-27 | 2000-06-16 | Mitsubishi Electric Corp | 半導体記憶装置の製造方法 |
US6487106B1 (en) | 1999-01-12 | 2002-11-26 | Arizona Board Of Regents | Programmable microelectronic devices and method of forming and programming same |
US6291137B1 (en) | 1999-01-20 | 2001-09-18 | Advanced Micro Devices, Inc. | Sidewall formation for sidewall patterning of sub 100 nm structures |
US6245669B1 (en) | 1999-02-05 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company | High selectivity Si-rich SiON etch-stop layer |
US6750079B2 (en) | 1999-03-25 | 2004-06-15 | Ovonyx, Inc. | Method for making programmable resistance memory element |
US6943365B2 (en) | 1999-03-25 | 2005-09-13 | Ovonyx, Inc. | Electrically programmable memory element with reduced area of contact and method for making same |
WO2000057498A1 (en) | 1999-03-25 | 2000-09-28 | Energy Conversion Devices, Inc. | Electrically programmable memory element with improved contacts |
US6177317B1 (en) * | 1999-04-14 | 2001-01-23 | Macronix International Co., Ltd. | Method of making nonvolatile memory devices having reduced resistance diffusion regions |
US6075719A (en) | 1999-06-22 | 2000-06-13 | Energy Conversion Devices, Inc. | Method of programming phase-change memory element |
US6077674A (en) | 1999-10-27 | 2000-06-20 | Agilent Technologies Inc. | Method of producing oligonucleotide arrays with features of high purity |
US6326307B1 (en) | 1999-11-15 | 2001-12-04 | Appllied Materials, Inc. | Plasma pretreatment of photoresist in an oxide etch process |
US6314014B1 (en) * | 1999-12-16 | 2001-11-06 | Ovonyx, Inc. | Programmable resistance memory arrays with reference cells |
US6576546B2 (en) | 1999-12-22 | 2003-06-10 | Texas Instruments Incorporated | Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications |
TW586154B (en) | 2001-01-05 | 2004-05-01 | Macronix Int Co Ltd | Planarization method for semiconductor device |
US6444557B1 (en) | 2000-03-14 | 2002-09-03 | International Business Machines Corporation | Method of forming a damascene structure using a sacrificial conductive layer |
US6420216B1 (en) * | 2000-03-14 | 2002-07-16 | International Business Machines Corporation | Fuse processing using dielectric planarization pillars |
US6420215B1 (en) * | 2000-04-28 | 2002-07-16 | Matrix Semiconductor, Inc. | Three-dimensional memory array and method of fabrication |
US6888750B2 (en) * | 2000-04-28 | 2005-05-03 | Matrix Semiconductor, Inc. | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication |
US6501111B1 (en) * | 2000-06-30 | 2002-12-31 | Intel Corporation | Three-dimensional (3D) programmable device |
US6563156B2 (en) * | 2001-03-15 | 2003-05-13 | Micron Technology, Inc. | Memory elements and methods for making same |
US6440837B1 (en) * | 2000-07-14 | 2002-08-27 | Micron Technology, Inc. | Method of forming a contact structure in a semiconductor device |
US7039630B2 (en) * | 2000-07-27 | 2006-05-02 | Nec Corporation | Information search/presentation system |
US6512263B1 (en) | 2000-09-22 | 2003-01-28 | Sandisk Corporation | Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming |
US6429064B1 (en) * | 2000-09-29 | 2002-08-06 | Intel Corporation | Reduced contact area of sidewall conductor |
US6339544B1 (en) * | 2000-09-29 | 2002-01-15 | Intel Corporation | Method to enhance performance of thermal resistor device |
US6567293B1 (en) * | 2000-09-29 | 2003-05-20 | Ovonyx, Inc. | Single level metal memory cell using chalcogenide cladding |
US6555860B2 (en) * | 2000-09-29 | 2003-04-29 | Intel Corporation | Compositionally modified resistive electrode |
KR100382729B1 (ko) | 2000-12-09 | 2003-05-09 | 삼성전자주식회사 | 반도체 소자의 금속 컨택 구조체 및 그 형성방법 |
US6569705B2 (en) * | 2000-12-21 | 2003-05-27 | Intel Corporation | Metal structure for a phase-change memory device |
US6627530B2 (en) * | 2000-12-22 | 2003-09-30 | Matrix Semiconductor, Inc. | Patterning three dimensional structures |
US6271090B1 (en) * | 2000-12-22 | 2001-08-07 | Macronix International Co., Ltd. | Method for manufacturing flash memory device with dual floating gates and two bits per cell |
TW490675B (en) * | 2000-12-22 | 2002-06-11 | Macronix Int Co Ltd | Control method of multi-stated NROM |
US6534781B2 (en) * | 2000-12-26 | 2003-03-18 | Ovonyx, Inc. | Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact |
KR100625129B1 (ko) | 2001-01-30 | 2006-09-18 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 집적 회로 장치의 제조 방법 |
KR100400037B1 (ko) | 2001-02-22 | 2003-09-29 | 삼성전자주식회사 | 콘택 플러그를 구비하는 반도체 소자 및 그의 제조 방법 |
US6487114B2 (en) * | 2001-02-28 | 2002-11-26 | Macronix International Co., Ltd. | Method of reading two-bit memories of NROM cell |
US6596589B2 (en) | 2001-04-30 | 2003-07-22 | Vanguard International Semiconductor Corporation | Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer |
US6730928B2 (en) | 2001-05-09 | 2004-05-04 | Science Applications International Corporation | Phase change switches and circuits coupling to electromagnetic waves containing phase change switches |
US6514788B2 (en) * | 2001-05-29 | 2003-02-04 | Bae Systems Information And Electronic Systems Integration Inc. | Method for manufacturing contacts for a Chalcogenide memory device |
DE10128482A1 (de) | 2001-06-12 | 2003-01-02 | Infineon Technologies Ag | Halbleiterspeichereinrichtung sowie Verfahren zu deren Herstellung |
US6774387B2 (en) | 2001-06-26 | 2004-08-10 | Ovonyx, Inc. | Programmable resistance memory element |
US6589714B2 (en) * | 2001-06-26 | 2003-07-08 | Ovonyx, Inc. | Method for making programmable resistance memory element using silylated photoresist |
US6613604B2 (en) * | 2001-08-02 | 2003-09-02 | Ovonyx, Inc. | Method for making small pore for use in programmable resistance memory element |
US6511867B2 (en) * | 2001-06-30 | 2003-01-28 | Ovonyx, Inc. | Utilizing atomic layer deposition for programmable device |
US6673700B2 (en) * | 2001-06-30 | 2004-01-06 | Ovonyx, Inc. | Reduced area intersection between electrode and programming element |
US6605527B2 (en) * | 2001-06-30 | 2003-08-12 | Intel Corporation | Reduced area intersection between electrode and programming element |
US6643165B2 (en) | 2001-07-25 | 2003-11-04 | Nantero, Inc. | Electromechanical memory having cell selection circuitry constructed with nanotube technology |
US6737312B2 (en) | 2001-08-27 | 2004-05-18 | Micron Technology, Inc. | Method of fabricating dual PCRAM cells sharing a common electrode |
US6709958B2 (en) | 2001-08-30 | 2004-03-23 | Micron Technology, Inc. | Integrated circuit device and fabrication using metal-doped chalcogenide materials |
US6507061B1 (en) | 2001-08-31 | 2003-01-14 | Intel Corporation | Multiple layer phase-change memory |
US6586761B2 (en) * | 2001-09-07 | 2003-07-01 | Intel Corporation | Phase change material memory device |
US6861267B2 (en) * | 2001-09-17 | 2005-03-01 | Intel Corporation | Reducing shunts in memories with phase-change material |
US7045383B2 (en) | 2001-09-19 | 2006-05-16 | BAE Systems Information and Ovonyx, Inc | Method for making tapered opening for programmable resistance memory element |
US6566700B2 (en) * | 2001-10-11 | 2003-05-20 | Ovonyx, Inc. | Carbon-containing interfacial layer for phase-change memory |
US6800563B2 (en) * | 2001-10-11 | 2004-10-05 | Ovonyx, Inc. | Forming tapered lower electrode phase-change memories |
US6791859B2 (en) | 2001-11-20 | 2004-09-14 | Micron Technology, Inc. | Complementary bit PCRAM sense amplifier and method of operation |
US6545903B1 (en) * | 2001-12-17 | 2003-04-08 | Texas Instruments Incorporated | Self-aligned resistive plugs for forming memory cell with phase change material |
US6512241B1 (en) | 2001-12-31 | 2003-01-28 | Intel Corporation | Phase change material memory device |
US6867638B2 (en) * | 2002-01-10 | 2005-03-15 | Silicon Storage Technology, Inc. | High voltage generation and regulation system for digital multilevel nonvolatile memory |
JP3948292B2 (ja) | 2002-02-01 | 2007-07-25 | 株式会社日立製作所 | 半導体記憶装置及びその製造方法 |
US7151273B2 (en) | 2002-02-20 | 2006-12-19 | Micron Technology, Inc. | Silver-selenide/chalcogenide glass stack for resistance variable memory |
US6972430B2 (en) | 2002-02-20 | 2005-12-06 | Stmicroelectronics S.R.L. | Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof |
US7122281B2 (en) | 2002-02-26 | 2006-10-17 | Synopsys, Inc. | Critical dimension control using full phase and trim masks |
JP3796457B2 (ja) * | 2002-02-28 | 2006-07-12 | 富士通株式会社 | 不揮発性半導体記憶装置 |
WO2003079463A2 (en) | 2002-03-15 | 2003-09-25 | Axon Technologies Corporation | Programmable structure, an array including the structure, and methods of forming the same |
US6579760B1 (en) * | 2002-03-28 | 2003-06-17 | Macronix International Co., Ltd. | Self-aligned, programmable phase change memory |
US6620715B1 (en) | 2002-03-29 | 2003-09-16 | Cypress Semiconductor Corp. | Method for forming sub-critical dimension structures in an integrated circuit |
US6670628B2 (en) | 2002-04-04 | 2003-12-30 | Hewlett-Packard Company, L.P. | Low heat loss and small contact area composite electrode for a phase change media memory device |
AU2003221003A1 (en) | 2002-04-09 | 2003-10-20 | Matsushita Electric Industrial Co., Ltd. | Non-volatile memory and manufacturing method thereof |
US6864500B2 (en) | 2002-04-10 | 2005-03-08 | Micron Technology, Inc. | Programmable conductor memory cell structure |
US6605821B1 (en) * | 2002-05-10 | 2003-08-12 | Hewlett-Packard Development Company, L.P. | Phase change material electronic memory structure and method for forming |
US6864503B2 (en) | 2002-08-09 | 2005-03-08 | Macronix International Co., Ltd. | Spacer chalcogenide memory method and device |
US6850432B2 (en) | 2002-08-20 | 2005-02-01 | Macronix International Co., Ltd. | Laser programmable electrically readable phase-change memory method and device |
JP4133141B2 (ja) * | 2002-09-10 | 2008-08-13 | 株式会社エンプラス | 電気部品用ソケット |
JP4190238B2 (ja) | 2002-09-13 | 2008-12-03 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置 |
ATE335289T1 (de) | 2002-10-11 | 2006-08-15 | Koninkl Philips Electronics Nv | Elektrische einrichtung mit einem phasenänderungsmaterial |
US6992932B2 (en) * | 2002-10-29 | 2006-01-31 | Saifun Semiconductors Ltd | Method circuit and system for read error detection in a non-volatile memory array |
US6940744B2 (en) | 2002-10-31 | 2005-09-06 | Unity Semiconductor Corporation | Adaptive programming technique for a re-writable conductive memory device |
JP4928045B2 (ja) | 2002-10-31 | 2012-05-09 | 大日本印刷株式会社 | 相変化型メモリ素子およびその製造方法 |
US6791102B2 (en) * | 2002-12-13 | 2004-09-14 | Intel Corporation | Phase change memory |
US7589343B2 (en) | 2002-12-13 | 2009-09-15 | Intel Corporation | Memory and access device and method therefor |
US6744088B1 (en) * | 2002-12-13 | 2004-06-01 | Intel Corporation | Phase change memory device on a planar composite layer |
US6815266B2 (en) * | 2002-12-30 | 2004-11-09 | Bae Systems Information And Electronic Systems Integration, Inc. | Method for manufacturing sidewall contacts for a chalcogenide memory device |
EP1439583B1 (en) | 2003-01-15 | 2013-04-10 | STMicroelectronics Srl | Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof |
KR101009891B1 (ko) | 2003-01-31 | 2011-01-20 | 엔엑스피 비 브이 | 자기 저항 메모리 셀, 자기 저항 메모리 셀의 매트릭스,자기 저항 메모리 셀의 매트릭스에 값을 기록하는 방법 및자기 저항 메모리 셀 제조 방법 |
KR100486306B1 (ko) * | 2003-02-24 | 2005-04-29 | 삼성전자주식회사 | 셀프 히터 구조를 가지는 상변화 메모리 소자 |
US7115927B2 (en) | 2003-02-24 | 2006-10-03 | Samsung Electronics Co., Ltd. | Phase changeable memory devices |
US6936544B2 (en) | 2003-03-11 | 2005-08-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of removing metal etching residues following a metal etchback process to improve a CMP process |
KR100504698B1 (ko) | 2003-04-02 | 2005-08-02 | 삼성전자주식회사 | 상변화 기억 소자 및 그 형성 방법 |
KR100979710B1 (ko) | 2003-05-23 | 2010-09-02 | 삼성전자주식회사 | 반도체 메모리 소자 및 제조방법 |
US20060006472A1 (en) | 2003-06-03 | 2006-01-12 | Hai Jiang | Phase change memory with extra-small resistors |
US7067865B2 (en) * | 2003-06-06 | 2006-06-27 | Macronix International Co., Ltd. | High density chalcogenide memory cells |
US6838692B1 (en) | 2003-06-23 | 2005-01-04 | Macronix International Co., Ltd. | Chalcogenide memory device with multiple bits per cell |
US20050018526A1 (en) | 2003-07-21 | 2005-01-27 | Heon Lee | Phase-change memory device and manufacturing method thereof |
US7132350B2 (en) | 2003-07-21 | 2006-11-07 | Macronix International Co., Ltd. | Method for manufacturing a programmable eraseless memory |
KR100615586B1 (ko) | 2003-07-23 | 2006-08-25 | 삼성전자주식회사 | 다공성 유전막 내에 국부적인 상전이 영역을 구비하는상전이 메모리 소자 및 그 제조 방법 |
US7893419B2 (en) | 2003-08-04 | 2011-02-22 | Intel Corporation | Processing phase change material to improve programming speed |
US6815704B1 (en) * | 2003-09-04 | 2004-11-09 | Silicon Storage Technology, Inc. | Phase change memory device employing thermally insulating voids |
US6927410B2 (en) * | 2003-09-04 | 2005-08-09 | Silicon Storage Technology, Inc. | Memory device with discrete layers of phase change memory material |
US20050062087A1 (en) | 2003-09-19 | 2005-03-24 | Yi-Chou Chen | Chalcogenide phase-change non-volatile memory, memory device and method for fabricating the same |
DE10345455A1 (de) | 2003-09-30 | 2005-05-04 | Infineon Technologies Ag | Verfahren zum Erzeugen einer Hartmaske und Hartmasken-Anordnung |
US6910907B2 (en) | 2003-11-18 | 2005-06-28 | Agere Systems Inc. | Contact for use in an integrated circuit and a method of manufacture therefor |
US6808991B1 (en) | 2003-11-19 | 2004-10-26 | Macronix International Co., Ltd. | Method for forming twin bit cell flash memory |
KR100558548B1 (ko) | 2003-11-27 | 2006-03-10 | 삼성전자주식회사 | 상변화 메모리 소자에서의 라이트 드라이버 회로 및라이트 전류 인가방법 |
US6937507B2 (en) * | 2003-12-05 | 2005-08-30 | Silicon Storage Technology, Inc. | Memory device and method of operating same |
US7928420B2 (en) | 2003-12-10 | 2011-04-19 | International Business Machines Corporation | Phase change tip storage cell |
US7291556B2 (en) | 2003-12-12 | 2007-11-06 | Samsung Electronics Co., Ltd. | Method for forming small features in microelectronic devices using sacrificial layers |
KR100569549B1 (ko) | 2003-12-13 | 2006-04-10 | 주식회사 하이닉스반도체 | 상 변화 저항 셀 및 이를 이용한 불휘발성 메모리 장치 |
US7038230B2 (en) | 2004-01-06 | 2006-05-02 | Macronix Internation Co., Ltd. | Horizontal chalcogenide element defined by a pad for use in solid-state memories |
JP4124743B2 (ja) | 2004-01-21 | 2008-07-23 | 株式会社ルネサステクノロジ | 相変化メモリ |
KR100564608B1 (ko) | 2004-01-29 | 2006-03-28 | 삼성전자주식회사 | 상변화 메모리 소자 |
US6936840B2 (en) * | 2004-01-30 | 2005-08-30 | International Business Machines Corporation | Phase-change memory cell and method of fabricating the phase-change memory cell |
US7858980B2 (en) | 2004-03-01 | 2010-12-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reduced active area in a phase change memory structure |
JP4529493B2 (ja) | 2004-03-12 | 2010-08-25 | 株式会社日立製作所 | 半導体装置 |
KR100598100B1 (ko) * | 2004-03-19 | 2006-07-07 | 삼성전자주식회사 | 상변환 기억 소자의 제조방법 |
DE102004014487A1 (de) | 2004-03-24 | 2005-11-17 | Infineon Technologies Ag | Speicherbauelement mit in isolierendes Material eingebettetem, aktiven Material |
KR100532509B1 (ko) | 2004-03-26 | 2005-11-30 | 삼성전자주식회사 | SiGe를 이용한 트렌치 커패시터 및 그 형성방법 |
US7482616B2 (en) | 2004-05-27 | 2009-01-27 | Samsung Electronics Co., Ltd. | Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same |
US6977181B1 (en) | 2004-06-17 | 2005-12-20 | Infincon Technologies Ag | MTJ stack with crystallization inhibiting layer |
US7359231B2 (en) | 2004-06-30 | 2008-04-15 | Intel Corporation | Providing current for phase change memories |
KR100657897B1 (ko) | 2004-08-21 | 2006-12-14 | 삼성전자주식회사 | 전압 제어층을 포함하는 메모리 소자 |
US7365385B2 (en) | 2004-08-30 | 2008-04-29 | Micron Technology, Inc. | DRAM layout with vertical FETs and method of formation |
KR100610014B1 (ko) | 2004-09-06 | 2006-08-09 | 삼성전자주식회사 | 리키지 전류 보상 가능한 반도체 메모리 장치 |
US7443062B2 (en) | 2004-09-30 | 2008-10-28 | Reliance Electric Technologies Llc | Motor rotor cooling with rotation heat pipes |
TWI277207B (en) | 2004-10-08 | 2007-03-21 | Ind Tech Res Inst | Multilevel phase-change memory, operating method and manufacture method thereof |
KR100626388B1 (ko) | 2004-10-19 | 2006-09-20 | 삼성전자주식회사 | 상변환 메모리 소자 및 그 형성 방법 |
US7364935B2 (en) | 2004-10-29 | 2008-04-29 | Macronix International Co., Ltd. | Common word line edge contact phase-change memory |
DE102004052611A1 (de) | 2004-10-29 | 2006-05-04 | Infineon Technologies Ag | Verfahren zur Herstellung einer mit einem Füllmaterial mindestens teilweise gefüllten Öffnung, Verfahren zur Herstellung einer Speicherzelle und Speicherzelle |
US7238959B2 (en) | 2004-11-01 | 2007-07-03 | Silicon Storage Technology, Inc. | Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same |
US20060108667A1 (en) | 2004-11-22 | 2006-05-25 | Macronix International Co., Ltd. | Method for manufacturing a small pin on integrated circuits or other devices |
US7202493B2 (en) | 2004-11-30 | 2007-04-10 | Macronix International Co., Inc. | Chalcogenide memory having a small active region |
JP2006156886A (ja) | 2004-12-01 | 2006-06-15 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
KR100827653B1 (ko) | 2004-12-06 | 2008-05-07 | 삼성전자주식회사 | 상변화 기억 셀들 및 그 제조방법들 |
US7220983B2 (en) | 2004-12-09 | 2007-05-22 | Macronix International Co., Ltd. | Self-aligned small contact phase-change memory method and device |
TWI260764B (en) | 2004-12-10 | 2006-08-21 | Macronix Int Co Ltd | Non-volatile memory cell and operating method thereof |
US20060131555A1 (en) | 2004-12-22 | 2006-06-22 | Micron Technology, Inc. | Resistance variable devices with controllable channels |
US20060138467A1 (en) | 2004-12-29 | 2006-06-29 | Hsiang-Lan Lung | Method of forming a small contact in phase-change memory and a memory cell produced by the method |
JP4646634B2 (ja) | 2005-01-05 | 2011-03-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7419771B2 (en) | 2005-01-11 | 2008-09-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a finely patterned resist |
US7214958B2 (en) | 2005-02-10 | 2007-05-08 | Infineon Technologies Ag | Phase change memory cell with high read margin at low power operation |
US7099180B1 (en) | 2005-02-15 | 2006-08-29 | Intel Corporation | Phase change memory bits reset through a series of pulses of increasing amplitude |
US7229883B2 (en) | 2005-02-23 | 2007-06-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Phase change memory device and method of manufacture thereof |
JP2006244561A (ja) | 2005-03-01 | 2006-09-14 | Renesas Technology Corp | 半導体装置 |
US7154774B2 (en) | 2005-03-30 | 2006-12-26 | Ovonyx, Inc. | Detecting switching of access elements of phase change memory cells |
US7488967B2 (en) | 2005-04-06 | 2009-02-10 | International Business Machines Corporation | Structure for confining the switching current in phase memory (PCM) cells |
US7166533B2 (en) | 2005-04-08 | 2007-01-23 | Infineon Technologies, Ag | Phase change memory cell defined by a pattern shrink material process |
KR100675279B1 (ko) | 2005-04-20 | 2007-01-26 | 삼성전자주식회사 | 셀 다이오드들을 채택하는 상변이 기억소자들 및 그제조방법들 |
KR100682946B1 (ko) | 2005-05-31 | 2007-02-15 | 삼성전자주식회사 | 상전이 램 및 그 동작 방법 |
KR100668846B1 (ko) | 2005-06-10 | 2007-01-16 | 주식회사 하이닉스반도체 | 상변환 기억 소자의 제조방법 |
US7238994B2 (en) | 2005-06-17 | 2007-07-03 | Macronix International Co., Ltd. | Thin film plate phase change ram circuit and manufacturing method |
US7598512B2 (en) | 2005-06-17 | 2009-10-06 | Macronix International Co., Ltd. | Thin film fuse phase change cell with thermal isolation layer and manufacturing method |
US7514367B2 (en) | 2005-06-17 | 2009-04-07 | Macronix International Co., Ltd. | Method for manufacturing a narrow structure on an integrated circuit |
US7696503B2 (en) | 2005-06-17 | 2010-04-13 | Macronix International Co., Ltd. | Multi-level memory cell having phase change element and asymmetrical thermal boundary |
US8237140B2 (en) | 2005-06-17 | 2012-08-07 | Macronix International Co., Ltd. | Self-aligned, embedded phase change RAM |
US7514288B2 (en) | 2005-06-17 | 2009-04-07 | Macronix International Co., Ltd. | Manufacturing methods for thin film fuse phase change ram |
US7534647B2 (en) | 2005-06-17 | 2009-05-19 | Macronix International Co., Ltd. | Damascene phase change RAM and manufacturing method |
US7321130B2 (en) | 2005-06-17 | 2008-01-22 | Macronix International Co., Ltd. | Thin film fuse phase change RAM and manufacturing method |
US20060289848A1 (en) | 2005-06-28 | 2006-12-28 | Dennison Charles H | Reducing oxidation of phase change memory electrodes |
US7309630B2 (en) | 2005-07-08 | 2007-12-18 | Nanochip, Inc. | Method for forming patterned media for a high density data storage device |
US7345907B2 (en) | 2005-07-11 | 2008-03-18 | Sandisk 3D Llc | Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements |
US20070037101A1 (en) | 2005-08-15 | 2007-02-15 | Fujitsu Limited | Manufacture method for micro structure |
KR100655443B1 (ko) | 2005-09-05 | 2006-12-08 | 삼성전자주식회사 | 상변화 메모리 장치 및 그 동작 방법 |
US7615770B2 (en) | 2005-10-27 | 2009-11-10 | Infineon Technologies Ag | Integrated circuit having an insulated memory |
US7417245B2 (en) | 2005-11-02 | 2008-08-26 | Infineon Technologies Ag | Phase change memory having multilayer thermal insulation |
US7397060B2 (en) | 2005-11-14 | 2008-07-08 | Macronix International Co., Ltd. | Pipe shaped phase change memory |
US20070111429A1 (en) | 2005-11-14 | 2007-05-17 | Macronix International Co., Ltd. | Method of manufacturing a pipe shaped phase change memory |
US7394088B2 (en) | 2005-11-15 | 2008-07-01 | Macronix International Co., Ltd. | Thermally contained/insulated phase change memory device and method (combined) |
US7450411B2 (en) | 2005-11-15 | 2008-11-11 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7635855B2 (en) | 2005-11-15 | 2009-12-22 | Macronix International Co., Ltd. | I-shaped phase change memory cell |
US7786460B2 (en) | 2005-11-15 | 2010-08-31 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7414258B2 (en) | 2005-11-16 | 2008-08-19 | Macronix International Co., Ltd. | Spacer electrode small pin phase change memory RAM and manufacturing method |
US7479649B2 (en) | 2005-11-21 | 2009-01-20 | Macronix International Co., Ltd. | Vacuum jacketed electrode for phase change memory element |
US7829876B2 (en) | 2005-11-21 | 2010-11-09 | Macronix International Co., Ltd. | Vacuum cell thermal isolation for a phase change memory device |
US7449710B2 (en) | 2005-11-21 | 2008-11-11 | Macronix International Co., Ltd. | Vacuum jacket for phase change memory element |
US7507986B2 (en) | 2005-11-21 | 2009-03-24 | Macronix International Co., Ltd. | Thermal isolation for an active-sidewall phase change memory cell |
US7599217B2 (en) | 2005-11-22 | 2009-10-06 | Macronix International Co., Ltd. | Memory cell device and manufacturing method |
US7459717B2 (en) | 2005-11-28 | 2008-12-02 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7688619B2 (en) | 2005-11-28 | 2010-03-30 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7233054B1 (en) | 2005-11-29 | 2007-06-19 | Korea Institute Of Science And Technology | Phase change material and non-volatile memory device using the same |
US7605079B2 (en) | 2005-12-05 | 2009-10-20 | Macronix International Co., Ltd. | Manufacturing method for phase change RAM with electrode layer process |
US7642539B2 (en) | 2005-12-13 | 2010-01-05 | Macronix International Co., Ltd. | Thin film fuse phase change cell with thermal isolation pad and manufacturing method |
US7531825B2 (en) | 2005-12-27 | 2009-05-12 | Macronix International Co., Ltd. | Method for forming self-aligned thermal isolation cell for a variable resistance memory array |
US8062833B2 (en) | 2005-12-30 | 2011-11-22 | Macronix International Co., Ltd. | Chalcogenide layer etching method |
US7292466B2 (en) | 2006-01-03 | 2007-11-06 | Infineon Technologies Ag | Integrated circuit having a resistive memory |
KR100763908B1 (ko) | 2006-01-05 | 2007-10-05 | 삼성전자주식회사 | 상전이 물질, 이를 포함하는 상전이 메모리와 이의 동작방법 |
US7560337B2 (en) | 2006-01-09 | 2009-07-14 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7595218B2 (en) | 2006-01-09 | 2009-09-29 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US20070158632A1 (en) | 2006-01-09 | 2007-07-12 | Macronix International Co., Ltd. | Method for Fabricating a Pillar-Shaped Phase Change Memory Element |
US7741636B2 (en) | 2006-01-09 | 2010-06-22 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7825396B2 (en) | 2006-01-11 | 2010-11-02 | Macronix International Co., Ltd. | Self-align planerized bottom electrode phase change memory and manufacturing method |
US7351648B2 (en) | 2006-01-19 | 2008-04-01 | International Business Machines Corporation | Methods for forming uniform lithographic features |
US7432206B2 (en) | 2006-01-24 | 2008-10-07 | Macronix International Co., Ltd. | Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram |
US7456421B2 (en) | 2006-01-30 | 2008-11-25 | Macronix International Co., Ltd. | Vertical side wall active pin structures in a phase change memory and manufacturing methods |
US7956358B2 (en) | 2006-02-07 | 2011-06-07 | Macronix International Co., Ltd. | I-shaped phase change memory cell with thermal isolation |
US7426134B2 (en) | 2006-02-24 | 2008-09-16 | Infineon Technologies North America | Sense circuit for resistive memory |
US7910907B2 (en) | 2006-03-15 | 2011-03-22 | Macronix International Co., Ltd. | Manufacturing method for pipe-shaped electrode phase change memory |
US20070235811A1 (en) | 2006-04-07 | 2007-10-11 | International Business Machines Corporation | Simultaneous conditioning of a plurality of memory cells through series resistors |
US7928421B2 (en) | 2006-04-21 | 2011-04-19 | Macronix International Co., Ltd. | Phase change memory cell with vacuum spacer |
US20070249090A1 (en) | 2006-04-24 | 2007-10-25 | Philipp Jan B | Phase-change memory cell adapted to prevent over-etching or under-etching |
US8129706B2 (en) | 2006-05-05 | 2012-03-06 | Macronix International Co., Ltd. | Structures and methods of a bistable resistive random access memory |
US7608848B2 (en) | 2006-05-09 | 2009-10-27 | Macronix International Co., Ltd. | Bridge resistance random access memory device with a singular contact structure |
US7423300B2 (en) | 2006-05-24 | 2008-09-09 | Macronix International Co., Ltd. | Single-mask phase change memory element |
US7696506B2 (en) | 2006-06-27 | 2010-04-13 | Macronix International Co., Ltd. | Memory cell with memory material insulation and manufacturing method |
US7663909B2 (en) | 2006-07-10 | 2010-02-16 | Qimonda North America Corp. | Integrated circuit having a phase change memory cell including a narrow active region width |
US7785920B2 (en) | 2006-07-12 | 2010-08-31 | Macronix International Co., Ltd. | Method for making a pillar-type phase change memory element |
US7542338B2 (en) | 2006-07-31 | 2009-06-02 | Sandisk 3D Llc | Method for reading a multi-level passive element memory cell array |
US7772581B2 (en) * | 2006-09-11 | 2010-08-10 | Macronix International Co., Ltd. | Memory device having wide area phase change element and small electrode contact area |
US7684225B2 (en) | 2006-10-13 | 2010-03-23 | Ovonyx, Inc. | Sequential and video access for non-volatile memory arrays |
US20080225489A1 (en) | 2006-10-23 | 2008-09-18 | Teledyne Licensing, Llc | Heat spreader with high heat flux and high thermal conductivity |
US20080101110A1 (en) | 2006-10-25 | 2008-05-01 | Thomas Happ | Combined read/write circuit for memory |
US7476587B2 (en) | 2006-12-06 | 2009-01-13 | Macronix International Co., Ltd. | Method for making a self-converged memory material element for memory cell |
US20080137400A1 (en) | 2006-12-06 | 2008-06-12 | Macronix International Co., Ltd. | Phase Change Memory Cell with Thermal Barrier and Method for Fabricating the Same |
US20080165569A1 (en) | 2007-01-04 | 2008-07-10 | Chieh-Fang Chen | Resistance Limited Phase Change Memory Material |
US7515461B2 (en) | 2007-01-05 | 2009-04-07 | Macronix International Co., Ltd. | Current compliant sensing architecture for multilevel phase change memory |
US20080164453A1 (en) | 2007-01-07 | 2008-07-10 | Breitwisch Matthew J | Uniform critical dimension size pore for pcram application |
US7440315B2 (en) | 2007-01-09 | 2008-10-21 | Macronix International Co., Ltd. | Method, apparatus and computer program product for stepped reset programming process on programmable resistive memory cell |
US7456460B2 (en) | 2007-01-29 | 2008-11-25 | International Business Machines Corporation | Phase change memory element and method of making the same |
US7535756B2 (en) | 2007-01-31 | 2009-05-19 | Macronix International Co., Ltd. | Method to tighten set distribution for PCRAM |
US7701759B2 (en) | 2007-02-05 | 2010-04-20 | Macronix International Co., Ltd. | Memory cell device and programming methods |
US7463512B2 (en) | 2007-02-08 | 2008-12-09 | Macronix International Co., Ltd. | Memory element with reduced-current phase change element |
US8138028B2 (en) | 2007-02-12 | 2012-03-20 | Macronix International Co., Ltd | Method for manufacturing a phase change memory device with pillar bottom electrode |
US8008643B2 (en) | 2007-02-21 | 2011-08-30 | Macronix International Co., Ltd. | Phase change memory cell with heater and method for fabricating the same |
US20080265234A1 (en) | 2007-04-30 | 2008-10-30 | Breitwisch Matthew J | Method of Forming Phase Change Memory Cell With Reduced Switchable Volume |
US7906368B2 (en) | 2007-06-29 | 2011-03-15 | International Business Machines Corporation | Phase change memory with tapered heater |
US7745807B2 (en) | 2007-07-11 | 2010-06-29 | International Business Machines Corporation | Current constricting phase change memory element structure |
US7755935B2 (en) | 2007-07-26 | 2010-07-13 | International Business Machines Corporation | Block erase for phase change memory |
-
2006
- 2006-12-06 US US11/567,300 patent/US7476587B2/en active Active
- 2006-12-18 TW TW095147539A patent/TWI326925B/zh active
-
2007
- 2007-12-04 CN CN2007101966851A patent/CN101197423B/zh active Active
-
2008
- 2008-12-16 US US12/335,737 patent/US7749854B2/en active Active
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102473597A (zh) * | 2009-08-28 | 2012-05-23 | 国际商业机器公司 | 用于完全非晶相变存储器孔隙单元的化学机械抛光停止层 |
CN102473597B (zh) * | 2009-08-28 | 2016-01-20 | 国际商业机器公司 | 用于完全非晶相变存储器孔隙单元的化学机械抛光停止层 |
CN103165519A (zh) * | 2011-12-08 | 2013-06-19 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN103165519B (zh) * | 2011-12-08 | 2016-07-27 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
US10204989B2 (en) | 2013-12-23 | 2019-02-12 | Intel Corporation | Method of fabricating semiconductor structures on dissimilar substrates |
CN105745769B (zh) * | 2013-12-23 | 2019-02-22 | 英特尔公司 | 在异质衬底上制造半导体结构的方法 |
CN105826464A (zh) * | 2015-01-06 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | 导电桥接随机存储器的形成方法 |
CN107437529A (zh) * | 2017-09-05 | 2017-12-05 | 睿力集成电路有限公司 | 一种半导体结构及其制造方法 |
US11251370B1 (en) | 2020-08-12 | 2022-02-15 | International Business Machines Corporation | Projected memory device with carbon-based projection component |
WO2022034396A1 (en) * | 2020-08-12 | 2022-02-17 | International Business Machines Corpofiation | Projected memory device with carbon-based projection component |
GB2613118A (en) * | 2020-08-12 | 2023-05-24 | Ibm | Projected memory device with carbon-based projection component |
US11665984B2 (en) | 2020-08-12 | 2023-05-30 | International Business Machines Corporation | Projected memory device with carbon-based projection component |
Also Published As
Publication number | Publication date |
---|---|
CN101197423B (zh) | 2010-04-21 |
TW200828637A (en) | 2008-07-01 |
TWI326925B (en) | 2010-07-01 |
US7476587B2 (en) | 2009-01-13 |
US20090098716A1 (en) | 2009-04-16 |
US7749854B2 (en) | 2010-07-06 |
US20080138929A1 (en) | 2008-06-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101197423B (zh) | 制造存储单元中的自收敛存储材料元件的方法 | |
CN100562985C (zh) | 制造存储单元的自对准空洞及底电极的方法 | |
CN101197422B (zh) | 在制造存储单元时产生微孔开口的方法 | |
CN101097989B (zh) | 具有存储材料绝缘的存储单元及其制造方法 | |
CN101290968B (zh) | 具有侧壁接触侧电极的存储单元 | |
CN100481389C (zh) | 可编程电阻随机存取存储器及其制造方法 | |
US7875493B2 (en) | Memory structure with reduced-size memory element between memory material portions | |
CN101419940B (zh) | 制造存储单元组合的方法与存储单元组合 | |
CN101159312B (zh) | 具有向周围延伸的存储元件的存储单元器件 | |
CN100502082C (zh) | 存储单元器件及其制造方法 | |
CN100555653C (zh) | 可编程电阻随机存取存储器及其制造方法 | |
US7879645B2 (en) | Fill-in etching free pore device | |
US20090101883A1 (en) | Method for manufacturing a resistor random access memory with a self-aligned air gap insulator | |
CN100563042C (zh) | 具有自对准气隙绝缘体的电阻随机存取存储器的制造方法 | |
US7956344B2 (en) | Memory cell with memory element contacting ring-shaped upper end of bottom electrode | |
CN101359677B (zh) | 相变化存储桥 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |