CN101236946B - 布线板和半导体器件 - Google Patents

布线板和半导体器件 Download PDF

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Publication number
CN101236946B
CN101236946B CN2008100032539A CN200810003253A CN101236946B CN 101236946 B CN101236946 B CN 101236946B CN 2008100032539 A CN2008100032539 A CN 2008100032539A CN 200810003253 A CN200810003253 A CN 200810003253A CN 101236946 B CN101236946 B CN 101236946B
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obstacle
wiring plate
semiconductor element
splicing ear
filling material
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CN101236946A (zh
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西村隆雄
合叶和之
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Socionext Inc
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Fujitsu Semiconductor Ltd
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Abstract

一种布线板和半导体器件，在所述布线板中电子部件经由凸点安装在主表面上，并且所述电子部件周围的至少一部分被树脂覆盖，所述布线板包括：阻挡物，设置在所述布线板的主表面上安装所述电子部件的区域周围的至少一部分；其中，所述阻挡物与所述树脂接触的表面具有连续形成曲线的结构。

Description

布线板和半导体器件
技术领域
本发明大体上涉及布线板和半导体器件。具体而言，本发明涉及一种安装有电子部件(例如半导体元件)的布线板以及一种通过凸点连接(bumpconnection)将半导体元件安装在布线板上的半导体器件。
背景技术
已有使用称为导线凸点的凸出(突出)外侧连接端子将半导体集成电路元件(下面称作“半导体元件”)安装在布线板上的半导体器件。布线板的基底部分采用绝缘树脂，例如玻璃纤维环氧树脂。由铜(Cu)等材料制成的导电层选择性地设置在布线板的主表面上。设置在半导体元件主表面上的凸出(突出)外侧连接端子连接到布线板的导电层。外侧连接端子例如球形电极端子设置在选择性地形成于布线板的另一主表面上的电极的表面上。
在上述半导体器件中，半导体元件以所谓倒装芯片(面朝下)的状态安装在布线板上。
在这种倒装芯片的安装结构中，为了保护半导体元件的电路形成表面和凸出(突出)外侧连接端子从而提高连接可靠性，为半导体元件的电路表面与布线板之间的空间提供主要由环氧树脂制成的底层填充(underfill)材料，并且使用这种底层填充材料覆盖半导体元件的一部分或整个外周侧表面。通过这种结构，加强了半导体元件与布线板之间的连接。
在将半导体元件安装并连接到布线板上后，将底层填充材料从半导体元件的周围填入半导体元件的电路表面与布线板之间的空间。或者，将底层填充材料预先施加在布线板上，并且将半导体元件隔着底层填充材料安装在布线板上，使底层填充材料设置在半导体元件的电路表面与布线板之间。
可能必须将底层填充材料选择性地设置在布线板上。
为了将底层填充材料选择性地设置在布线板上，例如提出了图1所示的结构。也就是在布线板的上表面设置阻挡物以围绕布线板的安装区。
这里，图1示出的状态是：半导体元件以倒装芯片的方式安装在布线板上，并且设置阻挡物以围绕布线板的安装区。图1(b)示出沿着图1(a)的线X-X的剖视图。此外，图1未示出选择性地设置在布线板后表面的外侧连接端子。
在图1所示的半导体器件10中，半导体元件4经由凸出(突出)外侧连接端子3以倒装芯片的方式安装在接合端子2上，接合端子2设置在布线板1的主表面上。此外，提供底层填充材料5并将其设置在半导体元件4与布线板1的主表面之间的空间中以及半导体元件4的外周侧表面。
此外，在布线板1的主表面设置阻挡物6以围绕半导体元件4的安装部分。由于存在阻挡物6，因此底层填充材料5的流动受阻，并且形成底层填充材料5的设置区。
在半导体元件4的周围形成的底层填充材料5的倾斜部分A称为倒角。倒角减轻了接合端子2与凸出(突出)外侧连接端子3的连接部分由于布线板1与半导体元件4的热膨胀系数之间的差异而产生的局部应力集中。因此可提高布线板1与半导体元件4之间连接的可靠性。
通过这种结构，可以通过阻挡物6阻挡底层填充材料5的流入，即使用于安装另一电子部件的端子靠近布线板1上半导体元件4的安装部分。
此外，通过形成指定高度的阻挡物6，能够将底层填充材料5的厚度(高度)控制为指定值。
例如，在日本特开专利申请公开No.8-97535中提出一种设置了树脂流动阻止框的结构。树脂流动阻止框围绕电子部件壳体(housing)、安装部分以及设置在印刷布线板上的接合孔。树脂流动阻止框的内表面具有锯齿或连续的凹凸形结构。
在日本特开专利申请公开No.2005-276879中提出一种半导体器件，其中：在半导体器件的安装衬底上，电极焊盘形成在矩形芯片安装区的周围，并且阻挡物设置在芯片安装区与电极焊盘之间；半导体芯片以倒装芯片的方式安装在安装衬底的芯片安装区上；底层填充材料填入安装衬底与半导体芯片之间。在这种半导体器件中，在制造半导体器件时底层填充材料落在上面的芯片安装区的预定一侧与对应这一侧的阻挡物之间的距离比芯片安装区的另一侧与对应另一侧的阻挡物之间的距离长。
在日本特开专利申请公开No.2006-140327中提出一种设置有底层填充材料用以安装电子部件的布线板。布线板上有焊料接点(land)和阻挡物接点。焊料接点经由焊料连接到电子部件的外侧连接端子。阻挡物接点设置在电子部件的安装区周围，是形成焊料阻挡物的基础。电子部件甚至可以安装在焊料阻挡物的外侧。
在日本特开专利申请No.2005-175113中提出一种具有如下结构的印刷布线板。这种印刷布线板包括：板主体，其中安装有IC芯片，并且形成有与IC芯片的电极连接的板导体；以及绝缘钝化膜，形成在板主体上，并且在IC芯片的安装位置具有开口。IC芯片外形的各条边与绝缘钝化膜的开口边缘之间的距离为0.2mm至0.5mm。此外，开口的拐角局部地开宽孔。
但是，在上述的现有技术结构中，配置为阻挡底层填充材料的流动且尺寸比半导体元件大的阻挡物在布线板的上表面上围绕了半导体元件的安装区，这种结构有以下问题。
参照图2至图4讨论将阻挡物设置在布线板的上表面以围绕半导体元件的安装区的现有技术结构的问题。图2和图3未示出选择性地设置在布线板后表面的外侧连接端子。
在图1所示的半导体器件10中，如果通过加热将底层填充材料5固化，则底层填充材料5在固化时收缩。
底层填充材料5和布线板1(为有机材料板)的热膨胀系数比半导体元件4的大。因此，如果通过加热将底层填充材料5固化，并且在完成固化后温度恢复至室温，则底层填充材料5和布线板1比半导体元件4收缩得更多，同时各结构性部件具有小的内部应力。
因此，如图2所示，产生使半导体元件4的侧面凹进的弯曲形状。此时，各结构性部件的内部应力变大。
如果对弯曲形状的半导体器件10进行温度循环测试(温度变化剧烈)和/或潮气吸收回流测试(在高温恒湿器环境下吸收潮气后加热)，则在位于半导体元件4周围的底层填充材料5的倒角部分与阻挡物6之间的界面处(图2中箭头所示部分)可能发生分层。
这种分层从发生分层的部分(作为起始点)开始扩展。结果，潮气可通过发生分层的部分进入半导体器件内部。由于潮气的进入，在半导体器件10内的布线和/或凸出外侧连接端子3处可能会出现腐蚀和/或破损。
当结构性部件数目增加而使得机械结构复杂时，上述问题将更加严重。例如，当以倒装芯片的方式安装具有许多个端子的大尺寸半导体元件时，和/或当在安装于布线板上的半导体元件周围设置外侧连接端子从而形成例如SiP(系统封装)型半导体器件这样的堆叠型半导体器件时，上述问题更加严重。
此外，为了响应对电子设备中高密度安装半导体器件的需求，力图将半导体器件小型化。
另一方面，底层填充材料5保护半导体元件4的电路形成表面和凸出外侧连接端子3，加强布线板1与半导体元件4之间的连接，从而确保并提高布线板1与半导体元件4之间的连接可靠性。具体而言，在布线板1与底层填充材料5的倒角A相接触的区域，也就是半导体元件4周围的倾斜扩展区域，对布线板1与半导体元件4之间的连接可靠性产生影响。参见图3(a)。
因此，如果为了将半导体器件10小型化，将阻挡物的内壁侧表面设置为靠近半导体元件4，则倒角A的扩展小，不能实现布线板1与半导体元件4之间的连接可靠性。
另一方面，为了将半导体器件10小型化，如图3(b)所示，在不改变倒角A大小的情况下就能够缩短阻挡物6的宽度。
但是，根据图3(b)所示的结构，当阻挡物6’的宽度小于阻挡物6’的高度时，应力集中在阻挡物6’与布线板1表面之间的界面(图3(b)中箭头所示的表面)处，从而在阻挡物6’与布线板1之间的界面处可能会产生分层，或者在阻挡物6’和/或布线板1处可能会产生破裂。
如果产生分层或破裂，则潮气会从产生分层或破裂的部分进入半导体器件内部。结果，在半导体器件10’内部的布线处和/或凸出外侧连接端子3处会出现腐蚀和/或破损，从而得不到希望的可靠性。此外，取决于形成阻挡物6’的材料，阻挡物6’可能会出现倒塌。
另一方面，在上述日本特开专利申请公开No.2005-175113中讨论的结构，也就是通过将阻挡物设置为在应力可能会集中的四个怪叫部分处远离半导体元件的结构，从提高连接可靠性的角度来说是有效的。但是，这种结构没有考虑到半导体器件的小型化。
另一方面，作为高密度安装半导体器件的实例，提出一种将多个半导体器件堆叠在一起的POP(堆叠封装)型半导体器件。
如图4所示，在POP型半导体器件中，将半导体器件20安装在半导体器件10上。在半导体器件10中，半导体元件4以倒装芯片的方式安装在布线板1上。半导体器件20包括安装在布线板8上表面的半导体元件9，半导体器件20经由外侧连接端子13连接到半导体器件10。布线板8和半导体元件9通过接合导线11相互连接。
通过这种结构，在半导体器件20中，包括半导体元件9和接合导线11的布线板8的上表面被密封树脂12密封。另一方面，外侧连接端子13(例如设置在选择性地形成的电极表面上的球形电极端子)设置在与布线板8下表面的半导体器件10的外侧连接端子7对应的部分。
半导体器件20的外侧连接端子13与半导体器件10的外侧连接端子7相连接，从而使半导体器件20堆叠在半导体器件10上。此外，外侧连接端子14(例如设置在选择性地形成的电极表面上的球形电极端子)设置在半导体器件10的布线板1的后表面上。
通过这种结构，当温度发生变化时，由于各结构性部件之间热膨胀系数的差异，如图4所示，半导体器件10中形成弯曲形状，使得半导体元件4的侧面凸出。另一方面，在半导体器件20中形成弯曲形状使得布线板8的侧面凹进。
结果，各结构性部件中的内部应力变大，因此在阻挡物6与位于半导体元件4周围的底层填充材料5的倒角部分之间的界面处可能会产生分层。
即使在这种POP型半导体器件中，也迫切要求将尺寸小型化，即，将外侧连接端子7设置为靠近半导体元件4。此外，在图4所示的结构中，在将电容性元件等等连接到布线板的外侧连接端子7情况下，而不是在将半导体器件20安装在半导体器件10上的情况下，要求将外侧连接端子7设置为靠近半导体元件4，从而改善半导体器件10的电特性。
在这种情况下，必须将设置在外侧连接端子7与半导体元件4之间的阻挡物6设置为靠近布线板1上的半导体元件4。因此，不能获得倒角A的充分扩展，从而会降低布线板1与半导体元件4的连接可靠性。
如果通过减小阻挡物6的宽度来维持倒角A的尺寸，则应力会集中在阻挡物6与布线板1表面之间的界面处。因此，在界面附近可能会存在这样的情况：在界面处阻挡物6产生分层，或者，阻挡物6和/或布线板1处产生破裂。
发明内容
根据本发明的一个方案，提供一种布线板，其中电子部件经由凸点安装在主表面上，并且所述电子部件的周围的至少一部分被树脂覆盖，所述布线板包括：阻挡物，设置在所述布线板的主表面上安装所述电子部件的区域的周围的至少一部分；其中，所述阻挡物与所述树脂接触的表面具有连续形成曲线的结构。
根据本发明的另一方案，提供一种半导体器件，包括：布线板；以及半导体元件，经由凸点安装在所述布线板的主表面上；其中，阻挡物设置在所述布线板的主表面上所述电子部件周围的至少一部分；所述阻挡物具有连续形成曲线的结构；树脂形成在所述半导体元件与所述阻挡物之间的所述布线板的表面上。
附图说明
图1(a)为平面图，图1(b)为剖视图，示出将半导体元件以倒装芯片的方式安装在设置有阻挡物的布线板上的现有技术半导体器件；
图2为示出围绕半导体器件安装区的阻挡物结构的问题的第一剖视图；
图3为示出围绕半导体器件安装区的阻挡物结构的问题的第二剖视图；
图4为示出围绕半导体器件安装区的阻挡物结构的问题的第三剖视图；
图5(a)为平面图，图5(b)为剖视图，示出本发明第一实施例的布线板的结构；
图5(c)为虚线A所示部分的放大平面图；
图6(a)为平面图，图6(b)为剖视图，示出将半导体元件以倒装芯片的方式安装在图5所示布线板上的结构；
图7为示出图5所示阻挡物的改型实例的第一平面图；
图8为示出图5所示阻挡物的另一改型实例的第二平面图；
图9(a)为第三平面图，图9(b)为立体图，示出图5所示阻挡物的另一改型实例；
图10为示出将半导体器件堆叠在图6所示的半导体器件上的POP(堆叠封装)型半导体器件的结构的剖视图；
图11为示出将半导体元件安装在图5所示布线板上的步骤的第一剖视图；
图12为示出将半导体元件安装在图5所示布线板上的步骤的第二剖视图；
图13(a)为平面图，图13(b)为剖视图，示出本发明第二实施例的布线板的结构；
图14(a)为平面图，图14(b)为剖视图，示出将半导体元件以倒装芯片的方式安装在图13所示布线板上的结构；
图15为示出将半导体元件安装在图13所示布线板上的步骤的剖视图；
图16(a)为平面图，图16(b)为剖视图，示出本发明第三实施例的布线板的结构；
图17(a)为平面图，图17(b)为剖视图，示出将半导体元件以倒装芯片的方式安装在图16所示布线板上的结构；
图18为示出将半导体元件安装在图16所示布线板上的步骤的第一剖视图；以及
图19为示出将半导体元件安装在图16所示布线板上的步骤的第二剖视图。
具体实施方式
下面参照图5至图19给出本发明实施例的描述。
在本发明的下述实施例中，将要安装在布线板上的半导体元件作为要安装在布线板上的电子部件的实例加以讨论。但是，本发明不限于这些实例。本发明可应用于通过凸点连接方法安装在布线板上的其它电子部件，例如BGA(球形栅格阵列)型半导体器件或者LGA(接点栅格阵列)型半导体器件。
[本发明的第一实施例]
本发明第一实施例的布线板的结构如图5所示。图5(b)示出沿着图5(a)的线X-X的剖视图。图5(c)为虚线A所示部分的放大图。图5(a)中虚线B围绕的矩形区域表示半导体元件的安装区。
参照图5(a)和图5(b)，在本发明第一实施例的布线板50中，在衬底基板5 1的两个表面上选择性地设置布线图案，从而形成多层结构。衬底基板51由有机树脂材料(例如玻璃纤维环氧树脂、玻璃-BT(双马来酰亚胺三嗪)或聚酰亚胺)、无机材料(例如陶瓷或玻璃)或者半导体材料(例如硅(Si))制成。布线图案由铜(Cu)、铝(Al)等材料制成。
作为布线图案的一部分，电极端子52和外侧连接端子53设置在衬底基板51的主表面(上表面)上。以倒装芯片的方式安装在布线板50上的半导体元件的电极连接到电极端子52。堆叠在布线板50上的半导体器件(以下称为“上半导体器件”)连接到外侧连接端子53。
此外，多个外侧连接端子54设置在衬底基板51的另一主表面(后表面)上。球形电极端子设置在外侧连接端子54上，使布线板50连接到电子设备的主板。
通过光蚀刻(photo-etching)、选择性蚀刻等方法形成布线图案、电极端子52和外侧连接端子53、54。
可通过电解电镀方法或者非电解电镀方法在电极端子52和外侧连接端子53、54的表面上形成双层镀层(由镍(Ni)/金(Au)形成)或者三层镀层(由铜(Cu)/镍(Ni)/金(Au)从底部形成)。注意，未示出多层布线结构中的内层布线。
在电极端子52的表面上可形成由焊料、导电树脂等制成的可再熔性导电材料。
在布线板50的多层布线结构的最上层设置绝缘树脂层55。绝缘树脂层例如由环氧树脂、丙烯酸树脂、聚酰亚胺树脂或者这些树脂的混合物制成。
通过印刷、喷涂、热轧层压、旋涂等方法在布线板50的表面上形成由例如光敏抗蚀剂材料形成的绝缘树脂层55。通过使用光刻、丝网印刷等方法形成开口图案。结果，在布线板50上表面的近似中心部分形成的开口Op(参见图5(a))中暴露出电极端子52。此外，在布线板50上表面的外周边缘部分附近暴露出用于连接半导体器件的外侧连接端子53。此外，在布线板50后表面上暴露出外侧连接端子54。
绝缘树脂层55的厚度例如为1μm至30μm。如果要求绝缘树脂层55的厚度更厚，则堆叠多个厚度例如为11μm至15μm的树脂层来形成绝缘树脂层55。
在本发明第一实施例的布线板50中，在布线板50的上表面上，外侧连接端子53与虚线B所示的半导体元件安装区之间的区域选择性地形成阻挡物56。阻挡物56以环形设置在绝缘树脂层55上，以围绕虚线B所示的半导体元件安装区，从而提供用于底层填充材料的区域。
在本发明第一实施例的布线板50中，环形阻挡物56的结构或图案是特别的。换而言之，阻挡物56与底层填充材料相接触的内表面(位于虚线B所示的半导体元件56的安装区一侧的表面)对应于设置在布线板50上的外侧连接端子53的外部结构(近似弧形的结构)。阻挡物56的内表面具有弧形弯曲部分连续延伸的结构。
阻挡物56的弧形弯曲部分的连接部分设置在相邻的外侧连接端子53之间，从半导体元件安装区朝向外侧。
阻挡物56由绝缘树脂(例如焊料抗蚀剂)、金属(例如铜(Cu)、铝(Al)、镍(Ni)、锡(Sn)或这些金属的合金)、或者无机材料(例如陶瓷)制成。在由绝缘树脂制成阻挡物56的情况下，可通过与制造布线板的方法中形成绝缘树脂层的方法同样的方法形成阻挡物56，使得阻挡物56与由树脂制成的底层填充材料之间具有良好的粘合性。可用与形成绝缘树脂层55的树脂材料同样的材料制成阻挡物56。
在由焊料抗蚀剂材料制成阻挡物56的情况下，其高度(从布线板50的表面开始在垂直方向上的长度)例如为大约10μm至300μm。阻挡物56的宽度C可等于或大于约0.1mm。此外，阻挡物56的相邻弧形弯曲部分顶部之间的距离D可等于或大于约0.1mm且等于或小于约3mm。此外，在阻挡物56的内壁表面(图5(a)中虚线B所示的半导体元件安装区的表面)，阻挡物56的弧形弯曲部分在半导体元件安装区一侧，顶部与底部之间的距离E可等于或大于约0.1mm且等于或小于约3mm。弧形弯曲部分的顶部与弧形弯曲部分的连接部分的首端之间的距离(有效宽度)F可等于或大于约0.3mm。
下面参照图6讨论将半导体元件以倒装芯片的方式(以面朝下的方式)安装在上述布线板50上的结构。
图6(b)示出沿着图6(a)的线X-X的剖视图。
参照图6，将半导体元件65以面朝下的方式安装在布线板50上表面如图5(a)中虚线B所示的半导体元件安装区中。
采用晶片工艺(wafer process)形成半导体元件65。半导体元件65的电子电路由有源元件(例如晶体管)、无源元件(例如电容)以及连接这些元件的布线层形成。在半导体元件65的由硅(Si)或砷化镓(GaAs)制成的半导体衬底的主表面上形成电极焊盘66。由以铝(Al)或铜(Cu)为主体的金属制成电极焊盘66。
在电极焊盘66上形成凸点67来充当凸出外侧连接端子。由金(Au)、铜(Cu)、这些金属的合金或者焊料制成凸点67
图6未示出半导体元件65的电路元件和布线层。
另一方面，在设置于布线板50表面的电极端子52的表面上形成可再熔性导电部件69(例如焊料或导电树脂)，以与半导体元件65的电极对应。通过印刷、转移、蒸发、或化学反应沉积等方法形成导电部件69。布线板50的电极端子52与半导体元件65的凸点67经由导电部件69互相连接。
在设置于布线板50后表面的外侧连接端子54上设置球形电极端子68。
在布线板50与半导体元件65的电子电路形成表面彼此相对的空间以及半导体元件65的外周部分与阻挡物56之间的区域设置底层填充材料70。
用底层填充材料70将布线板50与半导体元件65的电子电路形成表面彼此相对的空间以及半导体元件65的外周部分与阻挡物56之间的区域密封，从而将半导体元件65固定在布线板50上。
底层填充材料70具有形成为倾斜的形状且称为倒角的部分A。部分A位于半导体元件65的外周与阻挡物56之间。
底层填充材料70为热固性粘合剂(例如环氧树脂、聚酰亚胺树脂或丙烯酸树脂)，并且可包含无机填充物(例如硅石或陶瓷)，以控制固化树脂的热膨胀系数、粘性或流动性。此外，根据以倒装芯片的方式安装的方法，底层填充材料70可包含导电填充物，例如银(Ag)颗粒或者表面涂覆有金属的塑料颗粒。
如上所述，在以倒装芯片的方式安装了半导体元件65的布线板50上，在半导体元件65安装区与设置在栅格中的多个外侧连接端子53之间设置阻挡物56。
通过设置阻挡物56能够防止底层填充材料70流动以及到达外侧连接端子53。因此能够将外侧连接端子53设置为靠近半导体元件65的安装部分。从而能够将半导体器件小型化，并且提高布线板50的设计自由度。
特别地，在本发明的第一实施例中，如上所述，阻挡物56具有弧形弯曲部分连续延伸的结构，并且弧形弯曲部分的连接部分设置在相邻的外侧连接端子53之间。
因此，阻挡物56与外侧连接端子53之间的距离不大，并且不会妨碍半导体器件的小型化。
此外，阻挡物56具有弧形弯曲部分连续延伸的结构。因此，阻挡物56的内壁表面(在图5(a)中虚线B所示的半导体元件安装区一侧的表面)与底层填充材料70相互接触的面积大。此外，由于这种结构带来的固着效果，增加了底层填充材料70的粘合性。因此，能够提高底层填充材料70与阻挡物56之间的粘合性。
此外，阻挡物56具有在平面图中弧形弯曲部分连续延伸的结构。因此，阻挡物的有效宽度(图5(c)所示的部分F的测量值)大于阻挡物的宽度(图5(c)所示的部分C的测量值)，因此能够减少阻挡物56与布线板50之间的界面附近的应力集中。由此，能够防止在界面处阻挡物56产生分层或者阻挡物56和/或布线板50产生破裂。
因此，能够防止在底层填充材料70的倒角A与阻挡物56之间的界面处产生分层，从而提高半导体器件的可靠性。
内壁表面(位于图5(a)中虚线B所示的半导体元件65安装区一侧的表面)具有在平面图中弧形弯曲部分连续延伸的结构。此外，在相邻的外侧连接端子53之间，阻挡物56从图5(a)中虚线B所示的半导体元件65安装区朝向外侧。
因此，能够将底层填充材料70的倒角A与布线板50相接触的区域，即底层填充材料70在半导体元件65周围的裙形延伸区域变大。因此能够提高布线板50与底层填充材料70之间的粘合性。由此，能够提高半导体器件的可靠性。
此外，由于阻挡物56的弧形弯曲部分对应于外侧连接端子53的外部结构(近似球形的结构)，所以能够将外侧连接端子53设置为靠近半导体元件65。因此，能够将半导体器件小型化。
此外，将阻挡物56设置为围绕图5(a)中虚线B所示的半导体元件65安装区。因此，通过阻挡物56能够防止底层填充材料70沿着半导体元件65外周流动以及与外侧连接端子53接触。
因此，能够将外侧连接端子53设置为靠近安装在布线板50上的半导体元件65。因此，能够将半导体器件小型化并提高布线板50的设计自由度。
特别地，本实例中阻挡物56的环形结构近似为矩形。
在矩形阻挡物56的四个拐角附近，阻挡物56从图5(a)中虚线B所示的半导体元件65安装区朝向外侧。矩形阻挡物56的四个拐角的端部设置为离布线板上安装电子部件的区域最远。
通常，在将半导体元件以倒装芯片的方式安装在布线板上的情况下，最大量的应力集中在围绕半导体元件的区域的四个拐角处。因此，如本实例所示，在四个拐角附近，将阻挡物56设置为从图5(a)中虚线B所示的半导体元件65安装区朝向外侧，从而在四个拐角处底层填充材料70的倒角A变大。因此，能够充分确保底层填充材料70与布线板之间的连接强度。由此，能够提高半导体器件的可靠性。
此外，将阻挡物56设置在绝缘树脂层55上。因此，阻挡物56与绝缘树脂层55(露出布线板50的用于连接半导体元件65的接合电极52)可形成为一体。
本发明实施例的阻挡物不限于上述实例，并且可具有如图7至图9所示的结构。图9(b)为图9(a)所示阻挡物结构体的立体图。
图7示出阻挡物56-1和外侧连接端子53，其中阻挡物56-1为阻挡物56的第一改型实例。
在该改型实例中，阻挡物56-1具有在平面图中弧形弯曲部分连续延伸的结构，并且阻挡物56-1是从图5(a)中虚线B所示的半导体元件65安装区朝向外侧的弧。但是，弧形弯曲部分的连接部分不是处于外侧连接端子53之间。
在图7所示的实例以及图5所示的实例中，底层填充材料70的倒角A与布线板50相接触的区域，即底层填充材料70在半导体元件65周围的裙形延伸区域可变大。因此，能够提高布线板50与底层填充材料70之间的粘合性。由此，能够提高半导体器件的可靠性。
图8(a)至图8(d)示出阻挡物56-2至56-5，其中阻挡物56-2至56-5是阻挡物56的其它实例。
在各附图中，阻挡物56的上部对应于图5(a)中虚线B所示的半导体元件65安装区，而阻挡物56的下部对应于布线板50的外周侧。
换而言之，阻挡物56可以具有以下锯齿结构的平面图，其中在半导体元件65安装区一侧设置锐角，如图8(a)所示；也可以具有以下锯齿结构的平面图，其中具有锐角的锯齿形状以一定的间隙连续延伸，如图8(b)所示；也可以具有以下平面图，其中具有近似为矩形结构的切口连续延伸，如图8(c)所示；也可以具有以下平面图，其中正弦波连续延伸，如图8(d)所示。
此外，阻挡物56可具有由阻挡物56-6a和阻挡物56-6b形成的双层结构，如图9所示。
在图9所示的实例中，在半导体元件65安装区的一侧，阻挡物56-6b堆叠在阻挡物56-6a上。在阻挡物56-6a中，正弦波在平面图中连续延伸。在阻挡物56-6b中，正弦波在平面图中以相邻波形弯曲部分的大约半个间距的偏移(shift)连续延伸。
在这种结构中，正弦波形弯曲部分的数目是图5(c)所示实例的两倍。因此，阻挡物56的内壁表面与底层填充材料70相互接触的面积显著增加。
此外，由于多个正弦波形弯曲部分的固着效果，因此底层填充材料70的粘合性增加，从而提高了底层填充材料70与阻挡物56之间的粘合性。
下面参照图10讨论将半导体器件90堆叠在具有上述结构的半导体器件80上的POP(堆叠封装)型半导体器件。
如图10所示，将第二BGA(球形栅格阵列)型半导体器件90堆叠在半导体器件80上。
在半导体器件90中，第一半导体元件94经由第一粘合剂95安装在布线板93上。在布线板93中，主体为焊料的球形电极端子92设置在外侧连接端子91上，外侧连接端子91设置于布线板93后表面的外周附近。
此外，第二半导体元件96经由第二粘合剂97安装在第一半导体元件94上。
第一半导体元件94和第二半导体元件96安装在布线板93上，并且其状态是第一半导体元件94和第二半导体元件96的电子电路形成表面面朝上。
此外，第一半导体元件94的电极焊盘98与布线板93的接合焊盘101通过接合导线102相互连接。第二半导体元件96的电极焊盘99与布线板93的接合焊盘101通过接合导线102相互连接。
在布线板93上，通过密封树脂103将第一半导体元件94、第二半导体元件96以及接合导线102密封。
将这样的半导体器件90堆叠在半导体器件80上，并且将球形电极端子92连接到半导体器件80的外侧连接端子53，从而形成POP(堆叠封装)型半导体器件。
通过这种结构，即使温度变化而使得在半导体器件80与半导体器件90之间产生弯曲并且应力集中在半导体器件90的球形电极端子92附近，在阻挡物56与位于半导体元件65周围的底层填充材料70的倒角A之间的界面处也不会因为在半导体器件80上设置了阻挡物56而产生分层。
此外，能够防止在阻挡物56与设置阻挡物56的部分之间的界面处阻挡物56产生分层，并防止在界面和/或布线板50附近阻挡物56产生破裂。
下面参照图11和图12讨论将半导体元件65安装在布线板50上的方法。
首先，通过吸力将布线板50固定在接合台(图11和图12中未示出)上。此时，可加热接合台而使得布线板50被加热到大约50℃至100℃，参见图11(a)。预先在布线板50的接合电极52的表面形成可再熔性导电材料69，例如焊料。
将阻挡物56设置在布线板50上表面上外侧连接端子53与图5(a)中虚线B所示的半导体元件65安装区之间。阻挡物56具有弧形弯曲部分连续延伸的平面结构。阻挡物56形成在绝缘树脂层55上且与之成为一体，并且阻挡物56与绝缘树脂层55的材料相同以及制造方法相同。
换而言之，通过以与形成绝缘树脂层55相同的材料以及相同的制造方法形成阻挡物56，将绝缘树脂层55与阻挡物56形成一体。因此，提高了绝缘树脂层55与阻挡物56的粘合性，从而能够减少绝缘树脂层55与阻挡物56之间的界面应力。因此，能够防止由于应力集中在界面处产生破裂等。此外，能够减少布线板50的结构性部件的数量。
可通过将框形、L形、少一条边的矩形、或者棒形的板部件粘附在布线板50上来形成阻挡物56。预先通过蚀刻、机械加工、铸造、冲压等方法形成板部件。可从金属(例如铜(Cu)、铝(Al)、镍(Ni)、锡(Sn)或者它们的合金)、有机材料(例如环氧树脂)、无机材料(例如陶瓷)中选择板部件的材料。
此外，可通过以分配方法(dispensing method)将软树脂施加在布线板50上以及将树脂固化来形成阻挡物56。
此外，可通过预先在布线板50的阻挡物形成布置部分形成虚设布线图案、将焊膏施加在虚设布线图案上以及将焊料回流来形成阻挡物56。
另一方面，电极焊盘66上形成有凸点67的半导体元件经由吸孔131通过吸力固定在接合器具130上。接合器具130被加热到例如大约250℃至320℃。
此外，可通过采用导线接合技术的球形接合方法形成凸点67。除了球形接合方法外，还可以采用其它方法例如电镀方法、转移方法或者印刷方法作为形成凸点67的方法。
接着，将半导体元件65的凸点67与布线板50的接合电极52设置为彼此相对。
然后，将吸附且固定半导体元件65的接合器具130降低，从而将半导体元件65的凸点67推向布线板50的接合电极52并与之接触。结果，涂覆在接合电极52表面的导电材料69被加热并熔化，由此使半导体元件65的凸点67与布线板50的接合电极52相互连接。参见图11(b)。此时，例如可选择大约1gf/凸点至140gf/凸点的负载作为接合器具130的应用负载。
接着，使用分配器(图11未示出)从喷嘴132提供浆状底层填充材料70。参见图12(c)。换而言之，将浆状底层填充材料70从喷嘴132提供到半导体元件65与阻挡物56之间，并通过毛细作用提供到半导体元件65与布线板50之间的空间以及半导体元件65的外周部分。
在提供底层填充材料70后，将布线板50加热至例如大约30℃至100℃的温度，即使底层填充材料70不开始固化的温度。结果，底层填充材料70保持高流动性，从而能够缩短提供底层填充材料70的时间。此外，能够防止或减少没有提供底层填充材料70的部分或者空隙的产生。
接着，使用炉子等加热底层填充材料70并将其固化。在这个过程中，加热温度例如为大约120℃至200℃；加热时间例如为大约30分钟至90分钟。由此，能够将半导体元件65安装在布线板50上。参见图12(d)。
之后，将形成球形电极端子68的多个焊料球(参见图6(b))设置在布线板50的后表面，从而形成图6(b)所示的半导体器件80。
[本发明的第二实施例]
本发明第二实施例的布线板的结构如图13所示。图13(b)示出沿着图13(a)的线X-X的剖视图。图13(a)中虚线B围绕的区域表示布线板上半导体元件的安装区。
参照图13，本发明第二实施例的布线板150包括由有机树脂材料例如聚酰亚胺制成的带形板。仅在布线板150的上表面(主表面)形成布线图案152。作为布线图案152一部分的接合电极153设置在布线板150上表面的外周侧的端部。
基底151中形成的通孔154设置在布线图案152的其它部分152A。主体为焊料的球形电极端子155(参见图14)设置在通孔154中，用于连接主板等的外部电路。
阻挡物156选择性地设置在布线板150上表面的外周附近。换而言之，阻挡物156设置在虚线B所示的半导体元件65安装区外侧。
阻挡物156配置为当将半导体元件65以倒装芯片的方式安装在布线板150上时，阻挡提供在半导体元件65与布线板150之间的空间中的底层填充材料70的流动。阻挡物156围绕虚线B所示的半导体元件65安装区，并且以环形设置在基底151上。通过这种结构，限定了底层填充材料70的设置区域。
阻挡物156与底层填充材料70相接触的内壁表面(位于虚线B所示的半导体元件65安装区一侧的表面)具有在平面图中波浪形的凹进和凸出连续延伸的结构。阻挡物156与底层填充材料70相接触的内壁表面在平面图中的结构可为图8或图9所示的结构。
此外，可通过与本发明第一实施例的制造方法相同的方法形成阻挡物156。
图14中示出将半导体元件65以倒装芯片的方式(以面朝下的方式)安装在布线板150上的结构。图14(b)示出沿着图14(a)的线X-X的剖视图。此外，由于半导体元件65和底层填充材料70的结构与图6中所示的半导体元件65和底层填充材料70的结构相同，所以省略其具体描述。
参照图14，以面朝下的方式在布线板150的主(上)表面上将半导体元件65安装在图13中虚线B所示的半导体元件65安装区。此外，将半导体元件65的凸点67连接到布线板150的接合电极153。
此外，将主体为焊料的球形电极端子155设置在布线板150的后表面上。球形电极端子155填充通孔154，并且连接到布线图案的端部152A。
将底层填充材料70设置在布线板150与半导体元件65的电路元件表面之间的空间中以及阻挡物156与半导体元件65的外周部分之间的空间中。
因此，布线板150与半导体元件65的电路元件表面之间的空间以及阻挡物156与半导体元件65的外周部分之间的空间被密封，并且将半导体元件65固定在布线板150上。
本实施例中，如图13所示，阻挡物156以近似矩形围绕半导体元件65安装区，并且矩形阻挡物156的四个拐角设置为离半导体元件65安装区最远。
因此，底层填充材料70的倒角A形成为更长的裙形。
通常，在将半导体元件以倒装芯片的方式安装在布线板上时，最大量的应力集中在围绕半导体元件的区域的四个拐角处。但是本实例中，底层填充材料70的倒角A在四个拐角处以大倒角的方式形成。因此，能够充分地确保底层填充材料70与布线板150之间的连接强度。由此，能够提高半导体器件的可靠性。
下面参照图15讨论将半导体元件65安装在布线板150上的方法。
首先，通过吸力将布线板150固定在接合台(图15中未示出)上。此时，可加热接合台而使得布线板150被加热到大约50℃至100℃。
在布线板150的上表面上形成包括接合电极153的布线图案152。
在布线板150的上表面上形成阻挡物156，阻挡物156具有在平面图中弧形部分连续延伸的结构，以围绕布线图案152的形成区域。
接着，在布线板150的上表面上被阻挡物156围绕的区域选择性地设置底层填充材料70。
另一方面，将半导体元件经由吸孔131通过吸力固定在接合器具130上，其中在该半导体元件中通过与本发明第一实施例中采用的相同的方法在电极焊盘66上形成凸点67。
然后，将半导体元件65的凸点67与布线板50的接合电极52设置为彼此相对。参见图15(a)。
接着，降低接合器具130，从而将半导体元件65的凸点67推向布线板150的接合电极153并与之接触。
换而言之，将例如为大约10gf/凸点至200gf/凸点的负载应用于半导体元件65的凸点67，并且底层填充材料70流到半导体元件65后表面的整个表面。将底层填充材料70设置在半导体元件65与布线板150之间的空间中以及半导体元件65侧表面的外周部分。参见图15(b)。
此时，利用向半导体元件65施加超声波的方法或者不加热但施加负载和超声波的方法，而不是施加负载或热量的方法，将半导体元件经由底层填充材料70固定在布线板上。
接着，用炉子等加热底层填充材料70，并使其完全固化。在这个过程中，加热温度例如为大约120℃至200℃；加热时间例如为大约30分钟至90分钟。
由此，将半导体元件65以倒装芯片的方式安装在布线板50上。参见图15(c)。如果在图15(b)所示的过程中将底层填充材料70完全固化，则不需要进行图15(c)中所示的过程。
之后，将形成球形电极端子的多个焊料球设置在布线板150的后表面，从而形成图14(b)所示的半导体器件160。
[本发明的第三实施例]
本发明第三实施例的布线板的结构如图16所示。图16(b)示出沿着图16(a)的线X-X的剖视图。图16(a)中虚线B1和虚线B2围绕的区域表示布线板上半导体元件的安装区。
参照图16(a)和图16(b)，在本发明第三实施例的布线板250以及本发明第一实施例的布线板50中，在衬底基板251的两个表面上选择性地设置布线图案，从而形成多层结构。衬底基板251由有机树脂材料、无机材料(例如陶瓷或玻璃)或者半导体材料(例如硅(Si))制成。布线图案由铜(Cu)、铝(Al)等材料制成。
图16主要示出布线板250的上表面。但未示出布线板250的后表面。
在布线板250的上表面虚线B1所示的区域中，将用于凸点的多个电极252设置在栅格(矩阵)中。另一方面，在虚线B2所示的区域中，设置多行接合电极253作为布线图案的部分。在虚线B1所示的区域周围的附近、在虚线B2所示的区域周围的附近以及虚线B1所示的区域与虚线B2所示的区域之间的空间设置外侧连接端子254。
通过光蚀刻、选择性蚀刻等方法形成布线图案、电极端子252和253、以及外侧连接端子254。
可通过电解电镀方法或者非电解电镀方法在电极252、253和外侧连接端子254的表面上形成双层镀层(由镍(Ni)/金(Au)形成)或者三层镀层(由铜(Cu)/镍(Ni)/金(Au)从底部形成)。在电极252、253和外侧连接端子254的表面上可形成由焊料、导电树脂等制成的可再熔性导电材料。通过印刷、转移、蒸发、或化学反应沉积等方法形成导电部件。
在布线板250的多层布线结构的最上层设置绝缘树脂层255。绝缘树脂层例如由环氧树脂、丙烯酸树脂、聚酰亚胺树脂或者这些树脂的混合物制成。
通过印刷、喷涂、热轧层压、旋涂等方法在布线板250的表面上形成例如光敏抗蚀剂材料，从而形成绝缘树脂层255。通过使用光刻、丝网印刷等方法形成开口图案。结果，在开口中暴露出电极252、253和外侧连接端子254。
本实施例中，在虚线B1所示的区域与外侧连接端子254之间的空间中设置阻挡物256A(256A-1和256A-2)。此外，在虚线B2所示的区域与外侧连接端子254之间的空间中选择性地设置阻挡物256B。
阻挡物256(256A-1，256A-2)配置为在将半导体元件265以倒装芯片的方式安装在虚线B1所示的区域之后，阻挡在箭头S所示方向上提供的底层填充材料70A向外侧连接端子254的不必要流动。另一方面，阻挡物256B配置为将半导体元件265以倒装芯片的方式安装在虚线B2所示的区域时，阻挡底层填充材料70B向外侧连接端子254的不必要流动。
图16(a)中，阻挡物256A在“R”所示的点分离。这是因为在“R”所示的点处没有设置外侧连接端子254。阻挡物256A-1和256A-2可连续地形成为一体。
本实施例中，阻挡物256A和256B具有在平面图中近似正弦弯曲部分连续延伸的结构。
阻挡物256在平面图中的结构可为图8或图9所示的结构。
此外，可通过与本发明第一实施例的制造方法相同的方法来形成阻挡物256。
图17中示出将半导体元件65和半导体元件265以倒装芯片的方式(以面朝下的方式)安装在布线板250上并且将无源元件部件固定在外侧连接端子254的结构。图17(b)示出沿着图17(a)的线X-X的剖视图。图17主要示出布线板250的上表面。但未示出布线板250的后表面。
参照图17，在布线板250的主(上)表面，以面朝下的方式将半导体元件265安装在图16中箭头B1所示的半导体元件安装区。半导体元件265的凸点270连接到布线板250的接合电极252。
另一方面，在布线板250的主(上)表面，以面朝下的方式将半导体元件65安装在图16中箭头B2所示的半导体元件安装区。半导体元件65的凸点(未示出)连接到布线板250的接合电极253。
此外，将无源元件部件275例如芯片电容或芯片电阻经由焊料280安装在设置在布线板250上的外侧连接端子254上。
将底层填充材料70A设置在布线板250与半导体元件265的电路元件表面之间的空间中以及半导体元件65的外周部分。由此，布线板250与半导体元件265的电路元件表面之间的空间以及半导体元件265的外周部分被密封，并且将半导体元件265固定在布线板250上。
由于设置在半导体元件65与布线板250之间的底层填充材料70B的结构与图6所示的结构相同，所以省略其具体描述。
为了提供底层填充材料70(70A和70B)，在半导体元件265安装区B1与设置外侧连接端子254的空间之间以及在半导体元件265安装区B2与设置外侧连接端子254的空间之间设置阻挡物256。由于存在阻挡物256，防止了底层填充材料70的流动，因此底层填充材料70不能到达无源元件部件275所连接的外侧连接端子254。
换而言之，由于通过阻挡物256阻挡了底层填充材料70流向外侧连接端子254，所以能够将外侧连接端子254设置为靠近半导体元件265和半导体元件65。由此，能够缩短安装在连接端子254外侧的无源元件部件275与半导体元件265或65之间的距离、安装在外侧连接端子254上的无源元件部件275与半导体元件265或65之间的距离。因此，能够改善半导体器件265和半导体元件65的电特性。
另一方面，底层填充材料70(70A和70B)在没有设置阻挡物256的区域大量流动，从而形成大倒角A。因此，底层填充材料70与布线板250相接触的区域，即，底层填充材料70在半导体器件265和65周围的裙形延伸区域大。由此，提高了底层填充材料70与布线板150之间的粘合性，从而能够获得高可靠性的半导体器件。
接着，参照图18和图19讨论在布线板250上安装半导体元件265和无源元件部件275的方法。由于是通过与安装半导体元件265相同的方法或者通过与图15所示的相同的方法在布线板250上安装半导体元件65，所以省略其具体描述。
首先，在布线板250的电极252的表面上形成由焊料、导电树脂等材料制成的可再熔性导电部件285。参见图18(a)。
接着，使用掩模印刷方法在布线板250的外侧连接端子254上选择性地设置膏状焊料(cream solder)280。参见图18(b)。
接着，在使用倒装芯片接合器将半导体元件265和布线板250定位而使得半导体元件265的焊料凸点270与布线板250的电极252彼此相对之后，半导体元件265被安装在布线板250上。
另一方面，在将无源元件部件275和布线板250定位而使得无源元件部件275与布线板250的外侧连接端子254彼此相对之后，无源元件部件275被安装在布线板250上。参见图18(c)。
通过转移等方法将助熔剂(flux)粘附于在半导体元件265的电极焊盘(未示出)上形成的焊料凸点270的首端。由于助熔剂的粘性，半导体元件265的安装位置被固定。此外，由于膏状焊剂280的粘性，无源元件部件275的安装位置被固定。
接着，通过回流炉等加热安装有半导体元件265和无源元件部件275的布线板250，从而将焊料280、285熔化。加热条件例如为在氮气环境下、峰值温度大约220℃至250℃。
之后，降低温度，从而将半导体元件265和无源元件部件275固定在布线板250的电极上。参见图19(d)。完成回流工艺后，必要的话使用洗涤剂进行清洗工艺，其中洗涤剂例如为纯水、或者含氯氟烃(例如HCFC(氢氯氟烃))或者酒精。
接着，经由喷嘴132将浆状底层填充材料70提供到半导体元件265与布线板250之间的空间以及半导体元件265侧表面的周围。参见图19(e)。
此时，由于存在阻挡物256，因此阻挡了底层填充材料70向无源元件部件275所连接的外侧连接端子254流动。
之后，用炉子等将底层填充材料70加热并且固化，从而将半导体元件265和半导体元件65固定在布线板250上。
这样，根据本发明的上述实施例，将电子部件以倒装芯片的方式安装在布线板表面上，并且将底层填充材料设置在电子部件与布线板表面之间。换而言之，根据本发明的上述实施例，电子部件通过凸点连接安装在布线板的表面上，并且通过底层填充连接到布线板。通过阻挡物限定底层填充的设置区域。
此外，因为本发明实施例设置阻挡物的方式，为底层填充材料的倒角设置了充分的延伸区域，并且防止了底层填充材料与阻挡物之间的界面发生分层。因此，能够获得高可靠性，并实现电子设备的小型化。
虽然为完整且清楚地公开而参照具体实施例描述了本发明，但所附权利要求书不因此受限，而应视作本领域技术人员能够想到实施所有属于在此提出的基本教导的改型和替代结构。
本专利申请基于2007年1月30日提出的日本在先专利申请No.2007-20081，并通过参考将该专利申请的全部内容合并于此。

Claims (12)

1.一种布线板，其中电子部件经由凸点安装在主表面上，并且所述电子部件周围的至少一部分被树脂覆盖，所述布线板包括：
阻挡物，设置在所述布线板的主表面上安装所述电子部件的区域周围的至少一部分；
其中，所述阻挡物与所述树脂接触的表面具有连续形成曲线的结构；
其中，在所述布线板的安装有所述电子部件的表面上设置具有指定开口图案结构的绝缘树脂层；
所述阻挡物设置在所述绝缘树脂层上；
其中，所述阻挡物具有双层结构；
下层阻挡物与所述树脂接触的内壁表面具有连续波浪形结构；以及
上层阻挡物与所述树脂接触的内壁表面的结构为相邻的波浪形弯曲部分相对于所述下层阻挡物的内壁表面的结构偏移。
2.如权利要求1所述的布线板，
其中，在所述布线板上沿着安装所述电子部件的区域周围设置所述阻挡物的至少一部分。
3.如权利要求2所述的布线板，
其中，所述阻挡物设置为近似矩形形状，以围绕所述电子部件；
矩形形状的所述阻挡物的四个拐角设置为离所述布线板的安装有所述电子部件的区域最远。
4.如权利要求1所述的布线板，
其中，所述阻挡物包括绝缘树脂。
5.如权利要求1所述的布线板，
其中，所述阻挡物由与所述绝缘树脂层相同的材料制成。
6.如权利要求1所述的布线板，
其中，所述阻挡物与所述树脂接触的内壁表面具有波浪形结构。
7.如权利要求1所述的布线板，
其中，在所述布线板的安装有所述电子部件的表面上，所述阻挡物的外侧设置有外侧连接端子。
8.如权利要求7所述的布线板，
其中，所述阻挡物的结构与所述外侧连接端子的外部结构对应。
9.如权利要求7所述的布线板，
其中，所述阻挡物的结构为：位于相邻所述外侧连接端子之间的部分远离所述布线板的安装有所述电子部件的区域。
10.一种半导体器件，包括：
布线板；以及
半导体元件，经由凸点安装在所述布线板的主表面上；
其中，在所述布线板的主表面上所述半导体元件周围的至少一部分设置有阻挡物；以及
所述阻挡物具有连续形成曲线的结构；以及
在所述半导体元件与所述阻挡物之间的所述布线板的表面上形成有树脂；
其中，在所述布线板的安装有半导体元件的表面上设置具有指定开口图案结构的绝缘树脂层；
所述阻挡物设置在所述绝缘树脂层上；
其中，所述阻挡物具有双层结构；
下层阻挡物与所述树脂接触的内壁表面具有连续波浪形结构；以及
上层阻挡物与所述树脂接触的内壁表面的结构为相邻的波浪形弯曲部分相对于所述下层阻挡物的内壁表面的结构偏移。
11.如权利要求10所述的半导体器件，
其中，在所述布线板的安装有所述半导体元件的表面上，所述阻挡物的外侧设置有外侧连接端子；以及
第二半导体元件堆叠在所述半导体元件上，并连接到所述外侧连接端子。
12.如权利要求11所述的半导体器件，
其中，在所述外侧连接端子上安装有无源元件部件。
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