CN101241966B - 电阻随机存取存储单元装置 - Google Patents

电阻随机存取存储单元装置 Download PDF

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CN101241966B
CN101241966B CN200710305951XA CN200710305951A CN101241966B CN 101241966 B CN101241966 B CN 101241966B CN 200710305951X A CN200710305951X A CN 200710305951XA CN 200710305951 A CN200710305951 A CN 200710305951A CN 101241966 B CN101241966 B CN 101241966B
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layer
electrode
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CN101241966A (zh
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赖二琨
何家骅
谢光宇
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Macronix International Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • H—ELECTRICITY
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    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of the switching material, e.g. layer deposition
    • H10N70/026—Formation of the switching material, e.g. layer deposition by physical vapor deposition, e.g. sputtering
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    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/041—Modification of the switching material, e.g. post-treatment, doping
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    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Patterning of the switching material
    • H10N70/066—Patterning of the switching material by filling of openings, e.g. damascene method
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828—Tellurides, e.g. GeSbTe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors

Abstract

本发明涉及电阻随机存取存储单元装置。一种存储单元装置其具有一底电极与一顶电极，一存储材料栓塞接触至底电极，以及一杯状导电构件其具有一周缘接触至顶电极、以及在底部具有一开口接触至存储材料。因此，在存储单元中的导电路径是从顶电极穿过导电杯状构件，并穿过相变化材料栓塞而到达底电极。同时，用以制造此存储单元装置的方法包括：形成一岛状底电极、其包括一绝缘构件以及一停止构件于一底电极之上，形成一分隔层其环绕此岛状底电极，移除停止构件以形成一空洞于分隔层中的绝缘构件之上，形成一导电薄膜于此空洞中、并形成一绝缘衬底于导电薄膜之上，蚀刻以形成一杯状导电薄膜其具有一周缘并形成一开口穿过绝缘衬底与杯状导电薄膜的底部、而到达底电极的表面，形成一相变化存储材料栓塞于此开口中，并形成一顶电极接触至杯状导电薄膜的周缘。

Description

电阻随机存取存储单元装置
技术领域
本发明涉及以相变化存储材料为基础的高密度存储装置，以及用以制造这种装置的方法，其中相变化存储材料包括硫属化物材料与其他材料。
背景技术
相变化存储材料广泛地用于读写光碟中。这些材料包括有至少两种固态相，包括如一大部分为非晶态的固态相，以及一大体上为结晶态的固态相。激光脉冲被用于读写光碟片中，以在二种相中切换，并读取此种材料子相变化之后的光学性质。
如硫属化物及类似材料的这种相变化存储材料，可通过施加其幅度适用于集成电路中的电流，而致使晶相变化。大致非晶态的特征是其电阻高于结晶态，此电阻值可轻易测量得到而用以作为指示。这种特性则引发使用可编程电阻材料以形成非挥发性存储器电路等兴趣，此电路可用于随机存取读写。
从非晶态转变至结晶态一般为一低电流步骤。从结晶态转变至非晶态(以下指称为重置(reset))一般为一高电流步骤，其包括一短暂的高电流密度脉冲以熔化或破坏结晶结构，其后此相变化材料会快速冷却，抑制相变化的过程，使得至少部份相变化结构得以维持在非晶态。理想状态下，致使相变化材料从结晶态转变至非晶态的重置电流幅度应越低越好。欲降低重置所需的重置电流幅度，可通过减低在存储器中的相变化材料元件的尺寸、以及减少电极与此相变化材料的接触面积而达成，因此可针对此相变化材料元件施加较小的绝对电流值而达成较高的电流密度。
此领域发展的一种方法是致力于在一集成电路结构上形成微小孔洞，并使用微量可编程的电阻材料填充这些微小孔洞。致力于这种微小孔洞的专利包括：于1997年11月11日公告的美国专利第5,687,112号“Multibit Single Cell Memory Element Having TaperedContact”、发明人为Ovshinky；于1998年8月4日公告的美国专利第5,789,277号“Method of Making Chalogenide[sic]MemoryDevice”、发明人为Zahorik等；于2000年11月21日公告的美国专利第6,150,253号“Controllable Ovonic Phase-Change SemiconductorMemory Device and Methods of Fabricating the Same”、发明人为Doan等。
当以非常微小尺寸制造这种装置且工艺变数必须符合大尺寸存储装置所要求的严格工艺规范时，会遭遇到问题。因此，较佳是能提供一种存储单元结构与制造这种结构的方法，其具有微小尺寸与低重置电流。
发明内容
本发明的一目的涉及相变化存储装置，其包括一存储材料，可通过能量的应用而在电性状态间交替。此存储单元装置具有一底电极与一顶电极，一存储材料栓塞接触至底电极，以及一杯状导电构件其具有一周缘接触至顶电极且在底部具有一开口接触至存储材料。藉此，存储单元中的导电路径是从顶电极穿过杯状导电构件，并穿过相变化材料栓塞到达底电极。
本发明的一目的，是提供一存储单元装置，其包括一底电极与一顶电极，一相变化存储材料栓塞接触至底电极，以及一杯状导电构件其具有一周缘与一底部，该底部具有一开口，其中，该导电构件在所述周缘处接触至顶电极，以及该导电构件在所述开口处接触至存储材料，以使存储单元中的导电路径是从顶电极穿过杯状导电构件，并穿过相变化材料栓塞到达底电极。
本发明的另一目的，是提供制造一存储单元装置的方法，通过提供一基板其在一表面具有一介金属介电质，形成一第一电极层于介金属介电质之上，形成一电绝缘层于第一电极层之上，形成一停止层于电绝缘层之上，以及图案化各层以形成岛状底电极，每个岛状底电极包括一电绝缘元件与一停止元件；沉积一填充材料于介金属介电质及这种岛状底电极之上；移除填充材料至停止元件；移除停止元件，形成一空洞，空洞由分隔层的一侧壁与电绝缘元件的一外露表面所定义；沉积一导电材料以形成一导电薄膜于填充材料、分隔层的侧壁与电绝缘元件的外露表面之上；沉积一电绝缘衬底材料于导电薄膜之上；进行一非等向性蚀刻，以从分隔层的表面移除电绝缘衬底材料及导电薄膜，并形成一开口穿过电绝缘衬底材料、且穿过导电薄膜和电绝缘层；沉积一相变化存储材料于开口中；形成一氧化物覆盖层于相变化存储材料之上；以及形成一顶电极于氧化物覆盖层以及分隔层的表面上等步骤达成。
本发明的方法直接采用自对准工艺，且可改变其大小。
在所生成的存储单元构件下，存储材料与底电极电性接触。一导电构件包括具有一周缘的一侧壁、以及带有一开口的一底部。存储材料接触底电极并于其开口接触导电构件；以及杯状构件的周缘接触顶电极。
附图说明
图1示出了本发明的一实施例的存储单元装置的剖面图；
图2A及图2B分别示出了一带图样的底电极堆叠位于介金属介电质的表面的平面及剖面图，其中堆叠包括底电极、氧化物、以及氮化硅层；
图3A及图3B分别示出了沉积与研磨如图2A及图2B所示的堆叠旁的填充层的结果的平面及剖面图；
图4A及图4B分别示出了从堆叠移除氮化硅层的结果的平面及剖面图；
图5A及图5B分别示出了沉积一层氮化钛于图4A、图4B的结构以及形成二氧化硅的衬底层于氮化钛层上的结果的平面及剖面图；
图6A及图6B分别示出了非等向性蚀刻穿过二氧化硅及氮化钛以外露底电极的一区域的结果的平面及剖面图；
图7A及图7B分别示出了沉积一锗锑碲(GST)于图6A、图6B的结构上以及回蚀该层以形成GST栓塞的结果的平面及剖面图；
图8A及图8B分别示出了沉积覆盖氧化物于图7A、图7B的结构以及平面化的结果的平面及剖面图；
图9A及图9B分别示出了形成顶电极于图8A、图8B的结构上的结果以及标示以显示完成的存储单元的某些特征的大小的平面及剖面图；
图9C示出了图9A的顶电极的另一形态的平面图；
图10示出了包括相变化存储构件的存储阵列的示意图。
【主要元件符号说明】
10        存储单元结构
11        分隔层
12        底电极
13        周缘
14        顶电极
16        电绝缘层
17        电绝缘衬底
18        杯状导电衬底
19        箭头
20        相变化材料栓塞
21        表面
22        非晶态
23        小区域
26        覆盖氧化物
27        底部
28        开口
29        侧壁
92        分隔层的空洞宽度
94        杯状导电薄膜侧壁部分的厚度
95        杯状薄膜的底部厚度
98        栓塞与底电极接触的区域的宽度
99        栓塞高度
123、124  字线
128       共同源极线
132、133  底电极构件
134       顶电极构件
135、136  存储单元
141、142  位线
145       Y解码器与字线驱动器
146       X解码器与感测放大器
150、151、152 存取晶体管
210       底电极堆叠或岛
212       底电极
216       绝缘层
221       表面介金属介电质层
230       蚀刻停止层
311       填充层
421       绝缘层表面
422       空洞
427       绝缘层表面
512       分隔层表面
517       绝缘衬底
518       导电薄膜
522       空隙
622       开口
具体实施方式
下面的发明说明将参照至特定结构实施例与方法。可以理解的是，本发明的范围并非限制于特定所披露的实施例，且本发明可利用其他特征、元件、方法与实施例进行实施。在各实施例中的类似元件将以类似标号对其进行指定。
参照图1，其大体上显示本发明的一实施例的存储单元结构10。存储单元结构10包括底电极12与顶电极14。电绝缘层16覆盖于底电极12之上。杯状导电衬底18包括形成于绝缘层16上的底部27以及具有一周缘13接触顶电极14的侧壁部分29。电绝缘衬底17形成于底部27之上并位于杯状导电衬底18的侧壁部分29。相变化存储材料栓塞20穿过绝缘衬底17、杯状导电衬底18的底部27以及绝缘层16，形成于一开口内。相变化存储材料栓塞20接触底电极12的表面21的一部分23，并穿过底部27于开口28接触杯状导电衬底18。电绝缘覆盖层26填满绝缘衬底17内以及顶电极14与相变化材料栓塞20间的空间。底电极12、绝缘层14以及杯状导电衬底18与相变化材料栓塞20还有杯状衬底内所包括的其他特征，被一填充层或分隔层11所包围。填充层11及底电极12位于介金属介电质上；顶电极14位于填充层11上，并接触杯状导电衬底18的周缘13。因此，顶电极在杯状衬底的侧壁的周缘电连接杯状衬底；相变化材料栓塞于底电极的表面的一部分电连接底电极；以及杯状衬底于杯状衬底的底部开口处电连接相变化材料栓塞。如箭头19略示，导电路径从顶电极14穿过杯状导电衬底18、穿过相变化材料栓塞20到达底电极12。
本发明的存储单元结构提供许多优势特征，如图1所示。相变化材料栓塞与底电极有一小区域的接触。从顶电极到相变化材料栓塞的电流(利用杯状衬底)局限于杯状衬底的底部接触相变化材料的开口的一小区域。
图10是一存储阵列的示意图，存储阵列可依据在此所述的方法实施。在图10的示意中，共同源极线128、字线123以及字线124朝Y方向大致呈平行排列。位线141及142朝X方向大致呈平行排列。因此，方块145中的Y解码器与字线驱动器耦接字线123、124。方块146中的X解码器与一组感测放大器耦接位线141及142。共同源极线128耦接存取晶体管150、151、152及153的源极端。存取晶体管150的栅极耦接字线123。存取晶体管151的栅极耦接字线124。存取晶体管152的栅极耦接字线123。存取晶体管153的栅极耦接字线124。存取晶体管150的漏极耦接存储单元135的底电极构件132，存储单元135具有顶电极构件134。顶电极构件134耦接位线141。类似地，存取晶体管151的漏极耦接存储单元136的底电极构件133，存储单元136具有顶电极构件137。顶电极构件137耦接位线141。存取晶体管152及153亦于位线142耦接对应的存储单元。从示范配置可知，共用源极线128由两列存储单元所分享，其中一列以Y方向排列，如图所示。在其他实施例中，存取晶体管可由二级管或控制阵列中的电流流向某些特定装置以读写数据的其他结构代替。
存储单元装置的实施例，包括存储材料20的相变化存储材料，其相变化存储材料包括硫属化物材料与其他材料。相变化合金能在此单元主动通道区域内依其位置顺序于材料为一般非晶状态的第一结构状态与为一般结晶固体状态的第二结构状态之间切换。这些材料至少为双稳定态。此词汇「非晶」用以指称一相对较无次序的结构，其较之一单晶更无次序性，而带有可检测的特征如较之结晶态更高的电阻值。此词汇「结晶态」用以指称一相对较有次序的结构，其较之非晶态更有次序，因此包括有可检测的特征例如比非晶态更低的电阻值。典型地，相变化材料可电切换至完全结晶态与完全非晶态之间所有可检测的不同状态。其他受到非晶态与结晶态的改变而影响的材料特征包括，原子次序、自由电子密度、以及活化能。此材料可切换成为不同的固态、或可切换成为由两种以上固态所形成的混合物，提供从非晶态至结晶态之间的灰阶部分。此材料中的电性质亦可能随之改变。
相变化合金可通过施加一电脉冲而从一种相态切换至另一相态。先前观察指出，一较短、较大幅度的脉冲倾向于将相变化材料的相态改变成大体为非晶态。一较长、较低幅度的脉冲倾向于将相变化材料的相态改变成大体为结晶态。在较短、较大幅度脉冲中的能量够大，因此足以破坏结晶结构的键结，同时够短因此可以防止原子再次排列成结晶态。在没有不适当实验的情形下，可以利用实验方法决定特别适用于一特定相变化合金的适当脉冲量变曲线。在本发明中，相变化材料指GST，且需要知道的是，本发明亦可使用其他类形的相变化材料。适用于实施在此所述的存储装置的材料为Ge2Sb2Te5。
参照图1，如图10所述的存取电路可以许多方法配置，以接触第一电极12与第二电极14，供控制存储单元的操作，使相变化材料20得以编程设定为可利用存储材料反向实作的两种固态相的其中一种。举例而言，利用硫属化物材料为主的相变化材料，可将存储单元设定为较高电阻状态以及较低电阻状态，其中在较高电阻状态下电流路径中的导桥的至少一部份是非晶态，而在较低电阻状态下电流路径中的导桥的至少一部份是结晶态。举例而言，带有适当的较短、高振幅的电脉冲的应用将导致相变化材料20局部变成大体上为非晶态，如图1中的22所示。
存储单元装置10的制造将参考图2A-9C进行描述，其中一示范工艺的许多阶段以平面图(2A、3A等；显示四个存储单元的阵列)以及剖面图(2B、3B等；显示一个存储单元)显示。存取电路位于具有一表面介金属介电质层221的基板上。适用于底电极的导电材料的导电层沉积于介金属介电质层221的表面，适用于底电极的导电材料例如有金属或以金属为主或非金属的材料，比方铜；铝；钛(Ti)及例如氮化钛(TiN)、氮氧化钛(Ton)等以钛为主的材料；钽(Ta)及例如氮化钽(Tan)的以钽为主的材料；多晶硅、例如硅化钨(WSix)的以钨为主的材料；以及针对低热传导电极，例如LNO(LaNiO3)和LSMO(LaSrMnO3)等材料；如氧化物(比如二氧化硅)的电绝缘层沉积于底电极层之上；以及例如氮氧化硅或氮化硅的材料的蚀刻停止层，沉积于绝缘层上。
底电极层可具有例如介于约200埃到约3000埃之间的厚度，通常在约500埃。举例而言，氧化物绝缘层可具有介于约50埃到2000埃之间的厚度，二氧化硅层通常在约200埃。举例说明，氮化硅蚀刻停止层可具有介于约200埃到3000埃之间的厚度，通常在约1000埃。这些层接着被图样化并被蚀刻，以形成底电极堆叠或岛状底电极210，每个底电极堆叠或岛状底电极210包括底电极212、绝缘层(氧化物，比方二氧化硅)216以及蚀刻停止层230，如图2A、2B中的范例所示。层230是根据绝缘层216及填充层311(参考下图)的材料所选的材料的牺牲层；通常适用于层230的材料对于绝缘层216有较高的蚀刻选择性且对层311有较高的CMP选择性。藉此，多晶硅或钨材料大多适用于绝缘层材料及导电层。在平面图(图2A)中，所示的底电极堆叠已被图样化为一圆柱岛；其他形状亦可通过不同配置的图样而形成。或者，本发明亦可以图10所示出的交叉点的配置(位线/字线)实施。
接着，将填充材料沉积于图2A及图2B的结构上，并将此材料移除到蚀刻停止层230的表面，以形成一填充层(或分隔层)311。适当的填充材料包括例如氧化物(例如二氧化硅、BPSG、FSG低介电常数、或对层230有较高的蚀刻选择性的其他材料)，以及氮化物(例如氮化硅、多晶硅氮氧化硅、钨、或对层216具有较高的蚀刻选择性)。填充材料围绕底电极堆叠，且较佳地提供较良好的电与热绝缘，为存储单元提供热与电隔离。填充材料可利用化学机械研磨方法或例如回蚀，使之平面化，而检测到蚀刻停止层230表面的外露时，即停止研磨或蚀刻。填充材料可通过例如高密度等离子化学气相沉积进行沉积，在此工艺中蚀刻停止层会受到保护。适当的蚀刻停止材料包括例如氮氧化硅(SiON)、钨(W)、多晶硅、或对绝缘层216有较高的蚀刻选择性以及对层311有较高CMP率的其他材料；蚀刻停止层具有介于约200埃到约3000埃之间的厚度，通常约1000埃。
接着，蚀刻停止层可以通过例如选择性离子蚀刻或湿蚀刻(「浸沾」)的方式做移除。图4A及图4B显示其结构的结果。分隔层311包围底电极212与绝缘(氧化)层216，大体上如先前图式所示。只是目前绝缘(氧化)层216的表面421外露于分隔层的周壁421所定义的空洞422的底部。
接着，导电材料沉积于图4A、图4B所示的结构上，在分隔层上表面、绝缘(氧化)层216表面427、以及周壁421表面形成导电薄膜518。接着，电绝缘材料沉积于此结构上，在导电薄膜518的表面上形成衬底层517。图5A及图5B显示这些步骤的结果。衬底层的厚度不会填满空洞的整个空间，而会留下一个空隙522。适用于导电薄膜的材料包括例如氮化钛、钛、钨、铜、多晶硅；由于较薄的氮化钛比较有效，因此氮化钛较佳作为衬底材料。适用于绝缘(氧化)衬底层的材料包括例如氮氧化硅(SiON)及氮化硅(SiN)。
接着进行非等向性蚀刻，从分隔层的表面移除绝缘衬底材料及导电薄膜材料，以及蚀刻穿过空洞底部的绝缘(氧化)衬底材料以及导电薄膜。如图6A、图6B所示，这导致导电薄膜518形成杯状导电衬底18，此亦形成穿过底电极12的开口622，并外露许多特征，其包括：分隔层311的表面512、杯状衬底18的周缘13、底电极12表面21的一小区域23、以及穿过杯状衬底18的底部27的开口28。绝缘衬底材料的一部份留在底部27并在杯状衬底18的侧壁部分29内。
适当的非等向性蚀刻可包括许多步骤，一范例包括以下三个步骤。在此范例中，绝缘衬底517(17)为SiN，导电薄膜518(18)为如铜的金属，以及绝缘层216(16)为氧化硅。在第一步骤中，对于SiN，利用例如80-200W的高底功率以及比方CH3F或CHF3化合物或其混合物，选择性地与氩、氮及氧等其中之一、或两个或所有的混合物组合，进行反应性离子蚀刻(RIE)。在第二步骤中，对于金属进行含氯的蚀刻，例如利用BCl3或Cl2的化合物或其混合物，选择性与氩或氮其中之一、或其混合物组合，进行RIE。如同第一步骤，在第二步骤中底功率的强度足够进行非等向性蚀刻，例如就一8寸晶圆工艺而言是利用高于100W的底功率。第二步骤蚀刻可通过时间控制或利用终点检测而停止；关于终点检测，C-N信号降低可用以检测TiN蚀刻的工艺。在第三步骤中，对于SiO2，利用例如C4F8或CF 4或CHF3或C4F6化合物或其一或多个混合物，选择性与氧或氩或其混合物组合，进行RIE。第三层(在此为SiO2)对第一层(在此为SiN)的选择性为高选择性，以避免在第三蚀刻步骤期间毁损SiN层；蚀刻选择性可大于例如约10。蚀刻步骤的参数可以通常的设定而做调整或协调，以取得最佳性能并最佳化结果蚀刻的实体外观。第二及第三步骤之间可进行氧原子等离子剥除，以在空洞内移除聚合的残留物。选择性地，在此三个步骤的每一步骤之后以及公知的氧原子等离子剥除之后，可进行其他的干式剥除。
接着，相变化存储材料沉积于图6A、图6B所示的结构上，利用例如回蚀将沉积材料的上部分移除，以在开口622的底部留下相变化材料栓塞20，如图7A及图7B所示。相变化材料可为GexSbyTez(一种「GST」)化学式的硫属化物，其中x＝0-5；y＝0-5；以及z＝0-10，例如其x∶y∶z＝2∶2∶5的GST。或者相变化材料可为一种GST，例如掺杂N的GST、掺杂Si的GST、或掺杂Ti的GST；或可以其他元素作为掺杂物的方式实施。
硫属化物相变化材料利用氩、氮、氦或其类似物或这些气体的混合物作为反应气体，在介于约1mtorr到约100mtorr的气压范围内，且通常是在室温下，通过物理气相沉积溅镀或磁控溅镀进行沉积。利用具有深宽比约1比5的准直器、或利用介于约10V到约1000V的范围内(例如几十伏特到几百伏特)施加DC偏压、或同时利用准直器与DC偏压，可改进填充性能。沉积之后，硫属化物材料可进行退火以改进结晶态。后沉积退火可在真空或氮环境，温度介于约100℃到约400℃的范围内，在少于30分钟内完成。
硫属化物栓塞的厚度根据单元结构的设计而改变。大致上具有厚度大于约8nm的硫化物栓塞可显示相变化双稳定电阻态的特性。沉积的硫化物材料可利用公知金属干蚀刻技术作回蚀，即利用例如Cl2或CF4化合物或其混合物，选择性与氩或氧或其混合物的组合进行RIE。为了移除空洞外的GST，需要进行非等向性GST蚀刻。RIE需要额外的底功率，例如40-100W，形成图7B所示的结构。终点检测可用以停止GST蚀刻。
在利用溅镀方式沉积存储材料时，情况可能包括例如氮或氩气(或氩及氮的混合物)；若只使用氩气，标的可能是GeSbTe；或使用氩/氮气时，标的可能是N2-GeSbTe。
控制回蚀是为了保持相变化材料与杯状衬底在开口28处的接触。相变化存储材料栓塞在小区域23接触底电极，并在开口28接触杯状导电薄膜。栓塞限制在开口622的底部，而栓塞(包括栓塞与底电极的接触区23)的形状及大小由开口622的底部的形状及大小与回蚀后的栓塞的高度进行定义。
接着，氧化材料(例如二氧化硅)沉积于图7A、图7B的结构上，填充开口622的一部份中栓塞20上所剩余的空间，而氧化材料被平面化以形成覆盖氧化层26。
接着，适合作顶电极的导电材料沉积在图8A、图8B的结构上，并被图样化以在存储单元构件上形成顶电极，如图9A、图9B及图9C所示，此导电材料可为金属或以金属为主或非金属材料，例如铜；铝；钛(Ti)和比方氮化钛(TiN)、氮氧化钛(TiON)等以钛为主的金属；钽(Ta)及例如氮化钽(TaN)的以钽为主的材料；多晶硅、如硅化钨(WSix)的以钨为主的材料；以及有关低热传导电极，例如LNO(LaNiO3)和LSMO(LaSrMnO3)。顶电极可被图样成岛状，如图9A的范例所示，或线形(带形线或位线)，如图9C的范例所示。顶电极可具有例如介于约200埃到约5000埃之间的厚度，通常在约2000埃。
图9B显示形成的存储单元装置，以标记表示某些特征的尺寸。大致上本发明所制造的存储单元中其特征的剖面形状由分隔层中的空洞的形状而定义，而分隔层中的空洞的形状可根据存储堆叠或岛的形状进行定义。类似地，相变化材料栓塞的形状及大小由非等向性蚀刻所形成的开口的大小以及相变化材料回蚀的程度定义。在存储单元的许多特征的示范实施例中，显示有许多圆形剖面(在介金属介电质表面的平面上)，但需要知道的是其他的剖面形状也可使用。图9B以范例显示某些可称做「宽度」的尺寸，在特征是圆形的情况下，这个尺寸是指其直径而言。
穿过分隔层的空洞的宽度92可在介于约50nm到约400nm的范围之间，通常约为100nm。杯状导电薄膜的侧壁部分的厚度94可在约25埃到约200埃的范围的内，通常约为50埃，而杯状薄膜的底部厚度95可在约25埃到约200埃的范围之内，通常约为50埃。栓塞与底电极接触的区域的宽度98可在约20nm到约260nm的范围之内，通常约为70nm，提供介于约20nm到约260nm的范围内的接触区域，通常约70nm。栓塞的高度99根据杯状导电薄膜的底部厚度95与在底电极的接触区域间绝缘氧化物的厚度等其他因素而不同；栓塞的高度99可在介于约20nm到约100nm的范围内，通常约为30nm。
存储单元装置10的实施例，包括了存储材料20所使用的相变化存储材料，包括硫属化物材料与其他材料。硫属化物包括下列四元素中的任一者：氧(O)、硫(S)、硒(Se)、以及碲(Te)，形成元素周期表上第VI族的部分。硫属化物包括将一硫属元素与一更为正电性的元素或自由基结合而得。硫属化合物合金包括将硫属化合物与其他物质如过渡金属等结合。一硫属化合物合金通常包括一个以上选自元素周期表第六栏的元素，例如锗(Ge)以及锡(Sn)。通常，硫属化合物合金包括下列元素中一个以上的复合物：锑(Sb)、镓(Ga)、铟(In)、以及银(Ag)。许多以相变化为基础的存储材料已经被描述于技术文件中，包括下列合金：镓/锑、铟/锑、铟/硒、锑/碲、锗/碲、锗/锑/碲、铟/锑/碲、镓/硒/碲、锡/锑/碲、铟/锑/锗、银/铟/锑/碲、锗/锡/锑/碲、锗/锑/硒/碲、以及碲/锗/锑/硫。在锗/锑/碲合金家族中，可以尝试大范围的合金成分。此成分可以下列特征式表示：TeaGebSb100-(a+b)。一位研究员描述了最有用的合金为，在沉积材料中所包括的平均碲浓度远低于70％，典型地低于60％，并在一般形态合金中的碲含量范围从最低23％至最高58％，且最佳介于48％至58％的碲含量。锗的浓度高于约5％，且其在材料中的平均范围从最低8％至最高30％，一般低于50％。最佳地，锗的浓度范围介于8％至40％。在此成分中所剩下的主要成分则为锑，上述百分比是指所有组成元素的原子总计为100％的原子百分比。(Ovshinky‘112专利，栏10～11)由另一研究者所评估的特殊合金包括Ge2Sb2Te5、GeSb2Te4、以及GeSb4Te7。(Noboru Yamada，”Potential of Ge-Sb-TePhase-change Optical Disks for High-Data-Rate Recording”，SPIE v.3109，pp.28-37(1997))更一般地，过渡金属如铬(Cr)、铁(Fe)、镍(Ni)、铌(Nb)、钯(Pd)、铂(Pt)、以及上述的混合物或合金，可与锗/锑/碲结合以形成一相变化合金其包括有可编程的电阻性质。可使用的存储材料的特殊范例，如Ovshinsky‘112专利中栏11-13所述，其范例在此被列入参考。
本发明参照至相变化材料而说明。然而，亦可使用其他存储材料(有时称为可编程材料)。如本发明中所使用的，存储材料为其电气性质如电阻等，可以通过施加能量而改变者。此改变可为阶梯性改变或一连续性改变，或为二者的组合。可使用于本发明其他实施例中的其他可编程电阻存储材料，包括掺杂N2的GST、GexSby、或其他以不同结晶态转换来决定电阻的物质；PrxCayMnO3、PrSrMnO、ZrOx、或其他利用电脉冲以改变电阻状态的材料；7，7，8，8-tetracyanoquinodimethane(TCNQ)、methanofullerene 6，6-phenylC61-butyric acid methyl ester(PCBM)、TCNQ-PCBM、Cu-TCNQ、Ag-TCNQ、C60-TCNQ、以其他物质掺杂的TCNQ、或任何其他聚合物材料其包括有以一电脉冲而控制的双稳定或多稳定电阻态。可编程电阻存储材料的其他范例，包括GeSbTe、GeSb、NiO、Nb-SrTiO3、Ag-GeTe、PrCaMnO、ZnO、Nb2O5、Cr-SrTiO3。
关于相变化随机存取存储装置的制造、构件材料、使用及操作请参考2005年6月17日申请、标题为「薄膜熔断器项变化随机存取存储器及其制造方法」、申请案号为11/155,067的美国专利案，律师登录号为MXIC 1621-1。
本发明之间还包括其他实施例。

Claims (24)

1.一种存储单元装置，包括一底电极与一顶电极，一相变化存储材料栓塞接触至所述底电极，以及一杯状导电构件其具有一周缘与一底部，该底部具有一开口，其中，该导电构件在所述周缘处接触至所述顶电极，以及该导电构件在所述开口处接触至所述相变化存储材料，以使存储单元中的导电路径是从顶电极穿过杯状导电构件，并穿过相变化存储材料栓塞到达底电极。
2.如权利要求1所述的存储单元装置，其中所述导电构件在所述周缘处的厚度介于25埃至200埃之间。
3.如权利要求2所述的存储单元装置，其中所述导电构件在所述周缘处的厚度为50埃。
4.如权利要求1所述的存储单元装置，其中所述导电构件与所述存储材料接触处的厚度介于25埃至200埃之间。
5.如权利要求4所述的存储单元装置，其中所述导电构件与所述存储材料接触处的厚度为50埃。
6.如权利要求1所述的存储单元装置，其中所述存储材料与所述底电极的接触区域其宽度介于20纳米至260纳米之间。
7.如权利要求6所述的存储单元装置，其中所述存储材料与所述底电极的接触区域其宽度为70纳米。
8.如权利要求1所述的存储单元装置，其中所述存储材料栓塞的高度介于20纳米至100纳米之间。
9.如权利要求8所述的存储单元装置，其中所述存储材料栓塞的高度为30纳米。
10.如权利要求1所述的存储单元装置，其中所述存储材料包括一硫属化物(Chalcogenide)材料。
11.如权利要求1所述的存储单元装置，其中所述存储材料包括一至少双稳态的合金。
12.如权利要求10所述的存储单元装置，其中所述存储材料包括一锗锑碲(GST)材料。
13.如权利要求10所述的存储单元装置，其中所述存储材料包括一由化学式GexSbyTez所表示的硫属化物，其中0≤x≤5；0≤y≤5；且0≤z≤10。
14.如权利要求13所述的存储单元装置，其中x∶y∶z＝2∶2∶5。
15.如权利要求10所述的存储单元装置，其中所述存储材料包括一经掺杂的锗锑碲。
16.如权利要求15所述的存储单元装置，其中所述存储材料包括一以氮掺杂的锗锑碲。
17.如权利要求15所述的存储单元装置，其中所述存储材料包括一以硅掺杂的锗锑碲。
18.如权利要求15所述的存储单元装置，其中所述存储材料包括一以钛掺杂的锗锑碲。
19.一种用以制造一存储单元装置的方法，包括：
提供一基板其在一表面具有一介金属介电质，形成一第一电极层于所述介金属介电质之上，形成一电绝缘层于所述第一电极层之上，形成一停止层于所述电绝缘层之上，以及图案化各层以形成岛状底电极，每一所述岛状底电极包括一电绝缘元件与一停止元件；
沉积一填充材料于所述介金属介电质及所述岛状底电极之上；
移除所述填充材料至所述停止元件，剩余的所述填充材料包括一分隔层；
移除所述停止元件，形成一通孔，所述通孔由所述分隔层的一侧壁与所述电绝缘元件的一外露表面所定义；
沉积一导电材料以形成一导电薄膜于所述填充材料、所述分隔层的侧壁与所述电绝缘元件的外露表面之上；
沉积一电绝缘衬底材料于所述导电薄膜之上；
进行一非等向性蚀刻，以从所述分隔层的表面移除所述电绝缘衬底材料及所述导电薄膜，并形成一开口穿过所述电绝缘衬底材料、且穿过所述导电薄膜和所述电绝缘层；
沉积一相变化存储材料于所述开口中；
形成一氧化物覆盖层于所述相变化存储材料之上；以及
形成一顶电极于所述氧化物覆盖层以及所述分隔层的表面上。
20.如权利要求19所述的方法，其中所述填充材料沉积步骤包括沉积蚀刻选择性高于所述停止层的材料。
21.如权利要求19所述的方法，其中所述填充材料沉积步骤包括高密度等离子化学气相沉积。
22.如权利要求19所述的方法，其中所述停止层形成步骤包括沉积蚀刻选择性高于所述电绝缘层的材料。
23.如权利要求19所述的方法，其中所述停止层形成步骤包括沉积一材料，其化学机械研磨(CMP)速率高于所述填充材料。
24.如权利要求19所述的方法，其中所述非等向性蚀刻步骤包括，进行一反应性离子蚀刻以移除所述电绝缘衬底材料，利用一含氯化合物进行一化学蚀刻以形成穿过所述导电薄膜的所述开口，以及利用一含氟化合物进行一反应性离子蚀刻以形成穿过所述电绝缘层的所述开口。
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Families Citing this family (58)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4017650B2 (ja) 2005-12-02 2007-12-05 シャープ株式会社 可変抵抗素子及びその製造方法
JP4061328B2 (ja) * 2005-12-02 2008-03-19 シャープ株式会社 可変抵抗素子及びその製造方法
US7388771B2 (en) * 2006-10-24 2008-06-17 Macronix International Co., Ltd. Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states
KR100801084B1 (ko) * 2007-01-08 2008-02-05 삼성전자주식회사 저항체를 이용한 비휘발성 메모리 장치 및 그 제조 방법
US7642125B2 (en) * 2007-09-14 2010-01-05 Macronix International Co., Ltd. Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing
US20090194756A1 (en) * 2008-01-31 2009-08-06 Kau Derchang Self-aligned eletrode phase change memory
KR101394263B1 (ko) * 2008-02-19 2014-05-14 삼성전자주식회사 비휘발성 기억 소자 및 그 형성 방법
US8820434B2 (en) 2008-08-20 2014-09-02 Foro Energy, Inc. Apparatus for advancing a wellbore using high power laser energy
US9719302B2 (en) 2008-08-20 2017-08-01 Foro Energy, Inc. High power laser perforating and laser fracturing tools and methods of use
US9080425B2 (en) 2008-10-17 2015-07-14 Foro Energy, Inc. High power laser photo-conversion assemblies, apparatuses and methods of use
US9027668B2 (en) 2008-08-20 2015-05-12 Foro Energy, Inc. Control system for high power laser drilling workover and completion unit
US8627901B1 (en) 2009-10-01 2014-01-14 Foro Energy, Inc. Laser bottom hole assembly
US9267330B2 (en) 2008-08-20 2016-02-23 Foro Energy, Inc. Long distance high power optical laser fiber break detection and continuity monitoring systems and methods
US8097870B2 (en) * 2008-11-05 2012-01-17 Seagate Technology Llc Memory cell with alignment structure
JP4937413B2 (ja) * 2008-12-10 2012-05-23 パナソニック株式会社 抵抗変化素子およびそれを用いた不揮発性半導体記憶装置
US8003521B2 (en) 2009-04-07 2011-08-23 Micron Technology, Inc. Semiconductor processing
US8188833B2 (en) * 2009-04-14 2012-05-29 Panasonic Corporation Variable resistance element and manufacturing method of the same
US8829646B2 (en) * 2009-04-27 2014-09-09 Macronix International Co., Ltd. Integrated circuit 3D memory array and manufacturing method
US8030130B2 (en) 2009-08-14 2011-10-04 International Business Machines Corporation Phase change memory device with plated phase change material
US20110049456A1 (en) * 2009-09-03 2011-03-03 Macronix International Co., Ltd. Phase change structure with composite doping for phase change memory
JP5602414B2 (ja) * 2009-11-05 2014-10-08 ピーエスフォー ルクスコ エスエイアールエル 半導体装置の製造方法および半導体装置
US20110108792A1 (en) * 2009-11-11 2011-05-12 International Business Machines Corporation Single Crystal Phase Change Material
US8048755B2 (en) 2010-02-08 2011-11-01 Micron Technology, Inc. Resistive memory and methods of processing resistive memory
CN101924180A (zh) * 2010-05-13 2010-12-22 中国科学院上海微系统与信息技术研究所 用于相变存储器的富锑Si-Sb-Te硫族化合物相变材料
US8597974B2 (en) * 2010-07-26 2013-12-03 Micron Technology, Inc. Confined resistance variable memory cells and methods
US9082954B2 (en) 2010-09-24 2015-07-14 Macronix International Co., Ltd. PCRAM with current flowing laterally relative to axis defined by electrodes
US8685783B2 (en) * 2010-10-27 2014-04-01 Taiwan Semiconductor Manufacturing Company, Ltd. Phase change memory cell
US8962493B2 (en) * 2010-12-13 2015-02-24 Crocus Technology Inc. Magnetic random access memory cells having improved size and shape characteristics
US8426242B2 (en) * 2011-02-01 2013-04-23 Macronix International Co., Ltd. Composite target sputtering for forming doped phase change materials
BR112013021478A2 (pt) 2011-02-24 2016-10-11 Foro Energy Inc método de perfuração de laser-mecânica de alta potência
US8486743B2 (en) 2011-03-23 2013-07-16 Micron Technology, Inc. Methods of forming memory cells
WO2012167102A1 (en) 2011-06-03 2012-12-06 Foro Energy Inc. Rugged passively cooled high power laser fiber optic connectors and methods of use
US8994489B2 (en) 2011-10-19 2015-03-31 Micron Technology, Inc. Fuses, and methods of forming and using fuses
US8723155B2 (en) 2011-11-17 2014-05-13 Micron Technology, Inc. Memory cells and integrated devices
US9252188B2 (en) 2011-11-17 2016-02-02 Micron Technology, Inc. Methods of forming memory cells
US8546231B2 (en) 2011-11-17 2013-10-01 Micron Technology, Inc. Memory arrays and methods of forming memory cells
US8765555B2 (en) 2012-04-30 2014-07-01 Micron Technology, Inc. Phase change memory cells and methods of forming phase change memory cells
US9136467B2 (en) * 2012-04-30 2015-09-15 Micron Technology, Inc. Phase change memory cells and methods of forming phase change memory cells
US9070860B2 (en) * 2012-06-25 2015-06-30 Macronix International Co. Ltd. Resistance memory cell and operation method thereof
US9196828B2 (en) 2012-06-25 2015-11-24 Macronix International Co., Ltd. Resistive memory and fabricating method thereof
US8981330B2 (en) 2012-07-16 2015-03-17 Macronix International Co., Ltd. Thermally-confined spacer PCM cells
US9553262B2 (en) 2013-02-07 2017-01-24 Micron Technology, Inc. Arrays of memory cells and methods of forming an array of memory cells
US9214351B2 (en) 2013-03-12 2015-12-15 Macronix International Co., Ltd. Memory architecture of thin film 3D array
KR20140142887A (ko) * 2013-06-05 2014-12-15 에스케이하이닉스 주식회사 3차원 반도체 장치 및 그 제조방법
KR20150007520A (ko) * 2013-07-11 2015-01-21 에스케이하이닉스 주식회사 상변화 메모리 장치 및 그의 제조방법
TW201532327A (zh) * 2013-11-19 2015-08-16 Univ Rice William M 用於改良ＳｉＯｘ切換元件之效能的多孔ＳｉＯｘ材料
US9627612B2 (en) 2014-02-27 2017-04-18 International Business Machines Corporation Metal nitride keyhole or spacer phase change memory cell structures
US9881971B2 (en) 2014-04-01 2018-01-30 Micron Technology, Inc. Memory arrays
US9559113B2 (en) 2014-05-01 2017-01-31 Macronix International Co., Ltd. SSL/GSL gate oxide in 3D vertical channel NAND
US9362494B2 (en) 2014-06-02 2016-06-07 Micron Technology, Inc. Array of cross point memory cells and methods of forming an array of cross point memory cells
US9343506B2 (en) 2014-06-04 2016-05-17 Micron Technology, Inc. Memory arrays with polygonal memory cells having specific sidewall orientations
US9559146B2 (en) * 2014-12-23 2017-01-31 Intel Corporation Phase-change memory cell implant for dummy array leakage reduction
US9672906B2 (en) 2015-06-19 2017-06-06 Macronix International Co., Ltd. Phase change memory with inter-granular switching
US9853091B2 (en) * 2016-04-26 2017-12-26 Taiwan Semiconductor Manufacturing Co., Ltd. Side bottom contact RRAM structure
US11088206B2 (en) 2017-10-16 2021-08-10 Sandisk Tehnologies Llc Methods of forming a phase change memory with vertical cross-point structure
US10566531B2 (en) * 2017-11-17 2020-02-18 International Business Machines Corporation Crosspoint fill-in memory cell with etched access device
US11430954B2 (en) 2020-11-30 2022-08-30 International Business Machines Corporation Resistance drift mitigation in non-volatile memory cell
CN112635667B (zh) * 2020-12-30 2022-11-25 上海集成电路装备材料产业创新中心有限公司 一种相变存储器单元及其制备方法

Family Cites Families (325)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3271591A (en) * 1963-09-20 1966-09-06 Energy Conversion Devices Inc Symmetrical current controlling device
US3530441A (en) * 1969-01-15 1970-09-22 Energy Conversion Devices Inc Method and apparatus for storing and retrieving information
GB1245015A (en) * 1969-07-02 1971-09-02 Benjamin Crook & Sons Ltd Improvements in or relating to inflatable balls
US3846767A (en) 1973-10-24 1974-11-05 Energy Conversion Devices Inc Method and means for resetting filament-forming memory semiconductor device
IL61678A (en) * 1979-12-13 1984-04-30 Energy Conversion Devices Inc Programmable cell and programmable electronic arrays comprising such cells
US4452592A (en) 1982-06-01 1984-06-05 General Motors Corporation Cyclic phase change coupling
JPS60137070A (ja) 1983-12-26 1985-07-20 Toshiba Corp 半導体装置の製造方法
US4719594A (en) * 1984-11-01 1988-01-12 Energy Conversion Devices, Inc. Grooved optical data storage device including a chalcogenide memory layer
US4876220A (en) * 1986-05-16 1989-10-24 Actel Corporation Method of making programmable low impedance interconnect diode element
JP2685770B2 (ja) 1987-12-28 1997-12-03 株式会社東芝 不揮発性半導体記憶装置
JP2606857B2 (ja) 1987-12-10 1997-05-07 株式会社日立製作所 半導体記憶装置の製造方法
US5534712A (en) * 1991-01-18 1996-07-09 Energy Conversion Devices, Inc. Electrically erasable memory elements characterized by reduced current and improved thermal stability
US5166758A (en) * 1991-01-18 1992-11-24 Energy Conversion Devices, Inc. Electrically erasable phase change memory
US5177567A (en) * 1991-07-19 1993-01-05 Energy Conversion Devices, Inc. Thin-film structure for chalcogenide electrical switching devices and process therefor
JP2825031B2 (ja) 1991-08-06 1998-11-18 日本電気株式会社 半導体メモリ装置
US5166096A (en) * 1991-10-29 1992-11-24 International Business Machines Corporation Process for fabricating self-aligned contact studs for semiconductor structures
JPH05206394A (ja) 1992-01-24 1993-08-13 Mitsubishi Electric Corp 電界効果トランジスタおよびその製造方法
US5958358A (en) * 1992-07-08 1999-09-28 Yeda Research And Development Co., Ltd. Oriented polycrystalline thin films of transition metal chalcogenides
JP2884962B2 (ja) 1992-10-30 1999-04-19 日本電気株式会社 半導体メモリ
US5515488A (en) 1994-08-30 1996-05-07 Xerox Corporation Method and apparatus for concurrent graphical visualization of a database search and its search history
US5785828A (en) * 1994-12-13 1998-07-28 Ricoh Company, Ltd. Sputtering target for producing optical recording medium
US5879955A (en) * 1995-06-07 1999-03-09 Micron Technology, Inc. Method for fabricating an array of ultra-small pores for chalcogenide memory cells
US5869843A (en) * 1995-06-07 1999-02-09 Micron Technology, Inc. Memory array having a multi-state element and method for forming such array or cells thereof
US6420725B1 (en) 1995-06-07 2002-07-16 Micron Technology, Inc. Method and apparatus for forming an integrated circuit electrode having a reduced contact area
US5831276A (en) * 1995-06-07 1998-11-03 Micron Technology, Inc. Three-dimensional container diode for use with multi-state material in a non-volatile memory cell
US5789758A (en) * 1995-06-07 1998-08-04 Micron Technology, Inc. Chalcogenide memory cell with a plurality of chalcogenide electrodes
US5837564A (en) * 1995-11-01 1998-11-17 Micron Technology, Inc. Method for optimal crystallization to obtain high electrical performance from chalcogenides
KR0182866B1 (ko) 1995-12-27 1999-04-15 김주용 플래쉬 메모리 장치
US5687112A (en) 1996-04-19 1997-11-11 Energy Conversion Devices, Inc. Multibit single cell memory element having tapered contact
US6025220A (en) * 1996-06-18 2000-02-15 Micron Technology, Inc. Method of forming a polysilicon diode and devices incorporating such diode
US5866928A (en) 1996-07-16 1999-02-02 Micron Technology, Inc. Single digit line with cell contact interconnect
US5985698A (en) * 1996-07-22 1999-11-16 Micron Technology, Inc. Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell
US5789277A (en) * 1996-07-22 1998-08-04 Micron Technology, Inc. Method of making chalogenide memory device
US5814527A (en) * 1996-07-22 1998-09-29 Micron Technology, Inc. Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories
US6337266B1 (en) 1996-07-22 2002-01-08 Micron Technology, Inc. Small electrode for chalcogenide memories
US5998244A (en) * 1996-08-22 1999-12-07 Micron Technology, Inc. Memory cell incorporating a chalcogenide element and method of making same
US5688713A (en) 1996-08-26 1997-11-18 Vanguard International Semiconductor Corporation Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers
US6147395A (en) * 1996-10-02 2000-11-14 Micron Technology, Inc. Method for fabricating a small area of contact between electrodes
US6087674A (en) * 1996-10-28 2000-07-11 Energy Conversion Devices, Inc. Memory element with memory material comprising phase-change material and dielectric material
US5716883A (en) 1996-11-06 1998-02-10 Vanguard International Semiconductor Corporation Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns
US6015977A (en) * 1997-01-28 2000-01-18 Micron Technology, Inc. Integrated circuit memory cell having a small active area and method of forming same
US5952671A (en) * 1997-05-09 1999-09-14 Micron Technology, Inc. Small electrode for a chalcogenide switching device and method for fabricating same
US6031287A (en) * 1997-06-18 2000-02-29 Micron Technology, Inc. Contact structure and memory element incorporating the same
US5933365A (en) 1997-06-19 1999-08-03 Energy Conversion Devices, Inc. Memory element with energy control mechanism
US5902704A (en) 1997-07-02 1999-05-11 Lsi Logic Corporation Process for forming photoresist mask over integrated circuit structures with critical dimension control
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US7023009B2 (en) * 1997-10-01 2006-04-04 Ovonyx, Inc. Electrically programmable memory element with improved contacts
US6617192B1 (en) * 1997-10-01 2003-09-09 Ovonyx, Inc. Electrically programmable memory element with multi-regioned contact
US6969866B1 (en) 1997-10-01 2005-11-29 Ovonyx, Inc. Electrically programmable memory element with improved contacts
FR2774209B1 (fr) 1998-01-23 2001-09-14 St Microelectronics Sa Procede de controle du circuit de lecture d'un plan memoire et dispositif de memoire correspondant
US6087269A (en) 1998-04-20 2000-07-11 Advanced Micro Devices, Inc. Method of making an interconnect using a tungsten hard mask
US6372651B1 (en) 1998-07-17 2002-04-16 Advanced Micro Devices, Inc. Method for trimming a photoresist pattern line for memory gate etching
US6141260A (en) 1998-08-27 2000-10-31 Micron Technology, Inc. Single electron resistor memory device and method for use thereof
US6483736B2 (en) 1998-11-16 2002-11-19 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6034882A (en) * 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6351406B1 (en) * 1998-11-16 2002-02-26 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
JP2000164830A (ja) 1998-11-27 2000-06-16 Mitsubishi Electric Corp 半導体記憶装置の製造方法
US6487106B1 (en) 1999-01-12 2002-11-26 Arizona Board Of Regents Programmable microelectronic devices and method of forming and programming same
US6291137B1 (en) 1999-01-20 2001-09-18 Advanced Micro Devices, Inc. Sidewall formation for sidewall patterning of sub 100 nm structures
DE19903325B4 (de) 1999-01-28 2004-07-22 Heckler & Koch Gmbh Verriegelter Verschluß für eine Selbstlade-Handfeuerwaffe, mit einem Verschlußkopf und Verschlußträger und einem federnden Sperring mit Längsschlitz
US6245669B1 (en) 1999-02-05 2001-06-12 Taiwan Semiconductor Manufacturing Company High selectivity Si-rich SiON etch-stop layer
US6750079B2 (en) 1999-03-25 2004-06-15 Ovonyx, Inc. Method for making programmable resistance memory element
CN1210819C (zh) 1999-03-25 2005-07-13 能源变换设备有限公司 带有改进的接触点的电可编程存储器元件
US6943365B2 (en) 1999-03-25 2005-09-13 Ovonyx, Inc. Electrically programmable memory element with reduced area of contact and method for making same
US6177317B1 (en) * 1999-04-14 2001-01-23 Macronix International Co., Ltd. Method of making nonvolatile memory devices having reduced resistance diffusion regions
US6075719A (en) 1999-06-22 2000-06-13 Energy Conversion Devices, Inc. Method of programming phase-change memory element
US6077674A (en) 1999-10-27 2000-06-20 Agilent Technologies Inc. Method of producing oligonucleotide arrays with features of high purity
US6326307B1 (en) 1999-11-15 2001-12-04 Appllied Materials, Inc. Plasma pretreatment of photoresist in an oxide etch process
US6314014B1 (en) 1999-12-16 2001-11-06 Ovonyx, Inc. Programmable resistance memory arrays with reference cells
US6576546B2 (en) 1999-12-22 2003-06-10 Texas Instruments Incorporated Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications
TW586154B (en) 2001-01-05 2004-05-01 Macronix Int Co Ltd Planarization method for semiconductor device
US6687307B1 (en) 2000-02-24 2004-02-03 Cisco Technology, Inc Low memory and low latency cyclic prefix addition
US6444557B1 (en) 2000-03-14 2002-09-03 International Business Machines Corporation Method of forming a damascene structure using a sacrificial conductive layer
US6420216B1 (en) * 2000-03-14 2002-07-16 International Business Machines Corporation Fuse processing using dielectric planarization pillars
US6420215B1 (en) * 2000-04-28 2002-07-16 Matrix Semiconductor, Inc. Three-dimensional memory array and method of fabrication
US6888750B2 (en) * 2000-04-28 2005-05-03 Matrix Semiconductor, Inc. Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
US6501111B1 (en) 2000-06-30 2002-12-31 Intel Corporation Three-dimensional (3D) programmable device
US6440837B1 (en) 2000-07-14 2002-08-27 Micron Technology, Inc. Method of forming a contact structure in a semiconductor device
US6563156B2 (en) * 2001-03-15 2003-05-13 Micron Technology, Inc. Memory elements and methods for making same
US6512263B1 (en) 2000-09-22 2003-01-28 Sandisk Corporation Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming
US6339544B1 (en) * 2000-09-29 2002-01-15 Intel Corporation Method to enhance performance of thermal resistor device
US6567293B1 (en) * 2000-09-29 2003-05-20 Ovonyx, Inc. Single level metal memory cell using chalcogenide cladding
US6429064B1 (en) * 2000-09-29 2002-08-06 Intel Corporation Reduced contact area of sidewall conductor
US6555860B2 (en) * 2000-09-29 2003-04-29 Intel Corporation Compositionally modified resistive electrode
KR100382729B1 (ko) 2000-12-09 2003-05-09 삼성전자주식회사 반도체 소자의 금속 컨택 구조체 및 그 형성방법
US6569705B2 (en) * 2000-12-21 2003-05-27 Intel Corporation Metal structure for a phase-change memory device
US6271090B1 (en) * 2000-12-22 2001-08-07 Macronix International Co., Ltd. Method for manufacturing flash memory device with dual floating gates and two bits per cell
TW490675B (en) 2000-12-22 2002-06-11 Macronix Int Co Ltd Control method of multi-stated NROM
US6627530B2 (en) * 2000-12-22 2003-09-30 Matrix Semiconductor, Inc. Patterning three dimensional structures
US6534781B2 (en) * 2000-12-26 2003-03-18 Ovonyx, Inc. Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact
KR100542525B1 (ko) 2001-01-30 2006-01-11 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치의 제조 방법
KR100400037B1 (ko) 2001-02-22 2003-09-29 삼성전자주식회사 콘택 플러그를 구비하는 반도체 소자 및 그의 제조 방법
US6487114B2 (en) 2001-02-28 2002-11-26 Macronix International Co., Ltd. Method of reading two-bit memories of NROM cell
US6596589B2 (en) 2001-04-30 2003-07-22 Vanguard International Semiconductor Corporation Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer
US6730928B2 (en) * 2001-05-09 2004-05-04 Science Applications International Corporation Phase change switches and circuits coupling to electromagnetic waves containing phase change switches
US7102150B2 (en) 2001-05-11 2006-09-05 Harshfield Steven T PCRAM memory cell and method of making same
US6514788B2 (en) * 2001-05-29 2003-02-04 Bae Systems Information And Electronic Systems Integration Inc. Method for manufacturing contacts for a Chalcogenide memory device
DE10128482A1 (de) 2001-06-12 2003-01-02 Infineon Technologies Ag Halbleiterspeichereinrichtung sowie Verfahren zu deren Herstellung
US6613604B2 (en) * 2001-08-02 2003-09-02 Ovonyx, Inc. Method for making small pore for use in programmable resistance memory element
US6589714B2 (en) * 2001-06-26 2003-07-08 Ovonyx, Inc. Method for making programmable resistance memory element using silylated photoresist
US6774387B2 (en) 2001-06-26 2004-08-10 Ovonyx, Inc. Programmable resistance memory element
US6511867B2 (en) * 2001-06-30 2003-01-28 Ovonyx, Inc. Utilizing atomic layer deposition for programmable device
US6605527B2 (en) * 2001-06-30 2003-08-12 Intel Corporation Reduced area intersection between electrode and programming element
US6673700B2 (en) * 2001-06-30 2004-01-06 Ovonyx, Inc. Reduced area intersection between electrode and programming element
US6643165B2 (en) 2001-07-25 2003-11-04 Nantero, Inc. Electromechanical memory having cell selection circuitry constructed with nanotube technology
US6737312B2 (en) 2001-08-27 2004-05-18 Micron Technology, Inc. Method of fabricating dual PCRAM cells sharing a common electrode
US6709958B2 (en) * 2001-08-30 2004-03-23 Micron Technology, Inc. Integrated circuit device and fabrication using metal-doped chalcogenide materials
US6507061B1 (en) 2001-08-31 2003-01-14 Intel Corporation Multiple layer phase-change memory
US6764894B2 (en) 2001-08-31 2004-07-20 Ovonyx, Inc. Elevated pore phase-change memory
US6586761B2 (en) * 2001-09-07 2003-07-01 Intel Corporation Phase change material memory device
US6861267B2 (en) * 2001-09-17 2005-03-01 Intel Corporation Reducing shunts in memories with phase-change material
US7045383B2 (en) 2001-09-19 2006-05-16 BAE Systems Information and Ovonyx, Inc Method for making tapered opening for programmable resistance memory element
US6800563B2 (en) 2001-10-11 2004-10-05 Ovonyx, Inc. Forming tapered lower electrode phase-change memories
US6566700B2 (en) * 2001-10-11 2003-05-20 Ovonyx, Inc. Carbon-containing interfacial layer for phase-change memory
US6791859B2 (en) 2001-11-20 2004-09-14 Micron Technology, Inc. Complementary bit PCRAM sense amplifier and method of operation
US6545903B1 (en) * 2001-12-17 2003-04-08 Texas Instruments Incorporated Self-aligned resistive plugs for forming memory cell with phase change material
US6512241B1 (en) 2001-12-31 2003-01-28 Intel Corporation Phase change material memory device
US6867638B2 (en) * 2002-01-10 2005-03-15 Silicon Storage Technology, Inc. High voltage generation and regulation system for digital multilevel nonvolatile memory
JP3948292B2 (ja) 2002-02-01 2007-07-25 株式会社日立製作所 半導体記憶装置及びその製造方法
US6972430B2 (en) 2002-02-20 2005-12-06 Stmicroelectronics S.R.L. Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof
US7151273B2 (en) 2002-02-20 2006-12-19 Micron Technology, Inc. Silver-selenide/chalcogenide glass stack for resistance variable memory
US7122281B2 (en) 2002-02-26 2006-10-17 Synopsys, Inc. Critical dimension control using full phase and trim masks
JP3796457B2 (ja) * 2002-02-28 2006-07-12 富士通株式会社 不揮発性半導体記憶装置
TWI224403B (en) 2002-03-15 2004-11-21 Axon Technologies Corp Programmable structure, an array including the structure, and methods of forming the same
US6579760B1 (en) * 2002-03-28 2003-06-17 Macronix International Co., Ltd. Self-aligned, programmable phase change memory
JP3624291B2 (ja) 2002-04-09 2005-03-02 松下電器産業株式会社 不揮発性メモリおよびその製造方法
US6864500B2 (en) * 2002-04-10 2005-03-08 Micron Technology, Inc. Programmable conductor memory cell structure
US6605821B1 (en) * 2002-05-10 2003-08-12 Hewlett-Packard Development Company, L.P. Phase change material electronic memory structure and method for forming
US6864503B2 (en) * 2002-08-09 2005-03-08 Macronix International Co., Ltd. Spacer chalcogenide memory method and device
US6850432B2 (en) 2002-08-20 2005-02-01 Macronix International Co., Ltd. Laser programmable electrically readable phase-change memory method and device
JP4133141B2 (ja) * 2002-09-10 2008-08-13 株式会社エンプラス 電気部品用ソケット
CN100449647C (zh) 2002-09-11 2009-01-07 奥翁尼克斯公司 编程相变材料存储器
JP4190238B2 (ja) 2002-09-13 2008-12-03 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US6705079B1 (en) * 2002-09-25 2004-03-16 Husco International, Inc. Apparatus for controlling bounce of hydraulically powered equipment
KR20050053750A (ko) 2002-10-11 2005-06-08 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 상변환 물질을 포함하는 전기 장치
US6992932B2 (en) * 2002-10-29 2006-01-31 Saifun Semiconductors Ltd Method circuit and system for read error detection in a non-volatile memory array
JP4928045B2 (ja) * 2002-10-31 2012-05-09 大日本印刷株式会社 相変化型メモリ素子およびその製造方法
US6940744B2 (en) 2002-10-31 2005-09-06 Unity Semiconductor Corporation Adaptive programming technique for a re-writable conductive memory device
US7589343B2 (en) 2002-12-13 2009-09-15 Intel Corporation Memory and access device and method therefor
US6791102B2 (en) * 2002-12-13 2004-09-14 Intel Corporation Phase change memory
US7314776B2 (en) 2002-12-13 2008-01-01 Ovonyx, Inc. Method to manufacture a phase change memory
US6744088B1 (en) * 2002-12-13 2004-06-01 Intel Corporation Phase change memory device on a planar composite layer
US6815266B2 (en) * 2002-12-30 2004-11-09 Bae Systems Information And Electronic Systems Integration, Inc. Method for manufacturing sidewall contacts for a chalcogenide memory device
EP1439583B1 (en) 2003-01-15 2013-04-10 STMicroelectronics Srl Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof
KR100476690B1 (ko) 2003-01-17 2005-03-18 삼성전자주식회사 반도체 장치 및 그 제조방법
ATE426898T1 (de) 2003-01-31 2009-04-15 Nxp Bv Mram-architektur fur niedrige stromaufnahme und hohe selektivitat
KR100486306B1 (ko) * 2003-02-24 2005-04-29 삼성전자주식회사 셀프 히터 구조를 가지는 상변화 메모리 소자
US7115927B2 (en) 2003-02-24 2006-10-03 Samsung Electronics Co., Ltd. Phase changeable memory devices
US7323734B2 (en) 2003-02-25 2008-01-29 Samsung Electronics Co., Ltd. Phase changeable memory cells
US6936544B2 (en) 2003-03-11 2005-08-30 Taiwan Semiconductor Manufacturing Co., Ltd. Method of removing metal etching residues following a metal etchback process to improve a CMP process
US7400522B2 (en) 2003-03-18 2008-07-15 Kabushiki Kaisha Toshiba Resistance change memory device having a variable resistance element formed of a first and second composite compound for storing a cation
KR100504698B1 (ko) 2003-04-02 2005-08-02 삼성전자주식회사 상변화 기억 소자 및 그 형성 방법
JP4634014B2 (ja) 2003-05-22 2011-02-16 株式会社日立製作所 半導体記憶装置
KR100979710B1 (ko) 2003-05-23 2010-09-02 삼성전자주식회사 반도체 메모리 소자 및 제조방법
US20060006472A1 (en) 2003-06-03 2006-01-12 Hai Jiang Phase change memory with extra-small resistors
US7067865B2 (en) * 2003-06-06 2006-06-27 Macronix International Co., Ltd. High density chalcogenide memory cells
US6838692B1 (en) 2003-06-23 2005-01-04 Macronix International Co., Ltd. Chalcogenide memory device with multiple bits per cell
US7132350B2 (en) 2003-07-21 2006-11-07 Macronix International Co., Ltd. Method for manufacturing a programmable eraseless memory
US20050018526A1 (en) 2003-07-21 2005-01-27 Heon Lee Phase-change memory device and manufacturing method thereof
KR100615586B1 (ko) 2003-07-23 2006-08-25 삼성전자주식회사 다공성 유전막 내에 국부적인 상전이 영역을 구비하는상전이 메모리 소자 및 그 제조 방법
US7893419B2 (en) 2003-08-04 2011-02-22 Intel Corporation Processing phase change material to improve programming speed
US7161167B2 (en) * 2003-08-04 2007-01-09 Intel Corporation Lateral phase change memory
DE102004039977B4 (de) 2003-08-13 2008-09-11 Samsung Electronics Co., Ltd., Suwon Programmierverfahren und Treiberschaltung für eine Phasenwechselspeicherzelle
US6815704B1 (en) 2003-09-04 2004-11-09 Silicon Storage Technology, Inc. Phase change memory device employing thermally insulating voids
US6927410B2 (en) * 2003-09-04 2005-08-09 Silicon Storage Technology, Inc. Memory device with discrete layers of phase change memory material
KR100505709B1 (ko) 2003-09-08 2005-08-03 삼성전자주식회사 상 변화 메모리 장치의 파이어링 방법 및 효율적인파이어링을 수행할 수 있는 상 변화 메모리 장치
US20050062087A1 (en) 2003-09-19 2005-03-24 Yi-Chou Chen Chalcogenide phase-change non-volatile memory, memory device and method for fabricating the same
DE10345455A1 (de) 2003-09-30 2005-05-04 Infineon Technologies Ag Verfahren zum Erzeugen einer Hartmaske und Hartmasken-Anordnung
US6910907B2 (en) 2003-11-18 2005-06-28 Agere Systems Inc. Contact for use in an integrated circuit and a method of manufacture therefor
US7485891B2 (en) 2003-11-20 2009-02-03 International Business Machines Corporation Multi-bit phase change memory cell and multi-bit phase change memory including the same, method of forming a multi-bit phase change memory, and method of programming a multi-bit phase change memory
KR100558548B1 (ko) 2003-11-27 2006-03-10 삼성전자주식회사 상변화 메모리 소자에서의 라이트 드라이버 회로 및라이트 전류 인가방법
US6937507B2 (en) * 2003-12-05 2005-08-30 Silicon Storage Technology, Inc. Memory device and method of operating same
US7928420B2 (en) 2003-12-10 2011-04-19 International Business Machines Corporation Phase change tip storage cell
US7291556B2 (en) 2003-12-12 2007-11-06 Samsung Electronics Co., Ltd. Method for forming small features in microelectronic devices using sacrificial layers
KR100569549B1 (ko) 2003-12-13 2006-04-10 주식회사 하이닉스반도체 상 변화 저항 셀 및 이를 이용한 불휘발성 메모리 장치
KR100564602B1 (ko) 2003-12-30 2006-03-29 삼성전자주식회사 상 변화 메모리 어레이의 셋 프로그래밍 방법 및 기입드라이버 회로
US7038230B2 (en) 2004-01-06 2006-05-02 Macronix Internation Co., Ltd. Horizontal chalcogenide element defined by a pad for use in solid-state memories
JP4124743B2 (ja) 2004-01-21 2008-07-23 株式会社ルネサステクノロジ 相変化メモリ
KR100564608B1 (ko) * 2004-01-29 2006-03-28 삼성전자주식회사 상변화 메모리 소자
US6936840B2 (en) * 2004-01-30 2005-08-30 International Business Machines Corporation Phase-change memory cell and method of fabricating the phase-change memory cell
US7858980B2 (en) 2004-03-01 2010-12-28 Taiwan Semiconductor Manufacturing Co., Ltd. Reduced active area in a phase change memory structure
KR100574975B1 (ko) 2004-03-05 2006-05-02 삼성전자주식회사 상 변화 메모리 어레이의 셋 프로그래밍 방법 및 기입드라이버 회로
JP4529493B2 (ja) 2004-03-12 2010-08-25 株式会社日立製作所 半導体装置
KR100598100B1 (ko) * 2004-03-19 2006-07-07 삼성전자주식회사 상변환 기억 소자의 제조방법
DE102004014487A1 (de) 2004-03-24 2005-11-17 Infineon Technologies Ag Speicherbauelement mit in isolierendes Material eingebettetem, aktiven Material
KR100532509B1 (ko) 2004-03-26 2005-11-30 삼성전자주식회사 ＳｉＧｅ를 이용한 트렌치 커패시터 및 그 형성방법
US7158411B2 (en) 2004-04-01 2007-01-02 Macronix International Co., Ltd. Integrated code and data flash memory
US7482616B2 (en) 2004-05-27 2009-01-27 Samsung Electronics Co., Ltd. Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same
US6977181B1 (en) 2004-06-17 2005-12-20 Infincon Technologies Ag MTJ stack with crystallization inhibiting layer
KR100668825B1 (ko) 2004-06-30 2007-01-16 주식회사 하이닉스반도체 상변화 기억 소자 및 그 제조방법
US7359231B2 (en) 2004-06-30 2008-04-15 Intel Corporation Providing current for phase change memories
DE102004035830A1 (de) 2004-07-23 2006-02-16 Infineon Technologies Ag Speicherbauelement mit thermischen Isolationsschichten
KR100657897B1 (ko) 2004-08-21 2006-12-14 삼성전자주식회사 전압 제어층을 포함하는 메모리 소자
US7365385B2 (en) 2004-08-30 2008-04-29 Micron Technology, Inc. DRAM layout with vertical FETs and method of formation
KR100610014B1 (ko) 2004-09-06 2006-08-09 삼성전자주식회사 리키지 전류 보상 가능한 반도체 메모리 장치
KR100652378B1 (ko) * 2004-09-08 2006-12-01 삼성전자주식회사 안티몬 프리커서 및 이를 이용한 상변화 메모리 소자의 제조방법
US7023008B1 (en) 2004-09-30 2006-04-04 Infineon Technologies Ag Resistive memory element
US7443062B2 (en) 2004-09-30 2008-10-28 Reliance Electric Technologies Llc Motor rotor cooling with rotation heat pipes
TWI277207B (en) 2004-10-08 2007-03-21 Ind Tech Res Inst Multilevel phase-change memory, operating method and manufacture method thereof
KR100626388B1 (ko) 2004-10-19 2006-09-20 삼성전자주식회사 상변환 메모리 소자 및 그 형성 방법
JP2006127583A (ja) 2004-10-26 2006-05-18 Elpida Memory Inc 不揮発性半導体記憶装置及び相変化メモリ
US7364935B2 (en) 2004-10-29 2008-04-29 Macronix International Co., Ltd. Common word line edge contact phase-change memory
DE102004052611A1 (de) 2004-10-29 2006-05-04 Infineon Technologies Ag Verfahren zur Herstellung einer mit einem Füllmaterial mindestens teilweise gefüllten Öffnung, Verfahren zur Herstellung einer Speicherzelle und Speicherzelle
US7238959B2 (en) 2004-11-01 2007-07-03 Silicon Storage Technology, Inc. Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same
US20060097341A1 (en) * 2004-11-05 2006-05-11 Fabio Pellizzer Forming phase change memory cell with microtrenches
US20060108667A1 (en) 2004-11-22 2006-05-25 Macronix International Co., Ltd. Method for manufacturing a small pin on integrated circuits or other devices
US7202493B2 (en) 2004-11-30 2007-04-10 Macronix International Co., Inc. Chalcogenide memory having a small active region
JP2006156886A (ja) 2004-12-01 2006-06-15 Renesas Technology Corp 半導体集積回路装置およびその製造方法
KR100827653B1 (ko) 2004-12-06 2008-05-07 삼성전자주식회사 상변화 기억 셀들 및 그 제조방법들
DE102004059428A1 (de) 2004-12-09 2006-06-22 Infineon Technologies Ag Herstellungsverfahren für eine mikroelektronische Elektrodenstruktur, insbesondere für ein PCM-Speicherelement, und entsprechende mikroelektronische Elektrodenstruktur
US7220983B2 (en) * 2004-12-09 2007-05-22 Macronix International Co., Ltd. Self-aligned small contact phase-change memory method and device
TWI260764B (en) 2004-12-10 2006-08-21 Macronix Int Co Ltd Non-volatile memory cell and operating method thereof
US20060131555A1 (en) 2004-12-22 2006-06-22 Micron Technology, Inc. Resistance variable devices with controllable channels
US20060138467A1 (en) 2004-12-29 2006-06-29 Hsiang-Lan Lung Method of forming a small contact in phase-change memory and a memory cell produced by the method
JP4646634B2 (ja) 2005-01-05 2011-03-09 ルネサスエレクトロニクス株式会社 半導体装置
US7419771B2 (en) 2005-01-11 2008-09-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a finely patterned resist
DE602005009793D1 (de) 2005-01-21 2008-10-30 St Microelectronics Srl Phasenwechselspeicher-Vorrichtung und Verfahren zu ihrer Herstellung
US20060172067A1 (en) 2005-01-28 2006-08-03 Energy Conversion Devices, Inc Chemical vapor deposition of chalcogenide materials
US20060169968A1 (en) 2005-02-01 2006-08-03 Thomas Happ Pillar phase change memory cell
US7214958B2 (en) 2005-02-10 2007-05-08 Infineon Technologies Ag Phase change memory cell with high read margin at low power operation
US7099180B1 (en) 2005-02-15 2006-08-29 Intel Corporation Phase change memory bits reset through a series of pulses of increasing amplitude
US7229883B2 (en) 2005-02-23 2007-06-12 Taiwan Semiconductor Manufacturing Company, Ltd. Phase change memory device and method of manufacture thereof
KR100668333B1 (ko) 2005-02-25 2007-01-12 삼성전자주식회사 Ｐｒａｍ 소자 및 그 제조방법
JP2006244561A (ja) 2005-03-01 2006-09-14 Renesas Technology Corp 半導体装置
US7154774B2 (en) 2005-03-30 2006-12-26 Ovonyx, Inc. Detecting switching of access elements of phase change memory cells
US7488967B2 (en) * 2005-04-06 2009-02-10 International Business Machines Corporation Structure for confining the switching current in phase memory (PCM) cells
DE602005011249D1 (de) 2005-04-08 2009-01-08 St Microelectronics Srl Phasenwechselspeicher mit rohrförmiger Heizstruktur sowie deren Herstellungsverfahren
US7166533B2 (en) * 2005-04-08 2007-01-23 Infineon Technologies, Ag Phase change memory cell defined by a pattern shrink material process
KR100675279B1 (ko) 2005-04-20 2007-01-26 삼성전자주식회사 셀 다이오드들을 채택하는 상변이 기억소자들 및 그제조방법들
US7408240B2 (en) 2005-05-02 2008-08-05 Infineon Technologies Ag Memory device
KR100682946B1 (ko) 2005-05-31 2007-02-15 삼성전자주식회사 상전이 램 및 그 동작 방법
KR100668846B1 (ko) 2005-06-10 2007-01-16 주식회사 하이닉스반도체 상변환 기억 소자의 제조방법
US7388273B2 (en) 2005-06-14 2008-06-17 International Business Machines Corporation Reprogrammable fuse structure and method
US8237140B2 (en) 2005-06-17 2012-08-07 Macronix International Co., Ltd. Self-aligned, embedded phase change RAM
US7514288B2 (en) 2005-06-17 2009-04-07 Macronix International Co., Ltd. Manufacturing methods for thin film fuse phase change ram
US7238994B2 (en) 2005-06-17 2007-07-03 Macronix International Co., Ltd. Thin film plate phase change ram circuit and manufacturing method
US7534647B2 (en) 2005-06-17 2009-05-19 Macronix International Co., Ltd. Damascene phase change RAM and manufacturing method
US7321130B2 (en) 2005-06-17 2008-01-22 Macronix International Co., Ltd. Thin film fuse phase change RAM and manufacturing method
US7696503B2 (en) 2005-06-17 2010-04-13 Macronix International Co., Ltd. Multi-level memory cell having phase change element and asymmetrical thermal boundary
US7598512B2 (en) 2005-06-17 2009-10-06 Macronix International Co., Ltd. Thin film fuse phase change cell with thermal isolation layer and manufacturing method
US7514367B2 (en) 2005-06-17 2009-04-07 Macronix International Co., Ltd. Method for manufacturing a narrow structure on an integrated circuit
US20060289847A1 (en) 2005-06-28 2006-12-28 Richard Dodge Reducing the time to program a phase change memory to the set state
US20060289848A1 (en) 2005-06-28 2006-12-28 Dennison Charles H Reducing oxidation of phase change memory electrodes
TWI290369B (en) 2005-07-08 2007-11-21 Ind Tech Res Inst Phase change memory with adjustable resistance ratio and fabricating method thereof
US7309630B2 (en) 2005-07-08 2007-12-18 Nanochip, Inc. Method for forming patterned media for a high density data storage device
US7233520B2 (en) 2005-07-08 2007-06-19 Micron Technology, Inc. Process for erasing chalcogenide variable resistance memory bits
US7345907B2 (en) 2005-07-11 2008-03-18 Sandisk 3D Llc Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements
US20070037101A1 (en) 2005-08-15 2007-02-15 Fujitsu Limited Manufacture method for micro structure
TWI273703B (en) 2005-08-19 2007-02-11 Ind Tech Res Inst A manufacture method and structure for improving the characteristics of phase change memory
KR100655443B1 (ko) 2005-09-05 2006-12-08 삼성전자주식회사 상변화 메모리 장치 및 그 동작 방법
US7615770B2 (en) 2005-10-27 2009-11-10 Infineon Technologies Ag Integrated circuit having an insulated memory
US7417245B2 (en) 2005-11-02 2008-08-26 Infineon Technologies Ag Phase change memory having multilayer thermal insulation
US20070111429A1 (en) 2005-11-14 2007-05-17 Macronix International Co., Ltd. Method of manufacturing a pipe shaped phase change memory
US7397060B2 (en) 2005-11-14 2008-07-08 Macronix International Co., Ltd. Pipe shaped phase change memory
US7394088B2 (en) 2005-11-15 2008-07-01 Macronix International Co., Ltd. Thermally contained/insulated phase change memory device and method (combined)
US7635855B2 (en) 2005-11-15 2009-12-22 Macronix International Co., Ltd. I-shaped phase change memory cell
US7450411B2 (en) 2005-11-15 2008-11-11 Macronix International Co., Ltd. Phase change memory device and manufacturing method
US7786460B2 (en) 2005-11-15 2010-08-31 Macronix International Co., Ltd. Phase change memory device and manufacturing method
US7414258B2 (en) 2005-11-16 2008-08-19 Macronix International Co., Ltd. Spacer electrode small pin phase change memory RAM and manufacturing method
US7507986B2 (en) 2005-11-21 2009-03-24 Macronix International Co., Ltd. Thermal isolation for an active-sidewall phase change memory cell
US7449710B2 (en) 2005-11-21 2008-11-11 Macronix International Co., Ltd. Vacuum jacket for phase change memory element
US7479649B2 (en) 2005-11-21 2009-01-20 Macronix International Co., Ltd. Vacuum jacketed electrode for phase change memory element
US7829876B2 (en) 2005-11-21 2010-11-09 Macronix International Co., Ltd. Vacuum cell thermal isolation for a phase change memory device
US7599217B2 (en) 2005-11-22 2009-10-06 Macronix International Co., Ltd. Memory cell device and manufacturing method
US7688619B2 (en) 2005-11-28 2010-03-30 Macronix International Co., Ltd. Phase change memory cell and manufacturing method
US7459717B2 (en) 2005-11-28 2008-12-02 Macronix International Co., Ltd. Phase change memory cell and manufacturing method
US7233054B1 (en) 2005-11-29 2007-06-19 Korea Institute Of Science And Technology Phase change material and non-volatile memory device using the same
US7605079B2 (en) 2005-12-05 2009-10-20 Macronix International Co., Ltd. Manufacturing method for phase change RAM with electrode layer process
US7642539B2 (en) 2005-12-13 2010-01-05 Macronix International Co., Ltd. Thin film fuse phase change cell with thermal isolation pad and manufacturing method
EP1966841B1 (en) 2005-12-20 2010-09-08 Nxp B.V. A vertical phase change memory cell and methods for manufacturing thereof
US7531825B2 (en) 2005-12-27 2009-05-12 Macronix International Co., Ltd. Method for forming self-aligned thermal isolation cell for a variable resistance memory array
US8062833B2 (en) 2005-12-30 2011-11-22 Macronix International Co., Ltd. Chalcogenide layer etching method
US20070156949A1 (en) 2005-12-30 2007-07-05 Rudelic John C Method and apparatus for single chip system boot
US7292466B2 (en) 2006-01-03 2007-11-06 Infineon Technologies Ag Integrated circuit having a resistive memory
KR100763908B1 (ko) 2006-01-05 2007-10-05 삼성전자주식회사 상전이 물질, 이를 포함하는 상전이 메모리와 이의 동작방법
US7595218B2 (en) 2006-01-09 2009-09-29 Macronix International Co., Ltd. Programmable resistive RAM and manufacturing method
US7560337B2 (en) 2006-01-09 2009-07-14 Macronix International Co., Ltd. Programmable resistive RAM and manufacturing method
US7741636B2 (en) 2006-01-09 2010-06-22 Macronix International Co., Ltd. Programmable resistive RAM and manufacturing method
US20070158632A1 (en) 2006-01-09 2007-07-12 Macronix International Co., Ltd. Method for Fabricating a Pillar-Shaped Phase Change Memory Element
US7825396B2 (en) 2006-01-11 2010-11-02 Macronix International Co., Ltd. Self-align planerized bottom electrode phase change memory and manufacturing method
US7351648B2 (en) 2006-01-19 2008-04-01 International Business Machines Corporation Methods for forming uniform lithographic features
US7432206B2 (en) 2006-01-24 2008-10-07 Macronix International Co., Ltd. Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram
US7456421B2 (en) 2006-01-30 2008-11-25 Macronix International Co., Ltd. Vertical side wall active pin structures in a phase change memory and manufacturing methods
US7956358B2 (en) 2006-02-07 2011-06-07 Macronix International Co., Ltd. I-shaped phase change memory cell with thermal isolation
US7426134B2 (en) 2006-02-24 2008-09-16 Infineon Technologies North America Sense circuit for resistive memory
US7910907B2 (en) 2006-03-15 2011-03-22 Macronix International Co., Ltd. Manufacturing method for pipe-shaped electrode phase change memory
US20070252127A1 (en) 2006-03-30 2007-11-01 Arnold John C Phase change memory element with a peripheral connection to a thin film electrode and method of manufacture thereof
US20070235811A1 (en) 2006-04-07 2007-10-11 International Business Machines Corporation Simultaneous conditioning of a plurality of memory cells through series resistors
US7928421B2 (en) 2006-04-21 2011-04-19 Macronix International Co., Ltd. Phase change memory cell with vacuum spacer
US20070249090A1 (en) 2006-04-24 2007-10-25 Philipp Jan B Phase-change memory cell adapted to prevent over-etching or under-etching
US7514705B2 (en) 2006-04-25 2009-04-07 International Business Machines Corporation Phase change memory cell with limited switchable volume
US8129706B2 (en) 2006-05-05 2012-03-06 Macronix International Co., Ltd. Structures and methods of a bistable resistive random access memory
US7608848B2 (en) 2006-05-09 2009-10-27 Macronix International Co., Ltd. Bridge resistance random access memory device with a singular contact structure
US20070267618A1 (en) 2006-05-17 2007-11-22 Shoaib Zaidi Memory device
US7423300B2 (en) 2006-05-24 2008-09-09 Macronix International Co., Ltd. Single-mask phase change memory element
US7696506B2 (en) 2006-06-27 2010-04-13 Macronix International Co., Ltd. Memory cell with memory material insulation and manufacturing method
US7663909B2 (en) 2006-07-10 2010-02-16 Qimonda North America Corp. Integrated circuit having a phase change memory cell including a narrow active region width
US7785920B2 (en) 2006-07-12 2010-08-31 Macronix International Co., Ltd. Method for making a pillar-type phase change memory element
US7542338B2 (en) 2006-07-31 2009-06-02 Sandisk 3D Llc Method for reading a multi-level passive element memory cell array
US7684225B2 (en) 2006-10-13 2010-03-23 Ovonyx, Inc. Sequential and video access for non-volatile memory arrays
US20080225489A1 (en) 2006-10-23 2008-09-18 Teledyne Licensing, Llc Heat spreader with high heat flux and high thermal conductivity
US7863655B2 (en) 2006-10-24 2011-01-04 Macronix International Co., Ltd. Phase change memory cells with dual access devices
US20080101110A1 (en) 2006-10-25 2008-05-01 Thomas Happ Combined read/write circuit for memory
US7473576B2 (en) 2006-12-06 2009-01-06 Macronix International Co., Ltd. Method for making a self-converged void and bottom electrode for memory cell
US7682868B2 (en) 2006-12-06 2010-03-23 Macronix International Co., Ltd. Method for making a keyhole opening during the manufacture of a memory cell
US20080137400A1 (en) 2006-12-06 2008-06-12 Macronix International Co., Ltd. Phase Change Memory Cell with Thermal Barrier and Method for Fabricating the Same
US7476587B2 (en) 2006-12-06 2009-01-13 Macronix International Co., Ltd. Method for making a self-converged memory material element for memory cell
US20080165569A1 (en) 2007-01-04 2008-07-10 Chieh-Fang Chen Resistance Limited Phase Change Memory Material
US7515461B2 (en) 2007-01-05 2009-04-07 Macronix International Co., Ltd. Current compliant sensing architecture for multilevel phase change memory
US20080164453A1 (en) 2007-01-07 2008-07-10 Breitwisch Matthew J Uniform critical dimension size pore for pcram application
US7440315B2 (en) 2007-01-09 2008-10-21 Macronix International Co., Ltd. Method, apparatus and computer program product for stepped reset programming process on programmable resistive memory cell
US7456460B2 (en) 2007-01-29 2008-11-25 International Business Machines Corporation Phase change memory element and method of making the same
US7535756B2 (en) 2007-01-31 2009-05-19 Macronix International Co., Ltd. Method to tighten set distribution for PCRAM
US7701759B2 (en) 2007-02-05 2010-04-20 Macronix International Co., Ltd. Memory cell device and programming methods
US7463512B2 (en) 2007-02-08 2008-12-09 Macronix International Co., Ltd. Memory element with reduced-current phase change element
US8138028B2 (en) 2007-02-12 2012-03-20 Macronix International Co., Ltd Method for manufacturing a phase change memory device with pillar bottom electrode
US8008643B2 (en) 2007-02-21 2011-08-30 Macronix International Co., Ltd. Phase change memory cell with heater and method for fabricating the same
US7569844B2 (en) 2007-04-17 2009-08-04 Macronix International Co., Ltd. Memory cell sidewall contacting side electrode
US20080265234A1 (en) 2007-04-30 2008-10-30 Breitwisch Matthew J Method of Forming Phase Change Memory Cell With Reduced Switchable Volume
US7906368B2 (en) 2007-06-29 2011-03-15 International Business Machines Corporation Phase change memory with tapered heater
US7745807B2 (en) 2007-07-11 2010-06-29 International Business Machines Corporation Current constricting phase change memory element structure
US7755935B2 (en) 2007-07-26 2010-07-13 International Business Machines Corporation Block erase for phase change memory
US7642125B2 (en) 2007-09-14 2010-01-05 Macronix International Co., Ltd. Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing
US7868313B2 (en) 2008-04-29 2011-01-11 International Business Machines Corporation Phase change memory device and method of manufacture
US8324605B2 (en) 2008-10-02 2012-12-04 Macronix International Co., Ltd. Dielectric mesh isolated phase change structure for phase change memory

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