CN101465670B - Method and circuit for eliminating two-shipper control circuit dithering - Google Patents
Method and circuit for eliminating two-shipper control circuit dithering Download PDFInfo
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- CN101465670B CN101465670B CN 200710303790 CN200710303790A CN101465670B CN 101465670 B CN101465670 B CN 101465670B CN 200710303790 CN200710303790 CN 200710303790 CN 200710303790 A CN200710303790 A CN 200710303790A CN 101465670 B CN101465670 B CN 101465670B
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Abstract
The invention provides a method of eliminating jitter of dual computer control circuit and a jitter elimination circuit. the jitter elimination circuit comprises a jitter judgment unit and a first signal output unit; wherein, the jitter judgment unit is used for judging if the state indication signal of a circuit board has jitter according to the dual computer switching signal and the state indication signal of the circuit board, and outputting a jitter elimination control signal; the first signal output unit is used for selecting the state indication signal of the circuit board or a forced signal of a forced circuit board in primary state to be used as the first signal output according to the jitter elimination control signal output by the jitter judgment unit; the first signal is used for determine the primary and spare states of the circuit board again. Based on the circuit and method in the invention, the jitter of the state indication signal of a primary circuit board can be eliminated during the plug in-out process of a spare circuit board.
Description
Technical field
The present invention relates to a kind of hot plug technology field, be specifically related to a kind of method and jitter elimination circuit of in hot plug process, eliminating the shake of two-shipper control circuit.
Background technology
In order to improve the reliability of communication apparatus, in equipment, usually adopt the redundant technique of activestandby hot backup.Activestandby hot backup refers to that two identical veneers work simultaneously, and wherein a veneer is in master state, and another veneer is stand-by state.When primary veneer broke down, system switched to trouble-free standby board, took over original primary veneer work by standby board.Simultaneously, for fear of the work of interrupting device, existing communication apparatus is all supported hot plug technology usually.Hot plug technology allows the user in shutdown system not, inserts or the extraction device parts in the situation of not cutting off the electricity supply.
Below simply introduce two-shipper control circuit of the prior art.So-called " two-shipper " can be understood as two veneers, comprises primary veneer and standby board.In activestandby hot backup, can coordinate by the two-shipper control circuit work of two veneers.Please refer to Fig. 1, be the schematic diagram of two-shipper control circuit of the prior art, wherein, the circuit full symmetric of the circuit of A side and B side, the circuit of A side are arranged on the veneer, and the circuit of B side is arranged on another veneer.Veneer can be inserted backboard by the connector between veneer and the backboard (for example comprising plug and socket).
In this manual, with " 1 " expression high level, with " 0 " expression low level.
Implication for each signal among Fig. 1 please refer to table 1, after two veneers all insert backboard, can communicate by the holding wire on the backboard.Wherein, the ACT_T signal of A side output offers the ACT_R of B side via backboard, and the Link_O signal of A side offers the Link_I signal of B side via backboard; Symmetrical, the ACT_T of B side and Link_O signal also offer ACT_R and the Link_I signal of A side via backboard.The major function of two-shipper control circuit comprises:
1) eliminates the primary phenomenon of two-shipper, namely avoid two veneers to be simultaneously master state;
2) active and standby vibration is eliminated in single-board operation state locking;
3) only allow to initiate active and standby switching by primary veneer, primary veneer A CT_T=0;
4) realize resetting switching, manually switch, software exchange, primary single board default switch;
When 5) in place to plate, it is primary forcing this plate.
| Signal name | Signal type | The explanation of signal implication |
| ACT_R | Input | From the two-shipper control signal to plate. |
| ACT_T | Output | The condition indicative signal of this plate indicates that this plate is primary, stand-by state, and wherein, 0 expression is primary; 1 expression is for subsequent use. |
| CTL | Input | Two-shipper is switched enable signal, and software enables two-shipper and switches On/Off control (0: close the two-shipper switch function, it is for subsequent use putting the machine, 1: open two-shipper control, allow two-shipper to switch). |
| Link_I | Input | To plate indication input signal in place, Link_I=0, in place to plate, allow two-shipper control; Link_I=1, not in place to plate, forcing this plate is primary (ACT_T=0). |
| Link_O | Output | To plate indication output signal in place, Link_O=0, inform plate: this plate is in place, allows two-shipper control; Link_O is unsettled, and inform plate: this plate is not in place. |
| SW | Input | The two-shipper changeover signal, the state that is used for the control main board is switched: at main board side: SW=0, the expression claimed condition is switched, and this plate is reduced to stand-by state (ACT_T becomes 1 by 0), and plate is upgraded to master state (ACT_T becomes 0 by 1); SW=1, the expression stateless is switched, and namely the master state of main board remains unchanged.At standby plate side (ACT_T=1): the SW invalidating signal. |
Table 1
When backboard only is inserted with a veneer, as insert A side veneer, can find out from circuit shown in Figure 1, because B side veneer does not insert, the Link_I signal pin of A side veneer is unsettled, therefore, the Link_I signal of A side veneer is pulled to high level, according to the signal definition in the table 1, since not in place to plate (being B side veneer), at this moment, the two-shipper control circuit forces this plate (being A side veneer) for primary, namely select 1 logical device to select low level output to the ACT_T of this plate by two 2, thereby realize that it is primary forcing this veneer when only having a veneer in place.
When being inserted with two veneers on the backboard, suppose that A side veneer is primary, B side veneer is for subsequent use, at this moment, and A side: ACT_T=0, ACT_R=1, SW=1, Link_I=0, two 2 signals that select the C pin output that 1 logical block will select NAND gate 1 are to ACT_T; Similarly, at B side: ACT_T=1, ACT_R=0,, Link_I=0, two 2 signals that select the F pin output that 1 logical device will select NAND gate 2 are to ACT_T.
The shortcoming of above-mentioned two-shipper control circuit is, plugs the master state that standby board can affect primary veneer.The still explanation as an example of Fig. 1 example: suppose A side veneer as primary, C point signal is " 0 "; B side veneer is for subsequent use, and F point signal is " 1 ".When band is electrically interposed in or extracts standby board (B side veneer), in the plug process, B side veneer device plays pendulum, the low level burr can appear on its ACT_T signal of exporting, thereby cause the ACT_R signal (the A pin input signal of NAND gate) of the primary veneer of A side to be low level " 0 ", and then C pin output signal becomes " 1 ", causes the ACT_T=1 of A side veneer output, and namely A side veneer is by the primary stand-by state of reducing to.When standby plate extract or insert stable after, the A pin signal of NAND gate becomes again " 1 ", C pin signal becomes " 0 ", and then ACT_T=0, namely A side veneer reverts to again master state.
As seen from the above analysis, in the process of plug standby board, because the low level burr appears in the signal (ACT_R) of standby board output, cause the condition indicative signal ACT_T of primary veneer to shake, and system judges that by the ACT_T signal this plate is primary, stand-by state, therefore, the shake on the ACT_T will cause primary veneer to reduce to stand-by state or be in stand-by state in the short time, thereby have influence on the normal operation of primary veneer.
Summary of the invention
Technical problem to be solved by this invention provides a kind of method and jitter elimination circuit of eliminating the shake of two-shipper control circuit, be used for the process at the plug standby board, eliminate the shake on the condition indicative signal ACT_T of primary veneer, avoid primary veneer the situation of job insecurity to occur
For solving the problems of the technologies described above, the invention provides scheme as follows:
A kind of jitter elimination circuit is applied to the jitter elimination of the condition indicative signal of this plate, and described jitter elimination circuit comprises:
The shake judging unit is used for the condition indicative signal according to two-shipper changeover signal and this plate, judge whether the shaking of condition indicative signal of this plate, and output jitter is eliminated control signal;
The first signal output unit, be used for the jitter elimination control signal according to described shake judging unit output, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, and described first signal is used for redefining that this plate is primary, stand-by state.
Jitter elimination circuit of the present invention, wherein, described shake judging unit comprises the first buffer unit and logic judgment unit;
Described the first buffer unit is used for receiving the also condition indicative signal of this plate of buffer memory, the condition indicative signal in a upper clock cycle of output current time;
Described logic judgment unit, be used for when two-shipper changeover signal indication stateless switching control, the condition indicative signal of this plate of a described upper clock cycle and current time is indicated respectively the state of this plate when being primary and backup, judge that the condition indicative signal of this plate shakes, and output requires to carry out the jitter elimination control signal of jitter elimination; When the condition indicative signal of this plate of a upper clock cycle and current time when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output; When the condition indicative signal of this plate of a upper clock cycle and current time indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
Jitter elimination circuit of the present invention, wherein, described shake judging unit comprises the first buffer unit, the second buffer unit and logic judgment unit;
Described the first buffer unit is used for the condition indicative signal of this plate of buffer memory, and exports the condition indicative signal in a upper clock cycle of current time;
Described the second buffer unit links to each other with the first buffer unit, and the signal that the first buffer unit is exported carries out buffer memory, the condition indicative signal of upper two clock cycle of output current time;
Described logic judgment unit, be used for being designated as the stateless switching control when the two-shipper changeover signal, the condition indicative signal of this plate in described upper two clock cycle and a upper clock cycle is indicated respectively the state of this plate when being primary and backup, judge on the condition indicative signal of this plate and shake, and output requires to carry out the jitter elimination control signal of jitter elimination; When the condition indicative signal of this plate in upper two clock cycle and upper clock cycle when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output; When the condition indicative signal of this plate in upper two clock cycle and a upper clock cycle indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
Jitter elimination circuit of the present invention, wherein, described first signal output unit comprises the first selected cell;
Described the first selected cell is used for judging according to the jitter elimination control signal of described shake judging unit output: when requiring to carry out jitter elimination, select described forced signal to export as described first signal; When not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
Jitter elimination circuit of the present invention, wherein, described first signal output unit is further used for the clock index signal according to outside input, and selecting the condition indicative signal of this plate or indicating this board status is that the forced signal of master state is exported as described first signal.
Jitter elimination circuit of the present invention, wherein, described first signal output unit comprises the first selected cell and the second selected cell;
Described the second selected cell is used for receiving the outside clock index signal of inputting, and judges whether clock is normal, when clock is normal, triggers described the first selected cell; When clock is undesired, select the condition indicative signal of this plate to export as described first signal;
Described the first selected cell, be used for after being triggered by described the second selected cell, judge according to the jitter elimination control signal: when requiring to carry out jitter elimination, select described forced signal to export as described first signal, when not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
The present invention also provides a kind of method of eliminating the shake of two-shipper control circuit, may further comprise the steps:
A according to the condition indicative signal of two-shipper changeover signal and this plate, judges whether the condition indicative signal of this plate is shaken, and output jitter is eliminated control signal;
B, according to described jitter elimination control signal, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, described first signal is used for redefining that this plate is primary, stand-by state.
Method of the present invention, wherein, in the described steps A, whether the described condition indicative signal of judging this plate shake occurs comprises:
When two-shipper changeover signal indication stateless switching control, the condition indicative signal of this plate of a described upper clock cycle and current time is indicated respectively the state of this plate when being primary and backup, judge that the condition indicative signal of this plate shakes, and output requires to carry out the jitter elimination control signal of jitter elimination; When the condition indicative signal of this plate of a upper clock cycle and current time when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output; When the condition indicative signal of this plate of a upper clock cycle and current time indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
Method of the present invention, wherein, described step B specifically comprises:
Jitter elimination control signal according to described shake judging unit output is judged: when requiring to carry out jitter elimination, select described forced signal to export as described first signal; When not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
Method of the present invention wherein, also comprised before steps A:
Steps A 0 according to the clock index signal of outside input, judges whether clock is normal, when clock is normal, and execution in step A, otherwise, the condition indicative signal of this plate is exported as described first signal, and process ends.
The present invention also provides a kind of method of eliminating the shake of two-shipper control circuit, this plate to plate indication input pin in place and plate indication output pin in place is connected via backboard to plate, this buttress is according to described whether in place to plate to plate indication input signal detection in place on the plate indication input pin in place, wherein
The contact pin length to plate indication output pin in place in the connector between veneer and the backboard is made as contact pin length less than other pin in this connector, in the process of plug to plate, if this buttress according to described to plate indication input signal detection in place to not in place to plate, then forcing this plate is master state.
Can find out from the above, the method of the jitter elimination circuit that the embodiment of the invention provides and the shake of elimination two-shipper control circuit, whether the condition indicative signal of judging this plate by jitter elimination circuit exists shake, and the shake on the condition indicative signal eliminated, thereby so that this plate can not cause job insecurity because of the plug to plate.Simultaneously, also further clock signal is monitored in the embodiment of the invention, in the situation that clock signal breaks down, still determined the operating state of this plate according to the condition indicative signal of this plate, thereby improved the reliability of described Method and circuits.The present invention also provides a kind of method of eliminating two-shipper control circuit shake, by with the shorter contact pin of specific signal pin setting, and the shake on the simple and reliable condition indicative signal of having avoided this plate in the two-shipper control circuit.
Description of drawings
Fig. 1 is the schematic diagram of two-shipper control circuit of the prior art;
Fig. 2 is the schematic diagram of state machine of eliminating the ACT_T shake of primary veneer among the embodiment 1;
Fig. 3 is the annexation figure of the embodiment of the invention 1 described jitter elimination circuit and two-shipper control circuit;
Fig. 4 is the structural representation of the embodiment of the invention 1 described jitter elimination circuit;
Fig. 5 is the structural representation of the embodiment of the invention 2 described jitter elimination circuit.
Embodiment
The invention provides a kind of method and jitter elimination circuit of eliminating the shake of two-shipper control circuit, be used for the process at the plug standby board, eliminate the shake on the condition indicative signal ACT_T of primary veneer, guarantee that primary veneer is operated in master state, avoid primary veneer the situation of job insecurity to occur.The present invention is elaborated by specific embodiment below in conjunction with accompanying drawing.
＜embodiment 1 〉
In the process of plug standby board, if because the low level burr appears in the signal ACT_R of standby board output, cause the condition indicative signal ACT_T of primary veneer to shake, effect of jitter on the ACT_T is to the operating state of primary veneer, in the present embodiment by increasing respectively jitter elimination circuit in the A of two-shipper control circuit side and B side, in order to the shake on the ACT_T is eliminated, and redefine the work at present state of veneer according to the first signal ACT of jitter elimination circuit output.
The low level burr of ACT_R is only influential to primary veneer, on standby board without impact.Its reason is: even the low level burr is arranged on the ACT_R of standby board, the state that this low level burr is finally also just purchased with veneer is for subsequent use, thereby can not change the work at present state of two veneers.Therefore, only need in the present embodiment to consider when veneer is in master state how to eliminate the signal jitter on the ACT_T of this primary veneer.
According to table 1 and Fig. 1 analysis as can be known, primary veneer switches to stand-by state needs to satisfy simultaneously two conditions: this plate current state be primary (being ACT_T=0) and two-shipper changeover signal with this plate by the primary stand-by state (being SW=0) that switches to.If forbid this plate by primary when switching to stand-by state (being SW=1) when the two-shipper changeover signal, it is primary to switching for subsequent use that the condition indicative signal of primary veneer but indicates this plate to occur, and illustrates that then shake has occured the ACT_T of this plate.
Figure 2 shows that the schematic diagram of the state machine of the ACT_T shake of eliminating primary veneer.P_filter among Fig. 2 is the jitter elimination control signal, and whether be used for expression needs ACT_T is carried out the jitter elimination processing.Wherein, P_filter=0 represents that ACT_T does not shake, and at this moment, does not carry out jitter elimination and processes, and the ACT_T of two-shipper control circuit output will be by transparent transmission, i.e. ACT=ACT_T; P_filter=1 represents that ACT_T shakes, and at this moment, need to carry out jitter elimination to ACT_T and process, and the current state of for example forcing this plate is primary (namely forcing ACT=0).
ACT_T among Fig. 2 (N) and ACT_T (N-1) represented respectively the condition indicative signal ACT_T of this plate in a upper clock cycle of current time and current time.
As shown in Figure 2, the initial state after the state machine initialization is P_filter=0;
When the condition indicative signal of this plate indicated the state of this plate not change (being ACT (N-1)=0, ACT (N)=0 or ACT (N-1)=1, ACT (N)=1), state machine kept current P_filter=0 state;
Indicating this plate when the two-shipper changeover signal is master state, and condition indicative signal to indicate this plate to switch to stand-by state by master state (be SW=1, ACT (N-1)=0, ACT (N)=1) time, at this moment, think that the condition indicative signal of this plate is shaken, therefore, state machine switches to the P_filter=1 state, need to carry out jitter elimination to the ACT_T signal;
After entering the P_filter=1 state, (ACT (N-1)=1 when if the condition indicative signal of this plate still indicates this plate to be stand-by state, ACT (N)=1, do not consider that SW is 1 or 0 this moment), think that then the shake on this board status index signal still exists, state machine continues to keep the P_filter=1 state; Until condition indicative signal indicates this plate by the master state (being ACT (N-1)=1, ACT (N)=0) that switches to for subsequent use, at this moment, not shake on the condition indicative signal of this plate, state machine then switches to the P_filter=0 state.
Please refer to Fig. 3, be the jitter elimination circuit that newly increases and the annexation figure of two-shipper control circuit, jitter elimination circuit can be passed through Digital Logical Circuits, such as programmable logic device, realizes.As shown in Figure 3, the input signal of jitter elimination circuit comprises ACT_T, SW, CLK and CLK_STATU, and output signal is first signal ACT.Wherein the implication of part signal please refer to table 2.
| Signal name | Signal type | The explanation of signal implication |
| ACT_T | Input | With the ACT_T signal in the table 1. |
| CLK | Input | The global clock signal is generally 10M with the clock of upper frequency. |
| CLK_STATU | Input | The clock index signal is used to indicate clock status: representing that when being 0 clock is normal, is to represent that clock broke down at 1 o'clock. |
| ACT | Output | First signal is for primary, the stand-by state that redefine this plate.Wherein, 0 expression is primary; 1 expression is for subsequent use. |
Table 2
Figure 4 shows that the structural representation of jitter elimination circuit, as shown in Figure 4, this jitter elimination circuit comprises: shake judging unit and first signal output unit.
Described shake judging unit is used for the condition indicative signal ACT_T according to two-shipper changeover signal SW and this plate, judges whether the condition indicative signal ACT_T of this plate shakes, and output jitter is eliminated control signal;
Described first signal output unit, be used for the jitter elimination control signal according to described shake judging unit output, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, and described first signal is used for redefining that this plate is primary, stand-by state.
Wherein, described shake judging unit specifically comprises again: the first buffer unit and logic judgment unit.
Described the first buffer unit is used for receiving the also condition indicative signal of this plate of buffer memory, the condition indicative signal in a upper clock cycle of output current time;
Described logic judgment unit, be used for being designated as stateless switching control (being SW=1) when the two-shipper changeover signal, the condition indicative signal of this plate of a described upper clock cycle and current time indicate respectively the state of this plate be primary and backup (be ACT_T (N-1)=0, ACT_T (N)=1) time, judge that the condition indicative signal of this plate shakes, output P_filter=1 requires that ACT_T is carried out jitter elimination and processes; When the condition indicative signal of this plate of a upper clock cycle and current time indicate respectively the state of this plate be for subsequent use and primary (be ACT_T (N-1)=1, ACT_T (N)=0) time, judge not shake on the condition indicative signal of this plate, output P_filter=0 does not need that ACT_T is carried out jitter elimination and processes; Indicated the state of this plate when the condition indicative signal of this plate of a upper clock cycle and current time and do not change (be ACT_T (N-1)=1, ACT_T (N)=1; Or ACT_T (N-1)=0, ACT_T (N)=0), the jitter elimination control signal of this moment output remains unchanged (namely keep P_filter value constant).
Wherein, described first signal output unit specifically comprises again the first selected cell.
Described the first selected cell, concrete can be 2 selects 1 logical device, be used for judging according to the jitter elimination control signal of described shake judging unit output: when requiring to carry out jitter elimination (being P_filter=1), this plate of selection pressure operating state is that the forced signal (being low level " 0 ") of master state is exported as described first signal ACT; When not carrying out jitter elimination (being P_filter=0), select the condition indicative signal of this plate to export as described first signal ACT;
Can find out, above-mentioned jitter elimination circuit is when judging that there is shake in ACT_T, ACT is master state by pressure, system namely can redefine according to ACT the operating state of this plate, thereby has realized eliminating the shake on the ACT_T, has guaranteed the normal operation of primary veneer.
Based on above-mentioned jitter elimination circuit, the present embodiment also provides a kind of method of eliminating the shake of two-shipper control circuit, in described two-shipper control circuit, this buttress is according to the two-shipper changeover signal and the condition indicative signal of plate is exported the condition indicative signal of this plate, said method comprising the steps of:
Step 12, according to described jitter elimination control signal, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, described first signal is used for redefining that this plate is primary, stand-by state.
Here, in the described step 11, whether the described condition indicative signal of judging this plate shake occurs comprises:
When two-shipper changeover signal indication stateless switching control, the condition indicative signal of this plate of a described upper clock cycle and current time is indicated respectively the state of this plate when being primary and backup, judge that the condition indicative signal of this plate shakes, and output requires to carry out the jitter elimination control signal of jitter elimination; When the condition indicative signal of this plate of a upper clock cycle and current time when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output; When the condition indicative signal of this plate of a upper clock cycle and current time indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
In the described step 12, judge according to the jitter elimination control signal of described shake judging unit output: when requiring to carry out jitter elimination, select described forced signal to export as described first signal; When not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
＜embodiment 2 〉
Please refer to Fig. 5, be the structural representation of the described jitter elimination circuit of the present embodiment.Compare with Fig. 4, the shake judging unit among Fig. 5 has increased by the second buffer unit, and the first signal output unit has increased by the second selected cell.
Described first signal output unit, be further used for the clock index signal according to the outside input, selecting the condition indicative signal of this plate or indicating this board status is that the forced signal of master state is exported as described first signal, with the reliability of further raising jitter elimination circuit work.
Concrete, as shown in Figure 5, the second buffer unit is used for receiving the also condition indicative signal of this plate of buffer memory, the condition indicative signal ACT_T (N-1) in a upper clock cycle of output current time.Here, after the ACT_T that at first by the second buffer unit the two-shipper control circuit is exported carries out buffer memory, export to again subsequent conditioning circuit, with the phenomenons such as burr that may exist in the filtering ACT_T signal.
The first buffer unit is used for the signal that buffer memory the second buffer unit is exported, and exports the condition indicative signal ACT_T (N-2) of upper two clock cycle in the current moment.
Logic judgment unit, be used for being designated as the stateless switching control when the two-shipper changeover signal, the condition indicative signal of this plate in described upper two clock cycle and a upper clock cycle is indicated respectively the state of this plate (SW=1 when being primary and backup, ACT_T (N-2)=0, ACT_T (N-1)=1), judge on the condition indicative signal of this plate and shake, and output requires to carry out the jitter elimination control signal (namely exporting P_filter=1) of jitter elimination; When the condition indicative signal of this plate in upper two clock cycle and a upper clock cycle indicate respectively the state of this plate be for subsequent use and primary (be ACT_T (N-2)=1, ACT_T (N-1)=0) time, judge not shake on the condition indicative signal of this plate, and the jitter elimination control signal (namely exporting P_filter=0) of jitter elimination is not carried out in output; Indicated the state of this plate when the condition indicative signal of this plate in upper two clock cycle and a upper clock cycle and do not change (be ACT_T (N-2)=1, ACT_T (N-1)=1; Or ACT_T (N-2)=0, ACT_T (N-1)=0), namely keep the P_filter value constant this moment.
The second selected cell is used for receiving the outside clock index signal CLK_STATU that inputs, and judges whether clock is normal, when clock is normal, trigger described the first selected cell, when clock is undesired, select the condition indicative signal of this plate to export as described first signal.Here, described clock refers to shake the global clock signal CLK of control unit.
Described the first selected cell, be used for after being triggered by described the second selected cell, judge according to the jitter elimination control signal: when requiring to carry out jitter elimination, select described forced signal to export as described first signal, when not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
Can find out from the above, in the present embodiment, when the clock signal breaks down, this circuit is with bypass jitter elimination module, and with the condition indicative signal of this plate directly as described first signal output, thereby this jitter elimination circuit still can be judged based on the condition indicative signal of this plate the operating state of this plate in the situation that clock breaks down, thereby has improved the reliability of circuit working.
Based on the described jitter elimination circuit of the present embodiment, the present embodiment also provides a kind of method of eliminating the shake of two-shipper control circuit, said method comprising the steps of:
Step 22 according to the condition indicative signal of two-shipper changeover signal and this plate, judges whether the condition indicative signal of this plate is shaken, and output jitter is eliminated control signal;
Step 23, according to described jitter elimination control signal, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, described first signal is used for redefining that this plate is primary, stand-by state.Concrete, when described jitter elimination control signal requires to carry out jitter elimination, select described forced signal to export as described first signal; When described jitter elimination control signal indication is not carried out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
＜embodiment 3 〉
Analyze as can be known according to Fig. 1 and table 1, this plate to plate indication input pin in place (Link_I pin) with to plate plate indication output pin in place (Link_O pin) is connected via backboard, this buttress is according to described whether in place to plate to plate indication input signal detection in place on the plate indication input pin in place (Link_I pin).If in advance the contact pin length to plate indication output pin in place (being the Link_O pin) in the connector between veneer and the backboard is made as the contact pin length less than other pin in this connector, so when extracting standby board, because the Link_O pin is " hour hand ", the Link_O pin disconnects first, primary veneer Link_I because of on draw and become " 1 ", will force this plate this moment is master state; Even the ACT_R signal on the primary veneer is jagged because plugging afterwards, but can not affect the operating state of primary veneer; And when inserting standby board, Link_O is more late than the Lifetime of other signals, even the ACT_R signal of main board is jagged in the insertion process, but because the Link_I signal also remains " 1 ", forcing this plate is master state, thereby has also avoided the impact of burr.
Based on above analysis, the present embodiment provides a kind of method of eliminating the shake of two-shipper control circuit, the method comprises: the contact pin length to plate indication output pin in place in the connector between veneer and the backboard is made as contact pin length less than other pin in this connector, in the process of plug to plate, if this buttress according to described to plate indication input signal detection in place to not in place to plate, then forcing this plate is master state.
The described method of the present embodiment is simple, and is reliable, can effectively eliminate the impact that existing two-shipper control circuit plug standby board causes the operating state of primary veneer.
In sum, the method of the described jitter elimination circuit of the embodiment of the invention and the shake of elimination two-shipper control circuit, for contrast index signal output pin in place hour hand is set by adopting in connector, perhaps by jitter elimination circuit the condition indicative signal of this plate is carried out jitter elimination, guarantee that primary veneer is operated in master state, avoid primary veneer the situation of job insecurity to occur.
The method of jitter elimination circuit of the present invention and the shake of elimination two-shipper control circuit, be not restricted to listed utilization in specification and the execution mode, it can be applied to various suitable the present invention's field fully, for those skilled in the art, can easily realize additional advantage and make amendment, therefore in the situation of the spirit and scope that do not deviate from the universal that claim and equivalency range limit, the present invention is not limited to specific details, representational equipment and illustrates here and the examples shown of describing.
Claims (8)
1. jitter elimination circuit is applied to the jitter elimination of the condition indicative signal of this plate, it is characterized in that, described jitter elimination circuit comprises:
The shake judging unit is used for the condition indicative signal according to two-shipper changeover signal and this plate, judge whether the shaking of condition indicative signal of this plate, and output jitter is eliminated control signal;
The first signal output unit, be used for the jitter elimination control signal according to described shake judging unit output, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, and described first signal is used for redefining that this plate is primary, stand-by state;
Wherein, described first signal output unit comprises the first selected cell;
Described the first selected cell is used for judging according to the jitter elimination control signal of described shake judging unit output: when requiring to carry out jitter elimination, select described forced signal to export as described first signal; When not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
2. jitter elimination circuit as claimed in claim 1 is characterized in that, described shake judging unit comprises the first buffer unit and logic judgment unit;
Described the first buffer unit is used for receiving the also condition indicative signal of this plate of buffer memory, the condition indicative signal in a upper clock cycle of output current time;
Described logic judgment unit is used for:
When two-shipper changeover signal indication stateless switching control, the condition indicative signal of this plate of a described upper clock cycle and current time is indicated respectively the state of this plate when being primary and backup, judge that the condition indicative signal of this plate shakes, and output requires to carry out the jitter elimination control signal of jitter elimination;
When the condition indicative signal of this plate of a upper clock cycle and current time when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output;
When the condition indicative signal of this plate of a upper clock cycle and current time indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
3. jitter elimination circuit as claimed in claim 1 is characterized in that, described shake judging unit comprises the first buffer unit, the second buffer unit and logic judgment unit;
Described the first buffer unit is used for the condition indicative signal of this plate of buffer memory, and exports the condition indicative signal in a upper clock cycle of current time;
Described the second buffer unit links to each other with the first buffer unit, and the signal that the first buffer unit is exported carries out buffer memory, the condition indicative signal of upper two clock cycle of output current time;
Described logic judgment unit is used for:
When the two-shipper changeover signal is designated as the stateless switching control, the condition indicative signal of this plate in described upper two clock cycle and a upper clock cycle is indicated respectively the state of this plate when being primary and backup, judge on the condition indicative signal of this plate and shake, and output requires to carry out the jitter elimination control signal of jitter elimination;
When the condition indicative signal of this plate in upper two clock cycle and upper clock cycle when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output;
When the condition indicative signal of this plate in upper two clock cycle and a upper clock cycle indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
4. jitter elimination circuit as claimed in claim 1 is characterized in that,
Described first signal output unit is further used for the clock index signal according to outside input, and selecting the condition indicative signal of this plate or indicating this board status is that the forced signal of master state is exported as described first signal.
5. jitter elimination circuit as claimed in claim 4 is characterized in that, described first signal output unit comprises the first selected cell and the second selected cell;
Described the second selected cell is used for receiving the outside clock index signal of inputting, and judges whether clock is normal, when clock is normal, triggers described the first selected cell; When clock is undesired, select the condition indicative signal of this plate to export as described first signal;
Described the first selected cell, be used for after being triggered by described the second selected cell, judge according to the jitter elimination control signal: when requiring to carry out jitter elimination, select described forced signal to export as described first signal, when not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
6. a method of eliminating the shake of two-shipper control circuit is characterized in that, may further comprise the steps:
A according to the condition indicative signal of two-shipper changeover signal and this plate, judges whether the condition indicative signal of this plate is shaken, and output jitter is eliminated control signal;
B, according to described jitter elimination control signal, selecting the condition indicative signal of this plate or forcing this board status is that the forced signal of master state is exported as first signal, described first signal is used for redefining that this plate is primary, stand-by state;
Wherein said step B specifically comprises:
Judge according to described jitter elimination control signal: when requiring to carry out jitter elimination, select described forced signal to export as described first signal; When not carrying out jitter elimination, select the condition indicative signal of this plate to export as described first signal.
7. method as claimed in claim 6 is characterized in that, in the described steps A, whether the described condition indicative signal of judging this plate shake occurs comprises:
When two-shipper changeover signal indication stateless switching control, the condition indicative signal of this plate of a described upper clock cycle and current time is indicated respectively the state of this plate when being primary and backup, judge that the condition indicative signal of this plate shakes, and output requires to carry out the jitter elimination control signal of jitter elimination;
When the condition indicative signal of this plate of a upper clock cycle and current time when to indicate respectively the state of this plate be for subsequent use and primary, judge that the condition indicative signal of this plate is not shaken, and the jitter elimination control signal of jitter elimination was not carried out in output;
When the condition indicative signal of this plate of a upper clock cycle and current time indicated the state of this plate not change, the jitter elimination control signal of output remained unchanged.
8. such as each described method of claim 6 to 7, it is characterized in that, before steps A, also comprise:
Steps A 0 according to the clock index signal of outside input, judges whether clock is normal, when clock is normal, and execution in step A, otherwise, the condition indicative signal of this plate is exported as described first signal, and process ends.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200710303790 CN101465670B (en) | 2007-12-21 | 2007-12-21 | Method and circuit for eliminating two-shipper control circuit dithering |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200710303790 CN101465670B (en) | 2007-12-21 | 2007-12-21 | Method and circuit for eliminating two-shipper control circuit dithering |
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| CN101465670A CN101465670A (en) | 2009-06-24 |
| CN101465670B true CN101465670B (en) | 2013-01-02 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 200710303790 Active CN101465670B (en) | 2007-12-21 | 2007-12-21 | Method and circuit for eliminating two-shipper control circuit dithering |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101777996B (en) * | 2009-12-29 | 2013-04-10 | 中兴通讯股份有限公司 | Device and method for realizing switching primary and spare services |
| CN112751753A (en) * | 2019-10-31 | 2021-05-04 | 中兴通讯股份有限公司 | Method and communication equipment for protecting main/standby states of single board |
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| US5084902A (en) * | 1989-03-14 | 1992-01-28 | Nec Corporation | Jitter canceller with an initial value setting circuit for an adaptive filter |
| CN1245999A (en) * | 1998-08-25 | 2000-03-01 | 深圳市华为技术有限公司 | Master backup reverse device |
| CN1324148A (en) * | 2000-07-11 | 2001-11-28 | 深圳市中兴通讯股份有限公司 | Jitter-free change-over method and device for main and stand-by units capable of being hot plugged and unplugged in digital communication system |
| CN1725659A (en) * | 2004-07-20 | 2006-01-25 | 华为技术有限公司 | Single board standby system |
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| US5084902A (en) * | 1989-03-14 | 1992-01-28 | Nec Corporation | Jitter canceller with an initial value setting circuit for an adaptive filter |
| CN1245999A (en) * | 1998-08-25 | 2000-03-01 | 深圳市华为技术有限公司 | Master backup reverse device |
| CN1324148A (en) * | 2000-07-11 | 2001-11-28 | 深圳市中兴通讯股份有限公司 | Jitter-free change-over method and device for main and stand-by units capable of being hot plugged and unplugged in digital communication system |
| CN1725659A (en) * | 2004-07-20 | 2006-01-25 | 华为技术有限公司 | Single board standby system |
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