CN101488445B - Method for reducing Ioff scattering of nodes above 65 nanometers - Google Patents

Method for reducing Ioff scattering of nodes above 65 nanometers Download PDF

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Publication number
CN101488445B
CN101488445B CN2008100326354A CN200810032635A CN101488445B CN 101488445 B CN101488445 B CN 101488445B CN 2008100326354 A CN2008100326354 A CN 2008100326354A CN 200810032635 A CN200810032635 A CN 200810032635A CN 101488445 B CN101488445 B CN 101488445B
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polycrystalline film
scattering
ioff
spot
doping
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CN101488445A (en
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张海洋
陈海华
黄怡
段晓斌
张世谋
马擎天
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

Based on one aspect of the invention, a method for reducing loff scattering of nodes in more than 65 nanometers is provided, the method comprises the following steps: step 1: depositing a polycrystal film, step 2: depositing an oxide layer, step 3: depositing a B-doped SIN film, step 4: carrying out N+P1 pre-doping, step 5: N+P1-IMP, step 6: N+P1 incineration/wet method stripping, step 7: eliminating the B-doped SIN film and step 8: illuminating a grid. In the method, the problem of phosphorus infiltration is solved to ease the loff scattering; meanwhile, grid etching is not affected.

Description

Be used to alleviate the method for the Ioff scattering of the above node of 65 nanometers
Technical field
The present invention relates to semiconductor fabrication process, relate in particular to a kind of method that is used to alleviate the Ioff scattering of the above node of 65 nanometers.
Background technology
In recent years, Ioff scattering problem is outstanding especially in the exploitation of 65 nanometer nodes logics.Many methods have been tested to seek effective solution.Yet many methods are poor effect often, is cost with the performance of sacrificing device perhaps.For example, adopt thick 10% polycrystalline film and B-to mix and to improve the Ioff scattering to a certain extent, but meanwhile they can make the performance degradation of N-MOS, with reference to figure 1a-1c, wherein Fig. 1 a shows the Ioff performance of adopting boiler tube BL technology, Fig. 1 b shows the Ioff performance of amorphous polycrystalline (Amorphous Poly) technology, and Fig. 1 c shows the Ioff performance of B-doping boiler tube BL technology.
At present, proved that crystallite dimension is very big to the influence of Ioff scattering phenomenon.Crystallite dimension is big more, and the Ioff scattering is serious more.Existing boiler tube polycrystalline film provides minimum average grain, therefore can't further alleviate Ioff scattering problem by this point.B-doping process shown in Fig. 1 c has solved Ioff scattering problem preferably.Yet this improvement may be because the B atom has formed some potential barriers in polycrystalline film.This method can the deterioration device performance.The phosphorus infiltration has been considered to crucial basic reason.Current technology generally adopts Manufacturing Executive System MES shown in Figure 2 (Manufacturing Execution System) flow process, wherein may further comprise the steps successively: polycrystalline film deposition (step 201), N+P1 mix in advance (step 202), N+P1-IMP (step 203), N+P1 ashing/wet method (ASH/WET) is peeled off (step 204), grid illumination (step 205).
Summary of the invention
The object of the present invention is to provide a kind of method that does not influence gate etch itself simultaneously that addresses the above problem.
According to an aspect of the present invention, a kind of method that is used to alleviate the Ioff scattering of the above node of 65 nanometers is provided, this method may further comprise the steps: step 1: deposit a polycrystalline film, step 2: deposit an oxide layer, step 3: deposit a B-doping SIN film, step 4: carry out N+P1 and mix in advance, step 5: N+P1-IMP, step 6: N+P1 ashing/wet method is peeled off, step 7: remove described B-doping SIN film, and step 8: grid illumination.
In said method, the thickness of oxide layer that forms in the step 2 is 30 dusts.
In addition, according to a further aspect in the invention, also provide a kind of method that is used to alleviate the Ioff scattering of the above node of 65 nanometers, this method may further comprise the steps: step 1: deposit a polycrystalline film; Step 2: form the double-layered polycrystal film that comprises the ground floor and the second layer, the wherein said second layer satisfies the needs of pre-doping consumption and reserves enough spaces for the P during the subsequent step permeates; Step 3: grid illumination.
Wherein, in said method, step 2 further may further comprise the steps: step 2 (1): the on-the-spot P doped polycrystalline film of deposition of thick 500 dusts, step 2 (2): the described on-the-spot P doped polycrystalline film of etching, step 2 (3): the on-the-spot B doped polycrystalline film of deposition of thick 500 dusts, step 2 (4): the described on-the-spot B doped polycrystalline film of etching.Perhaps, in said method, step 2 further may further comprise the steps: step 2 (1): on N-MOS described polycrystalline film is carried out etch-back, step 2 (2): deposit the on-the-spot P doped polycrystalline film of 5 00 dusts, step 2 (3): remove the on-the-spot P doped polycrystalline film on the P-MOS.
The method according to this invention is mainly alleviated Ioff scattering problem by the problem that solves the phosphorus infiltration.
Should be appreciated that the above generality of the present invention is described and the following detailed description all is exemplary and explanat, and be intended to the further explanation that the invention provides for as claimed in claim.
Description of drawings
Comprise that accompanying drawing is for providing the present invention further to be understood, they are included and are constituted the application's a part, and accompanying drawing shows embodiments of the invention, and play the effect of explaining the principle of the invention with this specification.In the accompanying drawing:
Fig. 1 a-1c is the schematic diagram that different Ioff performances is shown.
Fig. 2 is current MES flow chart.
Fig. 3 shows the MES flow chart according to first embodiment of the invention.
Fig. 4 shows the MES flow chart according to second embodiment of the invention.
Fig. 5 shows the MES flow chart according to third embodiment of the invention.
Fig. 6 shows each stage according to the flow process of the 3rd embodiment.
Embodiment
Now with embodiments of the present invention will be described by referring to the drawings in detail.
Fig. 3 shows the first embodiment of the present invention, wherein may further comprise the steps successively: polycrystalline film deposition (step 301), thin oxide layer deposition (step 302), thin B-doping SIN film (step 303), N+P1 mixes (step 304) in advance, N+P1-IMP (step 305), and N+P1 ashing/wet method (ASH/WET) is peeled off (step 306), remove thin B-doping SIN film (step 307), grid illumination (step 308).
In this embodiment, mix in advance at N+P1 (step 3 04) preceding to have increased by two steps: thin oxide layer deposition (step 302), thin B-doping SIN film (step 303).Wherein, step 303 is used for forming the SIN film that a B-mixes with on-the-spot (in-situ) pattern on polycrystalline film, thereby more effectively alleviates the phosphorus infiltration.As mentioned above, the phosphorus infiltration has been considered to one of basic reason of Ioff scattering, therefore can alleviate the problem of Ioff scattering so effectively.
In addition, by the thin oxide layer (thick about 30 dusts usually) that step 302 forms, protection will be at the top surface of the polycrystalline film that forms at first when this layer was used in the end removing SIN film (step 307).
Step 307 is used to remove the SIN film that above-mentioned B-mixes, and after N+P1 mixes IMP in advance, needs to remove this SIN film to avoid that gate etch is produced any negative effect.
Fig. 4 shows the technological process of the second embodiment of the present invention.Wherein mainly may further comprise the steps successively: deposit a polycrystalline film (step 401), the on-the-spot P doped polycrystalline film (step 402) of deposition of thick 500 dusts, the on-the-spot P doped polycrystalline film (step 403) of etching, the on-the-spot B doped polycrystalline film (step 404) of deposition of thick 500 dusts, the on-the-spot B doped polycrystalline film (step 405) of etching, grid illumination (step 406).In above-mentioned steps 401, about 500 dusts of the thickness of formed polycrystalline film.
Fig. 5 shows the flow process according to third embodiment of the invention.Wherein mainly may further comprise the steps successively: deposit a polycrystalline film (step 501), on N-MOS, polycrystalline film is carried out etch-back (step 502), deposit the on-the-spot P doped polycrystalline film (step 503) of 500 dusts, remove the on-the-spot P doped polycrystalline film (step 504) on the P-MOS, grid illumination (step 505).
Fig. 6 shows each stage according to the flow process of the 3rd embodiment.Wherein, in the phase I 601, form traditional polycrystalline film,, obtain second stage 602 by its part on N-MOS is carried out etch-back.On whole polycrystalline film, carry out on-the-spot P polycrystalline film deposition subsequently, to realize the phase III 603, and then obtain quadravalence section 604, and at last etch-back is carried out to obtain five-stage 605 in whole surface, only the part on N-MOS has on-the-spot P polycrystalline film in this stage.
Above-mentioned second and the characteristics of the 3rd embodiment be mainly to adopt the double-layered polycrystal film to replace traditional thick polycrystalline film of 1000 dusts, wherein second on-the-spot codope polycrystalline film can satisfy the needs of previous pre-doping consumption and reserve enough spaces and given further P infiltration in the subsequent step.After follow-up traditional grid illumination and etching, the device that obtains by this method can alleviate Ioff scattering problem effectively.
Those skilled in the art can be obvious, can carry out various modifications and variations and without departing from the spirit and scope of the present invention to above-mentioned exemplary embodiment of the present invention.Therefore, be intended to that the present invention is covered and drop in appended claims and the equivalence techniques scheme scope thereof to modification of the present invention and modification.

Claims (5)

1. method that is used to alleviate the Ioff scattering of the above node of 65 nanometers, this method may further comprise the steps:
Step 1: deposit a polycrystalline film,
Step 2: deposit an oxide layer,
Step 3: deposit a boron doping SIN film,
Step 4: carry out the pre-doping of N type+phosphorus,
Step 5: N type+phosphorus is implanted,
Step 6: N type+phosphorus ashing and wet method are peeled off,
Step 7: remove described boron doping SIN film, and
Step 8: grid illumination.
2. the method that is used to alleviate the Ioff scattering of the above node of 65 nanometers as claimed in claim 1 is characterized in that the thickness of oxide layer that forms in the described step 2 is 30 dusts.
3. method that is used to alleviate the Ioff scattering of the above node of 65 nanometers, this method may further comprise the steps:
Step 1: deposit a polycrystalline film;
Step 2: form the double-layered polycrystal film that comprises the ground floor and the second layer, the wherein said second layer satisfies the needs of pre-doping consumption and reserves enough spaces for the phosphorus during the subsequent step permeates;
Step 3: grid illumination.
4. the method that is used to alleviate the Ioff scattering of the above node of 65 nanometers as claimed in claim 3 is characterized in that described step 2 further may further comprise the steps:
Step 2 (1): the on-the-spot phosphorus doping polycrystalline film of deposition of thick 500 dusts,
Step 2 (2): the described on-the-spot phosphorus doping polycrystalline film of etching,
Step 2 (3): the on-the-spot boron doped polycrystalline film of deposition of thick 500 dusts,
Step 2 (4): the described on-the-spot boron doped polycrystalline film of etching.
5. the method that is used to alleviate the Ioff scattering of the above node of 65 nanometers as claimed in claim 3 is characterized in that described step 2 further may further comprise the steps:
Step 2 (1): on N-MOS, described polycrystalline film is carried out etch-back,
Step 2 (2): deposit the on-the-spot phosphorus doping polycrystalline film of 500 dusts,
Step 2 (3): remove the on-the-spot phosphorus doping polycrystalline film on the P-MOS.
CN2008100326354A 2008-01-15 2008-01-15 Method for reducing Ioff scattering of nodes above 65 nanometers Expired - Fee Related CN101488445B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5308998A (en) * 1991-08-26 1994-05-03 Semiconductor Energy Laboratory Co., Ltd. Insulated gate field effect semiconductor devices having a LDD region and an anodic oxide film of a gate electrode
CN1359541A (en) * 2000-04-28 2002-07-17 松下电器产业株式会社 Thin film transistor and method for fabricating the same, and liquid crystal display comprising the same
CN1866541A (en) * 2005-05-12 2006-11-22 英飞凌科技股份公司 Field effect transistor and method for manufacturing same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5308998A (en) * 1991-08-26 1994-05-03 Semiconductor Energy Laboratory Co., Ltd. Insulated gate field effect semiconductor devices having a LDD region and an anodic oxide film of a gate electrode
CN1359541A (en) * 2000-04-28 2002-07-17 松下电器产业株式会社 Thin film transistor and method for fabricating the same, and liquid crystal display comprising the same
CN1866541A (en) * 2005-05-12 2006-11-22 英飞凌科技股份公司 Field effect transistor and method for manufacturing same

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