CN101548271B - Data redundancy in a plurality of storage devices - Google Patents

Data redundancy in a plurality of storage devices Download PDF

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Publication number
CN101548271B
CN101548271B CN200780044865.6A CN200780044865A CN101548271B CN 101548271 B CN101548271 B CN 101548271B CN 200780044865 A CN200780044865 A CN 200780044865A CN 101548271 B CN101548271 B CN 101548271B
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data redundancy
redundancy scheme
memory
memory command
magnetic disk
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CN200780044865.6A
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CN101548271A (en
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拉多斯拉夫·丹尼拉克
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LSI Corp
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SandForce Inc
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Priority claimed from US11/942,629 external-priority patent/US7904672B2/en
Priority claimed from US11/942,623 external-priority patent/US8090980B2/en
Application filed by SandForce Inc filed Critical SandForce Inc
Priority to CN201210391651.9A priority Critical patent/CN102929751B/en
Publication of CN101548271A publication Critical patent/CN101548271A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2089Redundant storage control functionality
    • G06F11/2092Techniques of failing over between control units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2056Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G06F11/201Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2015Redundant power supplies

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
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Abstract

A system, method, and computer program product are provided for providing data redundancy in a plurality of storage devices. In operation, storage commands are received for providing data redundancy in accordance with a first data redundancy scheme. Additionally, the storage commands are translated for providing the data redundancy in accordance with a second data redundancy scheme. Furthermore, the translated storage commands are outputted for providing the data redundancy in a plurality of storage devices.

Description

Data redundancy in a plurality of memory storages
Technical field
The present invention relates to data storage, and more specifically to the data redundancy in the memory storage.
Background technology
Storage system is one in the restricted aspect of tool of performance of modern enterprise computing system.Performance based on the memory storage of hard disk drive was confirmed through the time of searching and the time of half rotation.Search the time and reduce rotation waiting time and increase performance through minimizing.Yet, have restriction aspect how soon in that driver is rotatable.The present age, the fastest driver can reach 15,000rpm.
Fig. 1 explanation is according to prior art system 100.In system 100, at least one computing machine 102-108 is coupled to console controller 110 and 112. Console controller 110 and 112 is coupled to a plurality of disk 114-120.
Usually, system 100 is through being configured to Redundant Array of Independent Disks-1, and the mirrored content of disk 114-116 is stored among the disk 118-120.Disk 114-116 is called as the mirror image through disk 118-120.
Through copy diskette 114-116, console controller 110 and therebetween the reliability that is connected the increase that realizes computer system.Therefore, reliably computer system can be at least operated under the condition that has disk 114-120, RAID controller 110 and 112, computing machine 102-108 and therebetween the single fault that is connected.Yet through using system 100, it is not enough that performance of storage system possibly remain.In addition, the performance that increases this type systematic is expensive and often is infeasible current.
Therefore need to handle these and/or the other problem that are associated with prior art.
Summary of the invention
Be provided in a plurality of memory storages, providing system, the method and computer program product of data redundancy.In operation, receive memory command to be used for data redundancy being provided according to first data redundancy scheme.In addition, memory command is translated to be used for according to second data redundancy scheme data redundancy being provided.In addition, output is used at a plurality of memory storages data redundancy being provided through the memory command of translating.
Description of drawings
Fig. 1 explanation is according to prior art system.
Fig. 2 A shows the system that is used for providing at a plurality of memory storages data redundancy according to an embodiment.
Fig. 2 B shows the storage system that is used for providing at a plurality of memory storages data redundancy according to an embodiment.
Fig. 3 shows the disk assembly according to an embodiment.
Fig. 4 shows the disk assembly according to another embodiment.
Fig. 5 shows the method that is used for the operational redundancy Magnetic Disk Controller according to an embodiment.
Fig. 6 shows the method that is used for the operational redundancy Magnetic Disk Controller according to another embodiment.
Fig. 7 shows the system that is used for the operational redundancy Magnetic Disk Controller according to another embodiment.
Fig. 8 explanation wherein can be implemented various structures and/or the functional example system of various previous embodiment.
Embodiment
Fig. 2 A shows the system 280 that is used for providing at a plurality of memory storages data redundancy according to an embodiment.As shown in the figure, system 280 comprises at least one computing machine 285-288.Computing machine 285-288 communicates by letter with at least one controller 290-291.Like further displaying, controller 290-291 communicates by letter with the storage system 292 that comprises a plurality of Magnetic Disk Controller 293-294 and a plurality of memory storage 296-299.Though it should be noted that and show controller 290-291 dividually, this quasi-controller 290-291 can be a unit in another embodiment.In addition, a plurality of Magnetic Disk Controller 293-294 can be a unit or separate unit in various embodiments.
In operation, receive memory command to be used for data redundancy being provided according to first data redundancy scheme.In addition, memory command is translated to be used for according to second data redundancy scheme data redundancy being provided.In addition, output is used at a plurality of memory storage 296-299 data redundancy being provided through the memory command of translating.
Describe under the situation of content at this, memory command refers to storage and promotes any order, instruction or the data of data storage.In addition, describe under the situation of content at this, data redundancy scheme refers to the scheme that is used for providing in system redundant data or fault-tolerant any kind.For instance; In various embodiments, data redundancy scheme can include, but is not limited to: Redundant Array of Independent Disks 0 data redundancy scheme, RAID 1 data redundancy scheme, RAID 10 data redundancy scheme, RAID 3 data redundancy scheme, RAID 4 data redundancy scheme, RAID 5 data redundancy scheme, RAID 50 data redundancy scheme, RAID 6 data redundancy scheme, RAID 60 data redundancy scheme, square odd even (square parity) data redundancy scheme, any non-standard RAID data redundancy scheme, any nested RAID data redundancy scheme and/or satisfy any other data redundancy scheme of above-mentioned definition.
In one embodiment, first data redundancy scheme can comprise RAID 1 data redundancy scheme.In another embodiment, second data redundancy scheme can comprise RAID 5 data redundancy scheme.In another embodiment, second data redundancy scheme can comprise RAID 6 data redundancy scheme.
In addition, describe under the situation of content at this, a plurality of memory storage 296-299 can represent the memory storage of any kind.For instance; In various embodiments; Memory storage 296-299 can include, but is not limited to optical-mechanical storage device (for example, disc driver etc.), solid-state storage device (for example, dynamic RAM (DRAM), flash memory etc.) and/or any other memory storage.Comprise at memory storage 296-299 under the situation of flash memory that flash memory can include, but is not limited to single layer cell (SLC) device, multilevel-cell (MLC) device, NOR flash memory, NAND flash memory, MLC NAND flash memory, SLC NAND flash memory etc.
To state more illustrative information about various optional structures and characteristic at present,, maybe or possibly not implement said frame with said various optional structures and characteristic according to user's requirement.Should obviously notice, state that following information is used for the illustrative purpose and it should not be understood that to have by any way restricted.In the following characteristic any one can be merged under the situation of getting rid of or do not get rid of described further feature according to circumstances.
Fig. 2 B shows the storage subsystem 250 that is used for providing at a plurality of memory storages data redundancy according to an embodiment.As an option, storage subsystem 250 can be checked under the situation of the details of Fig. 2 A.Yet storage subsystem 250 can be implemented under any situation of wanting environment certainly.It shall yet further be noted that definition mentioned above can be suitable for during this describes content.
As shown in the figure, storage subsystem 250 comprises a plurality of main memory storage 231-232 and is used to comprise at least one additional memory means 233-234 of the memory capacity of redundant information in order to increase.The amount of the data storage of storage subsystem 250 can be counted as the summation of the memory capacity of a plurality of main memory storage 231-232.As an option, memory capacity also can expand through additional memory means 233-234.Certainly, in one embodiment, can use additional memory means 233-234 to store alone from the redundant information of storage data computation.
Like further displaying, first Magnetic Disk Controller 210 comprises at least one port 201.In operation, first port of at least one the served as storage subsystem 250 in the port 201.In addition, at least one in the port 201 can serve as first Magnetic Disk Controller 210 to Magnetic Disk Controller bus 203, power supply connect 275 and the inside of first Magnetic Disk Controller 210 being coupled to the corresponding bus 241-244 of memory storage 231-234 connect the port of 211-214.
Bus 203 is coupled to second disk controller 220 with first Magnetic Disk Controller 210.In operation, bus 203 can be in order to keep watch on the operation of first Magnetic Disk Controller 210 and second disk controller 220.When second disk controller 220 detected the fault of first Magnetic Disk Controller 210, Magnetic Disk Controller 220 can ask first Magnetic Disk Controller 210 to connect 211-214 with corresponding bus 241-244 breaking inner through sending via Magnetic Disk Controller bus 203 to break off.
The bus 203 that first Magnetic Disk Controller 210 is coupled to second disk controller 220 is also available to use first Magnetic Disk Controller 210 to keep watch on the operation of second disk controller 220.When first Magnetic Disk Controller 210 detected the fault of second disk controller 220, first Magnetic Disk Controller 210 can ask second disk controller 220 to connect 221-224 with corresponding bus 241-244 breaking inner through sending via Magnetic Disk Controller bus 203 to break off.
In one embodiment, first Magnetic Disk Controller 210 maloperation that can detect inner maloperation or be associated with first Magnetic Disk Controller 210.In the case, when detecting inner maloperation, first Magnetic Disk Controller 210 can break off the connection 211-214 with corresponding bus 241-244.Similarly, second disk controller 220 maloperation that can detect inner maloperation or be associated with second disk controller 220.In the case, when detecting inner maloperation, second disk controller 220 can break off the connection 221-224 with corresponding bus 241-244.
In addition, in one embodiment, first and second Magnetic Disk Controllers 210 and 220 can detect the fault of Magnetic Disk Controller bus 203.In the case, second disk controller 220 can break off the connection 221-224 with corresponding bus 241-244, and first Magnetic Disk Controller 210 can the maintenance activity.In another embodiment, first Magnetic Disk Controller 210 can break off the connection 211-214 with corresponding bus 241-244, and second disk controller 220 can the maintenance activity.In another embodiment, the Magnetic Disk Controller that is about to the maintenance activity can break off the connection that is about to inactive controller.
It should be noted that the disconnection of bus 211-214 and 221-224 can be via three status circuits, multiplexers or any other circuit of being used to break off bus 211-214 and 221-224 implement.For instance, in one embodiment, disconnection can place high impedance status to accomplish through three status bus drivers that will be associated with Magnetic Disk Controller 210 or 220.In another embodiment, disconnection can be accomplished through the multiplexer in the input of control store device 231-234.
Like further displaying, second disk controller 220 comprises at least one port 202.In operation, second port of at least one the served as storage subsystem 250 in the port 202.In addition, at least one the served as second disk controller 220 in the port 202 to Magnetic Disk Controller bus 203, power supply connect 276 and the inside of second disk controller 220 being coupled to the corresponding bus 241-244 of memory storage 231-234 connect the port of 221-224.
Single redundant storage devices 233 is being provided and is not having under the situation of extra redundant storage devices 234, storage subsystem 250 can be in having memory storage 231-233 operation and do not have data loss under the condition of the single fault of any one.In one embodiment, the tissue of data and redundant information can be according to RAID 5.In another embodiment, the tissue of data and redundant information can be according to RAID 6, RAID 10, RAID 50, RAID 60, square parity redundancy schemas etc.
Under the situation that two redundant storage devices 233 and 234 are provided, storage subsystem 250 can be appointed in having memory storage 231-234 and continued operation under both condition of fault and have no data loss.In operation, port 201 and 202 can be rendered as two conventional independent mirrored disks with the data that are stored in the storage subsystem 250.In the case, this type of conventional independent mirrored disks can show as RAID 1, RAID 10, RAID 50, RAID 60, square parity redundancy schemas etc.
Electric power to storage subsystem 250 can be supplied through first electric connector 251 that is coupled to first power supply unit 253 via electrical connection 252.Electric power to storage subsystem 250 also can be supplied through second electric connector 261 that is coupled to second source unit 263 via connection 262.As an option, the output of the output of first power supply 253 and second source 263 can combine and is assigned to Magnetic Disk Controller 210 and 220 and memory storage 231-234 through distribution network 270.Memory storage 231-234 is coupled to distribution network 270 via the connection 271-274 of correspondence.Magnetic Disk Controller 210 and 220 is connected 275 and 276 via power supply and is coupled to distribution network 270.
Under the situation that the electric power to electric connector 251 breaks down, can supply through electric connector 261 to the electric power of storage subsystem 250.Similarly, under the situation that the electric power to electric connector 261 breaks down, can supply through electric connector 251 to the electric power of storage subsystem 250.Under the situation that connection 252 is broken down, can supply through connecting 262 to the electric power of storage subsystem 250.Under the situation that connection 262 is broken down, can supply through connecting 252 to the electric power of storage subsystem 250.
Under the situation that power supply 253 breaks down, can supply through power supply 263 to the electric power of storage subsystem 250.If power supply 263 breaks down, can supply through power supply 253 to the electric power of storage subsystem 250 so.Similarly, when connection 254 is broken down, can supply through connecting 264 to the electric power of storage subsystem 250.Likewise, when connection 264 is broken down, can supply through connecting 254 to the electric power of storage subsystem 250.Therefore, storage subsystem 250 is allowed the fault of various assemblies, and storage subsystem 250 can not be operated.
In one embodiment, Magnetic Disk Controller 210 and/or 220 can contain in order to detect the electric power dead circuit of power supply 253 and 263.In addition, this type of circuit can provide electric power to be saved among the memory storage 231-234 with the state with Magnetic Disk Controller 210 and 220, makes data loss does not take place.For instance, can detect the disconnection of power supply 253 and/or 263.
In the case, in response to the disconnection that detects power supply 253 and 263, can supply power to memory storage 231-234. Power supply 253 and 263 can supply power to storage subsystem 250 and continue time enough, makes that the state that can accomplish Magnetic Disk Controller 210 and 220 is written among the memory storage 231-234 after power supply 253 and 263 both electric power disconnections.Therefore, can with electric power be provided to memory storage 231-234 when not having data loss to take place owing to the disconnection of power supply 253 and 263 more at least till.In various embodiments, power supply 253 and 263 can comprise battery, capacitor and/or in order to when the electric power to power supply 253 and 263 breaks off, electric power is provided to any other assembly of storage subsystem 250.
It should be noted that and continue operation under the condition of any single fault of any element that storage subsystem 250 can be explained and do not have data loss in having Fig. 2 B.It shall yet further be noted that in various embodiments memory storage 231-234 can be optical-mechanical storage device, on-mechanical memory storage, volatibility or Nonvolatile memory devices.In addition, in various embodiments, memory storage 231-234 can include, but is not limited to DRAM or flash memory devices (for example, SLC device, MLC device, NOR door flash device, NAND door flash memory devices etc.).
In addition, in one embodiment, Magnetic Disk Controller 210 and 220 can be embodied as two individual chips.In another embodiment, Magnetic Disk Controller 210 and 220 may be implemented on a chip or the circuit small pieces.For instance, this type of enforcement can be confirmed based on the encapsulation problem.
Fig. 3 shows the disk assembly 300 according to an embodiment.As an option, disk assembly 300 may be implemented in the situation of functional and structure of Fig. 1-2.Yet disk assembly 300 can be implemented under any situation of wanting environment certainly.It shall yet further be noted that definition mentioned above can be suitable for during this describes content.
As shown in the figure, disk assembly 300 comprises: printed circuit board (PCB) 302, and it comprises disc driver (not shown); Electric connector, it has the main port as the part of SATA (Serial Advanced Technology Attachment) connector 304; And electric connector, it has the less important port as the part of the 2nd SATA connector 306.In one embodiment, disk assembly 300 can comprise SAS (serial attached SCSI) connector.For instance, disk assembly 300 can comprise: printed circuit board (PCB) 302, and it comprises disc driver (not shown); Electric connector, it has the main port as the part of SAS connector 304; And electric connector, it has the less important port as the part of the 2nd SAS connector 306.
As an option, connector 304 and 306 can expose as certain data redundancy configuration with disk assembly 300.For instance, the SATA interface can expose as a pair of disk with RAID 1 pattern configurations with disk assembly 300.In another embodiment, the SAS interface can disk assembly 300 be exposed as with the disk of RAID 1 pattern configurations right.In another embodiment, SATA and SAS interface can expose as a plurality of disks with RAID 0 pattern configurations with disk assembly 300.
Fig. 4 shows the disk assembly 400 according to another embodiment.As an option, disk assembly 400 may be implemented in the situation of functional and structure of Fig. 1-3.Yet disk assembly 400 can be implemented under any situation of wanting environment certainly.It shall yet further be noted that definition mentioned above can be suitable for during this describes content.
As shown in the figure, disk assembly 400 comprises two or more disk assemblies 410 and 420.As an option, disk assembly 410 and 420 can comprise the disk assembly 300 from Fig. 3.In the case, each disk assembly 410 and 420 can comprise printed circuit board (PCB) and connector 430.
According to circumstances, each disk assembly 410 and 420 can interconnect via electrical connection 401.In the case, be electrically connected 401 and can represent the Magnetic Disk Controller bus, for example the Magnetic Disk Controller bus 203 of Fig. 2 B.In operation, disk assembly 400 can through allow an above disk (for example, disk assembly 410 and 420) occupy routine or mainly the space of memory storage (for example, disc driver etc.) increase the memory property of system.
Fig. 5 shows the method that is used for the operational redundancy Magnetic Disk Controller 500 according to an embodiment.As an option, this method 500 may be implemented in the situation of functional and structure of Fig. 1-4.Yet method 500 can be carried out in any desired environment certainly.It shall yet further be noted that definition mentioned above can be suitable for during this describes content.
As shown in the figure, storage system (for example, disk assembly etc.) is powered up.See operation 510.Keep watch on the Magnetic Disk Controller of storage system.See operation 520.As an option, can keep watch on said Magnetic Disk Controller through another Magnetic Disk Controller.This type of supervision can comprise: keep watch on Magnetic Disk Controller via the bus between two Magnetic Disk Controllers (for example, Magnetic Disk Controller bus 203 of Fig. 2 B etc.); And/or keep watch on the activity on the bus corresponding to the memory storage of storage system (for example, the bus 241-244 of corresponding stored device 231-234 etc.).
Storage system continues operation, keeps watch on Magnetic Disk Controller, till it confirms that the Magnetic Disk Controller of being kept watch on has broken down.See operation 530.If the Magnetic Disk Controller of being kept watch on breaks down, so the Magnetic Disk Controller of being kept watch on is broken off.See operation 540.
In one embodiment, the disconnection of Magnetic Disk Controller can be implemented through sending ON-and OFF-command via the bus between two Magnetic Disk Controllers (for example, the Magnetic Disk Controller bus 203 of Fig. 2 B etc.).In the case, ON-and OFF-command can comprise that disconnection is linked to the supervision Magnetic Disk Controller bus (for example, connection 211-214 or the 221-224 of Fig. 2 B) of memory storage.In one embodiment, can keep watch on a plurality of Magnetic Disk Controllers through other Magnetic Disk Controller.In the case, can regard each Magnetic Disk Controller in a plurality of Magnetic Disk Controllers as kept watch on Magnetic Disk Controller.
Fig. 6 shows the method that is used for the operational redundancy Magnetic Disk Controller 600 according to another embodiment.As an option, this method 600 may be implemented in the situation of functional and structure of Fig. 1-5.Yet method 600 can be carried out in any desired environment certainly.It shall yet further be noted that definition mentioned above can be suitable for during this describes content.
As shown in the figure, storage system (for example, disk assembly etc.) is powered up.See operation 610.Link between at least two Magnetic Disk Controllers of supervision storage system.See operation 620.In one embodiment, the link between the Magnetic Disk Controller can comprise the Magnetic Disk Controller bus 203 of Fig. 2 B.In addition, the link between the Magnetic Disk Controller can be kept watch on (for example, first and second Magnetic Disk Controllers 210 of Fig. 2 B and 220 etc.) through in the Magnetic Disk Controller at least one.
Storage system continues operation, keeps watch on link, till it confirms that said link has been broken down.See operation 630.If link is broken down, so a Magnetic Disk Controller is broken off.See operation 640.
In one embodiment, disconnection can comprise that disconnection is linked to Magnetic Disk Controller the bus (for example, the connection 211-214 of Fig. 2 B or 221-224 etc.) of memory storage.In the case, can not handle the order that port received that is associated with the controller that breaks off.As an instance, the two can break off the in two Magnetic Disk Controllers in the back of breaking down of the link between first and second Magnetic Disk Controller.In the case, first controller can continue operation, and can not handle the order from the port of second disk controller.
Fig. 7 shows the system that is used for the operational redundancy Magnetic Disk Controller 700 according to another embodiment.As an option, system 700 may be implemented in the situation of functional and structure of Fig. 1-6.Yet system 700 can implement in any desired environment certainly.It shall yet further be noted that definition mentioned above can be suitable for during this describes content.
As shown in the figure, at least one computing machine 702-706 is provided.Computing machine 702-706 is coupled to a plurality of RAID controller 712-714.Controller 712-714 communicates by letter with a plurality of memory storage 716-722.This type of communication can comprise the port that utilization is associated with memory storage 716-722.
The reliability of system 700 can have memory storage 716-722 (for example, the storage system 250 of Fig. 2 B) redundant in the driver through use and realize.In addition, reproducible all connections (for example, bus etc.) are to guarantee the reliability of system 700.As an option, memory storage 716-722 each device separately comprises two ports, compares the bandwidth of twice thereby provide with using the memory storage with single port.In addition, each memory storage 716-722 can simulate two disks through for example utilizing redundant systems such as RAID 5, RAID 6, RAID 10, RAID 50, RAID 60, square parity redundancy schemas.
As an option, capable of using writing reduced the number that writes that logic 708-710 reduces to memory storage 716-722.In the case, memory command is translated to be used to providing data redundancy after reducing, to carry out.For instance, can receive memory command and data redundancy is provided with first data redundancy scheme (for example, RAID 5, RAID 6, RAID 10, RAID 50, RAID 60, square parity redundancy schemas etc.) that is used for according to controller 712-714.
Follow capable of using writing and reduce the number that writes that logic 708-710 reduces to memory storage 716-722.Then can (for example) memory command be translated, data redundancy is provided to be used for second data redundancy scheme that basis is associated with memory storage 716-722 through circuit.In one embodiment, second data redundancy scheme can be identical with first data redundancy scheme (for example, RAID 5, RAID 6, RAID 10, RAID 50, RAID 60, square parity redundancy schemas etc.).In another embodiment, second data redundancy scheme can with first data redundancy scheme (for example, RAID 1, RAID 6, RAID 10, RAID 50, RAID 60, square parity redundancy schemas etc.) difference.
In one embodiment, capable of using writing reduced logic 708-710 and provided the memory command of data redundancy to be formatted as the form compatible with second data redundancy scheme according to first data redundancy scheme being used for of being received.Strictly as an option, RAID controller 712-714 can comprise the system that has as redundant in the driver described in the situation of memory storage 716-722.In this way, can reduce to the number that writes of memory storage 716-722.Therefore, can translate second data redundancy scheme that is associated with memory storage 716-722 with basis after the number that writes in minimizing to memory command data redundancy is provided.In this way, can avoid the randomization of data.
Fig. 8 explanation wherein can be implemented various structures and/or the functional example system 800 of various previous embodiment.As shown in the figure, the system 800 that comprises at least one host-processor 801 that is connected to communication bus 802 is provided.System 800 also comprises primary memory 804.Steering logic (software) and data storage are in the primary memory that can adopt the random-access memory (ram) form 804.
System 800 also comprises graphic process unit 806 and display 808 (that is computer monitor).In one embodiment, graphic process unit 806 can comprise a plurality of shader modules, rasterizer module etc.In the above-mentioned module each can even be positioned on the single semiconductor platform to form GPU (GPU).
Describe in the content at this, single semiconductor platform can refer to unique integrated circuit or chip based on integral semiconductor.It should be noted that the single semiconductor platform of term also can refer to the internuncial multi-chip module with increase, operate on its analog chip, and compare the improvement that has produced essence with bus implementation with utilizing conventional CPU (CPU).Certainly, various module also can be positioned apart or according to the various integrated positionings of customer requirements with semiconductor platform.
System 800 also can comprise secondary storage 810.Secondary storage 810 comprises (for example) hard disk drive and/or removable formula storage device drive, its expression floppy disk, tape drive, Zip disk driver etc.Removable formula storage device drive reads and/or writes to removable formula storage unit from removable formula storage unit in a well-known manner.
Computer program or computer control logic algorithm can be stored in primary memory 804 and/or the secondary storage 810.This type of computer program makes system 800 can carry out various functions when carrying out.Storer 804, memory storage 810 and/or any other memory storage are the possible instances of computer-readable media.
In one embodiment; Each previous graphic structure and/or functional can under following situation, enforcement: host-processor 801, graphic process unit 806, secondary storage 810, integrated circuit (not shown), chipset (that is, through design with the group of the integrated circuit of working as being used to carry out the unit of correlation function and selling etc.) and/or any other integrated circuit in this regard with at least a portion of both abilities of host-processor 801 and graphic process unit 806.
Yet, each previous graphic structure and/or functional can under following situation, enforcement: general-purpose computing system, circuit board systems, the game console system that is exclusively used in entertainment purposes, dedicated system and/or any other desired system.For instance, system 800 can adopt the form of the logic of desktop PC, laptop computer and/or any other type.Yet system 800 can adopt the form of various other devices, includes, but is not limited to: PDA(Personal Digital Assistant) device, portable telephone device, TV etc.
In addition, though not shown, it is communication objective to be used for that system 800 can be coupled to network (for example, the wide area network of communication network, Local Area Network, wireless network, for example the Internet (WAN), peer-to-peer network, cable system etc.).
Though preceding text have been described various embodiment, should be understood that only unrestricted mode appears through instance for it.Therefore, the width of preferred embodiment and scope are not limited by in the above-mentioned example embodiment any one should, but should only define according to appended claims and equivalent thereof.

Claims (22)

1. storage means, it comprises:
Comprise first memory command that writes through a standard storage subsystem interface from the computing machine reception;
Reduce the said number that writes and produce second memory command through reception;
Receiving said second memory command and produce the 3rd memory command according to first data redundancy scheme through a Magnetic Disk Controller provides data redundancy;
According to second data redundancy scheme said the 3rd memory command is translated;
The said memory command of output in a plurality of flash memories through translating; And
Wherein through after said minimizing, providing said data redundancy to avoid randomization.
2. method according to claim 1, wherein said first data redundancy scheme comprises Redundant Array of Independent Disks-1 data redundancy scheme.
3. method according to claim 1, wherein said second data redundancy scheme comprises Redundant Array of Independent Disks-5 data redundancy scheme.
4. method according to claim 1, wherein said second data redundancy scheme comprises Redundant Array of Independent Disks-6 data redundancy scheme.
5. method according to claim 1, wherein said standard storage subsystem interface comprises the SATA interface.
6. method according to claim 5, wherein said Magnetic Disk Controller is included in the disk assembly.
7. method according to claim 1, wherein said standard storage subsystem interface comprises the SAS interface.
8. method according to claim 7, wherein said Magnetic Disk Controller is included in the disk assembly.
9. method according to claim 1, at least one in the wherein said flash memory comprises the NAND flash memory.
10. method according to claim 9, wherein said NAND flash memory comprise single layer cell (SLC) NAND flash memory.
11. method according to claim 9, wherein said NAND flash memory comprise multilevel-cell (MLC) NAND flash memory.
12. method according to claim 1, wherein said flash memory is included in the disk assembly.
13. method according to claim 1, wherein the processor in the disk assembly is carried out the said number that writes through receiving of said minimizing.
14. method according to claim 1, one in wherein said first data redundancy scheme or said second data redundancy scheme comprises one in Redundant Array of Independent Disks-10 data redundancy scheme, Redundant Array of Independent Disks-50 data redundancy scheme, Redundant Array of Independent Disks-60 data redundancy scheme and the square parity redundancy schemas.
15. a memory storage, it comprises:
Be used for receiving the device that comprises first memory command that writes from computing machine through the standard storage subsystem interface;
Be used to reduce the said device that produces second memory command through the number that writes that receives;
Be used for receiving said second memory command and producing the device that the 3rd memory command provides data redundancy according to first data redundancy scheme through a Magnetic Disk Controller;
Be used for the device of said the 3rd memory command being translated according to second data redundancy scheme;
Be used at the said device of a plurality of flash memories output through the memory command of translating; And
Wherein through after said minimizing, providing said data redundancy to avoid randomization.
16. device according to claim 15, wherein said standard storage subsystem interface comprises the SATA interface.
17. device according to claim 15, wherein said standard storage subsystem interface comprises the SAS interface.
18. device according to claim 15, wherein said first data redundancy scheme comprises Redundant Array of Independent Disks-1 data redundancy scheme.
19. device according to claim 15, wherein said second data redundancy scheme comprises Redundant Array of Independent Disks-5 data redundancy scheme.
20. device according to claim 15, wherein said second data redundancy scheme comprises Redundant Array of Independent Disks-6 data redundancy scheme.
21. a memory device, it comprises:
Standard storage subsystem interface circuit, it can receive first memory command from computing machine, and said first memory command comprises and writing;
Write the minimizing circuit, it can reduce the said number that writes through reception and produce second memory command;
Magnetic Disk Controller, it comprises and can receive said second memory command and produce the circuit that the 3rd memory command provides data redundancy according to first data redundancy scheme;
Circuit, it can utilize second data redundancy scheme that said the 3rd memory command is translated to memory command;
The memory device interface circuit, it can export said memory command to a plurality of flash memories through translating; And
Wherein through after said minimizing, providing said data redundancy to avoid randomization.
22. equipment according to claim 21, it further comprises said flash memory.
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