CN101577307B - Storage unit of resistance storage and manufacture method thereof - Google Patents
Storage unit of resistance storage and manufacture method thereof Download PDFInfo
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- CN101577307B CN101577307B CN2008101059045A CN200810105904A CN101577307B CN 101577307 B CN101577307 B CN 101577307B CN 2008101059045 A CN2008101059045 A CN 2008101059045A CN 200810105904 A CN200810105904 A CN 200810105904A CN 101577307 B CN101577307 B CN 101577307B
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Abstract
The invention discloses a storage unit of a resistance storage and a manufacture method thereof. The manufacture method of the storage unit comprises the following steps: providing a semiconductor substrate and a dielectric layer on the semiconductor substrate; forming a bottom electrode in the dielectric layer; forming a first storage dielectric layer on the bottom electrode; depositing a reaction metal layer on the first storage dielectric layer, wherein the reaction metal is metal having the characteristic of binary resistor after being oxidized; forming a top electrode covering the reaction metal layer; and enabling the first storage dielectric layer to oxidize the reaction metal layer to form a second storage dielectric layer. The storage unit of a resistance storage and the manufacture method thereof can reduce, control and regulate oxygen content in a first storage medium and enhance resistance conversion performance of the storage medium.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly relate to memory cell of a kind of Memister and preparation method thereof.
Background technology
Current, it is low that exploitation has a cost, and speed is fast, and the storage density height is made simple and is subjected to worldwide extensive concern with the compatible good novel memory technology of current CMOS (Complementary Metal Oxide Semiconductor) (CMOS) semiconductor integrated circuit technique.Resistive random access memory (RRAM based on metal oxide with resistance switch characteristic, abbreviate Memister as) memory techniques be the emphasis that at present how tame device manufacturer is developed because this technology can provide more high density, the more low-cost and Nonvolatile memory of low power consumption more.The memory cell of RRAM resistance value after applying pulse voltage can produce great changes, and this resistance value still can be kept down behind deenergization.In addition, RRAM has performances such as anti-irradiation, high-low temperature resistant, against violent vibration are moving, anti-electronic jamming.
RRAM comprises a plurality of memory cell, Fig. 1 has provided a kind of structure of the memory cell of RRAM, described memory cell comprises the hearth electrode (BE in the dielectric layer 110 that is formed on the Semiconductor substrate 100, Bottom Electrode) 120, be formed on the storage medium 130 of the resistance-variable on the hearth electrode 120, and be formed on top electrode (TE, Top Electrode) 150 on the storage medium 130.Hearth electrode 120 is an electric conducting material, for example is tungsten (W), metallic copper (Cu) etc.; The dielectric film with binary resistance characteristic that storage medium 130 forms for the described hearth electrode 120 of oxidation, it can be changed between high-impedance state and low resistance state under outer field action.More about RRAM structure and the information of manufacture method can application reference number be the Chinese invention patent application of 200410038012.X.
The oxygen content of storage medium is the key factor that influences resistance conversion (conversion between high-impedance state and the low resistance state) performance, and therefore, how the oxygen content in the regulating and controlling storage medium also is the problem that needs solve.
In addition; forming storage medium 130 is to adopt plasma treatment (plasmatreatment) or thermal annealing (thermal annealing) technology under oxygen atmosphere; usually can form on the dielectric film surface and not have the insulated metal oxide layer of binary resistance characteristic; dielectric film 131 for example shown in Figure 1 and insulated metal oxide layer 132; and insulated metal oxide layer 132 can influence the memory property of storage medium 130; with oxidized metal Cu is example, and dielectric film 131 is cuprous oxide (Cu at a low price
2O), insulated metal oxide layer 132 is the cupric oxide (CuO) of high price, Cu
2O has the binary resistance characteristic, and CuO does not have the binary resistance characteristic, and therefore, data (programming) are preceding in that memory cell is write, need apply bigger voltage earlier insulated metal oxide layer 132 is punctured, bring negative influence can for like this reliability of RRAM.
Summary of the invention
The technical problem that the present invention solves provides memory cell of a kind of Memister and preparation method thereof, with the oxygen content in minimizing and the controllable adjustable storage medium, improves the resistance conversion performance of storage medium.
For addressing the above problem, the invention provides a kind of manufacture method of memory cell of Memister, comprising: Semiconductor substrate is provided and is positioned at dielectric layer on the Semiconductor substrate; In described dielectric layer, form hearth electrode; On described hearth electrode, form first storage medium layer; Deposition reaction metal level on described first storage medium layer, described reacting metal are the metals that has the binary resistance characteristic after the oxidation; Form the top electrode that covers described reacting metal layer; Make the described reacting metal layer of the described first storage medium layer oxidation, form second storage medium layer.
Optionally, described first storage medium layer comprises the insulated metal oxide layer, and making the described reacting metal layer of the described first storage medium layer oxidation is to make the described reacting metal layer of described insulated metal oxide layer oxidation.
Optionally, make the described reacting metal layer of the described first storage medium layer oxidation, forming second storage medium layer is to adopt annealing process to make described reacting metal layer absorb the oxygen of described first storage medium layer, to be oxidized to second storage medium layer.The temperature of described annealing process is 100 to 400 ℃, and the time is 5 to 30min.
Optionally, be to adopt physical sputtering technology deposition reaction metallic film on described first storage medium layer at deposition reaction metal level on described first storage medium layer.Described reacting metal be metal tantalum, titanium, nickel and cobalt wherein one or several.
Optionally, the burning reaction heat of described reacting metal layer is lower than the burning reaction heat of described first storage medium layer.
Optionally, the burning reaction heat of described reacting metal layer is less than-50kcalories/mole.
Optionally, the thickness of described reacting metal layer is 2 to 20nm.
Optionally, the metal that described formation first storage medium layer is the described hearth electrode of oxidation forms first storage medium layer, or deposition and oxidized metal form first storage medium layer, or the metal oxide that deposition has a binary resistance characteristic forms first storage medium layer.The metal of described formation first storage medium layer is the wherein a kind of of metallic copper, tungsten, nickel, cobalt, molybdenum, tantalum and titanium.
For addressing the above problem, the present invention also provides a kind of manufacture method of memory cell of Memister, comprising: Semiconductor substrate is provided and is positioned at dielectric layer on the Semiconductor substrate; In described dielectric layer, form hearth electrode; On described hearth electrode, form first storage medium layer; Deposition reaction metal level on described first storage medium layer, described reacting metal are the metals that has the binary resistance characteristic after the oxidation; Make the described reacting metal layer of the described first storage medium layer oxidation, form second storage medium layer; On described second storage medium layer, form top electrode.
Optionally, make the described reacting metal layer of the described first storage medium layer oxidation, forming second storage medium layer is under vacuum condition, adopts annealing process to make described reacting metal layer absorb the oxygen of described first storage medium layer, to be oxidized to second storage medium layer.
For addressing the above problem, the present invention also provides a kind of memory cell of Memister, comprise hearth electrode, storage medium and top electrode, described storage medium comprises: be formed on first storage medium layer on the described hearth electrode, described first storage medium layer is the dielectric film with binary resistance characteristic that forms behind the oxidized metal; Be formed on second storage medium layer on described first storage medium layer, described second storage medium layer is the dielectric film with binary resistance characteristic that forms by behind the described first storage medium layer oxidation reaction metal.
Optionally, the metal of described formation first storage medium layer be metallic copper, tungsten, nickel, cobalt, molybdenum, tantalum and titanium wherein one or several.
Optionally, described reacting metal be metal tantalum, titanium, nickel and cobalt wherein one or several.
Optionally, the thickness of described first storage medium layer is 10-50nm.
Optionally, the thickness of described second storage medium layer is 2-20nm.
Compared with prior art, technique scheme increases between first storage medium layer of the memory cell of RRAM and top electrode and forms one deck reacting metal layer, and make the first storage medium layer oxidation reaction metal level, that is to say, utilize the reacting metal layer to absorb the oxygen of first storage medium layer of lower floor, so reduced the oxygen content of first storage medium layer of lower floor effectively.
In addition, by to the selection of the material of reacting metal layer and thickness and the annealing conditions also oxygen content of first storage medium layer of regulating and controlling lower floor effectively, and then improved the resistance conversion performance of storage medium.
When forming first storage medium layer, also formed under the situation of insulated metal oxide layer, make insulated metal layer oxidation reaction metal level, that is to say, utilize the reacting metal layer to absorb oxygen in the insulated metal oxide layer of first storage medium layer, the insulated metal oxide layer is reduced into dielectric film with binary resistance characteristic, simultaneously, the reacting metal layer also is oxidized to second storage medium layer with binary resistance characteristic, like this, the hearth electrode of memory cell and the medium between the top electrode all are the storage mediums with binary resistance characteristic, therefore, before memory cell is write data, bring the step of the puncture insulated metal oxide layer of negative effect with regard to having saved the reliability that can give RRAM, and then the operating time of having simplified memory cell.
Description of drawings
Fig. 1 is the structural representation of the memory cell of prior art Memister;
Fig. 2 is the flow chart of manufacture method of memory cell of the Memister of the embodiment of the invention one;
Fig. 3 is the flow chart of manufacture method of memory cell of the Memister of the embodiment of the invention two;
Fig. 4 to Figure 10 is the cross section structure schematic diagram of manufacture method step of memory cell of the Memister of the embodiment of the invention.
Embodiment
The embodiment of the invention passes through to increase formation one deck reacting metal layer between first storage medium layer of the memory cell of RRAM and top electrode, utilize the reacting metal layer to absorb the oxygen of first storage medium layer, to reduce the oxygen content in first storage medium layer, simultaneously, the reacting metal oxide layer also is oxidized to second storage medium layer with binary resistance characteristic.Below in conjunction with drawings and Examples the specific embodiment of the present invention is described in detail.
Embodiment 1
Please refer to accompanying drawing 2, the manufacture method of the memory cell of the Memister of present embodiment comprises:
Step S21 provides Semiconductor substrate and is positioned at dielectric layer on the Semiconductor substrate;
Step S22 forms hearth electrode in described dielectric layer;
Step S23 forms first storage medium layer on described hearth electrode;
Step S24, deposition reaction metal level on described first storage medium layer, described reacting metal are the metals that has the binary resistance characteristic after the oxidation;
Step S25 forms the top electrode that covers described reacting metal layer;
Step S26 makes the described reacting metal layer of the described first storage medium layer oxidation, forms second storage medium layer.
Please in conjunction with reference to the accompanying drawings 2 and 4, step S21 provides Semiconductor substrate 200 and is positioned at dielectric layer 210 on the Semiconductor substrate 200.Described Semiconductor substrate 200 can be doped silicon or semi-conducting materials such as silicon-on-insulator and SiGe.Described dielectric layer 210 is located immediately on the Semiconductor substrate 200; In multilevel integration, described dielectric layer 210 can also be the one deck in the multilayer insulation dielectric material, i.e. an interlayer dielectric layer on the Semiconductor substrate.The material of described dielectric layer 210 can be silicon dioxide or fluorine silex glass insulating material such as (FSG), adopts chemical vapor deposition (CVD) technology to be formed on the Semiconductor substrate 200 usually.For example transistor etc. of semiconductor device can be formed with in described Semiconductor substrate 200 and the dielectric layer 210, other input or output circuit or line (indicating among the figure) can also be formed with.
Please in conjunction with reference to the accompanying drawings 2 and 5, step S22 forms hearth electrode 220 in dielectric layer 210.The formation technology of hearth electrode 220 can have the preparation method who fills the hole ability for chemical vapour deposition (CVD), ald (ALD), magnetron sputtering, physical deposition, electron beam evaporation, thermal evaporation etc., preferably, adopt chemical vapor deposition method, concrete formation method is as described below: form opening (not indicating among the figure) in described dielectric layer 210, described opening and the source electrode of Semiconductor substrate semiconductor device or being electrically connected of drain electrode perhaps are electrically connected with the circuit that inputs or outputs that other need be connected; Adopt chemical vapor deposition method to form barrier layer (not indicating among the figure) on opening inwall and interlayer dielectric layer 210, the material on described barrier layer for example is a titanium nitride (TiN); On described barrier layer, adopt the chemical vapour deposition technique deposits conductive material then; Adopt barrier layer and electric conducting material on the CMP (Chemical Mechanical Polishing) process removal dielectric layer 210 at last, form hearth electrode 220, expose dielectric layer 210.
The electric conducting material that forms described hearth electrode 220 is unrestricted, can be suitable as the metal material of Memister hearth electrode with tungsten (W), platinum (Pt), aluminium (Al), copper (Cu), nickel (Ni), cobalt (Co), molybdenum (Mo), gold (Au), ruthenium (Ru), iridium (Ir), silver (Ag), palladium (Pd), titanium (Ti), tantalum (Ta) etc., preferably, select metal Cu or W for use.
Please in conjunction with reference to the accompanying drawings 2 and 6, step S23 forms first storage medium layer 230 on hearth electrode 220.The technology that forms first storage medium layer 230 on hearth electrode 220 surfaces is preferably: the metal material of direct oxidation hearth electrode 220, preferred plasma treatment of described oxidation technology or thermal anneal process, the thickness range of first storage medium layer 230 of formation can be 10-50 nanometer (nm).Because first storage medium layer 230 forms for the described hearth electrode 220 of direct oxidation, therefore, the contact interface of first storage medium layer/hearth electrode can not be subjected to the influence of follow-up other semiconductor fabrication process, and interface performance is good.
The material of described first storage medium layer 230 should be the dielectric film with binary resistance characteristic, and the character of semi-conducting material is generally arranged.Because being direct oxidation hearth electrodes 220, first storage medium layer 230 forms, therefore, the metal material of hearth electrode 220 can select for use Cu, W, Ni, Co, Mo, Ta and Ti wherein one or several, resistance has switching characteristic after the described metal material oxidation.For example, when hearth electrode 220 was W, first storage medium layer 230 was tungsten oxide (WO
X); When hearth electrode 220 was Cu, first storage medium layer 230 was cupric oxide (CuO
X).
On the other hand, the formation technology of described first storage medium layer 230 can also be: the technology that adopts chemical vapour deposition (CVD) or physical vapour deposition (PVD), direct deposit metallic material on hearth electrode 220, and the described metal material of oxidation forms the material that resistance has switching effect, and described material can switch between high-impedance state and low resistance state under outer field action.Described metal material can select for use Cu, W, Ni, Co, Mo, Ta and Ti wherein one or several.
On the other hand, the formation technology of described first storage medium layer 230 can also be: adopt the technology of chemical vapour deposition (CVD) or physical vapour deposition (PVD), directly deposit the metal oxide with binary resistance characteristic on hearth electrode 220, as CuO
x, WO
x, TaO
x, TiO
xDeng.
In the present embodiment, first storage medium layer 230 that the oxidized metal material forms comprises two-layer, the dielectric film with binary resistance characteristic 231 as shown in Figure 6 and do not have the insulated metal oxide layer 232 of binary resistance characteristic.With oxidized metal Cu is example, because heating not exclusively, at the cuprous oxide (Cu with binary resistance characteristic of oxidation formation
2O) 231 surfaces formed the very thin cupric oxide (CuO) 232 of one deck, and CuO do not have the binary resistance characteristic, thereby can influence the memory property of first storage medium layer 230.
Please in conjunction with reference to the accompanying drawings 2 and 7, step S24, deposition reaction metal level 240 on first storage medium layer 230, described reacting metal are the metals that has the binary resistance characteristic after the oxidation, for example be metal Ta, Ti, Ni and Co wherein one or several.Deposition reaction metal level 240 technology preferably is to adopt physical sputtering technology, promptly adopts physical sputtering deposition reaction metallic film on first storage medium layer 230, and reacting metal layer 240 covers the insulated metal oxide layer 232 of first storage medium layer 230.
The burning reaction heat of described reacting metal layer 240 is lower than the burning reaction heat of described first storage medium layer 230, for example, first storage medium layer 230 is that oxidized metal Cu forms, the reacting metal that reacting metal layer 240 can be selected is Ta, because the burning reaction heat of Ta is lower than the burning reaction heat of Cu.Usually, burning reaction heat Δ H＜-50 kcal/mol (kcalories/mole) of reacting metal layer 240.
The thickness of described reacting metal layer 240 is less than the thickness of first storage medium layer 230, with in the oxidation technology of subsequent reactions metal, reacting metal can absorb oxygen in the insulated metal oxide layer 232 of first storage medium layer 230 and oxygen in can absorbing medium film 231.Usually the thickness range of reacting metal layer 240 can be 2 to 20nm.
Please in conjunction with reference to the accompanying drawings 2 and 8, step S25 forms the top electrode 250 that covers reacting metal layer 240.Forming top electrode 250 can be to adopt for example chemical vapor deposition method or physical gas-phase deposition etc., forms the top electrode 250 that covers reacting metal layer 240.The material of described top electrode can be metal A l, titanium nitride (TiN), tantalum nitride metal nitrides such as (TaN), and perhaps noble metal such as metal Pt and other are suitable as the electric conducting material of Memister top electrode.
Please in conjunction with reference to the accompanying drawings 2 and 9, step S26 makes first storage medium layer, 230 oxidation reaction metal levels 240, forms second storage medium layer 241.In the present embodiment,, therefore, first storage medium layer, 230 oxidation reaction metal levels 240 are actually make insulated metal oxide layer 232 oxidation reaction metal levels 240 because first storage medium layer 230 comprises insulated metal oxide layer 232.Forming second storage medium layer 241 is the oxygen that the employing annealing process makes reacting metal layer 240 absorbent insulation metal oxide layer 232, to be oxidized to second storage medium layer 241.The temperature of described annealing process be 100 to 400 degrees centigrade (℃), the time is 5 to 30 minutes (min).In annealing process, because reacting metal layer 240 is covered by top electrode 250 fully, can't absorb oxygen (for example airborne oxygen) from the upper strata, thereby directly absorbing the oxygen of the insulated metal oxide layer 232 of lower floor, reacting metal layer 240 has been oxidized to second storage medium layer 241 with binary resistance characteristic; Insulated metal oxide layer 232 also has been reduced into the dielectric film with binary resistance characteristic simultaneously.Like this, storage medium between hearth electrode 220 and top electrode 250, promptly first storage medium layer 230 and second storage medium layer 241 all have the binary resistance characteristic, therefore, before memory cell is write data, bring the step of the puncture insulated metal oxide layer 232 of negative effect with regard to having saved the reliability that can give RRAM, and then the operating time of having simplified memory cell.
And,, therefore reduced the oxygen content of first storage medium layer 230 of lower floor effectively because reacting metal layer 240 has absorbed the oxygen of the insulated metal oxide layer 232 of lower floor; Simultaneously, by oxygen content, improved the resistance conversion performance of storage medium to first storage medium layer 230 of the selection controllable adjustable lower floor of the material of reacting metal layer and thickness and annealing conditions.
In addition, because the thickness of reacting metal layer 240 is less than the thickness of first storage medium layer 230, in the oxidizing process of reacting metal, reacting metal only can absorb the oxygen in the insulated metal oxide layer 232 of first storage medium layer 230 and be not enough to oxygen in the absorbing medium film 231, therefore, insulated metal oxide layer 232 can be reduced into and dielectric film 231 identical materials, and dielectric film 231 can not be reduced into metal.
Insulated metal oxide layer 232 with first storage medium layer 230 is that CuO, reacting metal are that Ta is an example, and metal Ta has been oxidized to the tantalum oxide (TaO with binary resistance characteristic
X) layer 241; CuO layer 232 also has been reduced into the Cu with binary resistance characteristic simultaneously
2 O layer 230.
Embodiment 2
Please refer to accompanying drawing 3, the manufacture method of the memory cell of the Memister of present embodiment comprises:
Step S31 provides Semiconductor substrate and is positioned at dielectric layer on the Semiconductor substrate;
Step S32 forms hearth electrode in described dielectric layer;
Step S33 forms first storage medium layer on described hearth electrode;
Step S34, deposition reaction metal level on described first storage medium layer, described reacting metal are the metals that has the binary resistance characteristic after the oxidation;
Step S35 makes the described reacting metal layer of the described first storage medium layer oxidation, forms second storage medium layer;
Step S36 forms top electrode on described second storage medium layer.
The difference of present embodiment and embodiment one is: embodiment one forms top electrode earlier on the reacting metal layer, again the reacting metal layer is oxidized to second storage medium layer; Present embodiment is earlier the reacting metal layer to be oxidized to second storage medium layer, forms top electrode again on second storage medium layer.Therefore, the step S31 to S34 of present embodiment, please the step S21 to S24 of reference example one is described accordingly.
Please in conjunction with reference to the accompanying drawings 3 and 10, step S35 makes first storage medium layer, 230 oxidation reaction metal levels 240, forms second storage medium layer 241.In the present embodiment,, therefore, first storage medium layer, 230 oxidation reaction metal levels 240 are actually make insulated metal oxide layer 232 oxidation reaction metal levels 240 because first storage medium layer 230 comprises insulated metal oxide layer 232.Forming second storage medium layer 241 is the oxygen that the employing annealing process makes reacting metal layer 240 absorbent insulation metal oxide layer 232, to be oxidized to second storage medium layer 241.The temperature of described annealing process is 100 to 400 ℃, and the time is 5 to 30min.Because reacting metal layer 240 is outside being exposed to, directly absorb the oxygen of the insulated metal oxide layer 232 of lower floor in order to make reacting metal layer 240 avoid absorbing the oxygen in the outside air, therefore need carry out annealing process under vacuum condition, reacting metal layer 240 has been oxidized to second storage medium layer 241 with binary resistance characteristic; Insulated metal oxide layer 232 also has been reduced into the dielectric film with binary resistance characteristic simultaneously.Like this, storage medium between hearth electrode 220 and top electrode 250, promptly first storage medium layer 230 and second storage medium layer 241 all have the binary resistance characteristic, therefore, before memory cell is write data, bring the step of the puncture insulated metal oxide layer 232 of negative effect with regard to having saved the reliability that can give RRAM, and then the operating time of having simplified memory cell.
And,, therefore reduce the oxygen content of first storage medium layer 230 of lower floor effectively because reacting metal layer 240 has absorbed the oxygen of the insulated metal oxide layer 232 of lower floor; When asking,, improved the resistance conversion performance of storage medium by oxygen content to first storage medium layer 230 of the selection controllable adjustable lower floor of the material of reacting metal layer and thickness and annealing conditions.
In addition, because the thickness of reacting metal layer 240 is less than the thickness of first storage medium layer 230, in the oxidizing process of reacting metal, reacting metal only can absorb the oxygen in the insulated metal oxide layer 232 of first storage medium layer 230 and be not enough to oxygen in the absorbing medium film 231, therefore, insulated metal oxide layer 232 can be reduced into and dielectric film 231 identical materials, and dielectric film 231 can not be reduced into metal.
Please in conjunction with reference to the accompanying drawings 3 and 9, step S36 forms top electrode 250 on second storage medium layer 241.Forming top electrode 250 can be to adopt for example chemical vapor deposition method or physical gas-phase deposition etc., forms the top electrode 250 that covers second storage medium layer 241.The material of described top electrode can be metal A l, metal nitrides such as TiN, TaN, and perhaps noble metal such as metal Pt and other are suitable as the electric conducting material of Memister top electrode.
Directly deposition top electrode 250, the second storage medium layer/contact interface of top electrode can not be subjected to the influence of follow-up other semiconductor fabrication process on second storage medium layer 241, and interface performance is good.
The manufacture method of corresponding said memory cells, the embodiment of the invention provides the memory cell of a kind of RRAM, its structure as shown in Figure 9, described memory cell comprises: comprise hearth electrode 220, storage medium and top electrode 250.Wherein, described storage medium comprises first storage medium 230 and second storage medium layer 241.
Second storage medium layer 241 is formed on first storage medium layer 230, and described second storage medium layer 241 is the dielectric films with binary resistance characteristic that form by behind the described first storage medium layer oxidation reaction metal.The thickness of second storage medium layer 241 is 2-20nm.The reacting metal that forms second storage medium layer 241 can be metal Ta, Ti, Ni and Co wherein one or several.
In sum, the embodiment of the invention passes through to increase formation one deck reacting metal layer between first storage medium layer of the memory cell of RRAM and top electrode, make the insulated metal oxide layer oxidation reaction metal level of first storage medium layer, promptly utilize the reacting metal layer to absorb oxygen in the insulated metal oxide layer of first storage medium layer, the insulated metal oxide layer is reduced into dielectric film with binary resistance characteristic, simultaneously, the reacting metal layer also is oxidized to second storage medium layer with binary resistance characteristic, like this, the hearth electrode of memory cell and the medium between the top electrode all are the storage mediums with binary resistance characteristic, therefore, before memory cell is write data, bring the step of the puncture insulated metal oxide layer of negative effect with regard to having saved the reliability that can give RRAM, and then the operating time of having simplified memory cell.
Need to prove, the foregoing description is to describe under first storage medium layer includes the situation of insulated metal oxide layer, and when the first storage medium layer be single dielectric film and not containing under the situation of insulated metal oxide layer with binary resistance characteristic, the reacting metal layer that increases promptly can be used for absorbing the oxygen of first storage medium layer of lower floor, with the oxygen content of first storage medium layer that reduces lower floor effectively; And, by to the selection of the material of reacting metal layer and thickness and the annealing conditions also oxygen content of first storage medium layer of regulating and controlling lower floor effectively, and then improved the resistance conversion performance of storage medium.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (10)
1. the manufacture method of the memory cell of a Memister is characterized in that, comprising:
Semiconductor substrate is provided and is positioned at dielectric layer on the Semiconductor substrate;
In described dielectric layer, form hearth electrode;
On described hearth electrode, form first storage medium layer;
Deposition reaction metal level on described first storage medium layer, described reacting metal are the metals that has the binary resistance characteristic after the oxidation;
Make the described reacting metal layer of the described first storage medium layer oxidation, form second storage medium layer;
On described second storage medium layer, form top electrode;
The described described reacting metal layer of the described first storage medium layer oxidation that makes, forming second storage medium layer is under vacuum condition, adopts annealing process to make described reacting metal layer absorb the oxygen of described first storage medium layer, to be oxidized to second storage medium layer.
2. the manufacture method of the memory cell of Memister according to claim 1, described first storage medium layer comprises the insulated metal oxide layer, and making the described reacting metal layer of the described first storage medium layer oxidation is to make the described reacting metal layer of described insulated metal oxide layer oxidation.
3. the manufacture method of the memory cell of Memister according to claim 1 is characterized in that, the temperature of described annealing process is 100 to 400 ℃, and the time is 5 to 30min.
4. the manufacture method of the memory cell of Memister according to claim 1 is characterized in that, is to adopt physical sputtering technology deposition reaction metallic film on described first storage medium layer at deposition reaction metal level on described first storage medium layer.
5. the manufacture method of the memory cell of Memister according to claim 1 is characterized in that, described reacting metal be metal tantalum, titanium, nickel and cobalt wherein one or several.
6. the manufacture method of the memory cell of Memister according to claim 1 is characterized in that, the burning reaction heat of described reacting metal layer is lower than the burning reaction heat of described first storage medium layer.
7. the manufacture method of the memory cell of Memister according to claim 6 is characterized in that, the burning reaction heat of described reacting metal layer is less than-50kcalories/mole.
8. the manufacture method of the memory cell of Memister according to claim 1 is characterized in that, the thickness of described reacting metal layer is 2 to 20nm.
9. the manufacture method of the memory cell of Memister according to claim 1, it is characterized in that, the metal that described formation first storage medium layer is the described hearth electrode of oxidation forms first storage medium layer, or deposition and oxidized metal form first storage medium layer, or the metal oxide that deposition has a binary resistance characteristic forms first storage medium layer.
10. the manufacture method of the memory cell of Memister according to claim 9 is characterized in that, the metal of described formation first storage medium layer be metallic copper, tungsten, nickel, cobalt, molybdenum, tantalum and titanium wherein one or several.
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| US9680091B2 (en) * | 2012-06-15 | 2017-06-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for a complimentary resistive switching random access memory for high density application |
| CN103066206B (en) * | 2012-12-25 | 2016-03-23 | 清华大学 | A kind of resistive formula memory cell and forming method thereof |
| CN104576926B (en) * | 2013-10-25 | 2019-05-14 | 华邦电子股份有限公司 | Resistance-type memory and its manufacturing method |
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| US6849891B1 (en) * | 2003-12-08 | 2005-02-01 | Sharp Laboratories Of America, Inc. | RRAM memory cell electrodes |
| US20070048990A1 (en) * | 2005-08-30 | 2007-03-01 | Sharp Laboratories Of America, Inc. | Method of buffer layer formation for RRAM thin film deposition |
| CN101118922A (en) * | 2007-08-30 | 2008-02-06 | 复旦大学 | CuxO resistor memory with upper electrode as protective layer and manufacturing method therefor |
| CN101159309A (en) * | 2007-11-08 | 2008-04-09 | 复旦大学 | Method for implementing low power consumption resistance memory |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6849891B1 (en) * | 2003-12-08 | 2005-02-01 | Sharp Laboratories Of America, Inc. | RRAM memory cell electrodes |
| US20070048990A1 (en) * | 2005-08-30 | 2007-03-01 | Sharp Laboratories Of America, Inc. | Method of buffer layer formation for RRAM thin film deposition |
| CN101118922A (en) * | 2007-08-30 | 2008-02-06 | 复旦大学 | CuxO resistor memory with upper electrode as protective layer and manufacturing method therefor |
| CN101159309A (en) * | 2007-11-08 | 2008-04-09 | 复旦大学 | Method for implementing low power consumption resistance memory |
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